GaAs MMIC high power and high efficiency power amplifier chip

Abstract

The present invention belongs to the technical field of power amplifiers, and discloses a GaAs MMIC high-power and high-efficiency power amplifier chip, including an input matching network, a stability network, a bias circuit, a low-loss interstage matching network, and a low-loss output matching network; the input matching network includes lossy components, a DC blocking capacitor, an input matching circuit, a bias circuit, and a stability network, and the input matching network is connected to the input end of the power amplifier; the low-loss interstage matching network is located between different amplification stages of the power amplifier; the low-loss output matching network is connected to the output end of the power amplifier, and includes a group of parallel capacitors and series inductors; the bias circuit is connected to each amplification stage of the power amplifier; and the stability network is connected to the input matching network and the bias circuit. The present invention greatly improves the output power and power added efficiency of the power amplifier, and the working bandwidth covers the entire Ku band.

Description

Technical Field

[0001] The invention belongs to the technical field of power amplifiers, and in particular relates to a GaAs MMIC high-power and high-efficiency power amplifier chip. Background Art

[0002] Power amplifiers are used in mobile phone base stations, satellite communications, wireless local area networks (WLAN), cellular networks, etc. Power amplifiers amplify signals in these systems to ensure that the signals can cover a wider area and penetrate obstacles such as buildings. Ku-band power amplifiers are commonly used in satellite uplinks and ground stations to ensure that the signal strength is sufficient to transmit from the ground to the satellite, or from the satellite back to the ground. Ku-band power amplifiers need to maintain high efficiency and high output power at high frequencies to ensure the transmission quality of the signal and the overall performance of the system.

[0003] Monolithic microwave integrated circuit (MMIC) is an integrated circuit technology that integrates all active and passive microwave components on a semiconductor substrate. The advantages of MMIC include small size, light weight, stable performance and good consistency in batch production. It is widely used in microwave and millimeter wave communications, radar, electronic warfare and other fields.

[0004] Ku band refers to the electromagnetic wave frequency band between 12-18 GHz. Due to its high frequency, large bandwidth and good transmission capability, Ku band has significant advantages in data transmission and high-resolution imaging. By optimizing the design and using advanced semiconductor materials, high-performance and high-efficiency MMIC power amplifiers can be realized to meet the growing demand for high-frequency communications.

[0005] GaAs (gallium arsenide) and GaN (gallium nitride) are commonly used MMIC materials. Although GaN has advantages in power density and efficiency, its manufacturing process is relatively complex and costly. The present invention uses GaAs material to design an MMIC power amplifier, which can greatly save production costs.

[0006] The power added efficiency of the current Ku-band GaAs MMIC power amplifiers in this frequency band is still not high enough, which leads to large energy losses. In order to achieve high efficiency and high output power, the traditional matching circuit is a conjugate matching circuit to achieve maximum power transmission, which will lead to deterioration of the input port return loss. The existing Ku-band MMIC power amplifiers perform poorly in processing broadband signals, which limits their use in applications that require large bandwidth.

[0007] In 2023, Li Shengqi and others published a paper titled "Ku-band power amplifier design based on GaAs process", which uses 0.5umGaAs pHEMT process design, dual L-type matching network structure and lossy matching to achieve a power amplifier with a bandwidth of 12-18GHz. The small signal gain is 15.7dB, the input return loss is less than 10dB, the output saturation power is 23dBm, and the power added efficiency is greater than 20%. Xiao Wei and others published a paper titled "Satellite-borne high-reliability Ku-band GaN power amplifier chip" in 2023. The patent uses 0.2umGaN HEMT to make a Ku-band power amplifier chip with a 12V operating voltage. At 17.5-18GHz, the small signal gain is greater than 27dB, the typical output power is 34dBm, the power added efficiency is 38%, and the power gain is greater than 20dB.

[0008] Traditional power amplifiers are difficult to achieve high output power and high efficiency while ensuring broadband, and are limited by the power density of materials. GaAs-made power amplifiers in a limited area can achieve high output power and high efficiency, but their miniaturization is also poor. Existing full Ku-band GaAs MMIC power amplifiers cannot achieve good performance while covering a bandwidth of 12-18GHz.

[0009] Through the above analysis, the problems and defects of the prior art are as follows:

[0010] At present, the power added efficiency and output power of Ku-band GaAs MMIC power amplifiers are still not high enough while achieving large bandwidth, which leads to large energy loss and limits their use in applications requiring large bandwidth. Summary of the invention

[0011] In view of the problems existing in the prior art, the present invention provides a full Ku-band GaAs MMIC high-power and high-efficiency power amplifier chip.

[0012] The present invention is implemented as follows: a full Ku-band GaAs MMIC high-power and high-efficiency power amplifier chip comprises:

[0013] Input matching network;

[0014] Stability network;

[0015] Bias circuit;

[0016] Low-loss inter-stage matching network;

[0017] Low loss output matching network.

[0018] The input matching network includes lossy components, DC blocking capacitors, input matching circuits, bias circuits and stability networks. The input matching network is connected to the input end of the power amplifier to achieve impedance matching at the input end, reduce reflection loss and improve input matching effect.

[0019] The low-loss inter-stage matching network is located between different amplification stages of the power amplifier, providing impedance matching to improve gain and efficiency.

[0020] The low-loss output matching network is connected to the output end of the power amplifier and includes a group of parallel capacitors and series inductors for providing efficient impedance matching at the output end to maximize power output and efficiency.

[0021] The bias circuit is connected to each amplification stage of the power amplifier and is used for providing a stable bias voltage.

[0022] The stability network is connected to the input matching network and the bias circuit to improve the stability of the power amplifier.

[0023] Furthermore, the stability network reduces high frequency gain and improves passband gain flatness through capacitors and inductors, thereby improving stability.

[0024] Furthermore, the lossy element is a resistor, which is connected between the input matching circuit and the DC blocking capacitor, and is used to provide appropriate impedance matching at the input end, reduce reflection loss and improve input matching effect.

[0025] Furthermore, the low-loss inter-stage matching network is composed of a driver-stage drain bias circuit, an amplifier-stage gate bias circuit, and an inter-stage matching circuit; a DC blocking capacitor is added between the two power supplies to ensure that the driver-stage and amplifier-stage transistors operate in a linear region.

[0026] Furthermore, the low-loss inter-stage matching network includes an LC matching circuit composed of a capacitor and a microstrip.

[0027] Furthermore, the low-loss output matching network is composed of an amplifier stage drain bias circuit, an LC matching network, an output DC blocking capacitor and an output port.

[0028] Furthermore, the low-loss output matching network includes a group of parallel capacitors and series inductors, which are respectively connected between the output end and the ground, and are used to provide efficient impedance matching at the output end to maximize power output and efficiency.

[0029] Furthermore, the low-loss output matching network uses fewer components to achieve lossless matching.

[0030] In combination with the above-mentioned technical solutions and the technical problems solved, the advantages and positive effects of the technical solutions of the present invention are as follows.

[0031] First, in view of the problems that the overall efficiency and output power of the prior art power amplifiers in the entire Ku band still need to be improved, and the return loss of the input port is poor, the present invention proposes a full Ku-band GaAs MMIC high-power and high-efficiency power amplifier chip, which greatly improves the output power and power added efficiency of the power amplifier, and the working bandwidth covers the entire Ku band.

[0032] (1) The present invention adopts low-pass filter theory for matching, replaces inductors with microstrip lines, and replaces ideal capacitors with flat capacitors, thus realizing low-loss input, output, and inter-stage matching networks. The stability network adopts an RC parallel structure, where the low-frequency part is absorbed by the resistor and the high-frequency part passes through the capacitor. This structure can improve the gain flatness of the power amplifier and reduce the risk of self-excitation.

[0033] (2) The driving stage of the present invention is 4×10×120um, the amplification stage is 16×8×100um, the driving ratio of the front and rear stage tube cores is reasonably designed, each tube can operate in the linear region under the rated voltage, and the entire chip is stable at DC-100GHz.

[0034] (3) The layout of the present invention adopts a power divider in the input matching network, a power combiner in the output matching, and different transistors share a ground; it can effectively reduce the chip area while ensuring the high efficiency and high output power of the power amplifier, thereby reducing the cost.

[0035] (4) The power amplifier of the present invention has an output power ≥36.7dBm, a power added efficiency ≥45%, and a gain ≥17dB in the entire Ku band of 12-18GHz when the drain power supply is 4V.

[0036] (5) The present invention belongs to the technical field of GaAs MMIC power amplifiers and can achieve high power and high efficiency in the entire Ku band.

[0037] Second, as auxiliary evidence of the inventiveness of the claims of the present invention, it is also reflected in the following important aspects:

[0038] (1) The Ku band is widely used in satellite communications, radar systems, 5G communications and other fields. These fields have a strong demand for high-performance power amplifiers, so the market demand for this technical solution is large. GaAs MMIC power amplifiers with full Ku band coverage have the characteristics of high gain, high efficiency and wide bandwidth, which can meet the needs of various applications. Its technical advantages make it competitive in the market.

[0039] (2) The existing technology in the research and development of Ku-band MMIC power amplifiers often focuses on certain frequency bands, and lacks high-performance power amplifiers that cover the entire Ku-band. The technical solution of the present invention achieves full Ku-band coverage, and the existing Ku-band MMIC power amplifiers are insufficient in terms of high efficiency and high power output. The present invention significantly improves the efficiency and power output performance of the amplifier by optimizing the design and material selection.

[0040] (3) The full Ku-band GaAs MMIC power amplifier chip covers the entire Ku-band, solving the problem of wide-band characteristics of power amplifiers in this frequency band. Traditional amplifiers have difficulty maintaining good performance in such a wide frequency band, but this chip achieves the goal of high output power and high efficiency in the entire Ku-band through optimized design.

[0041] (4) Traditionally, many high-frequency power amplifier chips use silicon-based materials (such as silicon LDMOS) instead of gallium arsenide (GaAs). Although silicon materials are lower in cost, they have limitations in high-frequency performance and power output. MMIC power amplifier chips using GaAs materials overcome the bias against silicon materials through their high electron mobility and better high-frequency performance, providing higher power output and better frequency response. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 1 is a diagram of overall transistor size and drive ratio provided by an embodiment of the present invention.

[0043] Figure 2 It is an overall circuit topology diagram provided by an embodiment of the present invention.

[0044] Figure 3 It is a layout simulation power added efficiency curve diagram provided by an embodiment of the present invention.

[0045] Figure 4 It is a layout simulation output power curve diagram provided by an embodiment of the present invention.

[0046] Figure 5 It is a layout simulation small signal gain curve diagram provided by an embodiment of the present invention.

[0047] Figure 6 It is a layout simulation input return loss curve diagram provided by an embodiment of the present invention.

[0048] Figure 7 It is a layout simulation stability curve diagram provided by an embodiment of the present invention.

[0049] Figure 8 This is a layout of a power amplifier provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0051] An embodiment of the present invention provides a full Ku-band GaAs MMIC high-power and high-efficiency power amplifier chip including:

[0052] Input matching network, stability network, bias circuit, low loss interstage matching network, low loss output matching network.

[0053] The input matching network includes lossy components, DC blocking capacitors, input matching circuits, bias circuits and stability networks; the main purpose of input matching is to ensure that maximum power is transmitted from the signal source to the power amplifier; through the input matching network, the impedance of the signal source can be matched with the input impedance of the power amplifier, thereby maximizing power transmission.

[0054] The inter-stage matching network is composed of a driver stage drain bias circuit, an amplifier stage gate bias circuit and an inter-stage matching circuit; a DC blocking capacitor is added between the two power supplies to ensure that the driver stage and amplifier stage transistors work in a linear region.

[0055] The inter-stage matching network provided in the embodiment of the present invention includes an LC matching circuit composed of capacitors and microstrips. Such a matching circuit can also be used as a power division network. During the matching process, the quarter-wavelength microstrip line of the bias circuit is also taken into account, and the circuit elements are utilized to the greatest extent to achieve low-loss matching.

[0056] The low-loss output matching network is composed of an amplifier stage drain bias circuit, an LC matching network, an output DC blocking capacitor and an output port; output matching is the most important part of a power amplifier, which directly affects the output power and power added efficiency of the power amplifier.

[0057] The output matching network provided by the embodiment of the present invention uses fewer devices to achieve lossless matching, which can improve the overall performance of the power amplifier to the greatest extent.

[0058] The power amplifier mainly amplifies the input signal through the gate length of the transistor. To ensure high output power, the present invention adopts two-stage amplification, and the transistors share one ground to reduce the area during layout design.

[0059] The working principle of this GaAs MMIC high-power and high-efficiency power amplifier chip is mainly achieved through the coordinated work of various networks and circuits. First, the input matching network includes lossy components, DC blocking capacitors, input matching circuits, bias circuits, and stability networks. The input matching network is connected to the input end of the power amplifier to achieve impedance matching at the input end, thereby reducing reflection loss and improving input matching effect, ensuring that the signal has the best transmission characteristics when entering the power amplifier.

[0060] Secondly, the amplifier stages inside the power amplifier are connected through a low-loss inter-stage matching network. This network maximizes the gain and efficiency of each amplifier stage by providing accurate impedance matching, thereby improving the performance of the overall power amplifier. This inter-stage matching is critical to maintaining signal quality and amplification.

[0061] In addition, a low-loss output matching network is located at the output of the power amplifier, which includes a set of parallel capacitors and series inductors. This network ensures that the output power and efficiency of the power amplifier are maximized by providing efficient impedance matching at the output, avoiding power loss and optimizing the quality of the output signal.

[0062] Finally, the bias circuit is connected to each amplifier stage of the power amplifier to provide a stable bias voltage to ensure that each amplifier stage operates under appropriate voltage conditions, thereby maintaining the normal operation of the amplifier. The stability network is connected to the input matching network and the bias circuit to improve the stability of the power amplifier and prevent unstable phenomena such as self-oscillation during operation, thereby ensuring the reliability and performance of the entire power amplifier.

[0063] like Figure 2 As shown, the circuit is symmetrical about the input and output ends, so that the amplitude and phase of each branch are consistent, thereby improving the output power and power added efficiency. Since each part of the circuit is symmetrical, the following description is the function of a single branch, which is the same as the function of other branches.

[0064] The MMIC power amplifier is designed with GaAs material and has a power density of 0.5W / mm. Taking into account the influence of temperature under continuous wave and high and low temperature working conditions, the amplifier stage adopts 16 8×100um unit cells in parallel to ensure that the amplifier stage device has sufficient saturated output power and efficiency.

[0065] Further, if Figure 1 As shown, in order to ensure high output power, two-stage amplification is adopted, the first-stage gate width is 4×10×120um, and the front-to-back drive ratio is 1:2.7.

[0066] The input matching network includes an RF input port, which provides input impedance for the first-stage power tube and the input matching network. The main purpose of input matching is to match the output impedance of the signal source with the input impedance of the power amplifier to achieve maximum power transmission. This matching can reduce reflections and losses, allowing more signal power to be transferred to the amplifier input.

[0067] Furthermore, in order to ensure high output power and high power added efficiency, if the input matching is the optimal source impedance, the input return loss is relatively poor, and a good input return loss is achieved, a balanced amplifier is used using a lange coupler, or a lossy matching is used at the input end to achieve a good input return loss. The present invention adds a resistor at the input end to improve the return loss of the input port.

[0068] Furthermore, the resistor R1 is a lossy element of the input matching circuit, which improves the return loss at the input end of the power amplifier.

[0069] Furthermore, capacitors C1, C2, microstrip line TL1, capacitor C3, microstrip lines TL3, TL4 together form a low-loss low-pass filter matching circuit, in which the microstrip line is replaced by an inductor.

[0070] Furthermore, resistor R6 and capacitor C10 constitute a stability network of the input matching network, which can improve the gain flatness of the power amplifier. Resistor R2, microstrip line TL7, and capacitor C5 constitute a bias circuit of the first-stage gate to prevent RF signals from entering the DC source.

[0071] The interstage matching network is used for interstage matching by adjusting the input and output impedances so that the output impedance of the previous stage matches the input impedance of the next stage, thereby achieving maximum power transmission. This reduces power reflection and loss and improves the efficiency of the entire amplifier chain.

[0072] Furthermore, the microstrip lines TL10 and TL11 are power combiners, and the resistor R10 is an odd-mode suppression resistor. Odd-mode signals may cause instability of the amplifier, resulting in self-oscillation or other undesirable behaviors. The odd-mode suppression resistor helps the amplifier maintain a stable working state and avoid unnecessary oscillation and noise by suppressing these signals. The odd-mode suppression resistor reduces the amplitude of these odd-mode signals by providing a damping effect, thereby suppressing possible interference and instability.

[0073] Furthermore, capacitor C14 and microstrip line TL14 form a first-stage drain bias circuit, capacitor C19, microstrip line TL16 and resistor R12 form a second-stage gate bias circuit. Capacitor C16 is a DC blocking capacitor to ensure that the first and second stage transistors operate in the linear region.

[0074] Furthermore, capacitor C20, microstrip lines TL18, TL19, capacitors C23, C24, microstrip lines TL22, TL23, TL24, TL25 form an LC matching circuit, and simultaneously distribute the input power of the first stage to the second stage. Figure 2 The individual transistors in the amplifier stage shown are 2×8×100um.

[0075] The low-loss output matching network synthesizes the output power of the second-stage transistor and transmits it to the output port to the maximum extent. The output matching network plays a vital role in power transmission, improving efficiency, improving bandwidth, etc. Therefore, it is necessary to use as few devices as possible to achieve the best performance of the power amplifier.

[0076] Furthermore, capacitors C27, C28, microstrip lines TL30, TL31, TL32, TL33, capacitor C31, microstrip lines TL38, TL39, TL44 and capacitor C35 form an amplifier stage power matching network, and simultaneously synthesize the output power of the amplifier stage transistors.

[0077] Furthermore, the microstrip line TL42 and the capacitor C33 are the drain bias circuit of the amplifier stage. Meanwhile, the microstrip line TL42 is also considered in the matching circuit of the amplifier stage, and the components in the matching network are utilized to the maximum extent, thereby reducing the loss of the output matching network.

[0078] Furthermore, capacitor C36 is a DC blocking capacitor, which prevents DC signals from entering the RF circuit and outputs RF signals at the same time.

[0079] Furthermore, the output matching circuit adopts a reactance matching method to reduce the loss of the circuit. Good output matching can minimize the reflected power and prevent the amplifier from reprocessing the unmatched reflected power, thereby improving the overall efficiency.

[0080] Ku-band radar systems are widely used in fields such as meteorological monitoring and aviation navigation. High-performance power amplifier chips can improve the detection distance and accuracy of radar systems; wireless communication systems, including microwave and millimeter wave communication links, need to transmit high-frequency signals in the Ku-band. GaAs MMIC power amplifier chips can provide the required power amplification and improve the efficiency and quality of signal transmission; in electronic countermeasures and electronic warfare, high-frequency signal interference and detection equipment are required, and power amplifier chips can provide efficient power amplification in these devices. In general, full Ku-band GaAs MMIC power amplifier chips are widely used in various high-frequency application fields, improving the performance and reliability of these systems.

[0081] MMIC power amplifiers have significant advantages in the drive ratio selection configuration, which can improve power output efficiency, reduce signal distortion, improve thermal management, achieve miniaturization and high integration, and provide good frequency response. If the transistor gate length is too high, it will cause power waste and reduce the efficiency of the power amplifier; if the transistor gate length is too low, the output power will not meet the requirements. Therefore, the selection of transistor size and the drive ratio of the front and back stages are crucial.

[0082] Further, if Figure 1 As shown, the present invention deduces that the GaAs power density is 0.5W / mm through simulation. According to the output power calculation and simulation, it is finally determined that the amplifier stage transistors are 16 8×100um transistors to ensure high output power.

[0083] Furthermore, in order to make all transistors work in the linear region, the driver stage needs to select a suitable transistor size to provide input power for the amplifier stage transistor. After simulation and calculation, the driver stage is finally selected to be 4 10×120um transistors.

[0084] Through simulation, we get Figure 3~Figure 7 The curve shown in the application embodiment of the present invention is shown in the curve shown in the application embodiment of the present invention. When the input signal is 21dBm, Figure 3 It can be seen that the power added efficiency is higher than 45% in the entire Ku band, and the peak power added efficiency is as high as 53.8%. Figure 4 It can be seen that the output power is higher than 36.7dBm in the entire passband, and the peak output power is 37.28dBm. The output power flatness of the entire passband is ±0.3dBm, which can avoid generating different gains for signals with different frequency components, maintain the spectral integrity of the signal, and avoid signal distortion.

[0085] like Figure 5 As shown, the small signal gain is greater than 17dB across the entire passband:

[0086] m 1

[0087] freq=18.00 GHz

[0088] dB(S(2,1))=17.267.

[0089] like Figure 6 As shown, the return loss of the designed power amplifier is better than 11dB in the passband:

[0090] m2

[0091] freg=12.00 GHz

[0092] dB(S(1,1))=-11.235

[0093] m3

[0094] freq=18.00 GHz

[0095] dB(S(1,1))=-11.010.

[0096] The layout simulation stability curve is as follows: Figure 7 shown.

[0097] The power amplifier layout is as follows Figure 8 As shown in the figure, the layout design also follows the principle of symmetry, so that the amplitude and phase of each branch signal remain consistent, thereby improving the performance of the power amplifier. When designing the layout, ensure the integrity of the signal transmission path to avoid signal attenuation and reflection. Arrange the transmission line reasonably to minimize the loss.

[0098] Furthermore, the layout design should shorten the routing length of high-frequency signals as much as possible to reduce signal attenuation and crosstalk. The input and output signals and power lines of the MMIC power amplifier should be laid out separately to avoid mutual interference.

[0099] Furthermore, in order to effectively dissipate heat, it is necessary to ensure that the power density is reasonable and avoid areas with excessively high heat density. The layout of components and traces should be reasonably planned to minimize the impact of parasitic capacitance and inductance.

[0100] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any modifications, equivalent substitutions and improvements made by any technician familiar with the technical field within the technical scope disclosed by the present invention and within the spirit and principle of the present invention should be covered by the protection scope of the present invention.

Claims

1. A full Ku-band GaAs MMIC high-power and high-efficiency power amplifier chip, characterized in that: include: Input matching network, stability network, bias circuit, low-loss inter-stage matching network, low-loss output matching network; The input matching network includes lossy elements, DC blocking capacitors, input matching circuits, bias circuits, and stability networks. The input matching network is connected to the input end of the power amplifier to achieve impedance matching at the input end. The low-loss inter-stage matching network is located between different amplification stages of the power amplifier to provide impedance matching; The low-loss output matching network is connected to the output end of the power amplifier and includes a set of parallel capacitors and series inductors for providing efficient impedance matching at the output end; The bias circuit is connected to each amplification stage of the power amplifier and is used to provide a stable bias voltage; The stability network is connected to the input matching network and the bias circuit to improve the stability of the power amplifier; The low-loss output matching network includes a group of parallel capacitors and series inductors, wherein the parallel capacitors and the series inductors are respectively connected between the output terminal and the ground, and are used to provide efficient impedance matching at the output terminal; The low-loss inter-stage matching network is composed of a driver-stage drain bias circuit, an amplifier-stage gate bias circuit, and an inter-stage matching circuit; a DC blocking capacitor is added between the two power supplies to ensure that the driver-stage and amplifier-stage transistors operate in a linear region; The low-loss inter-stage matching network includes an LC matching circuit composed of a capacitor and a microstrip; The low-loss output matching network is composed of an amplifier stage drain bias circuit, an LC matching network, an output DC blocking capacitor and an output port; The low-loss output matching network uses a small number of components to achieve lossless matching; The circuit is symmetrical about the input and output ends. The RF signal input port of the input matching network is connected to the input end of the resistor R1, the output end of the resistor R1 is connected to the input end of the capacitor C1, the output end of the capacitor C1 is connected to the input ends of C2, TL1, and TL2, and the output end of C2 is grounded. The output end of TL1 is connected to the input ends of C3, TL3, and TL4, the output end of C3 is grounded, the output end of TL3 is connected to the input ends of R6, C10, and R2, the output end of R2 is connected to the input end of TL7, the output end of TL7 is connected to the input end of C5, the output end of C5 is grounded, the output ends of R6 and C10 are connected to the gate of the first-stage transistor; the output end of TL4 is connected to the input ends of R7, C11, and R3, the output end of R3 is connected to the input end of TL8, the output end of TL8 is connected to the input end of C6, the output end of C6 is grounded, and the output ends of R7 and C11 are connected to the gate of another transistor. The drain of the first-stage transistor of the inter-stage matching network is connected to the input of the resistor R10 and TL10, the drain of another transistor is connected to the output of R10 and the input of TL11, the output of TL10 and TL11 is connected to the input of TL14 and C16, the output of TL14 is connected to the input of C14, the output of C14 is grounded, the output of C16 is connected to the input of R12, C20, TL18, and TL19, the output of R12 is connected to the input of TL16, the output of TL16 is connected to the input of C19, the output of C19 is grounded, and the output of C20 is grounded; The output end of TL18 is connected to the input ends of C23, TL22, and TL23, the output end of C23 is grounded, TL22 is connected to the gate of the second-stage transistor, the drain of the second-stage transistor of the interstage matching network is connected to the input end of TL30, and the output end of TL30 is connected to the input ends of C27 and TL38; TL23 is connected to the gate of another transistor, the drain of another transistor is connected to the input end of TL31, the output end of TL31 is connected to the input ends of C27 and TL38, and the output end of C27 is grounded; the output end of TL19 is connected to the input ends of C24, TL24, and TL25, and the output end of C24 is grounded; TL24 is connected to the gate of the second-stage transistor, and the interstage matching network The drain of the second-stage transistor of the network is connected to the input end of TL32, and the output end of TL32 is connected to the input ends of C28 and TL39; TL25 is connected to the gate of another transistor; the drain of another transistor is connected to the input end of TL33, and the output end of TL33 is connected to the input ends of C28 and TL39, and the output end of C28 is grounded; the output ends of TL38 and TL39 are connected to the input ends of C31, TL42, and TL44, the output end of C31 is grounded, the output end of TL42 is connected to the input end of C33, the output end of C33 is grounded, the output end of TL44 is connected to the input ends of C35 and C36, the output end of C35 is grounded, and the output end of C36 is connected to the RF signal output port; The output end of TL2 is connected to the input ends of C4, TL5, and TL6, the output end of C4 is grounded, the output end of TL5 is connected to the input ends of R4, C12, and R8, the output end of R4 is connected to the input end of TL9, the output end of TL9 is connected to the input end of C7, the output end of C7 is grounded, and the output ends of R8 and C12 are connected to the gate of the first-stage transistor; the output end of TL6 is connected to the input ends of R5, C13, and R9, the output end of R5 is connected to the input end of TL9, the output end of TL9 is connected to the input end of C8, the output end of C8 is grounded, and the output ends of R9 and C13 are connected to the gate of another transistor. The drain of the first-stage transistor of the inter-stage matching network is connected to the input of resistors R11 and TL12, the drain of another transistor is connected to the output of R11 and the input of TL13, the output of TL12 and TL13 is connected to the input of TL15 and C17, the output of TL15 is connected to the input of C15, the output of C15 is grounded, the output of C17 is connected to the input of R13, C21, TL20, and TL21, the output of R13 is connected to the input of TL17, the output of TL17 is connected to the input of C18, the output of C18 is grounded, and the output of C21 is grounded; The output end of TL20 is connected to the input ends of C25, TL26, and TL27, the output end of C25 is grounded, TL26 is connected to the gate of the second-stage transistor, the drain of the second-stage transistor of the inter-stage matching network is connected to the input end of TL34, the output end of TL34 is connected to the input ends of C29 and TL40; TL27 is connected to the gate of another transistor, the drain of another transistor is connected to the input end of TL35, the output end of TL35 is connected to the input ends of C29 and TL40, and the output end of C29 is grounded; the output end of TL21 is connected to the input ends of C26, TL28, and TL29, the output end of C26 is grounded; TL28 is connected to the gate of the second-stage transistor, and the drain of the second-stage transistor is connected to the input end of TL35. The output end of TL35 is connected to the input ends of C29 and TL40, and the output end of C29 is grounded; The gate of the body tube is connected, the drain of the second-stage transistor of the inter-stage matching network is connected to the input end of TL36, and the output end of TL36 is connected to the input ends of C30 and TL41; TL29 is connected to the gate of another transistor; the drain of another transistor is connected to the input end of TL37, the output end of TL37 is connected to the input ends of C30 and TL41, and the output end of C30 is grounded; the output ends of TL40 and TL41 are connected to the input ends of C32, TL43, and TL45, the output end of C32 is grounded, the output end of TL43 is connected to the input end of C34, the output end of C34 is grounded, and the output end of TL45 is connected to the input ends of C35 and C36; The sources of all transistors in the circuit are connected to ground.

2. The full Ku-band GaAs MMIC high-power and high-efficiency power amplifier chip according to claim 1, characterized in that: The lossy element is a resistor connected between the input matching circuit and the DC blocking capacitor to provide appropriate impedance matching at the input end.

3. A method for designing a full Ku-band GaAs MMIC high-power and high-efficiency power amplifier chip according to any one of claims 1 to 2, characterized in that: The following steps are involved: Design input matching network, including lossy components, DC blocking capacitors, input matching circuit, bias circuit and stability network, connected to the input of power amplifier to achieve impedance matching at the input; Design low-loss inter-stage matching networks between different amplifier stages to provide impedance matching; Design a low-loss output matching network connected to the output of the power amplifier, including a set of parallel capacitors and series inductors to provide efficient impedance matching; Design bias circuits, connected to each amplifier stage of the power amplifier, to provide a stable bias voltage; Design the stability network to interface with the input matching network and bias circuit.

4. The method according to claim 3, characterized in that When designing the input matching network, the following steps are included: Select a resistor as a lossy element and connect it between the input matching circuit and the DC blocking capacitor; Optimize the resistor value to achieve proper impedance matching at the input; Combined with DC blocking capacitors and stability networks, stable transmission and matching effects of input signals are ensured.

5. The method according to claim 3, characterized in that: When designing a low-loss output matching network, the following steps are involved: Select a set of parallel capacitors and series inductors and connect them between the output terminal and ground respectively; Optimize the parameters of parallel capacitors and series inductors to achieve efficient impedance matching; Combined with the amplifier stage drain bias circuit and LC matching network, the stability and matching effect of the output signal are ensured; Add output DC blocking capacitors to the output ports.

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