System and method for converting non-standard line-field video to standard line-field video
By designing a non-standard row-field video conversion system, using image reception, cyclic buffering and pointer management subsystems, the problem of unstable video signals in traditional technology is solved, and the standard row-field stable output of video images is realized.
Patent Information
- Application Number
- CN202411176567.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-26
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2044-08-26
AI Technical Summary
Under the traditional VDMA method, non-standard line-field videos generated by AI chips when processing video images often experience frequent repeated frames, skip frames and fallback frames, resulting in unstable output of the video signal.
Design a conversion system for non-standard row field video to standard row field video, including image reception subsystem, cyclic buffer subsystem, pointer management subsystem and image sending subsystem. Through cyclic buffer storage and pointer management, ensure image data Stable output.
Effectively avoid frequent repeating frames, frame skipping and backing frames, ensure that the video image signal is output stably according to the standard row field, reduce the duplication, frame skipping and frame dropping of image data, and is suitable for uneven output of AI data. video stuttering.
Smart Images

Figure CN118694871B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of video image data processing, and in particular to a conversion system and method for converting non-standard line-field video to standard line-field video. Background Art
[0002] In the industrial field, the architecture of using FPGA plus AI chip to process video images is becoming more and more widely used. Standard video images are input from FPGA, and the interfaces are various, such as CameraLink interface, LVDS interface, CML interface or SDI interface. FPGA forwards the image to AI chip through MIPI interface, HDMI interface or PCIE interface for image processing, such as target recognition, tracking detection, etc.
[0003] The time required for AI chips to process each frame is different. For example, for a 1080P@30fps image, the image interval is 33.3ms, and the AI chip processing delay may be 15~20ms. When it is processed and returned to the FPGA, a non-standard line-field video image is generated. In the traditional VDMA method, the output image will frequently have repeated frames, frame skipping, and rollback frames, which can occur many times per minute on average, resulting in the inability to output the video signal stably.
[0004] In view of this, it is necessary to provide a new type of non-standard line-field video to standard line-field video conversion system and method to overcome the above defects. Summary of the invention
[0005] The purpose of the present invention is to provide a conversion system for non-standard line field video to standard line field video, which can effectively avoid frequent frame duplication, frame skipping and frame rollback, and increase the period of repeated frames or frame skipping to a frequency of once every few hours, thereby ensuring that the video image signal is output stably according to the standard line field.
[0006] The technical solution provided by the present invention is implemented as follows: a conversion system for converting non-standard line-field video to standard line-field video, the conversion system comprising an image receiving subsystem, a circular buffer subsystem, a pointer management subsystem and an image sending subsystem which are communicatively connected to each other;
[0007] The image receiving subsystem is used to receive the non-standard image data sent;
[0008] The circular buffer subsystem is used to store received image data;
[0009] The pointer management subsystem is used to determine the pointer address of the current image;
[0010] The image sending subsystem is used to read the image data stream from the corresponding circular buffer area of the circular buffer subsystem according to the pointer address of the current image, and output the data according to the standard line field.
[0011] The image receiving subsystem includes a whole frame image interception module, a first cross-clock domain FIFO module and a FSOF / FEOF generation module which are communicatively connected to each other;
[0012] The whole frame image capture module is used to capture the whole frame of the received image;
[0013] The first cross-clock domain FIFO module is used to convert the clock domain of the input image of the whole frame image capture module into the system clock domain, and the FSOF / FEOF generation module reads the data of the first cross-clock domain FIFO module and adds FSOF and FEOF for subsequent processing.
[0014] The circular buffer subsystem includes an image storage module and an image reading module in communication with the image storage module, wherein a plurality of circular buffer areas are arranged in the image storage module;
[0015] The image storage module is used to store the data stream into the corresponding circular buffer area according to the current input image pointer;
[0016] The image reading module is used to read the data stream corresponding to the circular buffer area and output it to the image sending subsystem.
[0017] The pointer management subsystem is used to manage pointers for input images and pointers for output images;
[0018] The pointer of the input image generates a pointer of the input data cache according to the number of frames of the image in the circular buffer area of the image storage module;
[0019] The pointer of the output image determines the pointer of the image to be output in the next frame according to the difference between the pointer of the input image and the pointer of the output image in the circular buffer area of the current image storage module.
[0020] The image storage module of the circular buffer subsystem is provided with a plurality of circular buffer areas, each of which corresponds to the size of an image, the pointer of the input image is stored in the corresponding address, and the pointer of the output image obtains the image data from the corresponding address.
[0021] The image sending subsystem includes a second cross-clock domain FIFO module and a standard line field generation module;
[0022] The second cross-clock domain FIFO module converts the data stream read from the circular buffer area from the system clock domain to the image transmission clock domain;
[0023] The standard line and field generation module reads the image of the second cross-clock domain FIFO module and outputs data according to the standard line and field.
[0024] On the other hand, the present invention also provides a method for converting non-standard line-field video to standard line-field video, comprising the following steps:
[0025] S1, the image receiving subsystem receives an input image of a non-standard line field;
[0026] S2. According to the pointer of the input image of the pointer management subsystem, the data stream output by the image receiving subsystem is stored in the circular buffer area of the circular buffer subsystem, and according to the pointer of the output image of the pointer management subsystem, the image data in the circular buffer area of the circular buffer subsystem is read out;
[0027] S3, determining the pointer address of the current image through the pointer management subsystem;
[0028] Determine the pointer of the next frame image output according to the difference between the pointer of the input image in the circular buffer and the output pointer of the current output image;
[0029] S4. The image sending subsystem receives and reads the image data stream output by the circular buffer area of the circular buffer subsystem according to the current sending pointer address, converts it from the system clock domain to the image output clock domain through the second cross-clock domain FIFO, and outputs the data according to the standard line field.
[0030] Step S1 specifically includes:
[0031] S11, performing frame header detection on the input non-standard image, and then receiving a complete image frame data;
[0032] S12, inputting the received image into the first cross-clock domain FIFO module, and reading it using the system clock at the reading side of the first cross-clock domain FIFO module;
[0033] S13, adding FSOF and FEOF to the data output by the first cross-clock domain FIFO module, outputting the data to the circular buffer area, and outputting the frame header identifier to the pointer management subsystem.
[0034] Step S2 specifically includes:
[0035] S21, according to the input image pointer given by the pointer management subsystem, the input image is stored in the corresponding area, and the starting address of the pointer stored in the input image is identified by FSOF;
[0036] S22. According to the pointer of the output image given by the pointer management subsystem, the image reading module reads the corresponding image data from the circular buffer area and outputs it to the image sending subsystem of the next level.
[0037] Step S3 specifically includes:
[0038] S31, determining that a new frame of image has been received according to the FEOF given by the FSOF / FEOF generation module of the image receiving subsystem, updating the pointer of the input image, and passing it to the image cache module;
[0039] S32. Determine the value of the pointer for outputting the next frame of image according to the difference between the current input image pointer and the output image pointer, and the value of the current output image pointer.
[0040] Step S4 specifically includes:
[0041] S41, the second cross-clock domain FIFO receives and reads the image data stream output by the circular buffer, and converts it from the system clock domain to the image output clock domain through the second cross-clock domain FIFO;
[0042] S42, outputting the image data according to the standard line field signal;
[0043] S43: After a frame of image data is sent, it is fed back to the pointer management subsystem so that it generates a pointer for the next frame of output image.
[0044] On the other hand, the present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps of the conversion method of the conversion system for converting non-standard line field video to standard line field video are implemented.
[0045] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of a conversion method of a conversion system for converting non-standard line-field video to standard line-field video.
[0046] Compared with the prior art, the beneficial effect is that when realizing the conversion of non-standard line-field video to standard line-field video, the image data is input into the video receiving subsystem, and is stored by the circular buffer subsystem. In addition, the pointer management subsystem accurately manages the read and write pointers, thereby minimizing the problems of image data duplication, frame skipping, and frame loss, and ensuring that the image data is output as a stable line-field signal. The present invention is applicable to situations where the AI data output is uneven, resulting in video freezes. In addition, it is also applicable to situations where video interface conversion is performed, such as SDI input to ADMI output. The input and output are asynchronous, and the present invention can also be used to reduce the frequency of repeated frames and frame skipping generated by asynchronous clocks.
[0047] Other features and advantages of the present invention will be set forth in the following description, and part will be apparent from the description, or can be understood by implementation of the present invention. Features and advantages of the present invention can be realized and obtained by the elements and combinations specifically pointed out in the appended application scope. These and other features of the present invention will become more clearly understood according to the following description and the appended claims, or can be understood by the implementation of the embodiments described in the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0048] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work.
[0049] Figure 1 A principle block diagram of a conversion system for converting non-standard line-field video to standard line-field video provided by the present invention;
[0050] Figure 2 is a principle block diagram of an image receiving subsystem according to an embodiment of the present invention;
[0051] Figure 3 is a principle block diagram of a circular buffer subsystem according to an embodiment of the present invention;
[0052] Figure 4 is a principle block diagram of a pointer management subsystem according to an embodiment of the present invention;
[0053] Figure 5 is a principle block diagram of an image sending subsystem according to an embodiment of the present invention;
[0054] Figure 6 A flow chart of a method for converting non-standard line-field video to standard line-field video according to the present invention; DETAILED DESCRIPTION
[0055] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0056] In addition, the terms "first", "second", and "third" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, a feature defined as "first", "second", and "third" may explicitly or implicitly include one or more of the features. In addition, the meaning of "multiple" and "several" refers to two or more, unless otherwise clearly and specifically defined.
[0057] See also Figure 1 The present invention provides a conversion system for converting non-standard line field video to standard line field video, which designs an image receiving subsystem, a circular buffer subsystem, a pointer management subsystem and an image sending subsystem. The conversion system realizes the conversion of non-standard line field video input into standard line field video output.
[0058] After a standard 1080P@30Hz video source is processed by the AI chip, it forms a non-standard 1080P video and is sent to the non-standard line-field video to standard line-field video conversion system. The maximum delay may exceed about 50ms, and the minimum delay is about 20ms. The FPGA restores it to a standard line-field 1080P@30Hz video, or outputs it through the SDI interface, CML interface, or CameraLink interface. The following is an example to illustrate:
[0059] First, the non-standard line-field video to standard line-field video conversion system is powered on for self-test, and the pointer management subsystem, the circular buffer subsystem, the image receiving module and the image sending subsystem are initialized;
[0060] After the self-test is completed, the system operates normally and starts to receive image data sent by the AI chip.
[0061] The present invention provides a conversion system for converting non-standard line-field video to standard line-field video, the conversion system comprising an image receiving subsystem, a circular buffer subsystem, a pointer management subsystem and an image sending subsystem which are communicatively connected to each other;
[0062] The image receiving subsystem is used to receive non-standard image data sent by the AI chip and store it in corresponding addresses in units of frames;
[0063] The circular buffer subsystem is used to store received video data and provide the image sending subsystem with reading;
[0064] The pointer management subsystem is used to monitor the pointer address stored in the circular buffer subsystem and the pointer address of the image sent in the previous frame to determine the pointer address of the current image;
[0065] The image sending subsystem is used to read the image data stream from the corresponding circular buffer area of the circular buffer subsystem according to the current sending pointer address, and output the data according to the standard line field.
[0066] Further, the image receiving subsystem includes a whole frame image interception module, a first cross-clock domain FIFO module and a FSOF / FEOF generation module which are communicatively connected to each other;
[0067] like Figure 2 As shown, the whole-frame image interception module is used to intercept the whole frame of the received image, detect the frame header as the beginning of a frame image, and then continuously receive and intercept a frame image. In this frame image, even if the sender sends erroneous data, it will only affect this frame image, and the next frame image starts from the detection of the frame header, so it will not continuously affect the subsequent image data, thereby preventing data loss during the receiving process from causing image splitting and screen distortion.
[0068] The first cross-clock domain FIFO module is used to convert the clock domain of the input image of the whole frame image capture module into the system clock domain. The FSOF / FEOF generation module reads the data of the first cross-clock domain FIFO module and adds FSOF (frame header identifier) and FEOF (frame end identifier) for subsequent processing.
[0069] Further, the circular buffer subsystem includes an image storage module and an image reading module communicatively connected to the image storage module, and the image storage module includes 6 circular buffer areas;
[0070] The image storage module is used to store the data stream into the corresponding circular buffer area according to the current input image pointer;
[0071] The image reading module is used to read the data stream of the corresponding circular buffer area according to the current output image pointer and output it to the image sending subsystem.
[0072] Furthermore, the pointer management subsystem includes pointers for managing input images and output images, ensuring that the input images can be stored in the circular buffer area of the image storage module of the circular buffer subsystem in sequence, ensuring that the output video can output image data stably and reliably without duplication or frame skipping;
[0073] The pointer (write pointer) of the input image generates a pointer of the input data cache according to the number of frames of the image in the circular buffer area of the image storage module, for use by the circular buffer area of the image storage module;
[0074] The output image pointer (read pointer) determines the pointer of the image to be output in the next frame according to the difference between the input image pointer and the output image pointer in the circular buffer area of the current image storage module.
[0075] like Figure 3 As shown, a plurality of (in this embodiment, 6) circular buffer areas are set in the image storage module of the circular buffer subsystem, each circular buffer area corresponds to the size of an image, the pointer of the input image is stored in the corresponding address, and the pointer of the output image obtains the image data from the corresponding address.
[0076] like Figure 4 As shown, the algorithm flow of the pointer management subsystem is that the write pointer of the input image starts from WrPtr0, automatically increases by 1 after writing a frame, and returns to WrPtr0 after WrPtr5 increases by 1, and is not affected by the read pointer.
[0077] The timing starts from the moment when the first frame of image is written, and the first read pointer is determined to be RdPtr0 after 33.3ms. Because the image data transmission has a standard line-field timing, the period of one frame is 33.3ms based on the transmission clock. At the moment of FrmN_End when the first frame is sent, the read pointer of the next frame of image is determined according to the current state of writing the image. If the current input image is written, the read pointer is increased by one, such as at Frm0_End, the read pointer is determined to be RdPtr1; if the current input image is being input, the read pointer remains unchanged and the previous frame of image is output repeatedly, such as at Frm1_End. Figure 3 Reception is not completed, and the read pointer remains at the address RdPtr1 of the previous frame.
[0078] like Figure 5 As shown, at the FrmN-2_End moment, according to the sequence, the next pointer should be RdPtrN-1, and the previous write pointer is WrPtrN+2. In this way, the read pointer lags behind the write pointer by 3 frames, which exceeds the maximum value 2 allowed by the system. The system automatically skips reading the N-1 frame, and the read pointer becomes RdPtrN.
[0079] As mentioned above, the pointer management module controls the read pointer and outputs the image of the non-standard line and field video input according to the standard line and field by repeating the frame output or skipping the frame output in extreme cases.
[0080] Further, the image sending subsystem includes a second cross-clock domain FIFO module and a standard line field generation module;
[0081] The second cross-clock domain FIFO module converts the data stream read from the circular buffer area from the system clock domain to the image transmission clock domain;
[0082] The standard line and field generation module reads the image of the second cross-clock domain FIFO module and outputs data according to the standard line and field.
[0083] like Figure 6As shown, the present invention also provides a method for converting non-standard line-field video input to standard line-field video output, the method comprising the following steps:
[0084] S1, the image receiving subsystem receives an input image of a non-standard line field;
[0085] S2. According to the pointer of the input image of the pointer management subsystem, the data stream output by the image receiving subsystem is stored in the circular buffer area of the circular buffer subsystem, and according to the pointer of the output image of the pointer management subsystem, the image data in the circular buffer area of the circular buffer subsystem is read out;
[0086] S3, determining the pointer address of the current image through the pointer management subsystem;
[0087] Determine the pointer of the next frame image output according to the difference between the pointer of the input image in the circular buffer and the pointer of the current output image;
[0088] S4. The image sending subsystem receives and reads the image data stream output by the circular buffer area of the circular buffer subsystem according to the current sending pointer address, converts it from the system clock domain to the image output clock domain through the second cross-clock domain FIFO, and outputs the data according to the standard line field.
[0089] Furthermore, step S1 specifically includes:
[0090] S11, performing frame header detection on the input non-standard image, and then receiving a complete image frame data, and such a cyclic operation can effectively prevent the received image from being split or scrolled;
[0091] S12, inputting the received image into the first cross-clock domain FIFO module, and reading it using the system clock at the reading side of the first cross-clock domain FIFO module;
[0092] S13, adding FSOF (frame header identifier) and FEOF (frame end identifier) to the data output by the first cross-clock domain FIFO module, outputting to the circular buffer area, and outputting the frame header identifier to the pointer management subsystem.
[0093] Furthermore, step S2 specifically includes:
[0094] S21, according to the input image pointer given by the pointer management subsystem, the input image is stored in the corresponding area, and the starting address of the pointer stored in the input image is identified by FSOF (frame header identifier);
[0095] S22. According to the pointer of the output image given by the pointer management subsystem, the image reading module reads the corresponding image data from the circular buffer area and outputs it to the image sending subsystem of the next level.
[0096] Furthermore, step S3 specifically includes:
[0097] S31, determining that a new frame of image has been received according to the FEOF (frame end flag) given by the FSOF / FEOF generation module of the image receiving subsystem, updating the pointer of the input image, and passing it to the image cache module;
[0098] S32, determining the value of the pointer of the next frame output image according to the difference between the current input image pointer and the output image pointer, and the value of the current output image pointer;
[0099] Furthermore, step S4 specifically includes:
[0100] S41, the second cross-clock domain FIFO receives and reads the image data stream output by the circular buffer, and converts it from the system clock domain to the image output clock domain through the second cross-clock domain FIFO;
[0101] S42, outputting the image data according to the standard line field signal;
[0102] S43: After a frame of image data is sent, it is fed back to the pointer management subsystem so that it generates a pointer for the next frame of output image.
[0103] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.
[0104] In particular, according to some embodiments of the present disclosure, the process described above can be implemented as a computer software program. For example, some embodiments of the present disclosure include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart. In some such embodiments, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device, or installed from a ROM. When the computer program is executed by a processing device, the above-mentioned functions defined in the method of some embodiments of the present disclosure are executed.
[0105] It should be noted that the computer-readable medium recorded in some embodiments of the present disclosure may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In some embodiments of the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device. In some embodiments of the present disclosure, a computer-readable signal medium may include a mission data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. Such a propagated mission data signal may take a variety of forms, including but not limited to an electromagnetic signal, an optical signal, or any suitable combination of the above. Computer readable signal media may also be any computer readable medium other than computer readable storage media, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. The program code contained on the computer readable medium may be transmitted using any appropriate medium, including but not limited to: wires, optical cables, RF (radio frequency), etc., or any suitable combination of the above.
[0106] In some embodiments, the client and the server may communicate using any currently known or future developed network protocol such as HTTP (HyperTextTransferProtocol), and may be interconnected with any form or medium of digital task data communication (e.g., a communication network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), an internet (e.g., the Internet), and a peer-to-peer network (e.g., an adhoc peer-to-peer network), as well as any currently known or future developed network.
[0107] The computer-readable medium may be included in the electronic device, or may exist independently without being incorporated into the electronic device. The computer-readable medium carries one or more programs. When the one or more programs are executed by the electronic device, the electronic device: in response to detecting a query operation on a production collaboration document in a switch production line management application, determines the network connection status of the switch production line management application; in response to determining that the network connection status of the switch production line management application represents an offline state, replaces the web page entry information corresponding to the production collaboration document with target entry file information, and loads target web page resource information to display the web page of the production collaboration document offline in the switch production line management application, wherein the target entry file information is file information of a pre-downloaded entry file corresponding to the web page of the production collaboration document, and the target web page resource information is locally stored resource information corresponding to the web page; in response to determining that the network connection status of the switch production line management application represents an online state, and the web page resource information corresponding to the production collaboration document is not stored locally, downloads the web page resource information of the web page from the production line document server, wherein the web page resource information includes an entry file and resource information; according to the web page resource information, displays the web page of the production collaboration document in the switch production line management application, and stores the web page resource information in a local database.
[0108] Computer program code for performing the operations of some embodiments of the present disclosure may be written in one or more programming languages or a combination thereof, including product-oriented programming languages such as Java, Smalltalk, C++, and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).
[0109] The present invention is not limited to what is described in the specification and implementation modes, and therefore additional advantages and modifications can be easily realized by those skilled in the art. Therefore, without departing from the spirit and scope of the general concept defined by the claims and their equivalents, the present invention is not limited to the specific details, representative devices, and illustrative examples shown and described herein.
Claims
1. A system for converting non-standard line-field video to standard line-field video. It is characterized in that The conversion system includes an image receiving subsystem, a circular buffer subsystem, a pointer management subsystem and an image sending subsystem which are communicatively connected to each other; The image receiving subsystem is used to receive the non-standard image data sent; The circular buffer subsystem is used to store received image data; The pointer management subsystem is used to determine the pointer address of the current image, and the pointer management subsystem is used to manage the write pointer of the input image and the read pointer for the output image; The write pointer of the input image generates a pointer of the input data cache according to the number of frames of the image in the circular buffer area of the image storage module; The read pointer of the output image determines the pointer of the image to be output in the next frame according to the difference between the pointer of the input image and the pointer of the output image in the circular buffer area of the current image storage module. The write pointer of the input image starts from WrPtr0 and automatically increases by 1 after writing a frame. When WrPtr5 increases by 1, it returns to WrPtr0 and is not affected by the read pointer. The timing starts from the moment when the first frame image starts to be written. At the moment FrmN_End when the first frame is sent, the read pointer of the next frame image is determined according to the status of the current write image. If the current input image is written, the read pointer is increased by one. For example, at the moment Frm0_End, the read pointer is determined to be RdPtr1; if the current input image is being input, the read pointer remains unchanged, and the previous frame image is repeatedly output. The read pointer remains at the address of the previous frame RdPtr1. At the moment FrmN-2_End, in order, the next pointer is RdPtrN-1, and the previous write pointer is WrPtrN+2. In this way, the read pointer lags behind the write pointer by 3 frames, and the system automatically skips reading the N-1th frame, and the read pointer becomes RdPtrN. The image sending subsystem is used to read the image data stream from the corresponding circular buffer area of the circular buffer subsystem according to the pointer address of the current image, and output the data according to the standard line field.
2. The system for converting non-standard line-field video to standard line-field video as claimed in claim 1, It is characterized in that The image receiving subsystem includes a whole frame image interception module, a first cross-clock domain FIFO module and a FSOF / FEOF generation module which are communicatively connected to each other; The whole frame image capture module is used to capture the whole frame of the received image; The first cross-clock domain FIFO module is used to convert the clock domain of the input image of the whole frame image capture module into the system clock domain, and the FSOF / FEOF generation module reads the data of the first cross-clock domain FIFO module and adds FSOF and FEOF for subsequent processing.
3. The system for converting non-standard line-field video to standard line-field video as claimed in claim 1, It is characterized in that The circular buffer subsystem includes an image storage module and an image reading module in communication with the image storage module, wherein a plurality of circular buffer areas are arranged in the image storage module; The image storage module is used to store the data stream into the corresponding circular buffer area according to the current input image pointer; The image reading module is used to read the data stream corresponding to the circular buffer area and output it to the image sending subsystem.
4. The system for converting non-standard line-field video to standard line-field video as claimed in claim 1, It is characterized in that The image storage module of the circular buffer subsystem is provided with a plurality of circular buffer areas, each of which corresponds to the size of an image, the pointer of the input image is stored in the corresponding address, and the pointer of the output image obtains the image data from the corresponding address.
5. The system for converting non-standard line-field video to standard line-field video as claimed in claim 1, It is characterized in that The image sending subsystem includes a second cross-clock domain FIFO module and a standard line field generation module; The second cross-clock domain FIFO module converts the data stream read from the circular buffer area from the system clock domain to the image transmission clock domain; The standard line and field generation module reads the image of the second cross-clock domain FIFO module and outputs data according to the standard line and field.
6. A conversion method of a non-standard line-field video to standard line-field video conversion system as claimed in any one of claims 1 to 5, It is characterized in that The following steps are involved: S1, the image receiving subsystem receives an input image of a non-standard line field; S2. According to the pointer of the input image of the pointer management subsystem, the data stream output by the image receiving subsystem is stored in the circular buffer area of the circular buffer subsystem, and according to the pointer of the output image of the pointer management subsystem, the image data in the circular buffer area of the circular buffer subsystem is read out; S3, determining the pointer address of the current image through the pointer management subsystem; Determine the pointer of the next frame image output according to the difference between the pointer of the input image in the circular buffer and the output pointer of the current output image; S4. The image sending subsystem receives and reads the image data stream output by the circular buffer area of the circular buffer subsystem according to the current sending pointer address, converts it from the system clock domain to the image output clock domain through the second cross-clock domain FIFO, and outputs the data according to the standard line field.
7. The conversion method of the non-standard line-field video to standard line-field video conversion system as claimed in claim 6, It is characterized in that Step S1 specifically includes: S11, performing frame header detection on the input non-standard image, and then receiving a complete image frame data; S12, inputting the received image into the first cross-clock domain FIFO module, and reading it using the system clock at the reading side of the first cross-clock domain FIFO module; S13, adding FSOF and FEOF to the data output by the first cross-clock domain FIFO module, outputting the data to the circular buffer area, and outputting the frame header identifier to the pointer management subsystem.
8. The conversion method of the non-standard line-field video to standard line-field video conversion system as claimed in claim 7, It is characterized in that Step S2 specifically includes: S21, according to the input image pointer given by the pointer management subsystem, the input image is stored in the corresponding area, and the starting address of the pointer stored in the input image is identified by FSOF; S22. According to the pointer of the output image given by the pointer management subsystem, the image reading module reads the corresponding image data from the circular buffer and outputs it to the image sending subsystem of the next level.
9. The conversion method of the non-standard line-field video to standard line-field video conversion system as claimed in claim 8, It is characterized in that Step S3 specifically includes: S31, determining that a new frame of image has been received according to the FEOF given by the FSOF / FEOF generation module of the image receiving subsystem, updating the pointer of the input image, and passing it to the image cache module; S32, determining the value of the pointer of the next frame output image according to the difference between the current input image pointer and the output image pointer, and the value of the current output image pointer; Step S4 specifically includes: S41, the second cross-clock domain FIFO receives and reads the image data stream output by the circular buffer, and converts it from the system clock domain to the image output clock domain through the second cross-clock domain FIFO; S42, outputting the image data according to the standard line field signal; S43: After a frame of image data is sent, it is fed back to the pointer management subsystem so that it generates a pointer for the next frame of output image.
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