Impurity diffusion method for detector chip and detector chip

Abstract

The present application proposes an impurity diffusion method for a detector chip and a detector chip, the method comprising: growing a first diffusion barrier layer on the surface of a wafer, the first diffusion barrier layer being a Si Nx / SiO2 composite film; performing photolithography on the first diffusion barrier layer to form a diffusion window; performing open-tube doping diffusion in the diffusion window to form a first deep diffusion zone; growing a second diffusion barrier layer on the surface of the first diffusion barrier layer and the diffusion window, the second diffusion barrier layer being a Si Nx anti-reflection film; and performing annealing on the wafer to form a second deep diffusion zone. The method proposed in the present application can reduce the contamination of the annealing furnace by the diffusion source remaining on the surface of the wafer, and improve the diffusion effect; can save the use demand of the impurity diffusion source, thereby reducing the production cost; can shorten the impurity diffusion time, and reduce the process time of the entire process.

Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to an impurity diffusion method for a detector chip and a detector chip. Background Art

[0002] In the field of optical communications, open tube diffusion is a commonly used impurity diffusion method.

[0003] In the open tube diffusion method, the deeper the diffusion depth, the slower the diffusion speed, so open tube diffusion often takes a long time. Under normal circumstances, if a 3μm depth needs to be diffused, it takes about 3 hours. In addition, the subsequent annealing process takes a long time to activate the impurities, so the entire process takes a long time. Moreover, the open tube diffusion method requires a large amount of diffusion source, which will greatly consume process raw materials.

[0004] In the prior art, there is a lack of a method that can save open tube diffusion raw materials, shorten the process time and reduce the process cost. Summary of the invention

[0005] In order to solve the above problems, the embodiments of the present application provide an impurity diffusion method for a detector chip and a detector chip, which saves impurity diffusion sources, shortens process time, and reduces process costs.

[0006] The present application embodiment adopts the following technical solutions:

[0007] In a first aspect, an embodiment of the present application provides an impurity diffusion method for a detector chip, the method comprising the following steps:

[0008] Growing a first diffusion barrier layer on the surface of the wafer, wherein the first diffusion barrier layer is a SiNx / SiO2 composite film;

[0009] Forming a diffusion window after photolithography on the first diffusion barrier layer;

[0010] Performing open-tube doping diffusion in the diffusion window to form a first deep diffusion region;

[0011] Growing a second diffusion barrier layer on the surface of the first diffusion barrier layer and the diffusion window, wherein the second diffusion barrier layer is a SiNx anti-reflection film;

[0012] The wafer is annealed to form a second deep diffusion region.

[0013] In some embodiments, in the first diffusion barrier layer, the thickness of SiNx in the SiNx / SiO2 composite film is 50-120 nm, and / or the thickness of SiO2 in the SiNx / SiO2 composite film is 300-500 nm.

[0014] In some embodiments, in the second diffusion barrier layer, the thickness of the Si Nx anti-reflection film is 150-210 nm.

[0015] In some embodiments, the ratio of the first depth to the second depth is 1 / 4-1 / 3.

[0016] In some embodiments, the first depth is 1.0-1.3 μm.

[0017] In some embodiments, the second depth is 3-4 μm.

[0018] In some embodiments, the temperature of the open tube doping diffusion is 470-550°C.

[0019] In some embodiments, the duration of the open tube doping diffusion is 20-40 minutes.

[0020] In some embodiments, the annealing process is performed at a temperature of 450-500°C.

[0021] In a second aspect, an embodiment of the present application also provides a detector chip obtained by the impurity diffusion method of any of the above-mentioned detector chips.

[0022] At least one of the above technical solutions adopted in the embodiments of the present application can achieve the following beneficial effects:

[0023] The impurity diffusion method of the detector chip provided in the present application first grows a SiNx / SiO2 composite film on the wafer surface of the detector chip, performs open-tube doping diffusion, then grows a SiNx anti-reflection film, and finally completes the diffusion through high-temperature annealing. The method provided in the present application can reduce the contamination of the annealing furnace by the diffusion source remaining on the wafer surface, improve the diffusion effect, save the use demand of the impurity diffusion source, and thus reduce the production cost. It can shorten the impurity diffusion time and reduce the process time of the entire process. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0025] Figure 1 A flow chart showing an impurity diffusion method for a detector chip according to an embodiment of the present application;

[0026] Figure 2 A schematic diagram showing the growth of a first diffusion barrier layer according to an embodiment of the present application;

[0027] Figure 3 A schematic diagram showing a diffusion window after being formed according to an embodiment of the present application;

[0028] Figure 4 A schematic diagram showing a first deep diffusion region after being formed according to an embodiment of the present application;

[0029] Figure 5 A schematic diagram showing the growth of a second diffusion barrier layer according to an embodiment of the present application;

[0030] Figure 6 A schematic diagram is shown after forming a second deep diffusion region according to an embodiment of the present application. DETAILED DESCRIPTION

[0031] The exemplary embodiments of the present application will be described in more detail below. However, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present application and to enable the scope of the present application to be fully communicated to those skilled in the art.

[0032] The disclosure of the present invention provides many different embodiments or examples to realize different structures of the present invention. In order to simplify the disclosure of the present invention, the components and settings of specific examples are described in the present invention. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplicity and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the present invention provides various specific examples of processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0033] Generally, the terms may be understood at least in part based on the usage of the above invention. For example, the term "one or more" used in the present invention depends at least in part on the above invention, and may be used to describe any component, structure or feature in a singular form, or may be used to describe a combination of components, structures or features in a plural form. Similarly, terms such as "one", "an" or "the" may also be understood at least in part based on the above invention as conveying singular usage or conveying plural usage. In addition, the term "based on..." may be understood as not necessarily intended to convey a set of exclusive factors, but may alternatively, at least in part depending on the context, allow for the presence of additional factors that do not necessarily have to be explicitly described.

[0034] It should be noted that, in the description of the present application, the meanings of the terms "on", "over", "above", "over", etc. should be interpreted in the broadest way, meaning that the description containing these terms is interpreted as "the component can be set on another component in direct contact, or there can be intermediate components or layers between the components."

[0035] For ease of description, the present application may also use spatially relative terms such as "under", "beneath", "below", "under", "upper", "lower", etc. to describe the relationship of one component to another component shown in the drawings. In addition to the orientations described in the drawings, the spatially relative terms are also intended to cover different orientations of the device in use or operation. The device can be oriented in other ways, and the spatially relative descriptions used in the present application can be interpreted accordingly.

[0036] The method proposed in the present application is applicable to the field of manufacturing detector chips on InP or InGaAs substrates in the optical communication industry, and is a method for providing impurity diffusion for detector chips.

[0037] Figure 1 The flowchart of the impurity diffusion method of the detector chip proposed in one embodiment of the present application is shown. Figure 1 As shown, the impurity diffusion method of the detector chip provided in the embodiment of the present application includes the following steps:

[0038] S1, growing a first diffusion barrier layer on the surface of the wafer, wherein the first diffusion barrier layer is a Si Nx / SiO2 composite film;

[0039] S2, performing photolithography on the first diffusion barrier layer to form a diffusion window;

[0040] S3, performing open-tube doping diffusion in the diffusion window to form a first deep diffusion region;

[0041] S4, growing a second diffusion barrier layer on the surface of the first diffusion barrier layer and the diffusion window, wherein the second diffusion barrier layer is a Si Nx anti-reflection film;

[0042] S5. Performing annealing on the wafer to form a second deep diffusion region.

[0043] Figures 2 to 6 The following is a schematic diagram showing the corresponding steps of the impurity diffusion method for a detector chip according to an embodiment of the present application. Figures 2 to 6 In FIG. 1 , 1 represents a wafer, 2 represents a first diffusion barrier layer, 3 represents a first deep diffusion region, 4 represents a second diffusion barrier layer, and 5 represents a second deep diffusion region. Figures 2 to 6 , the method provided in the embodiment of the present application is introduced.

[0044] Figure 2 FIG. 1 is a schematic diagram showing a first diffusion barrier layer after growth according to an embodiment of the present application. Figure 2 As shown, a first diffusion barrier layer is grown on the wafer surface of the detector chip. The first diffusion barrier layer is a Si Nx / SiO2 composite film.

[0045] Si Nx has a high positive charge density, contains abundant H atoms, and has a good field effect passivation effect. However, the surface defect density of Si Nx is high after deposition. SiO2 has a lower refractive index and is not as good as Si Nx in field effect passivation, but the surface defect density of SiO2 is low after deposition. Therefore, the first diffusion barrier layer uses a Si Nx / SiO2 composite film, which can effectively combine the advantages of the two materials and obtain a good barrier effect.

[0046] The PECVD (plasma enhanced chemical vapor deposition) process can be used to deposit SiO2 on the wafer surface of the detector chip and then deposit SiNx to obtain the first diffusion barrier layer of the SiNx / SiO2 composite film structure.

[0047] In some embodiments, the SiNx / SiO2 composite film has a SiNx thickness of 50-120 nm.

[0048] In some embodiments, the SiO2 thickness of the SiNx / SiO2 composite film is 300-500 nm.

[0049] Figure 3 FIG. 1 is a schematic diagram showing a diffusion window after forming an embodiment of the present application. Figure 3 As shown, the area where diffusion is required is subjected to photolithography to remove part of the first diffusion barrier layer.

[0050] Photoresist can be spin-coated on the surface of the first diffusion barrier layer, and the first diffusion barrier layer in the area where diffusion is required can be removed through the steps of pre-baking, exposure, development, hardening, and RIE dry etching in sequence.

[0051] The first diffusion barrier layer and the wafer after photolithography are immersed in an acetone solution to remove the photoresist.

[0052] Figure 4 FIG. 1 is a schematic diagram showing a first deep diffusion region after forming an embodiment of the present application. Figure 4 As shown, open-tube doping diffusion is performed to diffuse impurities from a high-concentration diffusion source to a low-concentration wafer.

[0053] Since the diffusion window has no first diffusion barrier layer, high-concentration impurity doping is formed on the surface of the wafer in the diffusion window portion.

[0054] The diffusion source may be a zinc source, and in particular, a gaseous zinc source may be used for diffusion. A high-temperature diffusion furnace may be used for zinc doping to form a first deep diffusion zone.

[0055] In some embodiments, the temperature of the open tube doping diffusion is 470-550°C.

[0056] In some embodiments, the duration of the open tube doping diffusion is 20-40 minutes.

[0057] In some embodiments, the first depth is 1.0-1.3 μm.

[0058] Figure 5 FIG. 1 is a schematic diagram showing a second diffusion barrier layer after growth according to an embodiment of the present application. Figure 5 As shown, after the open-tube doping diffusion is completed, the SiNx anti-reflection film is continued to be grown as the second diffusion barrier layer.

[0059] SiNx can be deposited by PECVD process. The deposition range includes the surface of the first diffusion barrier layer remaining after photolithography and the surface of the diffusion window. Annealing treatment is performed after the SiNx anti-reflection film is deposited to release the stress of the SiNx anti-reflection film.

[0060] In some embodiments, in the second diffusion barrier layer, the thickness of the SiNx anti-reflection film is 150-210 nm.

[0061] Figure 6 FIG. 1 is a schematic diagram showing a second deep diffusion region after forming an embodiment of the present application. Figure 6 As shown, the detector chip is annealed to allow the high-concentration impurity doping formed on the wafer surface to diffuse into the undoped area deep in the wafer within the diffusion window.

[0062] Due to the presence of a second diffusion barrier layer on the surface of the diffusion window during annealing, the impurity doping cannot diffuse into other environments of the wafer, but can only be restricted within the diffusion window to diffuse into the undoped area deep in the wafer (downward in the figure).

[0063] In some embodiments, the annealing process is performed at a temperature of 450-500°C.

[0064] In some embodiments, the second depth is 3-4 μm.

[0065] In addition, in order to ensure the diffusion effect and shorten the process time, the diffusion depth of the open-tube doping diffusion can be 1 / 4-1 / 3 of the expected diffusion depth, that is, the ratio of the first depth to the second depth is 1 / 4-1 / 3.

[0066] A specific embodiment of the impurity diffusion method of the detector chip is given below.

[0067] Example 1

[0068] The impurity diffusion method of the detector chip provided in this embodiment includes the following steps:

[0069] S11, depositing a SiNx / SiO2 composite film on the surface of the wafer by using a PECVD process to form a first diffusion barrier layer, wherein the thickness of SiNx is 50nm and the thickness of SiO2 is 300nm;

[0070] S12, spin-coating a photoresist on the surface of the first diffusion barrier layer, sequentially performing pre-baking, exposure, development, hardening, and RIE dry etching steps to remove the first diffusion barrier layer in the area where diffusion is required, and immersing the first diffusion barrier layer and the wafer after photolithography in an acetone solution to remove the photoresist;

[0071] S13, using a gaseous zinc source to perform open-tube doping diffusion in a high-temperature diffusion furnace to form a first deep diffusion zone, wherein the temperature of the open-tube doping diffusion is 470° C., and the duration of the open-tube doping diffusion is 30-40 minutes to make the first depth 1.0 μm;

[0072] S14, depositing a SiNx anti-reflection film on the surface of the first diffusion barrier layer and the diffusion window surface remaining after photolithography by using a PECVD process to form a second diffusion barrier layer, wherein the thickness of the SiNx anti-reflection film is 150 nm;

[0073] S15, performing annealing treatment on the wafer to form a second deep diffusion region, wherein the annealing temperature is 450° C. and the second depth is 3 μm.

[0074] Example 2

[0075] The impurity diffusion method of the detector chip provided in this embodiment includes the following steps:

[0076] S21, depositing a SiNx / SiO2 composite film on the surface of the wafer by using a PECVD process to form a first diffusion barrier layer, wherein the thickness of SiNx is 120 nm and the thickness of SiO2 is 500 nm;

[0077] S22, spin-coating a photoresist on the surface of the first diffusion barrier layer, sequentially performing pre-baking, exposure, development, hardening, and RIE dry etching steps to remove the first diffusion barrier layer in the area where diffusion is required, and immersing the first diffusion barrier layer and the wafer after photolithography in an acetone solution to remove the photoresist;

[0078] S23, using a gaseous zinc source to perform open-tube doping diffusion in a high-temperature diffusion furnace to form a first deep diffusion zone, wherein the temperature of the open-tube doping diffusion is 490° C., and the duration of the open-tube doping diffusion is 30-40 minutes to make the first depth 1.3 μm;

[0079] S24, depositing a SiNx antireflection film on the surface of the first diffusion barrier layer and the diffusion window surface remaining after photolithography by using a PECVD process to form a second diffusion barrier layer, wherein the thickness of the SiNx antireflection film is 210 nm;

[0080] S25, performing annealing treatment on the wafer to form a second deep diffusion region, wherein the annealing temperature is 500°C and the second depth is 4 μm.

[0081] Example 3

[0082] The impurity diffusion method of the detector chip provided in this embodiment includes the following steps:

[0083] S31, depositing a SiNx / SiO2 composite film on the surface of the wafer by using a PECVD process to form a first diffusion barrier layer, wherein the thickness of SiNx is 50nm and the thickness of SiO2 is 500nm;

[0084] S32, spin-coating a photoresist on the surface of the first diffusion barrier layer, sequentially performing pre-baking, exposure, development, hardening, and RIE dry etching steps to remove the first diffusion barrier layer in the area where diffusion is required, and immersing the first diffusion barrier layer and the wafer after photolithography in an acetone solution to remove the photoresist;

[0085] S33, using a gaseous zinc source to perform open-tube doping diffusion in a high-temperature diffusion furnace to form a first deep diffusion zone, wherein the temperature of the open-tube doping diffusion is 520° C., and the duration of the open-tube doping diffusion is 25-30 minutes so that the first depth is 1.3 μm;

[0086] S34, depositing a SiNx antireflection film on the surface of the first diffusion barrier layer and the diffusion window surface remaining after photolithography by using a PECVD process to form a second diffusion barrier layer, wherein the thickness of the SiNx antireflection film is 150 nm;

[0087] S35 , annealing the wafer to form a second deep diffusion region, wherein the annealing temperature is 450° C. and the second depth is 4 μm.

[0088] Example 4

[0089] The impurity diffusion method of the detector chip provided in this embodiment includes the following steps:

[0090] S41, depositing a SiNx / SiO2 composite film on the surface of the wafer by using a PECVD process to form a first diffusion barrier layer, wherein the SiNx thickness is 120 nm and the SiO2 thickness is 300 nm;

[0091] S42, spin-coating a photoresist on the surface of the first diffusion barrier layer, sequentially performing pre-baking, exposure, development, hardening, and RIE dry etching steps to remove the first diffusion barrier layer in the area where diffusion is required, and immersing the first diffusion barrier layer and the wafer after photolithography in an acetone solution to remove the photoresist;

[0092] S43, using a gaseous zinc source to perform open-tube doping diffusion in a high-temperature diffusion furnace to form a first deep diffusion zone, wherein the temperature of the open-tube doping diffusion is 550° C., and the duration of the open-tube doping diffusion is 20-25 minutes to make the first depth 1.0 μm;

[0093] S44, depositing a Si Nx anti-reflection film on the surface of the first diffusion barrier layer and the diffusion window surface remaining after photolithography by using a PECVD process to form a second diffusion barrier layer, wherein the thickness of the Si Nx anti-reflection film is 210 nm;

[0094] S45, performing annealing treatment on the wafer to form a second deep diffusion region, wherein the annealing temperature is 500°C and the second depth is 4 μm.

[0095] In addition, an embodiment of the present application also provides a detector chip, which can be obtained by using the impurity diffusion method of the above-mentioned detector chip.

[0096] The above is only a specific implementation of the present application. Under the above teachings of the present application, those skilled in the art can make other improvements or modifications based on the above embodiments. Those skilled in the art should understand that the above specific description is only to better explain the purpose of the present application, and the protection scope of the present application shall be based on the protection scope of the claims.

[0097] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present application and form different embodiments. For example, in the claims below, any one of the claimed embodiments may be used in any combination.

Claims

1. A method for impurity diffusion of a detector chip, characterized in that: The following steps are involved: Growing a first diffusion barrier layer on the surface of the wafer, wherein the first diffusion barrier layer is a SiNx / SiO2 composite film; Performing photolithography on the first diffusion barrier layer to form a diffusion window; Performing open-tube doping diffusion in the diffusion window to form a first deep diffusion zone, wherein the duration of the open-tube doping diffusion is 20-40 minutes; Growing a second diffusion barrier layer on the surface of the first diffusion barrier layer and the diffusion window, wherein the second diffusion barrier layer is a SiNx anti-reflection film; Performing annealing on the wafer to form a second deep diffusion region; The ratio of the first depth to the second depth is 1 / 4-1 / 3.

2. The impurity diffusion method for a detector chip according to claim 1, characterized in that: In the first diffusion barrier layer, the SiNx thickness of the SiNx / SiO2 composite film is 50-120 nm, and / or the SiO2 thickness of the SiNx / SiO2 composite film is 300-500 nm.

3. The impurity diffusion method for a detector chip according to claim 1, characterized in that: In the second diffusion barrier layer, the thickness of the SiNx anti-reflection film is 150-210 nm.

4. The impurity diffusion method for a detector chip according to claim 1, characterized in that: The first depth is 1.0-1.3 μm.

5. The impurity diffusion method for a detector chip according to claim 1, characterized in that: The second depth is 3-4 μm.

6. The impurity diffusion method for a detector chip according to claim 1, characterized in that: The temperature of the open tube doping diffusion is 470-550°C.

7. The impurity diffusion method for a detector chip according to claim 1, characterized in that: The annealing temperature is 450-500°C.

8. A detector chip obtained by the impurity diffusion method for a detector chip according to any one of claims 1 to 7.

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