A single-stage high-frequency inverter

Abstract

The present invention discloses a single-stage high-frequency inverter, including: a waveform generating circuit, a waveform driving circuit, a push-pull output circuit and a rectifier output circuit; the output end of the waveform generating circuit is connected to the input end of the waveform driving circuit; the output end of the waveform driving circuit is connected to the input end of the push-pull output circuit; the output end of the push-pull output circuit is connected to the input end of the rectifier output circuit; the output end of the rectifier output circuit is connected to the input end of the waveform generating circuit. The present invention integrates the key parts of the inverter, the waveform generating circuit, the waveform driving circuit, the push-pull output circuit and the rectifier output circuit into the inverter, effectively reducing the need for external components and connections, and by directly connecting the input and output ends of each circuit, reducing additional connection lines and interfaces, thereby effectively reducing the overall size, as well as reducing the cost and failure rate of the high-frequency inverter.

Description

Technical Field

[0001] The present invention relates to the technical field of inverters, and in particular to a single-stage high-frequency inverter. Background Art

[0002] The industrial frequency inverter can simultaneously boost the DC voltage and convert the frequency during inversion, but its self-loss is relatively large. Although the high-frequency inverter is small in size and light in weight, it requires two-stage circuits for AC-DC conversion, which requires more parts and a complex circuit.

[0003] Existing single-stage inverters are usually industrial frequency inverters, which are composed of an iron core transformer and electronic components. They are bulky and heavy, resulting in low convenience in use. Summary of the invention

[0004] The present invention provides a single-stage high-frequency inverter to solve the technical problem that the existing single-stage inverter is usually an industrial frequency inverter composed of an iron core transformer and electronic components, has a large size and is heavy, resulting in low convenience in use.

[0005] The present invention provides a single-stage high-frequency inverter, comprising:

[0006] Waveform generating circuit, waveform pushing circuit, push-pull output circuit and rectifier output circuit;

[0007] The output end of the waveform generating circuit is connected to the input end of the waveform pushing circuit; the output end of the waveform pushing circuit is connected to the input end of the push-pull output circuit; the output end of the push-pull output circuit is connected to the input end of the rectifier output circuit; the output end of the rectifier output circuit is connected to the input end of the waveform generating circuit.

[0008] Further, the waveform generating circuit is provided with a first chip;

[0009] The first pin of the first chip is connected to the voltage input terminal;

[0010] The twelfth pin, the thirteenth pin, the fourteenth pin and the fifteenth pin of the first chip are all connected to the input end of the waveform driving circuit.

[0011] Further, the waveform driving circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor, a second transistor, a third transistor and a fourth transistor;

[0012] The input end of the first resistor is connected to the thirteenth pin of the first chip; the output end of the first resistor is connected to the input end of the rectifier output circuit;

[0013] The input end of the second resistor is connected to the twelfth pin of the first chip; the output end of the second resistor is connected to the rectifier output circuit;

[0014] The base of the first transistor is respectively connected to the fifteenth pin of the first chip and the base of the second transistor; the collector of the first transistor is connected to the collector of the third transistor; the emitter of the first transistor is respectively connected to the emitter of the second transistor and the input end of the third resistor, and the output end of the third resistor is connected to the push-pull output circuit;

[0015] The base of the second transistor is connected to the fifteenth pin of the first chip; the base of the third transistor is connected to the fourteenth pin of the first chip and the base of the fourth transistor respectively;

[0016] The emitter of the third transistor is connected to the emitter of the fourth transistor and the input end of the fourth resistor respectively, and the output end of the fourth resistor is connected to the push-pull output circuit.

[0017] Further, the push-pull output circuit includes a first MOS tube, a second MOS tube, a first transformer, a first rectifier and a second rectifier;

[0018] The gate of the first MOS tube is connected to the output end of the waveform driving circuit; the drain of the first MOS tube is connected to the primary coil of the first transformer; the source of the first MOS tube is grounded;

[0019] The gate of the second MOS tube is connected to the output end of the waveform driving circuit; the drain of the second MOS tube is connected to the primary coil of the first transformer; the source of the second MOS tube is connected to the source of the first MOS tube;

[0020] The AC input end of the first rectifier is connected to the secondary coil of the first transformer; the negative electrode of the first rectifier is connected to the rectifier input circuit; the positive electrode of the first rectifier is connected to the rectifier input circuit;

[0021] The AC input end of the second rectifier is connected to the secondary coil of the first transformer, the negative pole of the second rectifier is connected to the rectifier input circuit; and the positive pole of the second rectifier is connected to the rectifier input circuit.

[0022] Furthermore, the rectification output circuit includes a second chip, a third chip, a third MOS tube and a fourth MOS tube;

[0023] The sixth pin of the second chip is connected to the gate of the third MOS tube; the first pin of the second chip is respectively connected to the voltage input terminal and the first pin of the third chip; the second pin of the second chip is connected to the thirteenth pin of the first chip; the fourth pin of the second chip is connected to the negative electrode of the first rectifier;

[0024] The drain of the third MOS tube is connected to the positive electrode of the first rectifier; the source of the third MOS tube is connected to the drain of the fourth MOS tube;

[0025] The sixth pin of the third chip is respectively connected to the gate of the fourth MOS tube; the fourth pin of the third chip is connected to the negative electrode of the second rectifier; the second pin of the third chip is connected to the output end of the second resistor;

[0026] The source of the fourth MOS tube is connected to the negative electrode of the second rectifier.

[0027] Furthermore, the single-stage high-frequency inverter further includes a current protection circuit, and an output end of the current protection circuit is connected to the eighth pin and the ninth pin of the first chip.

[0028] Furthermore, the single-stage high-frequency inverter also includes a voltage stabilizing sampling circuit, the input end of the voltage stabilizing sampling circuit is connected to the output end of the rectifier output circuit, and the output end of the voltage stabilizing sampling circuit is connected to the input end of the waveform generating circuit.

[0029] The present invention integrates the key parts of the inverter, namely, the waveform generating circuit, the waveform driving circuit, the push-pull output circuit and the rectifier output circuit, into the inverter, effectively reducing the demand for external components and connections, and by directly connecting the input and output ends of each circuit, reducing additional connecting wires and interfaces, thereby effectively reducing the overall size.

[0030] Furthermore, the rectifier output circuit of the present invention only needs to set up one transformer instead of multiple transformers, which can effectively reduce the components of the inverter while stabilizing the output waveform, thereby further reducing the volume and weight of the inverter, as well as reducing the cost and failure rate of the high-frequency inverter. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 is a structural schematic diagram of a single-stage high-frequency inverter provided by an embodiment of the present invention;

[0032] Figure 2 It is a schematic diagram of a waveform generating circuit structure and corresponding waveform provided by an embodiment of the present invention;

[0033] Figure 3 It is a waveform driving circuit structure and a corresponding waveform schematic diagram provided by an embodiment of the present invention;

[0034] Figure 4 1 is a schematic diagram of a push-pull output circuit structure and corresponding waveforms provided by an embodiment of the present invention;

[0035] Figure 5 It is a schematic diagram of a rectifier output circuit structure and corresponding waveforms provided by an embodiment of the present invention;

[0036] Figure 6 It is a schematic diagram of the overall circuit structure of a single-stage high-frequency inverter provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0038] In the description of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the feature. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0039] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0040] See also Figure 1 The present invention provides a single-stage high-frequency inverter, comprising:

[0041] A waveform generating circuit 1, a waveform driving circuit 2, a push-pull output circuit 3 and a rectifier output circuit 4;

[0042] The output end of the waveform generating circuit 1 is connected to the input end of the waveform pushing circuit 2; the output end of the waveform pushing circuit 2 is connected to the input end of the push-pull output circuit 3; the output end of the push-pull output circuit 3 is connected to the input end of the rectifier output circuit 4; the output end of the rectifier output circuit 4 is connected to the input end of the waveform generating circuit 1.

[0043] In the embodiment of the present invention, the waveform generating circuit 1 generates a PWM+SPWM waveform, that is, a high-frequency PWM wave is modulated in an SPWM wave, and the PWM waveform contained in the PWM+SPWM waveform can adapt to the characteristics of a high-frequency transformer. The waveform generating circuit 1 controls the PWM waveform in the PWM+SPWM waveform to perform a fixed-frequency pulse to boost the voltage, and controls the size of the pulse according to voltage feedback to achieve voltage stabilization.

[0044] It can be understood that the waveform generating circuit 1 can simultaneously generate two inverter AC top-frequency waveforms H1 / H2, a 50Hz power frequency generates a 100Hz rectangular wave, and a 60Hz power frequency generates a 120Hz rectangular wave, and these two waveforms are complementary.

[0045] In the embodiment of the present invention, the SPWM waveform in the PWM+SPWM waveform forms the number of pulses in each segment of the sine wave segmented voltage value. The number of PWM pulses in equal pulse width at the sine wave peak is the largest, and the number of pulses at the trough is the least. The number of pulses can be determined based on the voltage position between the sine wave peak and the trough to achieve the true value requirement in the high-frequency voltage.

[0046] The PWM+SPWM waveform of the embodiment of the present invention is modulated to form a PSP waveform, and the two PSP waveforms are PSP1 / PSP2 respectively. The waveform push circuit 2 pushes the two modulated PSP waveforms to the push-pull output circuit 3.

[0047] The two PSP waveforms in the push-pull output circuit 3 work complementary. The two modulated PSP waveforms control the number of true effective pulses at the peak and trough points of the sine wave, and make the waveforms consistent when the voltage is boosted through the primary and secondary coil induction of the transformer, thereby directly achieving a high-frequency voltage containing a sine wave component through the transformer.

[0048] The push-pull output circuit 3 can use a crystal push-pull circuit. For the PSP waveform current of the previous stage, the primary and secondary coils of the first transformer are compared. If the number of turns of the secondary coil is less than that of the primary coil, the transformer will step up the voltage; if the number of turns of the secondary coil is more than that of the primary coil, the transformer will step down the voltage. The pulse frequency of PWM is determined by the magnetic flux density of the first transformer. When the PC40 magnetic core is used, the pulse frequency is about 30Khz to 60Khz; when the nano-microcrystalline transformer core is used, the frequency is about 10K to 30K. The SPWM frequency segmentation is between 64-16 / 10ms (at 50Hz). Experiments have shown that the more segments of this unit value, the smoother the sine waveform, but if the value exceeds 64 / 10ms, the transformer matching characteristics will deteriorate, and the conversion efficiency will also deteriorate, resulting in increased power consumption.

[0049] The rectifier output circuit 4 is a PSP high-frequency voltage boosted by a transformer. The primary coil senses the first secondary coil LA2 and the second secondary coil LB2, and then outputs two PSP DC voltages V1 and V2 through the first rectifier DB1 and the second rectifier DB2. The positive electrode of the voltage V1 is connected to the D pole of the third MOS tube Q7, and the S pole is the positive half-cycle voltage of the AC output. The negative electrode of V1 is connected to the positive electrode of V2 as the 0 potential of the AC output; the negative electrode of V2 is connected to the S pole of the fourth MOS tube Q8 as the negative half-cycle voltage of the AC output.

[0050] The embodiment of the present invention integrates the key parts of the inverter, namely the waveform generating circuit 1, the waveform driving circuit 2, the push-pull output circuit 3 and the rectifier output circuit 4, into the inverter, thereby reducing the need for external components and connections. In addition, by directly connecting the input and output ends of each circuit, additional connecting wires and interfaces are reduced, thereby reducing the overall size, which is beneficial to improving the ease of use of the inverter.

[0051] Furthermore, the rectifier output circuit 4 of the embodiment of the present invention only needs to be provided with one transformer instead of multiple transformers, which can effectively reduce the components of the inverter while stabilizing the output waveform, thereby further reducing the volume and weight of the inverter.

[0052] See also Figure 2 , In one embodiment, the waveform generating circuit 1 is provided with a first chip;

[0053] A first pin of the first chip IC1 is connected to a voltage input terminal;

[0054] The twelfth pin, the thirteenth pin, the fourteenth pin and the fifteenth pin of the first chip IC1 are all connected to the input end of the waveform push circuit 2 .

[0055] Please continue reading Figure 2 , the modulated synthetic wave of PWM1 and SPWM1 is PSP1; the modulated synthetic wave of PWM2 and SPWM2 is PSP2. PSP1 and PSP2 are complementary waveforms, that is, when PSP1 is high, PSP2 is low. The waveform above PWM1 in the figure is the location of the peak and trough potential of the simulated sine wave in the PSP wave.

[0056] In the embodiment of the present invention, a single chip is used as the core of the waveform generating circuit 1, which can reduce the number of external components, thereby effectively improving the integration of the circuit.

[0057] See also Figure 3 In one embodiment, the waveform push circuit 2 includes a first resistor R12, a second resistor R13, a third resistor R8, a fourth resistor R10, a first transistor Q1, a second transistor Q2, a third transistor Q3 and a fourth transistor Q4;

[0058] The input end of the first resistor is connected to the thirteenth pin of the first chip; the output end of the first resistor is connected to the input end of the rectifier output circuit 4;

[0059] The input end of the second resistor is connected to the twelfth pin of the first chip; the output end of the second resistor is connected to the rectifier output circuit 4;

[0060] The base of the first transistor is respectively connected to the fifteenth pin of the first chip and the base of the second transistor; the collector of the first transistor is connected to the collector of the third transistor; the emitter of the first transistor is respectively connected to the emitter of the second transistor and the input end of the third resistor, and the output end of the third resistor is connected to the push-pull output circuit 3;

[0061] The base of the second transistor is connected to the fifteenth pin of the first chip; the base of the third transistor is connected to the fourteenth pin of the first chip and the base of the fourth transistor respectively;

[0062] The emitter of the third transistor is connected to the emitter of the fourth transistor and the input end of the fourth resistor respectively, and the output end of the fourth resistor is connected to the push-pull output circuit 3 .

[0063] See also Figure 4 In one embodiment, the push-pull output circuit 3 includes a first MOS transistor Q5, a second MOS transistor Q6, a first transformer L1, a first rectifier DB1 and a second rectifier DB2;

[0064] The gate of the first MOS tube is connected to the output end of the waveform driving circuit 2; the drain of the first MOS tube is connected to the primary coil of the first transformer; the source of the first MOS tube is grounded;

[0065] The gate of the second MOS tube is connected to the output end of the waveform driving circuit 2; the drain of the second MOS tube is connected to the primary coil of the first transformer; the source of the second MOS tube is connected to the source of the first MOS tube;

[0066] The AC input end of the first rectifier is connected to the secondary coil of the first transformer; the negative electrode of the first rectifier is connected to the rectifier input circuit; the positive electrode of the first rectifier is connected to the rectifier input circuit;

[0067] The AC input end of the second rectifier is connected to the secondary coil of the first transformer, the negative pole of the second rectifier is connected to the rectifier input circuit; and the positive pole of the second rectifier is connected to the rectifier input circuit.

[0068] See also Figure 5 In one embodiment, the rectifier output circuit 4 includes a second chip I CA, a third chip I BC, a third MOS transistor Q7 and a fourth MOS transistor Q8;

[0069] The sixth pin of the second chip is connected to the gate of the third MOS tube; the first pin of the second chip is respectively connected to the voltage input terminal and the first pin of the third chip; the second pin of the second chip is connected to the thirteenth pin of the first chip; the fourth pin of the second chip is connected to the negative electrode of the first rectifier;

[0070] The drain of the third MOS tube is connected to the positive electrode of the first rectifier; the source of the third MOS tube is connected to the drain of the fourth MOS tube;

[0071] The sixth pin of the third chip is respectively connected to the gate of the fourth MOS tube; the fourth pin of the third chip is connected to the negative electrode of the second rectifier; the second pin of the third chip is connected to the output end of the second resistor;

[0072] The source of the fourth MOS tube is connected to the negative electrode of the second rectifier.

[0073] Please continue reading Figure 5 , H1 / H2 is the AC control output waveform. In the T1 period, H1 is low level, I CA is turned on, and the voltage is added to the G pole of the third MOS tube Q7 through the resistor R24 ​​and the resistor R18 to turn on the third MOS tube Q7. The V1+ rectified by PSP1 is output to the AC socket through the third MOS tube Q7 via L1; in the T1 period, H2 is high level, I CB is cut off, and there is no output on this path. The AC socket only has the voltage of the upper half cycle of the sine wave between V1- and V1+ after filtering out the high frequency in the T1 period; similarly, the V2- rectified by PSP2 in the T2 period is output through Q8 to form the negative half cycle of the T2 period, and V1- and V2+ are at 0 points to form a sine wave zero line output.

[0074] Please refer to the waveform diagram of the circuit corresponding to 2-5. In the embodiment of the present invention, after the PSP waveform is induced and output by the transformer, the first rectifier circuit and the second rectifier circuit are used. Since the waveform generating circuit 1 simultaneously outputs two complementary rectangular waves H1 / H2, H1 is a negative pulse and H2 is a positive pulse during the T1 time period. Therefore, the 2nd foot of the optocoupler I CA corresponding to H1 is at a low potential, and the 2nd foot of I CB is at a high potential. Therefore, I CA is turned on, I CB is turned off, and the current divided by V1 is connected to I The fourth pin of CADE flows into the sixth pin and flows out of the G pole of the third MOS tube, so that the third MOS tube is turned on and the fourth MOS tube is turned off. The positive voltage of V1 passes through the D pole and S pole of the third MOS tube through the LC filtering circuit composed of L1 and C15 to output the upper half wave of the sine wave at the first pin of the power socket CZ; the negative pole of V1 is connected to the 0 potential of the CZ3 pin to form a +110V half-wave voltage. Since the effective value of this voltage is generated under the PSP1 waveform, the voltage changes from the trough to the peak and then from the peak to the trough during this period, thereby realizing the sine wave voltage of the hump curve; the same principle is in the T2 stage, H1 has a positive pulse, H2 has a negative pulse, the optocoupler I CA is turned off and I CB is turned on, the third MOS tube is turned off at this time, and the fourth MOS tube is turned on. The negative voltage pulls down the D point potential of the fourth MOS tube through the S pole of the fourth MOS tube, and is filtered by the LC circuit of L1 and C15, forming the negative half cycle of the sine wave at the 0 potential of the power socket pin 1 and the socket pin 3, and forming a continuous sine wave output in a cycle.

[0075] In one embodiment, the single-stage high frequency inverter further includes a current protection circuit 5 , and an output end of the current protection circuit 5 is connected to the eighth pin and the ninth pin of the first chip.

[0076] In one embodiment, the single-stage high frequency inverter further includes a voltage stabilizing sampling circuit 6 , the input end of the voltage stabilizing sampling circuit 6 is connected to the output end of the rectifier output circuit 4 , and the output end of the voltage stabilizing sampling circuit 6 is connected to the input end of the waveform generating circuit 1 .

[0077] The implementation of the embodiments of the present invention has the following beneficial effects:

[0078] The embodiment of the present invention integrates the key parts of the inverter, namely the waveform generating circuit 1, the waveform driving circuit 2, the push-pull output circuit 3 and the rectifier output circuit 4, into the inverter, effectively reducing the demand for external components and connections, and by directly connecting the input and output ends of each circuit, reducing additional connecting wires and interfaces, thereby effectively reducing the overall size.

[0079] Furthermore, the rectifier output circuit 4 of the embodiment of the present invention only needs to set up one transformer, without setting up multiple transformers. It can effectively reduce the components of the inverter while stabilizing the output waveform, thereby further reducing the volume and weight of the inverter, and reducing the cost and failure rate of the high-frequency inverter.

[0080] The above specific embodiments further illustrate the purpose, technical solutions and beneficial effects of the present invention. It should be understood that the above are only specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. It is particularly pointed out that for those skilled in the art, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of protection of the present invention.

Claims

1. A single-stage high-frequency inverter, characterized in that: include: Waveform generating circuit, waveform pushing circuit, push-pull output circuit and rectifier output circuit; The waveform generating circuit is provided with a first chip; the first pin of the first chip is connected to the voltage input terminal; the twelfth pin, the thirteenth pin, the fourteenth pin and the fifteenth pin of the first chip are all connected to the input terminal of the waveform driving circuit; The waveform push circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor, a second transistor, a third transistor and a fourth transistor; the input end of the first resistor is connected to the thirteenth pin of the first chip; the output end of the first resistor is connected to the input end of the rectifier output circuit; the input end of the second resistor is connected to the twelfth pin of the first chip; the output end of the second resistor is connected to the rectifier output circuit; the base of the first transistor is respectively connected to the fifteenth pin of the first chip and the base of the second transistor; the collector of the first transistor is connected to the collector of the third transistor; the emitter of the first transistor is respectively connected to the emitter of the second transistor and the input end of the third resistor, and the output end of the third resistor is connected to the push-pull output circuit; the base of the second transistor is connected to the fifteenth pin of the first chip; the base of the third transistor is respectively connected to the fourteenth pin of the first chip and the base of the fourth transistor; the emitter of the third transistor is respectively connected to the emitter of the fourth transistor and the input end of the fourth resistor, and the output end of the fourth resistor is connected to the push-pull output circuit; The push-pull output circuit includes a first MOS tube, a second MOS tube, a first transformer, a first rectifier and a second rectifier; the gate of the first MOS tube is connected to the output end of the waveform push circuit; the drain of the first MOS tube is connected to the primary coil of the first transformer; the source of the first MOS tube is grounded; the gate of the second MOS tube is connected to the output end of the waveform push circuit; the drain of the second MOS tube is connected to the primary coil of the first transformer; the source of the second MOS tube is connected to the source of the first MOS tube; the AC input end of the first rectifier is connected to the secondary coil of the first transformer; the negative electrode of the first rectifier is connected to the rectifier output circuit; the positive electrode of the first rectifier is connected to the rectifier output circuit; the AC input end of the second rectifier is connected to the secondary coil of the first transformer, the negative electrode of the second rectifier is connected to the rectifier output circuit; the positive electrode of the second rectifier is connected to the rectifier output circuit; The rectifier output circuit includes a second chip, a third chip, a third MOS tube and a fourth MOS tube; the sixth pin of the second chip is connected to the gate of the third MOS tube; the first pin of the second chip is respectively connected to the voltage input terminal and the first pin of the third chip; the second pin of the second chip is connected to the thirteenth pin of the first chip; the fourth pin of the second chip is connected to the negative electrode of the first rectifier; the drain of the third MOS tube is connected to the positive electrode of the first rectifier; the source of the third MOS tube is connected to the drain of the fourth MOS tube; the sixth pin of the third chip is connected to the gate of the fourth MOS tube; the fourth pin of the third chip is connected to the negative electrode of the second rectifier; the second pin of the third chip is connected to the output end of the second resistor; the source of the fourth MOS tube is connected to the negative electrode of the second rectifier; The output end of the waveform generating circuit is connected to the input end of the waveform pushing circuit; the output end of the waveform pushing circuit is connected to the input end of the push-pull output circuit; the output end of the push-pull output circuit is connected to the input end of the rectifier output circuit; the output end of the rectifier output circuit is connected to the input end of the waveform generating circuit.

2. The single-stage high-frequency inverter according to claim 1, characterized in that: It also includes a current protection circuit, the output end of which is connected to the eighth pin and the ninth pin of the first chip.

3. The single-stage high-frequency inverter according to any one of claims 1 to 2, characterized in that: It also includes a voltage stabilizing sampling circuit, the input end of the voltage stabilizing sampling circuit is connected to the output end of the rectifier output circuit, and the output end of the voltage stabilizing sampling circuit is connected to the input end of the waveform generating circuit.

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