Semiconductor test structure and test method thereof

Through the design of the semiconductor test structure including the fork to refer to the unit and the snake -shaped structure, the problem of single and layout of the existing test structure has been solved, and the accurate monitoring and efficient monitoring of various interconnected situations are realized.

CN118800763BActive Publication Date: 2025-01-28UNITED NOVA TECHNOLOGY YUEZHOU (SHAOXING) CORP
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Patent Information

Application Number
CN202411267061.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-09-11
Publication Date
2025-01-28
Estimated Expiration
2044-09-11

AI Technical Summary

Technical Problem

The existing semiconductor test structure has a single function, and it is unable to effectively monitor multiple complex interconnection situations, and it occupies a large area of ​​territory.

Method used

A semiconductor testing structure is designed, including the first combed electrodes of the first electric layer, the second combic electrode and the third electrode, and the fourth electrode, the fifth electrode and the sixth electrode in the second electric layer , Founding the fork unit and snake -shaped structure for monitoring a variety of interconnected situations.

Benefits of technology

Under the smaller area area, it can accurately monitor various interconnection situations in the conductive layer, improve the efficiency of monitoring, and get closer to the actual situation.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a semiconductor test structure and a test method thereof, wherein the semiconductor test structure comprises: a first comb electrode and a second comb electrode arranged on a first conductive layer, wherein the first comb electrode and the second comb electrode both comprise a plurality of electrode portions extending in a first direction and arranged into at least two spaced interdigitated units, wherein each interdigitated unit comprises a plurality of electrode portions facing each other at the ends and a plurality of electrode portions staggered at the sides; a fourth electrode, a fifth electrode and a sixth electrode arranged on a conductive through hole and located on the second conductive layer, wherein each fourth electrode extends in a second direction and crosses over the interdigitated unit, and an end of adjacent fourth electrode portions close to each other is connected to the same third electrode via a corresponding conductive through hole, and a plurality of fourth electrode portions are staggered and connected to the corresponding third electrode to form a serpentine structure. The present invention can accurately monitor a variety of interconnection situations in a conductive layer with a relatively small layout area.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor test structure and a test method thereof. Background Art

[0002] In the semiconductor manufacturing process, devices need to use metal wires for circuit interconnection. Especially for large-scale integrated circuit manufacturing processes, the back-end (BEOL) metal interconnection stacking levels will be more. Due to the increase in integration, the metal line width and contact / via are getting smaller and smaller, the spacing between adjacent metal wires is getting smaller and smaller, and the interconnection patterns are becoming more and more complex. This poses a serious challenge to both OPC (optical proximity correction) and the process. Short circuit (Bridge) failure or open circuit (open) failure often occurs during the process. In order to monitor the stability of the design or online process, some test structures (Test keys) for monitoring will be designed. By conducting electrical tests on the test structures and analyzing the test data, it is helpful to find problems and solve them in a targeted manner.

[0003] The existing test structure has a relatively single function, and usually only monitors one situation, without considering the complex conditions of multiple situations, which makes it very different from the actual interconnection situation and cannot play an effective monitoring role. Moreover, for multiple situations to be monitored, setting up multiple test structures with single functions as above also requires a large layout area. Summary of the invention

[0004] The object of the present invention is to provide a semiconductor test structure and a test method thereof, which are used to accurately monitor various interconnection situations in a conductive layer in a smaller layout area.

[0005] In order to solve the above technical problems, the present invention provides a semiconductor test structure, comprising:

[0006] A first comb-shaped electrode, a second comb-shaped electrode and a third electrode are provided on the first conductive layer, wherein the first comb-shaped electrode and the second comb-shaped electrode each include a plurality of electrode portions extending along a first direction and are arranged into at least two spaced interdigitated units, each of the interdigitated units includes a plurality of electrode portions facing each other at their ends and a plurality of electrode portions staggered at their sides, and at least three third electrodes extending along the first direction are provided on both sides of each of the interdigitated units;

[0007] A conductive through hole provided on the first conductive layer;

[0008] The fourth electrode, the fifth electrode and the sixth electrode are arranged on the conductive through hole and located in the second conductive layer, each of the fourth electrodes extends along the second direction and crosses the interdigital unit, one end of adjacent fourth electrode parts close to each other is connected to the same third electrode through the corresponding conductive through hole, a plurality of fourth electrode parts are arranged in an alternating manner and connected to the corresponding third electrode to form a serpentine structure, a plurality of fifth electrodes are directly opposite to the ends of part of the fourth electrodes and staggered on the sides and a plurality of fifth electrodes are connected, a plurality of sixth electrodes are directly opposite to the ends of part of the fourth electrodes and staggered on the sides and a plurality of sixth electrodes are connected, and the second direction is orthogonal to the first direction.

[0009] Optionally, the first comb-shaped electrode includes a plurality of first electrode portions extending along the first direction, a first lead-out portion connecting the first electrode portions, and a first pad connected to the first lead-out portion;

[0010] The second comb-shaped electrode includes a plurality of second electrode portions extending along the first direction, a second lead portion connected to each of the second electrode portions, and a second pad connected to the second lead portion.

[0011] Optionally, a plurality of second electrode portions are arranged on one side of the second lead portion, and the first lead portion and the second lead portion are arranged opposite to each other.

[0012] Optionally, a plurality of second electrode portions are disposed on both sides of the second lead portion, the first lead portion partially surrounds the second lead portion, and the interdigital unit and the serpentine structure are disposed on both sides of the second lead portion.

[0013] Optionally, each of the interdigitated finger units includes a first long electrode portion, a second long electrode portion, a first short electrode portion and a second short electrode portion, the first long electrode portion and the first short electrode portion are both the first electrode portion, the second long electrode portion and the second short electrode portion are both the second electrode portion, one end of the first long electrode portion is connected to the first lead-out portion and the other end thereof is opposite to the second lead-out portion, one end of the second long electrode portion is connected to the second lead-out portion and the other end thereof is opposite to the first lead-out portion, the first short electrode portion and the second short electrode portion are each arranged opposite to each other at one end and are each connected to the corresponding lead-out portion at one end away from each other.

[0014] Optionally, the plurality of fourth electrodes are arranged into a first group and a second group along the first direction, the fourth electrodes of the first group are arranged close to the first lead-out portion and located on a first straight line along the second direction, and the fourth electrodes of the second group are arranged close to the second lead-out portion and located on a second straight line along the second direction.

[0015] Optionally, the fifth electrode includes a first end electrode portion and a first side electrode portion which are electrically connected, the first end electrode portion is arranged opposite to the end of the fourth electrode, and the first side electrode portion is close to the fourth electrode and arranged in a staggered manner;

[0016] The sixth electrode includes a second end electrode portion and a second side electrode portion which are electrically connected. The second end electrode portion is arranged opposite to the end of the fourth electrode, and the second side electrode portion is close to the fourth electrode and arranged in a staggered manner.

[0017] Optionally, the plurality of fifth electrodes are connected by electrodes provided on the second conductive layer and / or by the third electrodes and conductive through holes thereon;

[0018] The plurality of sixth electrodes are connected by using electrodes arranged on the second conductive layer and / or by using the third electrodes and conductive through holes thereon.

[0019] Optionally, a third pad, a fourth pad, a fifth pad and a sixth pad are further provided on the second conductive layer, the third pad and the fourth pad are led out from two ends of the serpentine structure, the fifth pad is led out from the fifth electrode, and the sixth pad is led out from the sixth electrode.

[0020] Optionally, a plurality of seventh electrodes close to the fourth electrode and parallel to the fourth electrode are further provided on the second conductive layer, and the seventh electrodes are electrically isolated from the fourth electrode, the fifth electrode and the sixth electrode.

[0021] Optionally, the first conductive layer is any one of a substrate active layer, a polysilicon layer or a metal interconnection layer, and the second conductive layer is one of the metal interconnection layers.

[0022] Optionally, the electrode portions of the first comb electrode and the second comb electrode and the third electrode are designed according to the minimum design rule of the first conductive layer, and / or the fourth electrode, the fifth electrode and the sixth electrode are designed according to the minimum design rule of the second conductive layer.

[0023] According to another aspect of the present invention, a method for testing a semiconductor test structure is also provided, comprising:

[0024] A semiconductor test structure is provided, comprising: a first comb electrode, a second comb electrode and a third electrode provided on a first conductive layer, wherein the first comb electrode and the second comb electrode each include a plurality of electrode portions extending along a first direction and are arranged into at least two spaced interdigitated units, each of the interdigitated units includes a plurality of electrode portions facing each other at the ends and a plurality of electrode portions staggered at the sides, and at least three third electrodes extending along the first direction are provided on both sides of each of the interdigitated units; a conductive through hole provided on the first conductive layer; a fourth electrode, a fifth electrode and a sixth electrode provided on the conductive through hole and located on the second conductive layer, each of the fourth electrodes extending along a second direction and crossing the interdigitated units, one end of adjacent fourth electrode portions close to each other is connected to the same third electrode via a corresponding conductive through hole, a plurality of the fourth electrode portions are staggered and connected to the corresponding third electrodes to form a serpentine structure, a plurality of the fifth electrodes face each other at the ends of some of the fourth electrodes and stagger their sides and are connected to the plurality of the fifth electrodes, a plurality of the sixth electrodes face each other at the ends of some of the fourth electrodes and stagger their sides and are connected to the plurality of the sixth electrodes, and the second direction is orthogonal to the first direction;

[0025] Perform any one or any several of the first test, the second test and the third test, wherein the first test includes testing whether there is a short circuit between the first comb electrode and the second comb electrode, the second test includes testing whether there is a short circuit between the fourth electrode and the fifth electrode and / or testing whether there is a short circuit between the fourth electrode and the sixth electrode, and the third test includes testing whether the RC value of the serpentine structure exceeds a preset value and / or testing whether there is a short circuit between the fifth electrode and the sixth electrode.

[0026] Optionally, the first test, the second test and the third test are performed in sequence.

[0027] In summary, the semiconductor test structure of the present invention includes a first comb electrode, a second comb electrode and a third electrode arranged on the first conductive layer, the first comb electrode, the second comb electrode and the third electrode arranged on the first conductive layer, the first comb electrode and the second comb electrode both include a plurality of electrode portions extending along the first direction and arranged into at least two spaced interdigitated finger units, each interdigitated finger unit includes a plurality of electrode portions facing each other at the ends and a plurality of electrode portions staggered at the sides, at least three third electrodes extending along the first direction are arranged on both sides of each interdigitated finger unit; a conductive through hole arranged on the first conductive layer; a fourth electrode, a fifth electrode and a sixth electrode arranged on the conductive through hole and located on the second conductive layer, each fourth electrode extending along the second direction and crossing the interdigitated finger unit, one end of adjacent fourth electrode portions close to each other is connected to the same third electrode through the corresponding conductive through hole, a plurality of fourth electrode portions are staggered and connected to the corresponding third electrode to form a serpentine structure, a plurality of fifth electrodes are arranged facing and staggered with part of the fourth electrodes and the plurality of fifth electrodes are connected, a plurality of sixth electrodes are arranged facing and staggered with part of the fourth electrodes and the plurality of sixth electrodes are connected, and the second direction is orthogonal to the first direction. Compared with the single-function test structure in the related art, the semiconductor test structure of the present invention comprehensively considers the influence of adjacent wires on optical proximity correction and contact resistance of conductive through-holes under limited substrate area, wherein the adjacent wires include all modes of edge-to-edge, end-to-end and end-to-edge, which not only makes the monitoring test closer to the actual situation, that is, more accurate, but also can monitor multiple modes at the same time, which is beneficial to saving substrate layout area and improving monitoring efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Those skilled in the art should understand that the drawings are provided for a better understanding of the present invention, but do not constitute any limitation on the scope of the present invention.

[0029] Figure 1 A schematic diagram of a semiconductor test structure provided in Embodiment 1;

[0030] Figure 2a for Figure 1 A structural diagram of the first conductive layer separated from the above;

[0031] Figure 2b for Figure 1 A structural diagram of the second conductive layer separated from the PCB;

[0032] Figure 3 A schematic diagram of a semiconductor test structure provided in Embodiment 2;

[0033] Figure 4a for Figure 3 A structural diagram of the first conductive layer separated from the above;

[0034] Figure 4b for Figure 3A structural diagram of the second conductive layer separated from the PCB;

[0035] Figure 5 This is a flow chart of a method for testing a semiconductor test structure provided in Embodiment 3.

[0036] In the attached figure:

[0037] 10-first comb-shaped electrode; 11a-first long electrode portion; 11b-first short electrode portion; 12-first lead portion; 13-first pad; 14-third electrode; 16-interdigital unit; 17a-side to side; 17b-end to side; 17c-end to end; 20-second comb-shaped electrode; 21a-second long electrode portion; 21b-second short electrode portion; 22-second lead portion; 23-second pad; 24-conductive through hole; 31-third Four electrodes; 32a-third pad; 32b-fourth pad; 33-serpentine structure; 41-fifth electrode; 41a-first end electrode portion; 41b-first side electrode portion; 42-fifth pad; 43-sixth electrode; 43a-second end electrode portion; 43b-second side electrode portion; 44-sixth pad; 45-E-type structure; 43-seventh electrode; A1-first area; A2-second area; X-first direction; Y-second direction. DETAILED DESCRIPTION

[0038] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.

[0039] As used in the present invention, the singular forms "one", "an", and "the" include plural objects, the term "or" is usually used to include the meaning of "and / or", the term "several" is usually used to include the meaning of "at least one", and the term "at least two" is usually used to include the meaning of "two or more". In addition, the terms "first", "second", and "third" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features, unless the content clearly indicates otherwise.

[0040] Embodiment 1

[0041] Embodiment 1 provides a semiconductor test structure.

[0042] Figure 1 This is a schematic diagram of a semiconductor test structure provided in Embodiment 1.

[0043] like Figure 1 As shown, the semiconductor test structure provided in this embodiment includes: a first comb electrode 10, a second comb electrode 20, a third electrode 14, a fourth electrode 31, a fifth electrode 41 and a sixth electrode 43. The first comb electrode 10, the second comb electrode 20 and the third electrode 14 are arranged on the first conductive layer, and the first comb electrode 10 and the second comb electrode 20 each include a plurality of electrode portions extending along the first direction X and arranged into at least two spaced interdigital units 16, each interdigital unit 16 includes a plurality of electrode portions facing each other at the ends and a plurality of electrode portions staggered at the sides, and at least three third electrodes 14 extending along the first direction X are arranged on both sides of each interdigital unit 16. The conductive through hole 24 is arranged on the first conductive layer. The fourth electrode 31, the fifth electrode 41 and the sixth electrode 43 are arranged on the conductive through hole 24 and are located in the second conductive layer. Each fourth electrode 31 extends along the second direction Y and crosses the interdigital unit 16. One end of adjacent fourth electrodes 31 that are close to each other is connected to the same third electrode 14 through the corresponding conductive through hole 24. Multiple fifth electrodes 41 are directly opposite to the ends of part of the fourth electrodes 31 and are staggered on the sides and the multiple fifth electrodes 41 are connected. Multiple sixth electrodes 43 are directly opposite to the ends of part of the fourth electrodes 31 and are staggered on the sides and the multiple sixth electrodes 43 are connected. The second direction Y is orthogonal to the first direction X.

[0044] The first conductive layer and the second conductive layer in the first embodiment may be two conductive layers adjacent to each other. Corresponding to the specific film layer of the semiconductor device, the first conductive layer may be any one of the substrate active layer (active region), the polysilicon layer (gate structure layer) or the metal interconnection layer, and the second conductive layer may be one of the metal interconnection layers. In one example, the first conductive layer may be the substrate active layer, the second conductive layer may be the first metal interconnection layer, and the conductive via 24 between the two layers may be a contact hole. In another example, the first conductive layer may be the polysilicon layer on the substrate, the second conductive layer may be the first metal interconnection layer, and the conductive via 24 between the two layers may be a contact hole. In other examples, the first conductive layer may be the Nth metal interconnection layer (N is an integer greater than or equal to 1), the second conductive layer may be the N+1th metal interconnection layer, and the conductive via 24 between the two layers may be a metal via. The material of each electrode in the semiconductor test structure is the same as that of the corresponding conductive layer, and can be designed as much as possible according to the minimum design rule of each conductive layer (for example, the minimum design line width).

[0045] Figure 2a for Figure 1 The structural diagram of the first conductive layer separated from FIG. Figure 2aAs shown, the first comb-shaped electrode 10 includes a plurality of first electrode portions extending along the first direction X, a first lead-out portion 12 connecting each first electrode portion, and a first pad 13 connected to the first lead-out portion 12; the second comb-shaped electrode 20 includes a plurality of second electrode portions extending along the first direction X, a second lead-out portion 22 connecting each second electrode portion, and a second pad 23 connected to the second lead-out portion 22. Among them, the first lead-out portion 12 and the second lead-out portion 22 may be strips extending along the second direction Y and arranged oppositely, the first electrode portion and the second electrode portion are respectively led out from the side of the first lead-out portion 12 and the second lead-out portion 22 close to each other, and the line width of the first lead-out portion and the second lead-out portion 22 may be greater than the line width of the first electrode portion and the second electrode portion. The first comb-shaped electrode 10 includes a total of five first electrode portions, namely three first long electrode portions 11a and two first short electrode portions 11b, and the second comb-shaped electrode 20 includes a total of five second electrode portions, namely three second long electrode portions 21a and two second short electrode portions 21b. It can be understood that in other examples of this embodiment, the outermost first long electrode portion 11a and the second long electrode portion 21a may not be provided, that is, the first comb-shaped electrode 10 has the same number of first long electrode portions 11a and first short electrode portions 11b, and the second comb-shaped electrode 20 has the same number of second long electrode portions 21a and second short electrode portions 21b.

[0046] Please continue to refer to Figure 2a The four electrode portions arranged between the first lead-out portion 12 and the second lead-out portion 22 constitute two interdigital units 16 arranged at intervals. Each interdigital unit 16 may include a first long electrode portion 11a, a second long electrode portion 21a, a first short electrode portion 11b and a second short electrode portion 21b. One end of the first long electrode portion 11a is connected to the first lead-out portion 12, and the other end (end) thereof is opposite to the second lead-out portion 22 to form a "end opposite side 17b" mode. One end of the first short electrode portion 11b is connected to the first lead-out portion 12, and the second short electrode portion 21 One end of the first short electrode portion 11b is connected to the second lead-out portion 22, and the other ends (ends close to each other) of the first short electrode portion 11b and the second short electrode portion 21b are arranged opposite to each other to form an "end-to-end 17c" mode. One end of the second long electrode portion 21a is connected to the second lead-out portion 22, and the other end (end) thereof is opposite to the first lead-out portion 12 to form an "end-to-side 17b" mode. The first long electrode portion 11a, the first short electrode portion 11b (or the second short electrode portion 21b) and the second long electrode portion 21a are arranged alternately (partially side by side) to form an "edge-to-side 17a" mode. The requirements of the various "end-to-side 17b", "end-to-end 17c" and "edge-to-side 17a" modes can be determined according to the minimum design specifications in the first conductive layer. Therefore, the various modes in the above-mentioned interdigital unit 16 comprehensively consider the influence of various forms on the optical proximity correction and its process, which can make it closer to the actual situation, so that the test structure of this embodiment is more accurate when monitoring process fluctuations.

[0047] Please continue to refer to Figure 2a , at least three third electrodes 14 (strip-shaped) extending along the first direction X may be provided on each side of the interdigital unit 16, and the third electrodes 14 are isolated from the first lead-out portion 12 and the second lead-out portion 22 on both sides, and each third electrode 14 may have the same length. The third electrode 14 may have a width close to that of each electrode portion, and the third electrodes 14 and the third electrodes 14 and the adjacent electrode portions may have a close spacing, so that the third electrodes 14 and each electrode portion are arranged uniformly. In addition, the third electrode 14 may also be connected to some electrodes on the second conductive layer. In other examples of this embodiment, the number of third electrodes 14 on each side of the interdigital unit 16 may be more than three, such as five or seven.

[0048] Figure 2b for Figure 1 The structural diagram of the second conductive layer separated from FIG. Figure 2b As shown, each fourth electrode 31 extends along the second direction Y, and a plurality of fourth electrodes 31 are staggered into two rows (two groups) arranged along the first direction X, namely a first group and a second group. The fourth electrodes 31 of the first group are arranged close to the first lead-out portion 12 and are located on a first straight line along the second direction Y, and the fourth electrodes 31 of the second group are arranged close to the second lead-out portion 22 and are located on a second straight line along the second direction Y, wherein both ends (one end close to each other) of each adjacent two fourth electrodes 31 in the first group and the second group may be arranged on the same third electrode 14. The fourth electrodes 31 mentioned above are not originally conductive on the second conductive layer, but a conductive through hole 24 is provided between the third electrode 14 and the fourth electrode 31, that is, the third electrode 14 and the conductive through hole 24 thereon are used to connect two adjacent fourth electrodes 31. Therefore, all the fourth electrodes 31 mentioned above are connected in series via the third electrode 14 and the corresponding conductive through hole 24 to form a serpentine structure 33 disposed between the first conductive layer and the second conductive layer. The two ends of the serpentine structure 33 are the extended third pad 32a and the fourth pad 32b, which are disposed on the second conductive layer. Among them, except for the fourth electrode 31 directly connected to the third pad 32a and the fourth pad 32b, the other fourth electrodes 31 all cross the interdigital unit 16, and the fourth electrodes 31 may have the same length, and the length may be, for example, the center distance between two interdigital units in the first conductive layer.

[0049] Please continue to refer to Figure 2b, both the fifth electrode 41 and the sixth electrode 43 are located on the second conductive layer. The fifth electrode 41 and the sixth electrode 43 can be arranged adjacent to each other and are electrically isolated. Both of them include a plurality of end electrode portions and a plurality of side electrode portions, which are used to form "end-to-end 17c" and "side-to-side 17a" modes with each fourth electrode 31 to monitor the electrical connection. In this embodiment, the electrodes of the fifth electrode 41 are arranged around the fourth electrodes 31 of the first group, and the electrode portions of the sixth electrode 43 are arranged around the fourth electrodes 31 of the second group. In a preferred example, the fifth electrode 41 and the sixth electrode 43 can be arranged in a centrosymmetric shape. Specifically, the electrode portions of the fifth electrode 41 surround the ends of the fourth electrodes 31 of the first group and the sides around them. Among them, the first end electrode portion 41a of the fifth electrode 41 is arranged opposite to the end of the fourth electrode 31, and the two first side electrode portions 41b of the fifth electrode 41 are connected to the first end electrode portion 41a and are arranged parallel to and staggered with the corresponding fourth electrode 31. The above one first end electrode portion 41a and two first side electrode portions 41b surround the end of a fourth electrode 31 to form a similar E-shaped structure 45 (i.e., the aforementioned "end-to-end 17c" and "side-to-side 17a" modes). The above E-shaped structures 45 can also be appropriately deformed as needed to connect the electrode portions of the fifth electrode 41. For example, the two E-shaped structures 45 between the opposite ends of two fourth electrodes 31 can be back-to-back to form a similar king-shaped structure, and the two E-shaped structures 45 on both sides of the same fourth electrode 31 can be connected by an extended first side electrode portion 41b. Similarly, the electrode portions of the sixth electrode 43 surround the ends of the fourth electrodes 31 of the second group and the sides around them. Among them, the second end electrode portion 43a of the sixth electrode 43 is arranged opposite to the end of the fourth electrode 31, and the two second side electrode portions 43b of the sixth electrode 43 are connected to the second end electrode portion 43a and are arranged parallel to and staggered with the corresponding fourth electrode 31. In addition, a plurality of seventh electrodes 43 that are insulated from the fourth electrode 31, the fifth electrode 41, and the sixth electrode 43 are provided on the second conductive layer. They extend along the second direction Y, are arranged between the side electrode portions of the E-shaped structure 45, and are aligned with the side electrode portions.

[0050] It should be noted that in this embodiment Figure 1 the shown test structure may only be a schematic diagram of the minimum structure. The test structures in other examples of this embodiment can be further expanded or formed into an array structure on this basis. In Figure 1 the shown test structure, there are only two interdigital units 16. In the test structures of other examples, there can be three or more interdigital units 16, and a serpentine structure 33 with a longer path can be formed accordingly.

[0051] Embodiment 2

[0052] Embodiment 2 provides a semiconductor test structure.

[0053] Figure 3 This is a schematic diagram of a semiconductor test structure provided in Embodiment 2.

[0054] like Figure 3 As shown, the semiconductor test structure provided in this embodiment includes: a first comb electrode 10, a second comb electrode 20, a third electrode 14, a fourth electrode 31, a fifth electrode 41 and a sixth electrode 43. The first comb electrode 10, the second comb electrode 20 and the third electrode 14 are arranged on the first conductive layer, and the first comb electrode 10 and the second comb electrode 20 each include a plurality of electrode portions extending along the first direction X and arranged into at least two spaced interdigital units 16, each interdigital unit 16 includes a plurality of electrode portions facing each other at the ends and a plurality of electrode portions staggered at the sides, and at least three third electrodes 14 extending along the first direction X are arranged on both sides of each interdigital unit 16. The conductive through hole 24 is arranged on the first conductive layer. The fourth electrode 31, the fifth electrode 41 and the sixth electrode 43 are arranged on the conductive through hole 24 and are located in the second conductive layer. Each fourth electrode 31 extends along the second direction Y and crosses the interdigital unit 16. One end of adjacent fourth electrodes 31 that are close to each other is connected to the same third electrode 14 through the corresponding conductive through hole 24. Multiple fifth electrodes 41 are directly opposite to the ends of part of the fourth electrodes 31 and are staggered on the sides and the multiple fifth electrodes 41 are connected. Multiple sixth electrodes 43 are directly opposite to the ends of part of the fourth electrodes 31 and are staggered on the sides and the multiple sixth electrodes 43 are connected. The second direction Y is orthogonal to the first direction X.

[0055] Figure 4a for Figure 3 The structural diagram of the first conductive layer separated from FIG. Figure 4aAs shown, similar to the first embodiment, the first comb-shaped electrode 10 includes a plurality of first electrode portions extending along the first direction X, a first lead-out portion 12 connecting the first electrode portions, and a first soldering pad 13 connected to the first lead-out portion 12; the second comb-shaped electrode 20 includes a plurality of second electrode portions extending along the first direction X, a second lead-out portion 22 connecting the second electrode portions, and a second soldering pad 23 connected to the second lead-out portion 22. Different from the first conductive layer of the first embodiment in which the plurality of second electrode portions are arranged on one side of the second lead-out portion 22, in the first conductive layer of the present embodiment, the plurality of second electrode portions are arranged on both sides of the second lead-out portion 22, namely, including a first area A1 located on one side of the second lead-out portion 22 and a second area A2 located on the other side. Correspondingly, the first lead-out portion 12 partially surrounds (partially encloses) the second lead-out portion 22 (the first area A1 and the second area A2), namely, the first lead-out portion 12 may include two portions respectively arranged opposite to the two sides of the second lead-out portion 22, and the first electrode portion and the second electrode portion form a finger unit 16 on both sides of the second lead-out portion 22 (the first area A1 and the second area A2). Among them, similar to the first embodiment, the four electrode portions arranged between the first lead-out portion 12 and the second lead-out portion 22 constitute two interdigital units 16 arranged at intervals, and each interdigital unit 16 may include a first long electrode portion 11a, a second long electrode portion 21a, a first short electrode portion 11b and a second short electrode portion 21b, one end of the first long electrode portion 11a is connected to the first lead-out portion 12, and the other end (end) thereof is opposite to the second lead-out portion 22 to form a "end opposite side 17b" mode, one end of the first short electrode portion 11b is connected to the first lead-out portion 12, and the second One end of the short electrode portion 21b is connected to the second lead-out portion 22, and the other ends (ends close to each other) of the first short electrode portion 11b and the second short electrode portion 21b are arranged opposite to each other to form an "end-to-end 17c" mode. One end of the second long electrode portion 21a is connected to the second lead-out portion 22, and the other end (end) thereof is opposite to the first lead-out portion 12 to form an "end-to-side 17b" mode. The first long electrode portion 11a, the first short electrode portion 11b (or the second short electrode portion 21b) and the second long electrode portion 21a are arranged alternately (partially side by side) to form an "edge-to-side 17a" mode. The requirements of the various "end-to-side 17b", "end-to-end 17c" and "edge-to-side 17a" modes can be determined according to the minimum design specifications in the first conductive layer. Therefore, the various modes in the above-mentioned interdigital unit 16 comprehensively consider the influence of various forms on the optical proximity correction and its process, which can make it closer to the actual situation, so that the test structure of this embodiment is more accurate when monitoring process fluctuations.

[0056] Please continue to refer to Figure 4a, at least three third electrodes 14 (strip-shaped) extending along the first direction X may be provided on each side of the interdigital unit 16, and the third electrodes 14 are isolated from the first lead-out portion 12 and the second lead-out portion 22 on both sides, and each third electrode 14 may have the same length. The third electrode 14 may have a width close to that of each electrode portion, and the third electrodes 14 and the third electrodes 14 and the adjacent electrode portions may have a close spacing, so that the third electrodes 14 and each electrode portion are arranged uniformly. In addition, the third electrode 14 may also be connected to some electrodes on the second conductive layer. In other examples of this embodiment, the number of third electrodes 14 on each side of the interdigital unit 16 may be more than three, such as five or seven.

[0057] Figure 4b for Figure 3 The structural diagram of the second conductive layer separated from FIG. Figure 4b As shown, each fourth electrode 31 mainly extends along the second direction Y, and a plurality of fourth electrodes 31 are staggered to be arranged in two rows on both sides of the second lead-out portion 22 along the first direction X, and a total of four rows (four groups), namely the first group, the second group, the third group and the fourth group. The first group and the second group are located on one side (the first area A1) of the second lead-out portion 22, and the third group and the fourth group are located on the other side (the second area A2) of the second lead-out portion 22. The fourth electrodes 31 of the first group are arranged close to the first lead-out portion 12 and are located on the first straight line along the second direction Y, and the fourth electrodes 31 of the second group are arranged close to the second lead-out portion 22 and are located on the second straight line along the second direction Y. The two ends (one end close to each other) of each adjacent two fourth electrodes 31 in the first group and the second group can be arranged on the same third electrode 14, and the fourth electrodes 31 of the third group and the fourth group are arranged similarly to the first group and the second group. The fourth electrodes 31 mentioned above were not originally conductive on the second conductive layer, but a conductive through hole 24 was provided between the third electrode 14 and the fourth electrode 31, that is, the third electrode 14 and the conductive through hole 24 thereon were used to connect two adjacent fourth electrodes 31. Therefore, all the fourth electrodes 31 mentioned above were connected in series via the third electrode 14 and the corresponding conductive through hole 24 to form a serpentine structure 33 disposed between the first conductive layer and the second conductive layer. The two ends of the serpentine structure 33 are the extended third pad 32a and the fourth pad 32b, which are disposed on the second conductive layer. In addition, at one end away from the third pad 32a and the fourth pad 32b, an electrode (fourth electrode 31) extending along the first direction X is also provided to connect the fourth electrodes 31 on both sides (first area A1 and second area A2) of the second lead-out portion 22 there, thereby connecting the serpentine structures 33 of the first area A1 and the second area A2 into one. The fourth electrodes 31 crossing the interdigital units 16 may have the same length, and the length may be, for example, the center distance between two interdigital units in the first conductive layer.

[0058] Please continue to refer to Figure 4b, the fifth electrode 41 and the sixth electrode 43 are both located on the second conductive layer. The fifth electrode 41 and the sixth electrode 43 can be arranged adjacent to each other and are electrically isolated. The fifth electrode 41 can be disposed in the first region A1, and the sixth electrode 43 can be disposed in the second region A2, for forming a "head-to-head 17c" and a "side-to-side 17a" pattern with each fourth electrode 31 to monitor the electrical connection. Specifically, the fifth electrode 41 can include a plurality of E-shaped structures 45 facing the heads of the fourth electrodes 31. Each E-shaped structure 45 can include a first head electrode portion 41a and two first side electrode portions 41b disposed on both sides of the first head electrode portion 41a. The first head electrode portion 41a extends along the second direction Y, and its head faces the head of the fourth electrode 31 to form a "head-to-head 17c" pattern. The two first side electrode portions 41b are connected to the first head electrode portion 41a and extend along the second direction Y, and the first side electrode portions 41b protrude relative to the first head electrode portion 41a to be arranged in a staggered and parallel manner with the corresponding fourth electrode 31 to form a "side-to-side 17a" pattern. The plurality of E-shaped structures 45 of the fifth electrode 41 are appropriately deformed as needed to connect the electrode portions of the fifth electrode 41. For example, the two E-shaped structures 45 between the opposite heads of two fourth electrodes 31 can be back-to-back to form a structure similar to a king character. The two E-shaped structures 45 on both sides of the same fourth electrode 31 can be connected by an extended first side electrode portion 41b. In this embodiment, the E-shaped structures 45 at the heads of the fourth electrodes 31 in the first group can be connected by an extended first side electrode portion 41b, while the E-shaped structures 45 at the heads of the fourth electrodes 31 in the second group are in an independent state (isolated) on the second conductive layer. These E-shaped structures 45 are connected to the parallel (along the first direction X) E-shaped structures 45 through the third electrode 14 and the conductive through hole 24 in the first conductive layer below them, so as to connect the E-shaped structures 45 at the heads of the fourth electrodes 31 in the second group. Compared with connecting the above E-shaped structures 45 on the second conductive layer, using the first conductive layer and the conductive through hole 24 to connect the E-shaped structures 45 can not only monitor the electrical connection conditions (such as short circuit, open circuit) of the third electrode 14 and the conductive through hole 24, but also form a test structure with a longer path under a relatively small substrate area, which is beneficial to improving the monitoring effect. Of course, it can be understood that the above serpentine structure 33 and the E-shaped structure 45 are both connected to different third electrodes 14, so that the serpentine structure 33, the fifth electrode 41 and the sixth electrode 43 are electrically isolated from each other.

[0059] Similar to the fifth electrode 41, the sixth electrode 43 may include a plurality of E-type structures 45 facing the end of the fourth electrode 31, each E-type structure 45 may include a second end electrode portion 43a and two second side electrode portions 43b arranged on both sides of the second end electrode portion 43a, the second end electrode portion 43a extends along the second direction Y and its end faces the end of the fourth electrode 31 to form an "end-to-end 17c" mode, the two second side electrode portions 43b are connected to the second end electrode portion 43a and extend along the second direction Y, and the second side electrode portion 43b protrudes relative to the second end electrode portion 43a so as to be staggered and parallel with the corresponding fourth electrode 31 to form an "edge-to-edge 17a" mode.

[0060] In addition, please continue to refer to Figure 4b A plurality of seventh electrodes 43 insulated from the fourth electrode 31 , the fifth electrode 41 and the sixth electrode 43 are provided on the second conductive layer. The seventh electrodes 43 extend along the second direction Y and are provided between the side electrode portions of the E-shaped structure 45 and aligned with the side electrode portions.

[0061] Embodiment 3

[0062] Embodiment 3 provides a method for testing a semiconductor test structure.

[0063] Figure 5 This is a flow chart of a method for testing a semiconductor test structure provided in Embodiment 3.

[0064] like Figure 5 As shown, the testing method of the semiconductor test structure provided in this embodiment includes:

[0065] S01: Provide a semiconductor test structure, which includes: a first comb electrode, a second comb electrode and a third electrode arranged on a first conductive layer, wherein the first comb electrode and the second comb electrode each include a plurality of electrode portions extending along a first direction and are arranged into at least two spaced interdigitated finger units, each of the interdigitated finger units includes a plurality of electrode portions facing each other at the ends and a plurality of electrode portions staggered at the sides, and at least three third electrodes extending along the first direction are arranged on both sides of each of the interdigitated finger units; a conductive through hole arranged on the first conductive layer; a third electrode arranged on the conductive through hole and located on the second conductive layer; Four electrodes, a fifth electrode and a sixth electrode, each of the fourth electrodes extends along the second direction and crosses the interdigital unit, one end of adjacent fourth electrode portions close to each other is connected to the same third electrode through a corresponding conductive through hole, a plurality of the fourth electrode portions are staggered and connected to the corresponding third electrode to form a serpentine structure, a plurality of the fifth electrodes are directly opposite to the ends of part of the fourth electrodes and staggered on the sides and a plurality of the fifth electrodes are connected, a plurality of the sixth electrodes are directly opposite to the ends of part of the fourth electrodes and staggered on the sides and a plurality of the sixth electrodes are connected, and the second direction is orthogonal to the first direction;

[0066] S02: Execute any one or any several of the first test, the second test and the third test, wherein the first test includes testing whether there is a short circuit between the first comb electrode and the second comb electrode, the second test includes testing whether there is a short circuit between the fourth electrode and the fifth electrode and / or testing whether there is a short circuit between the fourth electrode and the sixth electrode, and the third test includes testing whether the RC value of the serpentine structure exceeds a preset value and / or testing whether there is a short circuit between the fifth electrode and the sixth electrode.

[0067] In step S01, in a semiconductor manufacturing process, when forming the first conductive layer and the second conductive layer, a semiconductor test structure as in the first or second embodiment is simultaneously formed in the test area thereof, and the pads (first to sixth pads) of the test structure are electrically led out.

[0068] In step S02, taking the second conductive layer as the first metal interconnection layer as an example, after forming the first metal interconnection layer, any one or more of the first to third tests can be performed on the first to sixth pads, so as to timely monitor the process of preparing the first conductive layer, the conductive vias and the second conductive layer. Of course, the first to sixth pads of the semiconductor test structure can also be further led upward to the upper metal interconnection layer before electrical testing.

[0069] Among them, the first test is to monitor the short circuit condition of the first conductive layer, which comprehensively considers the influence of various modes such as edge-to-edge, end-to-edge and end-to-end in the planar structure of the first conductive layer on the optical proximity correction and process. Its test steps may include, for example: applying a high level to one of the two pads (the first pad and the second pad) of the first comb electrode and the second comb electrode (for example, the first pad), testing the voltage of the other pad (for example, the second pad) (theoretically a low level), and detecting whether the voltage difference between the first pad and the second pad is close to the power supply voltage (the difference between the high level and the low level). If so, it is determined that there is no short circuit between the first comb electrode and the second comb electrode. If not, it is determined that there is a short circuit between the first comb electrode and the second comb electrode. Of course, it is also feasible to use other methods to detect whether the first comb electrode and the second comb electrode are short-circuited, such as testing the resistance between the two to determine their short circuit. In addition, when testing the first pad and the second pad, the other pads (the third to the sixth pad) can be in a suspended state.

[0070] The second test is to monitor the short circuit condition of the second conductive layer (the fifth electrode and the fourth electrode, the sixth electrode and the fourth electrode), which comprehensively considers the influence of various modes such as edge-to-edge, end-to-edge and end-to-end in the planar structure of the second conductive layer on the optical proximity correction and process. Its test steps may include, for example: setting the first pad, the second pad and one pad (for example, the fourth pad) of the serpentine structure (the fourth electrode) to a suspended state, setting another pad (for example, the third pad) of the serpentine structure (the fourth electrode) to a high level, testing the voltage of the fifth electrode and the sixth electrode (theoretically a low level), detecting whether the voltage difference between the third pad and the fifth pad and the voltage difference between the third pad and the sixth pad are close to the power supply voltage (the difference between the high level and the low level), if so, it is determined that there is no short circuit between the fourth electrode (serpentine structure) and the fifth electrode and the sixth electrode, if not, it is determined that there is a short circuit between the fourth electrode and the fifth electrode or the sixth electrode. Of course, it is also feasible to use other methods to detect whether the fifth electrode and the fourth electrode, the sixth electrode and the fourth electrode are short-circuited, such as testing the resistance between the two to determine their short circuit. In addition, when performing the second test, it is also feasible to set the fifth electrode and the sixth electrode to a high level and set the other pad of the serpentine structure to a low level. In particular, in the fifth electrode and the sixth electrode of the second embodiment, the fifth electrode and the sixth electrode are also connected through the third electrode and the corresponding conductive through hole, that is, the conductive through hole is introduced into the planar structure of the second conductive layer to form a three-dimensional structure, thereby comprehensively considering the effects of various modes such as edge-to-edge, end-to-edge and end-to-end on optical proximity correction and process in the case of conductive through holes, making it closer to the actual electrical connection structure.

[0071] The third test is mainly to monitor the RC value of the serpentine structure under the influence of the edge-to-edge and end-to-end of the adjacent wires, and its test steps may, for example, include: setting the first pad and the second pad to a suspended state, setting one pad (for example, the third pad) of the serpentine structure (the fourth electrode) to a high level, testing the RC value (RC test result) of another pad (for example, the fourth pad) of the serpentine structure (the fourth electrode), the fifth electrode and the sixth electrode, and testing the RC value between the third pad and the fourth pad, the third pad and the fifth pad, and the third pad and the sixth pad. Among them, if the serpentine structure and the adjacent wires (the fifth electrode or the sixth electrode) around it are short-circuited, the RC value measured at the other end of the serpentine structure (for example, the fourth pad) will be abnormally large, or a smaller resistance value will be detected between the fifth pad and the sixth pad (under normal circumstances, the fifth pad and the sixth pad are in an open circuit state, and the resistance value is large); if an open circuit occurs in the serpentine structure (including the fourth electrode, the third electrode, and the conductive through hole), the RC value measured at the other end of the serpentine structure (for example, the fourth pad) will be abnormally large.

[0072] In one example, a semiconductor test structure as provided in the second embodiment is provided, and the first test, the second test and the third test can be performed in sequence, and used to comprehensively judge and monitor the formation process of the first conductive layer and the second conductive layer. When the test result of the first test is normal, it can be determined that the process in the first conductive layer is basically normal, and when the test result of the second test is normal, it can be determined that the process in the second conductive layer is basically normal. On the basis of the first test and the second test, if the test results of the first test and the second test are normal, the contact resistance between the conductive through hole and the third electrode under the above process can be monitored by the third test (RC value).

[0073] In another example, a semiconductor test structure as provided in the first or second embodiment is provided, and only the third test may be performed to monitor whether the process in a complex environment is normal, and to measure the RC value within a preset range when the process is normal.

[0074] In summary, the semiconductor test structure of the present invention includes a first comb electrode, a second comb electrode and a third electrode arranged on the first conductive layer, the first comb electrode, the second comb electrode and the third electrode arranged on the first conductive layer, the first comb electrode and the second comb electrode both include a plurality of electrode portions extending along the first direction and arranged into at least two spaced interdigitated finger units, each interdigitated finger unit includes a plurality of electrode portions facing each other at the ends and a plurality of electrode portions staggered at the sides, at least three third electrodes extending along the first direction are arranged on both sides of each interdigitated finger unit; a conductive through hole arranged on the first conductive layer; a fourth electrode, a fifth electrode and a sixth electrode arranged on the conductive through hole and located on the second conductive layer, each fourth electrode extending along the second direction and crossing the interdigitated finger unit, one end of adjacent fourth electrode portions close to each other is connected to the same third electrode through the corresponding conductive through hole, a plurality of fourth electrode portions are staggered and connected to the corresponding third electrode to form a serpentine structure, a plurality of fifth electrodes are arranged facing and staggered with part of the fourth electrodes and the plurality of fifth electrodes are connected, a plurality of sixth electrodes are arranged facing and staggered with part of the fourth electrodes and the plurality of sixth electrodes are connected, and the second direction is orthogonal to the first direction. Compared with the single-function test structure in the related art, the semiconductor test structure of the present invention comprehensively considers the influence of adjacent wires on optical proximity correction and contact resistance of conductive through-holes under limited substrate area, wherein the adjacent wires include all modes of edge-to-edge, end-to-end and end-to-edge, which not only makes the monitoring test closer to the actual situation, that is, more accurate, but also can monitor multiple modes at the same time, which is beneficial to saving substrate layout area and improving monitoring efficiency.

[0075] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A semiconductor test structure, characterized in that: include: A first comb electrode, a second comb electrode and a third electrode are provided on the first conductive layer, wherein the first comb electrode and the second comb electrode each include a plurality of electrode portions extending along a first direction, the first comb electrode and the second comb electrode are arranged into at least two spaced interdigitated units, each of the interdigitated units includes a plurality of electrode portions facing each other at the ends and a plurality of electrode portions staggered at the sides, and at least three third electrodes extending along the first direction are provided on both sides of each of the interdigitated units; A conductive through hole provided on the first conductive layer; The fourth electrode, the fifth electrode and the sixth electrode are arranged on the conductive through hole and located in the second conductive layer, each of the fourth electrodes extends along the second direction and crosses the interdigital unit, one end of adjacent fourth electrode parts close to each other is connected to the same third electrode through the corresponding conductive through hole, a plurality of fourth electrode parts are arranged in an alternating manner and connected to the corresponding third electrode to form a serpentine structure, a plurality of fifth electrodes are directly opposite to the ends of part of the fourth electrodes and staggered on the sides and a plurality of fifth electrodes are connected, a plurality of sixth electrodes are directly opposite to the ends of part of the fourth electrodes and staggered on the sides and a plurality of sixth electrodes are connected, and the second direction is orthogonal to the first direction.

2. The semiconductor test structure according to claim 1, characterized in that: The first comb-shaped electrode includes a plurality of first electrode portions extending along the first direction, a first lead portion connecting the first electrode portions, and a first pad connected to the first lead portion; The second comb-shaped electrode includes a plurality of second electrode portions extending along the first direction, a second lead portion connected to each of the second electrode portions, and a second pad connected to the second lead portion.

3. The semiconductor test structure according to claim 2, characterized in that: The plurality of second electrode portions are disposed on one side of the second lead portion, and the first lead portion is disposed opposite to the second lead portion.

4. The semiconductor test structure according to claim 2, characterized in that: A plurality of second electrode portions are arranged on both sides of the second lead portion, the first lead portion partially surrounds the second lead portion, and the interdigital unit and the serpentine structure are arranged on both sides of the second lead portion.

5. The semiconductor test structure according to claim 2, characterized in that: Each of the interdigital units includes a first long electrode portion, a second long electrode portion, a first short electrode portion and a second short electrode portion, the first long electrode portion and the first short electrode portion are both the first electrode portion, the second long electrode portion and the second short electrode portion are both the second electrode portion, one end of the first long electrode portion is connected to the first lead-out portion and the other end thereof is opposite to the second lead-out portion, one end of the second long electrode portion is connected to the second lead-out portion and the other end thereof is opposite to the first lead-out portion, the first short electrode portion and the second short electrode portion are each arranged opposite to each other at one end close to each other and each are connected to the corresponding lead-out portion at one end away from each other.

6. The semiconductor test structure according to claim 2, characterized in that: The plurality of fourth electrodes are arranged into a first group and a second group along the first direction, the fourth electrodes of the first group are arranged close to the first lead-out portion and located on a first straight line along the second direction, and the fourth electrodes of the second group are arranged close to the second lead-out portion and located on a second straight line along the second direction.

7. The semiconductor test structure according to claim 1, characterized in that: The fifth electrode comprises a first end electrode portion and a first side electrode portion which are electrically connected, the first end electrode portion is arranged opposite to the end of the fourth electrode, and the first side electrode portion is close to the fourth electrode and arranged in a staggered manner; The sixth electrode includes a second end electrode portion and a second side electrode portion which are electrically connected. The second end electrode portion is arranged opposite to the end of the fourth electrode, and the second side electrode portion is close to the fourth electrode and arranged in a staggered manner.

8. The semiconductor test structure according to claim 7, characterized in that: The plurality of fifth electrodes are connected by electrodes arranged on the second conductive layer and / or by the third electrodes and conductive through holes thereon; The plurality of sixth electrodes are connected by using electrodes arranged on the second conductive layer and / or by using the third electrodes and conductive through holes thereon.

9. The semiconductor test structure according to claim 1, characterized in that: A third pad, a fourth pad, a fifth pad and a sixth pad are also provided on the second conductive layer. The third pad and the fourth pad are led out from two ends of the serpentine structure, the fifth pad is led out from the fifth electrode, and the sixth pad is led out from the sixth electrode.

10. The semiconductor test structure according to claim 1, characterized in that: A plurality of seventh electrodes close to and parallel to the fourth electrode are also disposed on the second conductive layer. The seventh electrodes are electrically isolated from the fourth electrode, the fifth electrode and the sixth electrode.

11. The semiconductor test structure according to claim 1, characterized in that: The first conductive layer is any one of a substrate active layer, a polysilicon layer or a metal interconnection layer, and the second conductive layer is one of the metal interconnection layers.

12. The semiconductor test structure according to claim 11, characterized in that: The electrode portions of the first comb-shaped electrode and the second comb-shaped electrode and the third electrode are designed according to the minimum design rule of the first conductive layer, and / or the fourth electrode, the fifth electrode and the sixth electrode are designed according to the minimum design rule of the second conductive layer.

13. A method for testing a semiconductor test structure, characterized in that: include: A semiconductor test structure is provided, which includes: a first comb electrode, a second comb electrode and a third electrode arranged on a first conductive layer, wherein the first comb electrode and the second comb electrode each include a plurality of electrode portions extending along a first direction, the first comb electrode and the second comb electrode are arranged into at least two spaced interdigitated units, each of the interdigitated units includes a plurality of electrode portions facing each other at the ends and a plurality of electrode portions staggered at the sides, and at least three third electrodes extending along the first direction are arranged on both sides of each of the interdigitated units; a conductive through hole arranged on the first conductive layer; and a conductive through hole arranged on the conductive through hole and located on the second conductive layer. The fourth electrode, the fifth electrode and the sixth electrode of the conductive layer, each of the fourth electrodes extends along the second direction and crosses the interdigital unit, one end of the adjacent fourth electrode parts close to each other is connected to the same third electrode through the corresponding conductive through hole, a plurality of the fourth electrode parts are staggered and connected to the corresponding third electrode to form a serpentine structure, a plurality of the fifth electrodes are directly opposite to the ends of part of the fourth electrodes and staggered on the sides and a plurality of the fifth electrodes are connected, a plurality of the sixth electrodes are directly opposite to the ends of part of the fourth electrodes and staggered on the sides and a plurality of the sixth electrodes are connected, and the second direction is orthogonal to the first direction; Perform any one or any several of the first test, the second test and the third test, wherein the first test includes testing whether there is a short circuit between the first comb electrode and the second comb electrode, the second test includes testing whether there is a short circuit between the fourth electrode and the fifth electrode and / or testing whether there is a short circuit between the fourth electrode and the sixth electrode, and the third test includes testing whether the RC value of the serpentine structure exceeds a preset value and / or testing whether there is a short circuit between the fifth electrode and the sixth electrode.

14. The method for testing a semiconductor test structure according to claim 13, characterized in that: The first test, the second test and the third test are performed sequentially.

Citation Information

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