A method for improving the yield of Faraday rotator

Abstract

The present invention discloses a method for improving the yield of a Faraday rotator. A layer of Faraday rotator crystal is grown on the upper and lower surfaces of a substrate at the same time. The Faraday rotator crystal grown on the upper surface is used as an inhibition layer to provide a force on a wafer during the process of cooling and shrinking, thereby inhibiting the warping of the wafer, reducing the problem of wafer cracking, improving the product yield, and facilitating the growth of large-size Faraday rotator wafers.

Description

Technical Field

[0001] The invention relates to the field of artificial crystal growth equipment, and in particular to a method for improving the yield of a Faraday rotator. Background Art

[0002] Bismuth-doped rare earth iron garnet crystal (Bi:RIG), also known as Faraday rotator, is widely used in the production of infrared optical isolators due to its excellent magneto-optical properties. In recent years, due to the rise of artificial intelligence technology, the demand for Faraday rotator has ushered in another climax, which has promoted the development of large-size Faraday rotator. For Faraday rotator crystals, due to their non-uniform melting characteristics, doped gadolinium gallium garnet crystals are usually used as substrates, and Faraday rotator wafers are obtained by liquid phase epitaxial crystal growth methods, and small-size crystal materials are obtained through cutting and polishing processes.

[0003] However, due to factors such as equipment temperature control and environmental fluctuations, there is a common lattice mismatch between the doped gadolinium gallium garnet substrate and the Faraday rotator during the crystal growth process. Therefore, tiny cracks are easily generated during the liquid phase epitaxial growth process. At the same time, the thermal expansion coefficients of the two materials are also significantly different. This eventually leads to cracks in the wafer during the cooling process. In addition, the number and length of defects increase with the size of the growing crystal, so it is difficult to obtain large-sized Faraday rotator wafers. Summary of the invention

[0004] In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a method for improving the yield of a Faraday rotator, which is conducive to obtaining a large-sized Faraday rotator wafer.

[0005] To achieve the above object, the technical solution adopted by the present invention is as follows: a method for improving the yield of Faraday rotator, preparing an inhibition layer on the upper surface of a substrate, the inhibition layer is a Faraday rotator crystal; comprising the following steps: first heating the raw material to melt into a melt, then cooling to the temperature required for crystal growth, slowly lowering the substrate fixture so that the substrate is immersed in the melt, the substrate fixture rotates back and forth to form an inhibition layer on its upper surface, and raising the substrate until its lower surface contacts the melt for epitaxial growth process until the required wafer thickness is obtained. The substrate is a gadolinium gallium garnet substrate or a gadolinium gallium garnet substrate.

[0006] Preferably, the thickness of the inhibition layer is 15 to 40 um.

[0007] Preferably, the substrate is immersed in the melt to a depth of 10 to 30 mm, so that an inhibition layer is formed on its upper surface.

[0008] Furthermore, after being immersed in the melt, the substrate is rotated forward and reversely at a speed of 40 to 75 rpm / min.

[0009] Furthermore, the substrate is immersed in the melt for 30 to 120 minutes.

[0010] Preferably, the temperature required for the crystal growth is 780-810°C.

[0011] Preferably, the substrate has a size of 3 to 4 inches.

[0012] Beneficial effects: The process method proposed by the present invention is to grow a layer of Faraday rotator crystal on the upper and lower surfaces of the Gd-doped gallium garnet substrate at the same time, and use the Faraday rotator crystal grown on the upper surface as an inhibition layer to provide a force to the wafer during the cooling and shrinking process, thereby inhibiting the warping of the wafer, reducing the problem of wafer cracking, improving the product yield, and facilitating the growth of large-size Faraday rotator wafers. The process of the present invention is simple, efficient, and reduces costs, and the obtained wafer can be directly used as a finished product. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is a schematic diagram of traditional Faraday optical rotation crystal growth;

[0014] Figure 2 It is a schematic diagram of the process of the present invention.

[0015] Explanation of reference numerals: 1. fixture; 2. substrate; 3. crystal; 4. crucible; 5. melt; 6. furnace body; 7. inhibition layer. DETAILED DESCRIPTION

[0016] In order to better understand the technical solution of the present invention, the embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0017] It should be clear that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] like Figure 1 The conventional Faraday rotator crystal growth process shown in the figure includes a fixture 1, a Gd-doped gallium garnet substrate 2, a crucible 4, a melt 5, and a furnace 6. The general process of the prior art is to first heat up the raw material to melt into a melt 5, then cool down to the crystal growth temperature at a certain speed, and slowly lower the fixture 1 so that the lower side of the Gd-doped gallium garnet substrate 2 contacts the melt 5. The fixture rotates back and forth at a certain speed and period, and after a set time, a crystal 3 is epitaxially grown under the Gd-doped gallium garnet substrate 2 to finally obtain a Faraday rotator wafer.

[0019] The structure of the Faraday rotator crystal growth is very sensitive to temperature fluctuations, and the temperature fluctuation of the equipment is affected by many factors such as the power grid, insulation materials, and ambient temperature. There are certain fluctuations, which eventually lead to lattice mismatch between the crystal 3 and the Gd-doped gallium garnet substrate 2. At the same time, there is a difference in thermal expansion coefficient between the Gd-doped gallium garnet substrate 2 and the crystal 3. Due to the above relationship between the two, it is very easy to produce cracks during the growth and cooling of the crystal 3, thereby affecting the processing yield of the Faraday rotator wafer. In the prior art, it is avoided as much as possible to grow crystal 3 on the upper surface of the substrate 2, because the substrate 2 is thin, and there is a difference in thermal expansion coefficient between the substrate 2 and the crystal 3. If the growth of the crystal 3 on the upper surface is not properly controlled, the substrate will be reversely warped. On the other hand, it is not conducive to directly observing the situation of the wafer growth interface, and it is easy to consume the effective components in the melt, resulting in waste.

[0020] During the epitaxial growth and cooling process, the Faraday rotator wafer will be warped to a certain extent due to the influence of lattice mismatch and expansion coefficient difference. Due to the existence of warping, a large stress will be generated at the interface between the Faraday rotator wafer and the gadolinium-doped gallium garnet substrate 2, causing the wafer to crack. Studies have found that during the cooling process, since the thermal expansion coefficient of crystal 3 is smaller than that of the substrate material, the shrinkage is greater than that of the substrate, making the substrate tend to bulge into the air. In order to suppress the warping caused by this situation, some work has proposed to treat the surface of the substrate material, such as coating a metal film layer on the surface of the substrate, to suppress the warping of the substrate. This method has a complex process and requires additional equipment to operate. In addition, the thermal expansion coefficient of the metal is different from that of the substrate 2 material and the crystal 3, and it is necessary to balance the internal stress problem caused by thermal expansion mismatch between the three.

[0021] The process method proposed in the present invention breaks the inertial thinking of those skilled in the art, and utilizes the greater shrinkage of the crystal 3 than the substrate 2, and uses the same material on the upper and lower surfaces of the substrate 2 to suppress the warping of the substrate 2 during the growth of the crystal 3. The key to the present invention lies in the stress control of the substrate 2 by the suppression layer 7 and how to control the stress balance between the upper and lower surfaces of the substrate 2.

[0022] Specific process flow Figure 2 As shown, after the growth of the doped gadolinium gallium garnet substrate 2 contacts the liquid surface, the growth process is not started immediately, but the doped gadolinium gallium garnet substrate 2 is completely immersed in the melt 5 and grown for a certain period of time, so that a layer of Faraday rotatable crystal 3 is grown on the upper and lower surfaces of the doped gadolinium gallium garnet substrate 2 at the same time. The Faraday rotatable crystal grown on the upper surface of the doped gadolinium gallium garnet substrate 2 is used as the inhibition layer 7, and the thickness h of the inhibition layer 7 satisfies: 15um≤h≤40um. After the growth is completed, the doped gadolinium gallium garnet substrate 2 is lifted to the surface of the melt 5 again, and the normal epitaxial growth process is carried out. Finally, a wafer structure of the double-sided grown Faraday rotatable crystal 3 is obtained.

[0023] By growing a layer of Faraday rotatory crystal on the upper surface of the substrate as an inhibition layer 7, the upper surface inhibition layer 7 provides a force on the wafer during the cooling and shrinking process of the wafer, thereby inhibiting the warping of the wafer. If the thickness of the inhibition layer 7 is thin, the effect on the warping inhibition is not obvious; on the contrary, if the thickness of the inhibition layer 7 is too thick, the wafer may be torn from the middle. After the crystal growth of the inhibition layer 7 is completed, it is necessary to raise the position of the crystal growth from the melt 5 so that the lower surface of the gadolinium-doped gallium garnet substrate 2 contacts the melt 5 to prevent the inhibition layer 7 from being too thick, or to accelerate the depletion of the effective components in the melt 5 and reduce the growth rate. After the above process, the cracking of the wafer is effectively reduced.

[0024] The following examples illustrate the present invention, but do not limit its scope. The size of the substrate 2 for preparing the Faraday rotation crystal is generally 3 to 4 inches. For the convenience of description, a 4-inch substrate 2 is selected in the present embodiment.

[0025] Embodiment 1:

[0026] The crucible 4 containing the raw materials is heated to 1100°C in the furnace body 6 and stirred for 1 hour to obtain a melt 5. The temperature is lowered to the growth temperature of the crystal 3 at a rate of 2°C / min. The crystal growth temperature used in the present invention is 780°C. The 4-inch substrate 2 is slowly immersed in the melt 5, the immersion depth is controlled to be 30mm, and the forward and reverse rotation is performed at a speed of 75rpm / min. After 45 minutes, the substrate 2 is raised until the lower surface contacts the liquid surface of the melt 5, and the epitaxial growth process is performed until the required wafer thickness is obtained.

[0027] The grown wafer was inspected, and the growth thickness of the crystal 3 on the lower surface of the substrate 2 was about 550um. The thickness of the growth inhibition layer 7 on the upper surface of the substrate 2 was about 15um, and the wafer warpage value within a radius of 25mm from the center of the wafer was measured to be Δh = 0.006mm. Under the cold light source, it can be observed that there is 1 crack inside the wafer. The wafer was further cut into 11mm*11mm square pieces, the number of which was 39 pieces.

[0028] Embodiment 2:

[0029] The crucible 4 containing the raw materials is heated to 1100°C in the furnace body 6 and stirred for 1 hour. The temperature is lowered to the crystal growth temperature of 780°C at a rate of 2°C / min. The 4-inch substrate 2 is slowly immersed in the melt 5, the immersion depth is controlled to be 30mm, and the substrate is rotated forward and reversely at a speed of 75rpm / min. After 60 minutes, the substrate 2 is raised to the lower surface contacting the liquid surface of the melt 5, and the epitaxial growth process is performed until the required wafer thickness is obtained.

[0030] After the growth, the wafer was inspected. The thickness of the crystal 3 on the lower surface of the substrate 2 was about 550um. The thickness of the growth inhibition layer 7 on the upper surface of the substrate 2 was about 21um. The warpage value of the wafer within a radius of 25mm from the center of the wafer was measured to be Δh = 0.003mm. Under the cold light source, it can be observed that the number of cracks inside the wafer is 0. The wafer was further cut into 11mm*11mm square pieces, the number of which was 43 pieces.

[0031] Embodiment 3:

[0032] The crucible 4 containing the raw materials is heated to 1100°C in the furnace body 6 and stirred for 1 hour. The temperature is lowered to the crystal growth temperature of 810°C at a rate of 2°C / min. The 4-inch substrate 2 is slowly immersed in the melt 5, the immersion depth is controlled to be 30mm, and the substrate is rotated forward and reversely at a speed of 75rpm / min. After 90 minutes, the substrate 2 is raised to the lower surface contacting the liquid surface of the melt 5, and the epitaxial growth process is performed until the required wafer thickness is obtained.

[0033] After the growth, the wafer was inspected and the thickness of the crystal 3 on the lower surface of the substrate was about 550um. The thickness of the growth inhibition layer on the upper surface of the substrate was about 30um. The wafer warpage value within a radius of 25mm from the center of the wafer was measured to be Δh = 0.001mm. Under the cold light source, it can be observed that the number of cracks inside the wafer is 0. The wafer was further cut into 11mm*11mm square pieces, the number of which was 44 pieces.

[0034] Embodiment 4:

[0035] The crucible 4 containing the raw materials is heated to 1100°C in the furnace body 6 and stirred for 1 hour. The temperature is lowered to the crystal growth temperature of 780°C at a rate of 2°C / min. The 4-inch substrate 2 is slowly immersed in the melt 5, the immersion depth is controlled to be 30mm, and the substrate is rotated forward and reversely at a speed of 75rpm / min. After 110 minutes, the substrate 2 is raised to the lower surface contacting the liquid surface of the melt 5, and the epitaxial growth process is performed until the required wafer thickness is obtained.

[0036] The grown wafer was inspected, and the thickness of the crystal 3 on the lower surface of the substrate 2 was about 540um. The thickness of the growth inhibition layer 7 on the upper surface of the substrate 2 was about 40um, and the wafer warpage value within a radius of 25mm from the center of the wafer was measured to be Δh = 0.004mm. Under the cold light source, it can be observed that the number of cracks inside the wafer is 0. The wafer was further cut into 11mm*11mm square pieces, the number of which was 44 pieces.

[0037] In Examples 1-4, the crystal growth temperature may also be a temperature value not higher than 810° C.; the rotation speed of the substrate 2 after being immersed in the melt 5 may also be adjusted to other values, such as 45 rpm / min or a rotation speed between 45 rpm / min and 75 rpm / min. In addition, the immersion depth of the substrate 2 immersed in the melt 5 should not be less than 10 mm to avoid the situation where the inhibition layer 7 has a longer edge and less in the middle due to insufficient immersion depth.

[0038] Comparative Example 1:

[0039] The crucible 4 containing the raw materials is heated to 1100°C in the furnace body 6 and stirred for 1 hour. The temperature is lowered to the crystal growth temperature of 780°C at a rate of 2°C / min. The 4-inch substrate 2 is slowly lowered until its lower surface contacts the liquid surface of the melt 5, and the epitaxial growth process is performed until the required wafer thickness is obtained.

[0040] The grown wafer was inspected, and the thickness of the crystal 3 on the lower surface of the substrate 2 was about 540um. The inhibitory layer 7 was not grown on the upper surface of the substrate 2, and the wafer warpage value within a radius of 25mm from the center of the wafer was measured to be Δh = 0.018mm. Under the cold light source, it can be observed that there are 3 linear cracks inside the wafer. The wafer was further cut into 11mm*11mm square pieces, the number of which was 29 pieces.

[0041] Comparative Example 2:

[0042] The crucible 4 containing the raw materials is heated to 1100°C in the furnace body 6 and stirred for 1 hour. The temperature is lowered to the crystal growth temperature of 780°C at a rate of 2°C / min. The 4-inch substrate 2 is slowly immersed in the melt 5, the immersion depth is controlled to be 30mm, and the substrate is rotated forward and reversely at a speed of 75rpm / min. After 30 minutes, the substrate 2 is raised until the lower surface contacts the liquid surface of the melt 5, and the epitaxial growth process is performed until the required wafer thickness is obtained.

[0043] The grown wafer was inspected, and the growth thickness of the crystal 3 on the lower surface of the substrate 2 was about 540um. The thickness of the growth inhibition layer 7 on the upper surface of the substrate 2 was about 12um, and the wafer warpage value within a radius of 25mm from the center of the wafer was measured to be Δh = 0.012mm. Under the cold light source, it can be observed that there are 2 linear cracks inside the wafer. The wafer was further cut into 11mm*11mm square pieces, the number of which was 33 pieces.

[0044] Comparative Example 3:

[0045] The crucible 4 containing the raw materials is heated to 1100°C in the furnace body 6 and stirred for 1 hour. The temperature is lowered to the crystal growth temperature of 780°C at a rate of 2°C / min. The 4-inch substrate 2 is slowly immersed in the melt 5, the immersion depth is controlled to be 30mm, and the substrate is rotated forward and reversely at a speed of 75rpm / min. After 120 minutes, the substrate 2 is raised to the lower surface contacting the liquid surface of the melt 5, and the epitaxial growth process is performed until the required wafer thickness is obtained.

[0046] The grown wafer was inspected, and the growth thickness of the crystal 3 on the lower surface of the substrate 2 was about 540um. The thickness of the growth inhibition layer 7 on the upper surface of the substrate 2 was about 50um, and the wafer warpage value within a radius of 25mm from the center of the wafer was measured to be Δh = -0.002mm. Under the cold light source, an annular crack can be observed inside the wafer. The wafer was further cut into 11mm*11mm square pieces, the number of which was 27 pieces.

[0047] Comparative Example 4:

[0048] The crucible 4 containing the raw materials is heated to 1100°C in the furnace body 6 and stirred for 1 hour. The temperature is lowered to the crystal growth temperature of 780°C at a rate of 2°C / min. The 4-inch substrate 2 is slowly immersed in the melt 5, the immersion depth is controlled to be 30mm, and the substrate is rotated forward and reversely at a speed of 75rpm / min. After 150 minutes, the substrate 2 is raised to the lower surface contacting the liquid surface, and the epitaxial growth process is performed until the required wafer thickness is obtained.

[0049] After the growth, the wafer was inspected. The thickness of the crystal 3 on the lower surface of the substrate 2 was about 550um. The thickness of the growth inhibition layer 7 on the upper surface of the substrate 2 was about 60um. The wafer warpage value within a radius of 25mm from the center of the wafer was measured to be Δh = -0.010mm. The wafer was cracked from the center, and part of the Faraday rotator was peeled off from the substrate 2. The wafer could not be cut and sampled.

[0050] Table 1. Results of Examples and Comparative Examples

[0051] Inhibition layer thickness 7um Crack situation Warpage value mm Cutting square pieces pcs Example 1 15 1 0.006 40 Example 2 21 0 0.003 43 Example 3 30 0 0.001 44 Example 4 40 0 0.004 44 Comparative Example 1 0 3 linear cracks 0.018 29 Comparative Example 2 12 2 linear cracks 0.012 33 Comparative Example 3 50 Circular cracking -0.02 27 Comparative Example 4 60 Peeling cracking -0.010 0

[0052] The above description is only a preferred embodiment of the present invention and does not limit the technical scope of the present invention. Therefore, any slight modification, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention still fall within the protection scope of the present invention.

Claims

1. A method for improving the yield of a Faraday rotator, characterized in that: An inhibition layer is prepared on the upper surface of a substrate, wherein the inhibition layer is a Faraday rotatable crystal; the method comprises the following steps: firstly heating the raw material to melt into a melt, then cooling the temperature to the temperature required for crystal growth, slowly lowering the substrate clamp so that the substrate is immersed in the melt, rotating the substrate clamp back and forth, and simultaneously growing a layer of Faraday rotatable crystal on the upper and lower surfaces of the substrate, wherein the Faraday rotatable crystal on the upper surface serves as the inhibition layer, and the substrate is raised until its lower surface contacts the melt for epitaxial growth process until the required wafer thickness is obtained; the substrate is a gadolinium gallium garnet substrate or a gadolinium gallium garnet substrate.

2. The method for improving the yield of a Faraday rotator according to claim 1, characterized in that: The thickness of the inhibition layer is 15-40 um.

3. The method for improving the yield of a Faraday rotator according to claim 1, characterized in that: The substrate is immersed in the melt to a depth of 10 to 30 mm, so that an inhibition layer is formed on its upper surface.

4. The method for improving the yield of a Faraday rotator according to claim 3, characterized in that: After the substrate is immersed in the melt, it rotates forward and reversely at a speed of 40 to 75 rpm / min.

5. The method for improving the yield of a Faraday rotator according to claim 3, characterized in that: The substrate is immersed in the melt for 30 to 120 minutes.

6. The method for improving the yield of a Faraday rotator according to claim 1, characterized in that: The temperature required for the crystal growth is 780-810°C.

7. The method for improving the yield of a Faraday rotator according to claim 1, characterized in that: The substrate has a specification of 3 to 4 inches.

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