A quantum dot avalanche photodiode and its preparation method

Abstract

The present invention specifically discloses a quantum dot avalanche photodiode and a preparation method thereof, wherein a semi-insulating GaAs substrate is introduced into an MBE cavity, and an oxide layer on the surface of the semi-insulating GaAs substrate is removed by high temperature in the MBE cavity, and a GaAs N-type contact layer, a low-doped GaAs N-type buffer layer, an InAs / GaAs quantum dot multiplication and amplification layer, a GaAs charge control layer, an undoped Ge light absorption layer, a P-type Ge buffer layer, and a P-type Ge contact layer are sequentially grown on the semi-insulating GaAs substrate after the surface oxide layer is removed, thereby obtaining a quantum dot avalanche photodiode based on a GaAs substrate. By introducing InAs quantum dot material in the gain amplification region, the electron-hole ionization rate ratio in the material can be significantly increased, and the noise of the avalanche photodiode can be reduced, thereby significantly increasing the sensitivity and rate of the detector.

Description

Technical Field

[0001] The invention relates to the technical field of epitaxial growth of semiconductor materials, and in particular to a quantum dot avalanche photodiode and a preparation method thereof. Background Art

[0002] Avalanche Photodiodes (APD) is a photodetector that works on the principle of avalanche breakdown. Under the action of a high electric field, photogenerated carriers (electrons and holes) are accelerated and collide in the lattice atoms, thereby generating more electron-hole pairs. This process causes the number of carriers to increase rapidly, thereby achieving significant signal amplification. This internal gain characteristic gives the avalanche diode an extremely high detection sensitivity, and it can detect very weak light signals. Due to its high sensitivity and internal gain characteristics, the avalanche diode has become an important component in modern photoelectric detection technology. Avalanche diodes are widely used in many high-precision fields and have promoted the continuous development and progress of technology. For example, in the field of optical communications, APDs are used in long-distance optical fiber communication systems, which can effectively improve the sensitivity and reliability of signal reception; in the field of biomedicine, APDs are used in high-precision biological imaging and detection equipment. In addition, in the field of quantum communications, APDs also play an important role. As a single-photon detector, they are used in technologies such as quantum key distribution and quantum information transmission.

[0003] Common avalanche diode materials mainly include germanium / silicon (Ge / Si) and indium aluminum arsenic / indium phosphide (InAlAs / InP), etc. These materials have excellent electronic and optical properties and can provide stable and efficient performance in different application scenarios. For example, the high electron mobility and light absorption coefficient of Ge / Si materials make them excellent in high-speed optical communications; while InAlAs / InP materials are often used in applications requiring high gain and high sensitivity due to their wide bandgap and high breakdown electric field.

[0004] Due to the 4% lattice matching between germanium and silicon, the germanium / silicon (Ge / Si) APD is susceptible to high dark current, while InAlAs / InP has a higher noise coefficient, which affects the gain-bandwidth product and signal-to-noise ratio of the detector. At the same time, limited by the high noise characteristics of the InAlAs bulk material itself, it is difficult to further improve the rate of indium aluminum arsenic / indium phosphide (InAlAs / InP). In addition, the commonly used size of indium phosphide (InP) substrates (2 to 4 inches) is smaller than the maximum size of GaAs substrates (8 inches). Using gallium arsenide (GaAs) substrates to prepare avalanche diodes can significantly reduce the preparation cost. Because the lattice coefficients of gallium arsenide (GaAs) and germanium (Ge) are almost the same, the prepared GaAs / Ge avalanche diodes have lower dark currents, but because the hole-electron impact ionization rate (k) of GaAs material is almost equal to 1, electrons and holes in GaAs material participate in collision ionization at the same time, resulting in high noise and low sensitivity of Ge / GaAs avalanche diodes. Therefore, the preparation of high-performance GaAs / Ge photodiodes has become an important technical difficulty to be solved in the optoelectronic field.

[0005] In view of this, studying a quantum dot avalanche photodiode and a preparation method thereof is one of the important issues that technicians in the field of optoelectronic technology need to solve urgently. Summary of the invention

[0006] The purpose of the present invention is to provide a quantum dot avalanche photodiode and a preparation method thereof, using germanium (Ge) as a light absorption layer and using 4 layers of ultra-high density, high uniformity indium arsenide / gallium arsenide (InAs / GaAs) quantum dots as a multiplication and amplification layer. By introducing quantum dots into the multiplication and amplification layer, the noise characteristics (k value) of the avalanche photodiode can be effectively reduced, thereby reducing excess noise, greatly reducing the noise impact without basically affecting the dark current, and improving the sensitivity of the APD.

[0007] In order to solve the above technical problems, the present invention provides a method for preparing a quantum dot avalanche photodiode, the method comprising the following steps:

[0008] S1, sending the semi-insulating GaAs substrate into the MBE cavity, and using the high temperature in the MBE cavity to remove the oxide layer on the surface of the semi-insulating GaAs substrate;

[0009] S2, growing a GaAs N-type contact layer on a semi-insulating GaAs substrate after removing the surface oxide layer;

[0010] S3, growing a low-doped GaAs N-type buffer layer on the GaAs N-type contact layer;

[0011] S4, growing an InAs / GaAs quantum dot multiplication and amplification layer on the low-doped GaAs N-type buffer layer;

[0012] S5, epitaxially growing a GaAs charge control layer on the InAs / GaAs quantum dot multiplication and amplification layer;

[0013] S6, growing an undoped Ge light absorbing layer on the GaAs charge control layer;

[0014] S7, growing a P-type Ge buffer layer on the undoped Ge light absorbing layer;

[0015] S8. Growing a P-type Ge contact layer on the P-type Ge buffer layer, thereby obtaining a quantum dot avalanche photodiode based on a GaAs substrate.

[0016] Preferably, the step S1 is specifically implemented as follows: placing the semi-insulating GaAs substrate into an MBE chamber at a temperature between 500° C. and 650° C. for high-temperature deoxidation treatment to remove the oxide layer on the surface of the semi-insulating GaAs substrate.

[0017] Preferably, the specific implementation of step S2 is as follows: controlling the temperature in the MBE chamber to be between 600-700°C, growing a GaAs N-type contact layer with a thickness of 500 nm on a semi-insulating GaAs substrate with the surface oxide layer removed, the growth rate of GaAs is 0.1-1 GaAs ML per second, and the doped impurity is Si with a doping concentration of 3×10 18 – 1×10 19 cm -3 between.

[0018] Preferably, the specific implementation of step S3 is as follows: controlling the temperature in the MBE chamber to be between 500-650°C, growing a low-doped GaAs N-type buffer layer with a thickness of 100-200 nm on the GaAs N-type contact layer, the growth rate of GaAs is 0.1-1 GaAs ML per second, the doped impurity is Si, and the doping concentration is 1×10 18 – 3×10 18 cm -3 between.

[0019] Preferably, the specific implementation of step S4 is as follows:

[0020] S41, controlling the temperature in the MBE cavity between 480-510° C., epitaxially growing a first InGaAs quantum well layer with a thickness of 2 nm on the low-doped GaAs N-type buffer layer, and epitaxially growing a layer of Sb atoms with a thickness of 3-6 Sb MLs on the first InGaAs quantum well layer, thereby obtaining an InGaAs wetting layer;

[0021] S42, epitaxially growing InAs quantum dots with a thickness of 1-2 ML on the InGaAs wetting layer, wherein the ratio of As to In is controlled between 10-50;

[0022] S43, using migration enhanced epitaxy to perform 5-10 cycles of growth of quantum dots to obtain a quantum dot layer with a total thickness of 2.5-3 ML, wherein the cyclic growth conditions are: after growing 0.15 ML of InAs quantum dots, pause for one second, during which only the As source is turned on;

[0023] S44, epitaxially growing a second InGaAs quantum well layer with a thickness of 4-8 nm on the surface of the quantum dot layer with a total thickness of 2.5-3 ML obtained after cyclic growth, thereby obtaining an InGaAs cap layer;

[0024] S45, control the temperature in the MBE chamber between 480-510℃, grow a low-temperature GaAs layer with a thickness of 5-8nm on the InGaAs cap layer, and increase the As pressure to 1.5×10 -5 -2×10 -5 mbar, and the temperature in the MBE chamber was raised to 580-620°C before in-situ annealing;

[0025] S46, controlling the temperature in the MBE chamber to be between 580° C. and 620° C., growing a high-temperature GaAs layer with a thickness of 35-39 nm on the GaAs layer after the in-situ annealing, wherein the low-temperature GaAs layer and the high-temperature GaAs cap layer together constitute a GaAs cap layer;

[0026] S47. Repeat S41 to S46 for 4 times to obtain an InAs / GaAs quantum dot multiplication and amplification layer.

[0027] Preferably, the specific implementation of step S5 is as follows: controlling the temperature in the MBE chamber to be maintained between 550°C and 580°C, growing a GaAs charge control layer with a thickness of 100 nm on the InAs / GaAs quantum dot multiplication and amplification layer, doping the layer with Be as impurity and a doping concentration of 5×10 17 – 6×10 17 cm -3 between.

[0028] Preferably, the specific implementation of step S6 is: controlling the temperature in the MBE cavity to be between 550-600° C., and growing a non-doped Ge light absorbing layer with a thickness of 600-800 nm on the GaAs charge control layer.

[0029] Preferably, the specific implementation of step S7 is as follows: controlling the temperature in the MBE chamber to be between 550-600°C, growing a 100nm thick P-type Ge buffer layer on the undoped Ge light absorbing layer, doping the impurity with B and a doping concentration of 1×10 18 – 3×10 18 cm -3 between.

[0030] Preferably, the specific implementation of step S8 is: controlling the temperature in the MBE chamber to be between 500-550°C, growing a 100nm thick P-type Ge contact layer on the P-type Ge buffer layer, doping the impurity with B and a doping concentration of 1×10 19 – 3×10 19 cm -3 between.

[0031] The present invention also provides a quantum dot avalanche photodiode, which is prepared using the quantum dot avalanche photodiode preparation method as described above.

[0032] In the present invention, a semi-insulating GaAs substrate is introduced into an MBE cavity, an oxide layer on the surface of the semi-insulating GaAs substrate is removed by utilizing high temperature in the MBE cavity, and a GaAs N-type contact layer, a low-doped GaAs N-type buffer layer, an InAs / GaAs quantum dot multiplication and amplification layer, a GaAs charge control layer, an undoped Ge light absorption layer, a P-type Ge buffer layer, and a P-type Ge contact layer are sequentially grown on the semi-insulating GaAs substrate with the surface oxide layer removed, thereby obtaining a quantum dot avalanche photodiode based on a GaAs substrate. This method introduces high-density and high-uniformity InAs / GaAs quantum dots (quantum dot density>1E11 / cm2) into the multiplication region of the GaAs / Ge avalanche photodiode, which can significantly reduce the noise factor and improve the sensitivity of the detector; the use of GaAs and Ge materials with complete lattice matching can effectively suppress the generation of dark current; the quantum dot epitaxial migration enhancement epitaxial method in the avalanche amplification region focuses on enhancing the uniformity of the quantum dots while ensuring the density of the quantum dots, so that the electron-hole ionization rate ratio of the GaAs / Ge system avalanche photodiode is greatly improved, the noise factor is further reduced, and the sensitivity of the detector is significantly increased. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a flow chart of a method for preparing a quantum dot avalanche photodiode of the present invention.

[0034] Figure 2 It is a schematic structural diagram of a quantum dot avalanche photodetector based on a gallium arsenide substrate of the present invention;

[0035] Figure 3 This is an atomic force microscope morphology image of a 1 square micron quantum dot of the present invention. DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the technical solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings.

[0037] Figure 1 A flow chart showing a method for preparing a quantum dot avalanche photodiode proposed by the present invention is shown; Figure 2 FIG. 2 shows the structure of the quantum dot avalanche photodetector based on a gallium arsenide substrate proposed by the present invention. Figure 2 As shown, the quantum dot avalanche photodiode based on gallium arsenide substrate includes: a semi-insulating GaAs substrate (GaAs semi-insulating substrate), a GaAs N-type contact layer (GaAs: Si N-type contact layer), a low-doped GaAs N-type buffer layer (GaAs: Si N-type buffer layer), an InAs / GaAs quantum dot multiplication and amplification layer (InAs / GaAs quantum dot multiplication and amplification region, specifically including an InGaAs wetting layer, quantum dots, an InGaAs cap layer, and a GaAs cap layer), a GaAs charge control layer (GaAs: Be charge control layer), an undoped Ge absorption layer (Ge absorption layer), a P-type Ge buffer layer (Ge: BP-type buffer layer), and a P-type Ge contact layer (Ge: BP-type contact layer).

[0038] like Figure 1~Figure 2 As shown, a method for preparing a quantum dot avalanche photodiode comprises the following steps:

[0039] S1. Place the semi-insulating GaAs substrate into the MBE cavity, and use the high temperature in the MBE cavity to remove the oxide layer on the surface of the semi-insulating GaAs substrate.

[0040] In the process of removing the oxide layer on the surface of the semi-insulating gallium arsenide (GaAs) substrate, the temperature in the MBE (Molecular beam epitaxy) chamber is controlled between 500-650°C to perform high-temperature deoxidation treatment on the semi-insulating gallium arsenide (GaAs) substrate, thereby removing the oxide layer on the surface. Different types of substrates can be selected, such as silicon substrates, or N-type doped or P-type doped gallium arsenide substrates, depending on the specific needs.

[0041] S2. Growing a GaAs N-type contact layer on the semi-insulating GaAs substrate with the surface oxide layer removed.

[0042] During the growth of the GaAs N-type contact layer, the temperature in the MBE chamber is controlled between 600-700°C, and a 500nm thick GaAs N-type contact layer is grown on a semi-insulating GaAs substrate with the surface oxide layer removed. The growth rate of GaAs is 0.1-1 GaAs ML per second (that is, 0.1-1 GaAs monoatomic layer per second), and the impurity doped is silicon (Si), with a doping concentration of 3×10 18 – 1×10 19 cm -3 Here, ML (monolayer) represents the thickness, where 1ML refers to a monoatomic layer, which is half of the lattice constant.

[0043] S3. Growing a low-doped GaAs N-type buffer layer on the GaAs N-type contact layer.

[0044] During the growth of the low-doped gallium arsenide (GaAs) N-type buffer layer, the temperature in the MBE chamber is controlled between 500-650°C, and a low-doped GaAs N-type buffer layer with a thickness of 100-200 nm is grown on the GaAs N-type contact layer. The growth rate of GaAs is 0.1-1 GaAs ML per second, and the impurity doped is silicon (Si), with a doping concentration of 1× 10 18 –3× 10 18 cm -3 between.

[0045] S4. Growing an InAs / GaAs quantum dot multiplication and amplification layer on the low-doped GaAs N-type buffer layer.

[0046] The growth process of the InAs / GaAs quantum dot multiplication and amplification layer is as follows:

[0047] S41, control the temperature in the MBE chamber between 480-510°C, and epitaxially grow a first layer of InGaAs (InGaAs) with a thickness of 2 nm on the low-doped GaAs N-type buffer layer. x Ga 1-x As) quantum well layer, the value of x is 0.1-0.2, and a layer of antimony (Sb) atoms with a thickness of 3-6 Sb ML is epitaxially grown on the first indium gallium arsenide (InGaAs) quantum well layer, thereby obtaining an InGaAs wetting layer;

[0048] S42, epitaxially growing 1-2 ML of indium arsenide (InAs) quantum dots on the InGaAs wetting layer, wherein the ratio (As / In) of arsenic (As) to indium (In) is controlled between 10-50;

[0049] S43, using migration enhanced epitaxy to perform 5-10 cycles of quantum dot growth to obtain a quantum dot layer with a total thickness of 2.5-3 ML, the cyclic growth conditions are: after growing 0.15 ML of InAs quantum dots, pause for one second, during which only the arsenic (As) source is turned on, and the pressure brought by arsenic (As) is used to protect the generated quantum dots;

[0050] S44, epitaxially growing a second InGaAs quantum well layer with a thickness of 4-8 nm on the surface of the quantum dot layer with a total thickness of 2.5-3 ML obtained after cyclic growth, thereby obtaining an InGaAs cap layer;

[0051] S45, control the temperature in the MBE chamber between 480-510℃, grow a low-temperature GaAs layer with a thickness of 5-8nm on the InGaAs cap layer, and increase the As pressure to 1.5×10 -5 -2×10 -5 mbar, and the temperature in the MBE chamber was raised to 580-620°C before in-situ annealing;

[0052] S46, controlling the temperature in the MBE chamber to be between 580° C. and 620° C., growing a high-temperature GaAs layer with a thickness of 35-39 nm on the GaAs layer after the in-situ annealing, wherein the low-temperature GaAs layer and the high-temperature GaAs cap layer together constitute a GaAs cap layer;

[0053] S47, repeating S41 to S46 for a total of 4 times, thereby obtaining an InAs / GaAs quantum dot multiplication and amplification layer. The GaAs cap layer can effectively inhibit the upward propagation of quantum dot stress and prevent the formation of stacked quantum dots.

[0054] S5. epitaxially grow a GaAs charge control layer on the InAs / GaAs quantum dot multiplication and amplification layer.

[0055] During the growth of the GaAs charge control layer, the temperature in the MBE chamber was kept between 550 and 580 °C, and a 100 nm thick GaAs charge control layer was grown on the InAs / GaAs quantum dot multiplication layer. The doping impurity was beryllium (Be), and the doping concentration was 5×10 17 – 6×10 17 cm -3 The growth temperature and doping concentration of the GaAs charge layer need to be strictly controlled to ensure uniform doping and thus ensure electric field stability.

[0056] S6. Growing an undoped Ge light absorbing layer on the GaAs charge control layer.

[0057] During the growth of the undoped germanium (Ge) light absorbing layer, the temperature in the MBE cavity is controlled between 550-600°C, and an undoped germanium (Ge) light absorbing layer with a thickness of 600-800nm ​​is grown on the GaAs charge control layer.

[0058] S7. Grow a P-type Ge buffer layer on the undoped Ge light absorbing layer.

[0059] During the growth of the P-type germanium (Ge) buffer layer, the temperature in the MBE chamber is controlled between 550-600°C, and a 100nm thick P-type germanium (Ge) buffer layer is grown on the undoped germanium (Ge) light absorbing layer. The impurity is boron (B) with a doping concentration of 1×10 18 – 3×10 18 cm -3 The P-type germanium buffer layer can inhibit the doping impurities of the P-type germanium contact layer from drifting toward the light absorption region during subsequent growth.

[0060] S8. Growing a P-type Ge contact layer on the P-type Ge buffer layer, thereby obtaining a quantum dot avalanche photodiode based on a GaAs substrate.

[0061] During the growth of the P-type germanium (Ge) contact layer, the temperature in the MBE chamber is controlled between 500-550°C, and a 100nm thick P-type germanium (Ge) contact layer is grown on the P-type germanium (Ge) buffer layer. The doping impurity is boron (B), and the doping concentration is 1×10 19 – 3×10 19 cm -3 between.

[0062] The quantum dot avalanche photodiode prepared by the above-mentioned quantum dot avalanche photodiode preparation method has an atomic force microscope morphology of 1 square micron quantum dots as shown in FIG. Figure 3 As shown, it is shown that quantum dots have very high uniformity while having ultra-high density (>1E11 / cm2).

[0063] In addition, in the present invention, the epitaxial preparation tool can be replaced by an organic metal chemical vapor deposition method, however, the quality of quantum dot crystals prepared by the organic metal chemical vapor deposition method is poor. The III-V substrate in this scheme can also be replaced by a Si substrate, and it is only necessary to add a defect filter layer (such as InGaAs / GaAs superlattice) or a Ge buffer layer during the growth process to reduce the dislocation density, so that the epitaxial growth of the avalanche photodiode on the Si substrate can be achieved.

[0064] In the present invention, a semi-insulating GaAs substrate is introduced into an MBE cavity, and the oxide layer on the surface of the semi-insulating GaAs substrate is removed by high temperature in the MBE cavity. A GaAs N-type contact layer, a low-doped GaAs N-type buffer layer, an InAs / GaAs quantum dot multiplication and amplification layer, a GaAs charge control layer, an undoped Ge light absorption layer, a P-type Ge buffer layer, and a P-type Ge contact layer are sequentially grown on the semi-insulating GaAs substrate with the surface oxide layer removed, thereby obtaining a quantum dot avalanche photodiode based on a GaAs substrate. This method introduces high-density and high-uniformity InAs / GaAs quantum dots (quantum dot density>1E11 / cm 2 ), which can greatly improve the electron-hole ionization rate ratio, significantly reduce the noise factor, and improve the sensitivity of the detector; the use of GaAs and Ge materials with complete lattice matching can effectively suppress the generation of dark current; the quantum dot epitaxial migration enhancement epitaxial method in the avalanche amplification region focuses on enhancing the uniformity of quantum dots while ensuring the quantum dots, so that the noise factor of the avalanche photodiode of the GaAs / Ge system is further reduced, thereby significantly increasing the sensitivity of the detector.

[0065] The above is a detailed introduction to a quantum dot avalanche photodiode and a preparation method thereof provided by the present invention. This article uses specific examples to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the core idea of ​​the present invention. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A method for preparing a quantum dot avalanche photodiode, It is characterized in that The method comprises the following steps: S1, sending the semi-insulating GaAs substrate into the MBE cavity, and using the high temperature in the MBE cavity to remove the oxide layer on the surface of the semi-insulating GaAs substrate; S2, growing a GaAs N-type contact layer on a semi-insulating GaAs substrate after removing the surface oxide layer; S3, growing a low-doped GaAs N-type buffer layer on the GaAs N-type contact layer; S4, growing an InAs / GaAs quantum dot multiplication and amplification layer on the low-doped GaAs N-type buffer layer; S4 is specifically implemented as follows: S41, controlling the temperature in the MBE cavity between 480-510° C., epitaxially growing a first InGaAs quantum well layer with a thickness of 2 nm on the low-doped GaAs N-type buffer layer, and epitaxially growing a layer of Sb atoms with a thickness of 3-6 Sb MLs on the first InGaAs quantum well layer, thereby obtaining an InGaAs wetting layer; S42, epitaxially growing InAs quantum dots with a thickness of 1-2 ML on the InGaAs wetting layer, wherein the ratio of As to In is controlled between 10-50; S43, using migration enhanced epitaxy to perform 5-10 cycles of growth of quantum dots to obtain a quantum dot layer with a total thickness of 2.5-3 ML, wherein the cyclic growth conditions are: after growing 0.15 ML of InAs quantum dots, pause for one second, during which only the As source is turned on; S44, epitaxially growing a second InGaAs quantum well layer with a thickness of 4-8 nm on the surface of the quantum dot layer with a total thickness of 2.5-3 ML obtained after cyclic growth, thereby obtaining an InGaAs cap layer; S45, control the temperature in the MBE chamber between 480-510℃, grow a low-temperature GaAs layer with a thickness of 5-8nm on the InGaAs cap layer, and increase the As pressure to 1.5×10 -5 -2×10 -5 mbar, and the temperature in the MBE chamber was raised to 580-620°C before in-situ annealing; S46, controlling the temperature in the MBE chamber to be between 580° C. and 620° C., growing a high-temperature GaAs layer with a thickness of 35-39 nm on the GaAs layer after the in-situ annealing, wherein the low-temperature GaAs layer and the high-temperature GaAs cap layer together constitute a GaAs cap layer; S47, repeating S41 to S46 for a total of 4 times, thereby obtaining an InAs / GaAs quantum dot multiplication and amplification layer; S5, epitaxially growing a GaAs charge control layer on the InAs / GaAs quantum dot multiplication and amplification layer; S6, growing an undoped Ge light absorbing layer on the GaAs charge control layer; S7, growing a P-type Ge buffer layer on the undoped Ge light absorbing layer; S8. Growing a P-type Ge contact layer on the P-type Ge buffer layer, thereby obtaining a quantum dot avalanche photodiode based on a GaAs substrate.

2. The method for preparing a quantum dot avalanche photodiode according to claim 1, It is characterized in that The specific implementation of step S1 is: sending the semi-insulating GaAs substrate into an MBE chamber at a temperature between 500-650° C. for high-temperature deoxidation treatment to remove the oxide layer on the surface of the semi-insulating GaAs substrate.

3. The method for preparing a quantum dot avalanche photodiode according to claim 2, It is characterized in that The specific implementation of step S2 is as follows: controlling the temperature in the MBE chamber to be between 600°C and 700°C, growing a 500nm thick GaAs N-type contact layer on a semi-insulating GaAs substrate with the surface oxide layer removed, the growth rate of GaAs is 0.1-1 GaAs ML per second, and doping with Si as impurity at a doping concentration of 3×10 18 – 1×10 19 cm -3 between.

4. The method for preparing a quantum dot avalanche photodiode according to claim 3, It is characterized in that The specific implementation method of step S3 is: controlling the temperature in the MBE chamber to be between 500-650°C, growing a low-doped GaAs N-type buffer layer with a thickness of 100-200 nm on the GaAs N-type contact layer, the growth rate of GaAs is 0.1-1 GaAs ML per second, the doped impurity is Si, and the doping concentration is 1×10 18 – 3×10 18 cm -3 between.

5. The method for preparing a quantum dot avalanche photodiode according to claim 4, It is characterized in that The specific implementation of step S5 is: controlling the temperature in the MBE cavity to be between 550°C and 580°C, growing a GaAs charge control layer with a thickness of 100 nm on the InAs / GaAs quantum dot multiplication and amplification layer, doping the layer with Be as impurity and a doping concentration of 5×10 17 – 6×10 17 cm -3 between.

6. The method for preparing a quantum dot avalanche photodiode according to claim 5, It is characterized in that The specific implementation of step S6 is: controlling the temperature in the MBE cavity to be between 550-600° C., and growing a non-doped Ge light absorbing layer with a thickness of 600-800 nm on the GaAs charge control layer.

7. The method for preparing a quantum dot avalanche photodiode according to claim 6, It is characterized in that The specific implementation of step S7 is: controlling the temperature in the MBE chamber to be between 550-600°C, growing a 100nm thick P-type Ge buffer layer on the undoped Ge light absorbing layer, doping the impurity with B and a doping concentration of 1×10 18 – 3×10 18 cm -3 between.

8. The method for preparing a quantum dot avalanche photodiode according to claim 7, It is characterized in that The specific implementation of step S8 is: controlling the temperature in the MBE chamber to be between 500-550° C., growing a 100 nm thick P-type Ge contact layer on the P-type Ge buffer layer, doping the impurity with B and a doping concentration of 1×10 19 – 3×10 19 cm -3 between.

9. A quantum dot avalanche photodiode, It is characterized in that The quantum dot avalanche photodiode is prepared using the method for preparing the quantum dot avalanche photodiode as described in any one of claims 1 to 8.

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