Accelerometer data acquisition system, method and accelerometer test system
By designing an accelerometer data acquisition system including a data acquisition board, a signal conditioning circuit, an ADC sampling circuit and a main control circuit, the problems of slow acquisition speed and noise influence in the prior art are solved, and high-precision accelerometer data acquisition is achieved.
Patent Information
- Application Number
- CN202411347970.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2025-01-17
- Estimated Expiration
- 2044-09-26
AI Technical Summary
The existing accelerometer data acquisition system has a slow acquisition speed, and the noise generated by relay switching affects the acquisition accuracy, making it difficult to accurately read out the output data of the accelerometer.
An accelerometer data acquisition system is designed, including a data acquisition board, signal conditioning circuit, ADC sampling circuit and main control circuit. The accelerometer output signal is processed through signal conditioning, sampling, filtering and calibration formulas to achieve high-precision data acquisition.
Improve the accuracy and speed of accelerometer data acquisition, reduce the impact of noise, and ensures that the error between the output data and the actual data is extremely small.
Smart Images

Figure CN118868945B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a data acquisition system, and in particular to an accelerometer data acquisition system, method and accelerometer testing system. Background Art
[0002] Accelerometers are a very important type of sensitive component in inertial navigation and inertial guidance systems. Both inertial navigation systems (INS) and inertial guidance systems (IGS) rely on accelerometers to measure or sense the acceleration of an object and infer information such as the object's speed, position, and direction based on these acceleration data.
[0003] In order to connect the accelerometer with other external digital devices, the output analog signal of the accelerometer must be digitized. The relevant technology is to convert the output circuit of the accelerometer into a voltage signal, amplify and filter it, use an A / D converter to convert the analog-to-digital signal, and then convert the signal into a serial / parallel buffer and input it into the DSP bus for reading or connect it to a PC for processing.
[0004] The related technology uses a high-precision digital multimeter to read the output data of the accelerometer, but it needs to switch channels through relays, the acquisition speed is slow, and the noise generated by the relay switching affects the acquisition accuracy.
[0005] How to accurately read the output data of the accelerometer and how to collect and process the data are technical problems that need to be solved urgently in this field. Summary of the invention
[0006] The present invention aims to solve at least one of the technical problems existing in the prior art, and proposes an accelerometer data acquisition system, method and accelerometer testing system.
[0007] The technical solution of the present invention is implemented as follows: The present invention discloses an accelerometer data acquisition system, including at least one data acquisition board, on which a power supply circuit, a main control circuit and at least one data acquisition channel are provided, and the data acquisition channel includes a signal conditioning circuit and an ADC sampling circuit, the power supply circuit is used to supply power to the entire data acquisition board, the signal conditioning circuit is used to perform signal conditioning on the signal output by the accelerometer to be tested, the ADC sampling circuit is used to sample the signal-conditioned data and transmit it to the main control circuit, the main control circuit is used to read the sampled data, filter the sampled data, and substitute the filtered sampled data into a calibration formula containing calibration coefficients a and b to obtain output data, and the calibration formula is: .
[0008] Furthermore, the calibration factor , calibration factor , where xi is the i-th standard signal set, y i is the i-th sampling data, x i With y i One-to-one correspondence, when the signal conditioning circuit receives the standard signal x i When the main control circuit reads the sampled data y i , n is the total number of sampled data.
[0009] Furthermore, the main control circuit is used to perform sliding average filtering on the sampled data.
[0010] Furthermore, the main control circuit is used to read the sampled data according to the set timing cycle and put it into the queue, and filter the sampled data in the queue, specifically including: when the timing cycle has not arrived, reading the data converted by ADC and putting it into the queue, when the timing cycle arrives, filtering the sampled data in the queue.
[0011] Further, the signal conditioning circuit includes a signal amplifying circuit and a signal filtering circuit, the input end of the signal amplifying circuit is connected to the accelerometer to be measured, the output end of the signal amplifying circuit is connected to the input end of the signal filtering circuit, and the output end of the signal filtering circuit is connected to the input end of the ADC sampling circuit;
[0012] The signal amplification circuit comprises an operational amplifier U201A and an operational amplifier U201B, wherein the inverting input terminal of the operational amplifier U201A is connected to the output terminal of the operational amplifier U201A, the inverting input terminal of the operational amplifier U201B is connected to the output terminal of the operational amplifier U201B, the non-inverting input terminal of the operational amplifier U201A is connected to the first input terminal of the signal amplification circuit, one end of a resistor R208, and one end of a capacitor C208, the non-inverting input terminal of the operational amplifier U201B is connected to the second input terminal of the signal amplification circuit, the other end of the resistor R208, and the other end of the capacitor C208, the output terminal of the operational amplifier U201A is connected to the first output terminal of the signal amplification circuit, and the output terminal of the operational amplifier U201B is connected to the second output terminal of the signal amplification circuit;
[0013] The signal filtering circuit includes a plurality of resistors and capacitors, one end of the resistor R203 is connected to the first output end of the signal amplifying circuit and one end of the resistor R201, the other end of the resistor R203 is connected to the reference voltage VICM, the other end of the resistor R201 is respectively connected to one end of the capacitor C207 and one end of the resistor R202, the other end of the capacitor C207 is connected to the reference voltage VICM, the other end of the resistor R202 is respectively connected to one end of the capacitor C209 and the first output end of the signal filtering circuit, the other end of the capacitor C209 is connected to the second output end of the signal filtering circuit, One end of the resistor R209 is connected to the second output end of the signal amplifying circuit and one end of the resistor R211, the other end of the resistor R209 is connected to the reference voltage VICM, the other end of the resistor R211 is respectively connected to one end of the capacitor C210 and one end of the resistor R212, the other end of the capacitor C210 is connected to the reference voltage VICM, the other end of the resistor R212 is respectively connected to the other end of the capacitor C209 and the second output end of the signal filtering circuit, and the first output end and the second output end of the signal filtering circuit are respectively connected to the first input end and the second output end of the ADC sampling circuit.
[0014] Furthermore, the signal amplification circuit also includes a protection circuit, which includes a first diode, a second diode, a third diode and a fourth diode, the anode of the first diode is grounded, the anode of the second diode is connected to the cathode of the first diode and the non-inverting input terminal of the operational amplifier U201A, the cathode of the second diode is connected to the first voltage AVDD1, the anode of the third diode is grounded, the anode of the fourth diode is connected to the cathode of the third diode and the non-inverting input terminal of the operational amplifier U201B, and the cathode of the fourth diode is connected to the first voltage AVDD1.
[0015] Furthermore, when there are multiple data acquisition boards, the multiple data acquisition boards are connected in sequence through cables, the first data acquisition board is provided with a synchronization signal output interface J403, the last data acquisition board is provided with a synchronization signal input interface J404, the intermediate data acquisition board is provided with a synchronization signal output interface and a synchronization signal input interface, the synchronization signal output interface of the first data acquisition board is connected to the synchronization signal input interface of the intermediate data acquisition board through a cable, the synchronization signal output interface of the intermediate data acquisition board is connected to the synchronization signal input interface of another intermediate data acquisition board or the synchronization signal input interface of the last data acquisition board through a cable, and each data acquisition board is provided with a crystal oscillator and a buffer The synchronous signal output interface on the first data acquisition board is respectively connected to the synchronous signal output end of the main control circuit and the first end of the resistor R436, the second end of the resistor R436 is connected to the second group of data input ends of the buffer chip, the synchronous signal input interface and the synchronous signal output interface on the middle data acquisition board are respectively connected to the first end of the resistor R436, the synchronous signal input interface on the last data acquisition board is connected to the first end of the resistor R436, the output end of the crystal oscillator is connected to the first group of data input ends of the buffer chip via the resistor R426, and the output end of the buffer chip is respectively connected to the ADC_CLK and ADC2_SYNC pins of the ADC sampling circuit.
[0016] Furthermore, the data acquisition board is also provided with a communication circuit for communicating with the industrial computer, the communication circuit is connected to the main control circuit, and the main control circuit is used to transmit the output data to the industrial computer via the communication circuit.
[0017] The present invention also discloses an accelerometer testing system, comprising an incubator, an indexing device, a workbench and the accelerometer data acquisition system as described above, wherein the workbench is located inside the incubator, an accelerometer installation tool is installed on the workbench, the workbench is connected to the indexing device, and the accelerometer data acquisition system is used to collect the signal output by the accelerometer to be tested and transmit it to an industrial computer after processing.
[0018] The present invention also discloses an accelerometer data acquisition method, comprising the following steps:
[0019] Start the timer;
[0020] When the timing cycle has not arrived, the data converted by the ADC is read and put into the queue. When the timing cycle arrives, the sampled data in the queue is filtered.
[0021] Substitute the filtered sampled data into the calibration formula containing calibration coefficients a and b to obtain the output data. The calibration formula is: .
[0022] Furthermore, the calibration factor , calibration factor , where x i is the i-th standard signal set, y i is the i-th sampling data, x i With y i One-to-one correspondence, when the signal conditioning circuit receives the standard signal x i When the main control circuit reads the sampled data y i , n is the total number of sampled data.
[0023] Compared with the prior art, the present invention has the following beneficial effects: since the accelerometer data acquisition system of the present invention includes a power supply circuit, a signal conditioning circuit, an ADC sampling circuit and a main control circuit, the signal conditioning circuit is used to perform signal conditioning on the signal output by the accelerometer to be measured, the ADC sampling circuit is used to sample the signal-conditioned data and transmit it to the main control circuit, the main control circuit is used to read the sampled data, filter the sampled data, and substitute the filtered sampled data into a calibration formula containing calibration coefficients a and b to obtain output data, and the calibration formula is: . Calibration factor , calibration factor , where x i is the i-th standard signal set, y i is the i-th sampling data, x i With y i One-to-one correspondence, when the signal conditioning circuit receives the standard signal x i When the main control circuit reads the sampled data y i , n is the total number of sampled data.
[0024] The error between the output data calibrated by the above scheme of the present invention and the actual data is extremely small, and the data acquisition system of the present invention has high acquisition accuracy. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] Figure 1 A principle block diagram of an accelerometer data acquisition system provided by an embodiment of the present invention;
[0026] Figure 2 A circuit diagram of a signal conditioning circuit provided by an embodiment of the present invention;
[0027] Figure 3 A circuit diagram of an ADC sampling circuit provided by an embodiment of the present invention;
[0028] Figure 4 A circuit diagram of a reference power supply and a reference voltage of an ADC sampling chip provided in an embodiment of the present invention;
[0029] Figure 5 A circuit diagram of a synchronous clock circuit provided by an embodiment of the present invention;
[0030] Figure 6 A circuit diagram of a power supply circuit provided by an embodiment of the present invention;
[0031] Figure 7 A circuit diagram of a main control circuit provided by an embodiment of the present invention;
[0032] Figure 8 A circuit diagram of a communication circuit provided by an embodiment of the present invention;
[0033] Fig. 9 It is a logic flow chart of the data acquisition program in the main control circuit;
[0034] Fig.10 A functional block diagram of an accelerometer testing system provided by an embodiment of the present invention;
[0035] Fig.11 A schematic assembly diagram of an indexing device, a workbench, and an accelerometer installation tool provided in an embodiment of the present invention.
[0036] In the attached drawings, 1 is an adapter flange, 2 is a reference block, 3 is a heat-insulating shaft, 4 is a connecting shaft, 5 is an accelerometer installation fixture, 6 is a workbench, 7 is a transfer device, and 8 is a support plate. DETAILED DESCRIPTION
[0037] In order to enable those skilled in the art to better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is a part of the embodiment of the present invention, not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0038] Example 1: See Figure 1 The embodiment of the present invention discloses an accelerometer data acquisition system, including at least one data acquisition board, on which a power supply circuit, a main control circuit and at least one data acquisition channel are provided, the data acquisition channel including a signal conditioning circuit and an ADC sampling circuit, the power supply circuit is used to supply power to the entire data acquisition board, the signal conditioning circuit is used to perform signal conditioning on the signal output by the accelerometer to be tested, the ADC sampling circuit is used to sample the signal-conditioned data and transmit it to the main control circuit, the main control circuit is used to read the sampled data, filter the sampled data, and substitute the filtered sampled data X into a calibration formula containing calibration coefficients a and b to obtain output data Y, the calibration formula is: .
[0039] Furthermore, the calibration factor , calibration factor , where x i is the i-th standard signal set, y i is the i-th sampling data, x i With y i One-to-one correspondence, when the signal conditioning circuit receives the standard signal x i When the main control circuit reads the sampled data y i , n is the total number of sampled data.
[0040] The main control circuit mainly completes the timing logic control of the ADC acquisition chip, data acquisition filtering processing, data calibration and communication with the host computer.
[0041] Furthermore, the main control circuit is used to perform sliding average filtering on the sampled data.
[0042] Furthermore, the main control circuit is used to read the sampled data according to the set timing cycle and put it into the queue, and filter the sampled data in the queue, specifically including: when the timing cycle has not arrived, reading the data converted by ADC and putting it into the queue, when the timing cycle arrives, filtering the sampled data in the queue.
[0043] Furthermore, the signal conditioning circuit includes a signal amplifying circuit and a signal filtering circuit, the input end of the signal amplifying circuit is connected to the accelerometer to be measured, the output end of the signal amplifying circuit is connected to the input end of the signal filtering circuit, and the output end of the signal filtering circuit is connected to the input end of the ADC sampling circuit.
[0044] Further, see Figure 2 , the signal amplification circuit includes an operational amplifier U201A and an operational amplifier U201B, the inverting input terminal of the operational amplifier U201A is connected to the output terminal of the operational amplifier U201A, the inverting input terminal of the operational amplifier U201B is connected to the output terminal of the operational amplifier U201B, the non-inverting input terminal of the operational amplifier U201A is connected to the first input terminal of the signal amplification circuit, one end of the resistor R208, and one end of the capacitor C208, the non-inverting input terminal of the operational amplifier U201B is connected to the second input terminal of the signal amplification circuit, the other end of the resistor R208, and the other end of the capacitor C208, the output terminal of the operational amplifier U201A is connected to the first output terminal of the signal amplification circuit, and the output terminal of the operational amplifier U201B is connected to the second output terminal of the signal amplification circuit;
[0045] The signal filtering circuit includes a plurality of resistors and capacitors, one end of the resistor R203 is connected to the first output end of the signal amplifying circuit and one end of the resistor R201, the other end of the resistor R203 is connected to the reference voltage VICM, the other end of the resistor R201 is respectively connected to one end of the capacitor C207 and one end of the resistor R202, the other end of the capacitor C207 is connected to the reference voltage VICM, the other end of the resistor R202 is respectively connected to one end of the capacitor C209 and the first output end of the signal filtering circuit, the other end of the capacitor C209 is connected to the second output end of the signal filtering circuit, One end of the resistor R209 is connected to the second output end of the signal amplifying circuit and one end of the resistor R211, the other end of the resistor R209 is connected to the reference voltage VICM, the other end of the resistor R211 is respectively connected to one end of the capacitor C210 and one end of the resistor R212, the other end of the capacitor C210 is connected to the reference voltage VICM, the other end of the resistor R212 is respectively connected to the other end of the capacitor C209 and the second output end of the signal filtering circuit, and the first output end and the second output end of the signal filtering circuit are respectively connected to the first input end and the second output end of the ADC sampling circuit.
[0046] Furthermore, the signal amplification circuit also includes a protection circuit, which includes a first diode, a second diode, a third diode and a fourth diode, wherein the anode of the first diode is grounded, the anode of the second diode is connected to the cathode of the first diode and the non-inverting input terminal of the operational amplifier U201A, the cathode of the second diode is connected to the first voltage AVDD1, the anode of the third diode is grounded, the anode of the fourth diode is connected to the cathode of the third diode and the non-inverting input terminal of the operational amplifier U201B, and the cathode of the fourth diode is connected to the first voltage AVDD1. When the input voltage of the signal amplification circuit exceeds AVDD1, the diode of the protection circuit is turned on so that the input voltage is clamped at AVDD1.
[0047] The data acquisition board is also provided with a reference circuit, which includes an operational amplifier U401. The in-phase input terminal of the operational amplifier U401 is respectively connected to one end of a capacitor C408, one end of a resistor R408, one end of a resistor R406 and one end of a resistor R405, the other end of the resistor R405 is connected to a first voltage AVDD1, the other end of the capacitor C408 and the other end of the resistor R408 are grounded, the other end of the resistor R406 is connected to one end of the capacitor C406, the other end of the capacitor C406 is respectively connected to one end of a resistor R404, one end of a capacitor C405 and an inverting input terminal of the operational amplifier U401, the other end of the capacitor C405 is connected to the output terminal of the operational amplifier U401, the output terminal of the operational amplifier U401 is connected to one end of a resistor R407, the other end of the resistor R407 is respectively connected to the other end of the resistor R404, one end of a capacitor C409 and the output terminal of the reference circuit, the other end of the capacitor C409 is grounded, and the output terminal of the reference circuit is used to provide a reference voltage VICM.
[0048] Before the signal enters the ADC for sampling, it must be filtered. Figure 2 As shown, R203 and R209 provide a common-mode voltage path for the signal input. In addition, R201 and C207 (in conjunction with R211 and C210) provide common-mode low-pass filters for the positive and negative inputs, respectively. In addition, R202 and R212 together with C209 provide a differential low-pass filter for anti-aliasing. This keeps the series impedance relatively low to maintain adequate total harmonic distortion (THD) performance.
[0049] Further, see Figure 5When there are multiple data acquisition boards, the multiple data acquisition boards are connected in sequence through cables. The first data acquisition board is provided with a synchronization signal output interface J403, the last data acquisition board is provided with a synchronization signal input interface J404, the intermediate data acquisition board is provided with a synchronization signal output interface and a synchronization signal input interface, the synchronization signal output interface of the first data acquisition board is connected to the synchronization signal input interface of the intermediate data acquisition board through a cable, the synchronization signal output interface of the intermediate data acquisition board is connected to the synchronization signal input interface of another intermediate data acquisition board or the synchronization signal input interface of the last data acquisition board through a cable, and each data acquisition board is provided with a synchronization clock circuit, and the synchronization clock circuit includes a crystal oscillator , buffer chip and resistor R436, the synchronization signal output interface on the first data acquisition board is respectively connected to the synchronization signal output end of the main control circuit and the first end of resistor R436, the second end of resistor R436 is connected to the second group of data input ends of the buffer chip, the synchronization signal input interface and the synchronization signal output interface on the middle data acquisition board are respectively connected to the first end of resistor R436, the synchronization signal input interface on the last data acquisition board is connected to the first end of resistor R436, the output end of the crystal oscillator is connected to the first group of data input ends of the buffer chip via resistor R426, and the output end of the buffer chip is respectively connected to the ADC_CLK and ADC2_SYNC pins of the ADC sampling circuit. See Figure 5 The resistors R434, R435, and R437 on the board are set as needed. For example, R435 is not connected to the first data acquisition board (disconnecting the first end of the resistor R436 from J404), R437 is not connected to the middle data acquisition board (disconnecting the first end of the resistor R436 from the synchronous signal output end of the main control circuit), and R434 and R437 are not connected to the last data acquisition board (disconnecting the first end of the resistor R436 from J403 and the first end of R436 from the synchronous signal output end of the main control circuit).
[0050] The crystal oscillator is used to provide the ADC working clock for the sampling circuit. The synchronization signal output terminal of the main control circuit is used to output the synchronization command to trigger the sampling circuit.
[0051] Furthermore, the data acquisition board is also provided with a communication circuit for communicating with the industrial computer, the communication circuit is connected to the main control circuit, and the main control circuit is used to transmit the output data, namely the test data, to the industrial computer via the communication circuit.
[0052] The ADC sampling circuit uses an ADC sampling chip.
[0053] See also Figure 4The power supply circuit includes the ADC sampling chip power supply and the ADC sampling chip reference power supply. In order to ensure the system noise, the power supply uses the low-noise linear regulator TPS7A470. TPS7A470 is a positive voltage (+36V) ultra-low noise (4µVRMS) low-dropout linear regulator (LDO) series product that can provide 1A load. TPS7A47 is designed with bipolar technology and is mainly used for high-accuracy and high-precision instrumentation applications. For another part of the power supply circuit of the present invention, see Figure 6 shown.
[0054] The ADC reference power supply uses TI's REF7040. The voltage reference in the REF70 series integrates a low output impedance buffer that can directly drive the reference (REF) pin of a precision data converter while maintaining linearity, distortion, and noise performance. Most precision SAR and delta-sigma analog-to-digital converters (ADCs) switch binary-weighted capacitors to the REF pin during the conversion process. To support this dynamic load, the output of the voltage reference must be buffered by a low output impedance, high bandwidth buffer.
[0055] The REF7040 variant of the REF70 family specifies a maximum temperature drift of just 3ppm / °C, very low noise of just 0.22µVRMS, and a total harmonic distortion (THD) of -120dB. This provides an initial accuracy of 0.05% for the voltage reference combined with a low output impedance buffer.
[0056] In some embodiments, the reference power supply of the ADC sampling chip includes a voltage reference chip, and the output terminal OUT of the voltage reference chip - F is connected to one end of the resistor R400, and the other end of the resistor R400 is connected to one end of the resistor R401 and the output end OUT of the voltage reference chip. - S and one end of resistor R402, the other end of resistor R402 is connected to one end of capacitor C403, the other end of capacitor C403 is grounded, the other end of resistor R401 is respectively connected to one end of capacitor C400, one end of capacitor C401, one end of capacitor C402 and VREFP pin of ADC sampling chip, the other end of capacitor C400, the other end of capacitor C401 and the other end of capacitor C402 are connected to GND of voltage reference chip - S, GND - F and the VREFN pin of the ADC sampling chip.
[0057] GND of voltage reference chip - S, GND - F is grounded.
[0058] See also Figure 7The main control circuit uses the main control chip, and the main control chip uses MCU. This design mainly uses the MCU's SPI interface and USART universal serial interface peripherals. The SPI interface is used to configure the working mode and other parameters of the ADC sampling chip and read the sampling data. The USART universal serial interface is used to communicate with the computer and send the collected and processed data to the computer for analysis. The communication circuit is shown in Figure 8 .
[0059] To achieve 7.5-bit sampling resolution, that is, 1 / 10,000,000 resolution, the effective resolution of the ADC acquisition chip must be no less than 24 bits (1 / 16,777,216). To achieve this high resolution, see Figure 3 In addition to selecting a high-resolution ADC (32-bit ADC chip ADS1285), a low-noise signal chain is required. Over the entire ADC input voltage range, the ADC noise remains constant (7nV / √Hz), but the ADC DC input source noise increases (15nV / √Hz), which remains low compared to the reference voltage noise (0.22uV / √Hz). The overall noise is proportional to the ADC DC input voltage. This is because as VIN increases, the VIN / VREF ratio increases, so when the ADC uses full-scale input, the VREF noise dominates the overall system noise. The noise of each component in the signal chain is superimposed in a root sum square (RSS) manner.
[0060] To achieve high measurement resolution of 25 bits or more, even the best stand-alone voltage references on the market (with low noise specifications) need some help to attenuate their noise. Adding external circuits, such as filters, can help attenuate the noise to achieve the desired ADC dynamic range. Figure 4 Another solution to filter the reference voltage noise, eliminate noise peaks, and properly drive the ADC is to add a passive RC LPF filter and then add a buffer. Setting the passive RC LPF cutoff frequency well below the unity gain crossover frequency not only reduces broadband and low frequency noise, but also avoids noise peaks, ensuring that the overall system noise is less than 0.2437µVrms.
[0061] The data acquisition signal input is current. In order to improve the high-precision acquisition of current signals, the Kelvin connection method should be used when laying out and wiring the sampling resistors.
[0062] Example 2: See Fig.10 and Fig.11The embodiment of the present invention also discloses an accelerometer test system, including an incubator, a transposition device 7, a workbench 6, and the accelerometer data acquisition system as described above. The workbench 6 is located inside the incubator, an accelerometer installation tool 5 is installed on the workbench, the workbench 6 is connected to the transposition device 7 through a connecting shaft 4, and the accelerometer data acquisition system is used to collect the signal output by the accelerometer to be tested and transmit it to the industrial computer after processing. The control box of the transposition device is connected to the industrial computer.
[0063] The temperature chamber is used to provide a high and low temperature test environment for the load being tested. The indexing device is used to provide high-precision angle position indexing control.
[0064] One end of the connecting shaft is connected to the workbench, the other end of the connecting shaft is connected to one end of the heat-insulating shaft, and the other end of the heat-insulating shaft is connected to the indexing device. The connecting shaft is used to connect the workbench and the indexing device so that the workbench can be extended to the inside of the temperature box. The workbench is located inside the temperature box and can be installed with an accelerometer installation tool. The accelerometer installation tool can be used to fix the accelerometer to be tested, and the number of workstations is multiple. The temperature box is provided with a through hole for the connecting shaft to pass through.
[0065] The workbench and the indexing device are rigidly connected by an insulating shaft 3 and a connecting shaft 4. The connecting shaft 4 can extend the workbench surface to the inside of the temperature box. The insulating shaft is located between the connecting shaft and the indexing device. They are rigidly connected and an insulating sleeve is added by connecting screws. The insulating shaft and the insulating sleeve are made of ceramic material. This design not only ensures that the shaft system has strong rigidity and strength, but also plays a role in heat insulation, thereby preventing the heat inside the temperature box from being transferred to the indexing device and affecting its stability.
[0066] The indexing device uses an electric precision multi-tooth indexing table. The multi-tooth indexing table uses the principle of the average effect of multi-tooth meshing. A pair of planar centripetal end teeth with exactly the same diameter, number of teeth, and tooth shape mesh at different relative positions to achieve circular indexing. Due to the error averaging effect, it has extremely high indexing accuracy and repeat positioning accuracy. The multi-tooth indexing table can be used to detect various high-precision devices such as polyhedral prisms, angle block gauges, optical prisms, and calibrate sensors such as accelerometers. It is widely used in high-precision angle measurement and products that require high-precision angle output because of its advantages such as small indexing error, high repeat positioning accuracy, and easy use and maintenance. The electric multi-tooth indexing table can realize the automatic operation of the indexing head's loosening, locking, indexing, and zeroing, which can meet the user's needs for automatic and efficient detection.
[0067] The user installs the measured piece on the adapter flange 1 of the multi-tooth indexing table through special tooling, workbench, etc. according to the needs. The adapter flange 1 is fixedly connected to the multi-tooth indexing table.
[0068] The accelerometer installation tool is provided with four mounting surfaces for mounting the accelerometers to be tested, and the four mounting surfaces surround a rectangular frame. Each mounting surface is provided with a plurality of mounting holes for mounting the accelerometers to be tested. The plurality of mounting holes on each mounting surface are distributed in an array. Since multiple accelerometers need to be installed and there are two different models, in order to ensure the versatility of the tool, adapters are designed for the accelerometers. One model of the accelerometer to be tested can be directly fixed in the mounting holes of the mounting surface by screws. An adapter can be fixed in the mounting holes of the mounting surface for installing another model of the accelerometer to be tested.
[0069] Because the indexing device needs to be inspected every year, it needs to be disassembled and separated from the temperature box. In order to facilitate disassembly, a reference block 2 is fixed on the adapter flange 1 of the multi-tooth indexing table. The outer diameter of the reference block is matched with the tolerance of the inner hole of the shaft system to ensure that the shaft system and the indexing table are coaxial. The insulating shaft 3 is provided with an axial hole. When the insulating shaft 3 contacts the worktable surface of the multi-tooth indexing table, the reference block is located in the axial hole of the shaft system (such as the insulating shaft in this embodiment). The outer diameter of the reference block is the same as the aperture of the axial hole of the shaft system (such as the insulating shaft in this embodiment). The difference between the outer diameter of the reference block and the aperture of the axial hole of the shaft system (such as the insulating shaft in this embodiment) is minimized to ensure that the shaft system and the indexing table are coaxial.
[0070] The heat-insulating shaft 3 is fixedly connected to the worktable of the multi-tooth indexing table by screws. The multi-tooth indexing table is supported on the support plate 8 of the mounting seat. The multi-tooth indexing table is connected to the mounting seat with T-bolts; when installing, the indexing table is placed against two vertical indexing table blocks, and then the nuts are locked.
[0071] The software design of this system adopts modular structured programming method. The whole program is divided into three parts: indexing table drive indexing, temperature box control, and data acquisition and processing.
[0072] Each part is composed of several functional modules, and each module completes a function. According to the use requirements of the accelerometer test system, the main functions of the software are:
[0073] Data display module: displays accelerometer information, temperature, humidity and other parameters;
[0074] System initialization module: initialize the system hardware;
[0075] Control module: communicate with the device to control it;
[0076] Experimental communication control module: realize the control operation of the indexing table;
[0077] Fault processing module: displays and processes abnormalities of the control system;
[0078] Parameter setting module: experiment selection, angle setting, temperature setting, test time setting, etc.;
[0079] Data processing module: record the collected data according to the standards, calculate the results and generate reports;
[0080] Data storage module: dynamically save the output and temperature signal of the accelerometer.
[0081] The measurement and control hardware of the present invention is used to control the electric precision multi-tooth indexing table, temperature box, program-controlled DC power supply, self-developed accelerometer data acquisition system, etc., as well as the data acquisition and analysis of the accelerometer, and mainly includes an industrial computer, a serial port card, a control button, an indicator light, etc. The measurement and control software of the present invention is installed in a computer and is used to control the temperature test verification system, and mainly includes three functions: drive indexing, temperature box control, data acquisition, and processing. The software interface has a turntable drive control and setting function, a temperature box control and setting function, and can scroll and display the collected data.
[0082] In order to avoid condensation on the surface of the test piece during the low temperature and high temperature cycle test, a dry air purge system is installed in the air circulation device in the box. Its main function is to replace the air in the box with dry air (low humidity air) to improve the dryness of the air in the box, thereby completely solving the problem of condensation and water condensation in the box. The system mainly includes air compressor, solenoid valve, dryer, filter, flow control valve, etc. The air compressor and dryer and other drying systems are placed inside the unit.
[0083] The test system of the present invention also includes a refrigeration system, which provides a cold source for the cooling and low temperature constant temperature of the equipment. According to the different experimental states of the equipment, the refrigeration system automatically adjusts the operating conditions of the refrigerator to provide the required cooling capacity for the corresponding experimental process, thereby achieving the purpose of meeting the performance indicators of the equipment. The equipment adopts steam compression refrigeration. Refrigeration working principle: The refrigeration system adopts a reverse Carroll cycle. Its main function is to make the refrigerant circulate and undergo phase change through the refrigeration system composed of a compressor, a condenser, a throttling device (capillary or expansion valve), an evaporator, etc. The process is roughly as follows: the refrigerant boils in the evaporator and absorbs the heat of the air in the working room; after being sucked into the compressor, it becomes high-temperature and high-pressure steam; after flowing through the condenser and being cooled by normal temperature air or water, it liquefies and releases heat to the outside; the low-temperature liquid refrigerant passes through the throttling device, changes from high pressure to low pressure and reaches the saturation temperature (i.e., evaporation temperature) under the pressure, and then flows into the evaporator to evaporate and absorb heat. This cycle is repeated to achieve the purpose of cooling.
[0084] At a given angle and temperature, the accelerometer data acquisition system is used to collect the signal output by the accelerometer to be tested and transmit it to the industrial computer after processing. The industrial computer obtains the performance of the accelerometer within the full temperature threshold based on the test data output by the accelerometer data acquisition system.
[0085] The industrial computer controls the programmable DC power supply to supply power to the accelerometer under test through the form of a serial bus. The output signal of the accelerometer is a DC current, which is connected to the data acquisition board for data acquisition. The collected data is sent to the industrial computer through a high-speed serial hub. After reading the data, the industrial computer processes the data, calculates the zero drift, scale factor, nonlinearity and other related parameters of the accelerometer under test, and displays and saves the test results. The industrial computer is used as the main control computer of the system to complete the functions of experimental process management, system management and control, including interface display, safety monitoring and initialization, collection and recording, and generates corresponding reports and data tables for system analysis.
[0086] The accelerometer test system of the present invention also includes a serial communication card, which is mainly used for communication between the industrial computer and the temperature box, the multi-tooth indexing table, the accelerometer power supply and the temperature acquisition module.
[0087] The accelerometer test system of the present invention further comprises a serial port hub, which is mainly used for communication between the industrial computer and the accelerometer data acquisition system.
[0088] The actual temperature change of the accelerometer during the temperature rise and fall of the incubator may lag behind, which may cause the actual temperature of the accelerometer to fail to meet the test requirements during the experiment, resulting in experimental errors. When designing the system, a temperature sensor (such as a platinum resistance for temperature measurement) is installed on the accelerometer installation tooling. The temperature sensor is used to measure the actual temperature of the tooling. The temperature sensor is used to upload the temperature data to the industrial computer through the serial port to confirm the actual temperature value currently borne by the accelerometer.
[0089] In order to meet the user's requirements for low power noise, the accelerometer power supply uses a programmable DC power supply as the power supply equipment, with AC220V as the input. After AC / DC conversion, it outputs dual-channel ±15V±0.5V (2A) with a ripple of no more than 10mV.
[0090] The programmable DC power supply consists of an input filter circuit, a rectifier filter circuit, a DC conversion circuit and an output filter circuit to supply power to subsequent electrical equipment.
[0091] The industrial computer can read the voltage and current values of the power supply output through the RS232 communication interface to control the on and off. The power supply has no output by default when it is powered on, and an AC input main switch is added.
[0092] The control part of the test system includes control program, communication board, serial port hub, electric precision multi-tooth indexing table control box, program-controlled power supply, data acquisition system, etc. The control program is integrated and installed in the industrial computer, including the addition and acquisition processing program, electric precision multi-tooth indexing table control module, high and low temperature box control module, etc.
[0093] The accelerometer data acquisition system includes a programmable power supply control part and a data acquisition system communication part. The programmable power supply is controlled through the serial port to supply power to the accelerometer, and the accelerometer feedback signal is collected through the serial port hub and multi-channel acquisition can be realized.
[0094] The temperature box control part is integrated into the control software, and the temperature box is controlled according to the temperature box control interface communication protocol.
[0095] The electric precision multi-tooth indexing table control module is connected to the control box of the multi-tooth indexing table through the serial port, controls the rotation of the electric precision multi-tooth indexing table, and connects the tooling through the accelerometer to make the accelerometer rotate together.
[0096] The control part of the accelerometer test system mainly includes: electric precision multi-tooth indexing table part, accelerometer power supply, acquisition part and high and low temperature chamber control part. The control software is integrated and installed in the industrial computer. The high and low temperature chamber, electric precision multi-tooth indexing table, and programmable power supply are controlled through the serial port. The accelerometer is collected by communicating with the data acquisition system through the serial port hub.
[0097] The accelerometer installation tooling is equipped with a PT100 platinum thermal resistor to measure the tooling temperature. The thermal resistor temperature acquisition module is used to upload the platinum thermal resistor temperature data to the industrial computer through the serial port to confirm the actual temperature value currently borne by the accelerometer.
[0098] The accelerometer test system of this embodiment is mainly used for performance testing of quartz flexible accelerometers under full temperature conditions. By realizing the graduation control of the angle position, at a given angle and temperature, the output of the accelerometer under test is collected through the accelerometer data acquisition system, and the collected data is processed according to relevant calculation formulas to obtain the performance of the quartz accelerometer within the full temperature threshold.
[0099] Example 3: See Fig. 9 The embodiment of the present invention also discloses an accelerometer data acquisition method, comprising the following steps:
[0100] Start the timer;
[0101] When the timing cycle has not arrived, the data converted by the ADC is read and put into the queue. When the timing cycle arrives, the sampled data in the queue is filtered.
[0102] Substitute the filtered sampled data X into the calibration formula containing calibration coefficients a and b to obtain the output data Y. The calibration formula is: .
[0103] The sampling data in the queue is filtered, specifically including: using sliding average filtering on the sampling data in the queue, that is, each time a data is collected, this data is averaged with the previous n (such as 99) data.
[0104] The calculation method of the calibration coefficients a and b includes: applying a set of standard voltage signals to the input end of the signal conditioning circuit, and obtaining a corresponding set of sampling data such as (x 1 ,y 1 ), (x 2 ,y 2 ), (x 3 ,y 3 ), … … , (x n ,y n ), then we can get n pi(xi,yi) on the XOY plane.
[0105] Calculate the calibration coefficients a and b according to the following formula: , .
[0106] The measurement values calibrated by the method of the present invention have high accuracy, as shown in Table 1, which shows a comparison between the measurement values and the standard values.
[0107] Table 1
[0108]
[0109] At a given angle and temperature, the output of the accelerometer under test is collected through the accelerometer data acquisition system. The process includes:
[0110] Set the temperature;
[0111] After reaching the set temperature, it will power on and preheat;
[0112] Set the indexing table device or speed after reaching the preheating time;
[0113] The indexing table drives the tooling to move to the set position and then starts collecting data according to the set collection parameters;
[0114] If the current point is not the last moving point at this temperature, repeat 3 and 4 after the acquisition is completed;
[0115] If the current point is not the last temperature point, repeat 1 to 5 after the acquisition is completed;
[0116] The current collection process is completed.
[0117] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present invention, but the present invention is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.
Claims
1. An accelerometer data acquisition system, characterized in that : It includes multiple data acquisition boards, each of which is provided with a power supply circuit, a main control circuit and at least one data acquisition channel. The data acquisition channel includes a signal conditioning circuit and an ADC sampling circuit. The power supply circuit is used to supply power to the entire data acquisition board. The signal conditioning circuit is used to condition the signal output by the accelerometer to be tested. The ADC sampling circuit is used to sample the signal-conditioned data and transmit it to the main control circuit. The main control circuit is used to read the sampled data, filter the sampled data, and substitute the filtered sampled data into a calibration formula containing calibration coefficients a and b to obtain output data. The calibration formula is: ; Calibration factor , calibration factor , where x i is the i-th standard signal set, y i is the i-th sampling data, x i With y i One-to-one correspondence, when the signal conditioning circuit receives the standard signal x i When the main control circuit reads the sampled data y i , n is the total number of sampled data; Multiple data acquisition boards are connected in sequence through cables. A synchronization signal output interface J403 is provided on the first data acquisition board, a synchronization signal input interface J404 is provided on the last data acquisition board, a synchronization signal output interface and a synchronization signal input interface are provided on the intermediate data acquisition board, the synchronization signal output interface of the first data acquisition board is connected to the synchronization signal input interface of the intermediate data acquisition board through a cable, the synchronization signal output interface of the intermediate data acquisition board is connected to the synchronization signal input interface of another intermediate data acquisition board or the synchronization signal input interface of the last data acquisition board through a cable, each data acquisition board is provided with a crystal oscillator and a buffer chip, the first The synchronization signal output interface on the data acquisition board is respectively connected to the synchronization signal output end of the main control circuit and the first end of the resistor R436, the second end of the resistor R436 is connected to the second group of data input ends of the buffer chip, the synchronization signal input interface and the synchronization signal output interface on the middle data acquisition board are respectively connected to the first end of the resistor R436, the synchronization signal input interface on the last data acquisition board is connected to the first end of the resistor R436, the output end of the crystal oscillator is connected to the first group of data input ends of the buffer chip via the resistor R426, and the output end of the buffer chip is respectively connected to the ADC_CLK and ADC2_SYNC pins of the ADC sampling circuit; The crystal oscillator is used to provide the ADC working clock for the sampling circuit, and the synchronization signal output terminal of the main control circuit is used to output the synchronization command to trigger the sampling circuit; The signal conditioning circuit includes a signal amplifying circuit and a signal filtering circuit, wherein the input end of the signal amplifying circuit is connected to the accelerometer to be measured, the output end of the signal amplifying circuit is connected to the input end of the signal filtering circuit, and the output end of the signal filtering circuit is connected to the input end of the ADC sampling circuit; The signal amplification circuit comprises an operational amplifier U201A and an operational amplifier U201B, wherein the inverting input terminal of the operational amplifier U201A is connected to the output terminal of the operational amplifier U201A, the inverting input terminal of the operational amplifier U201B is connected to the output terminal of the operational amplifier U201B, the non-inverting input terminal of the operational amplifier U201A is connected to the first input terminal of the signal amplification circuit, one end of a resistor R208, and one end of a capacitor C208, the non-inverting input terminal of the operational amplifier U201B is connected to the second input terminal of the signal amplification circuit, the other end of the resistor R208, and the other end of the capacitor C208, the output terminal of the operational amplifier U201A is connected to the first output terminal of the signal amplification circuit, and the output terminal of the operational amplifier U201B is connected to the second output terminal of the signal amplification circuit; The signal filtering circuit includes a plurality of resistors and capacitors, one end of the resistor R203 is connected to the first output end of the signal amplifying circuit and one end of the resistor R201, the other end of the resistor R203 is connected to the reference voltage VICM, the other end of the resistor R201 is respectively connected to one end of the capacitor C207 and one end of the resistor R202, the other end of the capacitor C207 is connected to the reference voltage VICM, the other end of the resistor R202 is respectively connected to one end of the capacitor C209 and the first output end of the signal filtering circuit, the other end of the capacitor C209 is connected to the second output end of the signal filtering circuit, One end of the resistor R209 is connected to the second output end of the signal amplifying circuit and one end of the resistor R211, the other end of the resistor R209 is connected to the reference voltage VICM, the other end of the resistor R211 is respectively connected to one end of the capacitor C210 and one end of the resistor R212, the other end of the capacitor C210 is connected to the reference voltage VICM, the other end of the resistor R212 is respectively connected to the other end of the capacitor C209 and the second output end of the signal filtering circuit, and the first output end and the second output end of the signal filtering circuit are respectively connected to the first input end and the second output end of the ADC sampling circuit; The data acquisition board is also provided with a reference circuit, which includes an operational amplifier U401, wherein the in-phase input terminal of the operational amplifier U401 is respectively connected to one end of a capacitor C408, one end of a resistor R408, one end of a resistor R406 and one end of a resistor R405, the other end of the resistor R405 is connected to a first voltage AVDD1, the other end of the capacitor C408 and the other end of the resistor R408 are grounded, the other end of the resistor R406 is connected to one end of the capacitor C406, the other end of the capacitor C406 is respectively connected to one end of a resistor R404, one end of a capacitor C405 and an inverting input terminal of the operational amplifier U401, the other end of the capacitor C405 is connected to the output terminal of the operational amplifier U401, the output terminal of the operational amplifier U401 is connected to one end of a resistor R407, the other end of the resistor R407 is respectively connected to the other end of the resistor R404, one end of a capacitor C409 and an output terminal of the reference circuit, the other end of the capacitor C409 is grounded, and the output terminal of the reference circuit is used to provide a reference voltage VICM; The power supply circuit includes an ADC sampling chip power supply and an ADC sampling chip reference power supply. The ADC sampling chip reference power supply includes a voltage reference chip. The output terminal OUT of the voltage reference chip is - F is connected to one end of the resistor R400, and the other end of the resistor R400 is connected to one end of the resistor R401 and the output end OUT of the voltage reference chip. - S and one end of resistor R402, the other end of resistor R402 is connected to one end of capacitor C403, the other end of capacitor C403 is grounded, the other end of resistor R401 is respectively connected to one end of capacitor C400, one end of capacitor C401, one end of capacitor C402 and VREFP pin of ADC sampling chip, the other end of capacitor C400, the other end of capacitor C401 and the other end of capacitor C402 are connected to GND of voltage reference chip - S, GND - F and VREFN pin of ADC sampling chip are connected; GND of voltage reference chip - S, GND - F is grounded; The main control circuit is used to read the sampled data according to the set timing cycle and put it into the queue, and filter the sampled data in the queue, specifically including: when the timing cycle has not arrived, reading the data converted by ADC and putting it into the queue, when the timing cycle arrives, performing sliding average filtering on the sampled data in the queue.
2. The accelerometer data acquisition system according to claim 1, characterized in that: The signal amplification circuit also includes a protection circuit, which includes a first diode, a second diode, a third diode and a fourth diode. The anode of the first diode is grounded, the anode of the second diode is connected to the cathode of the first diode and the non-inverting input terminal of the operational amplifier U201A, the cathode of the second diode is connected to the first voltage AVDD1, the anode of the third diode is grounded, the anode of the fourth diode is connected to the cathode of the third diode and the non-inverting input terminal of the operational amplifier U201B, and the cathode of the fourth diode is connected to the first voltage AVDD1.
3. The accelerometer data acquisition system according to claim 1, characterized in that: The data acquisition board is also provided with a communication circuit for communicating with the industrial computer. The communication circuit is connected to the main control circuit. The main control circuit is used to transmit the output data to the industrial computer via the communication circuit.
4. An accelerometer testing system, characterized in that: It comprises a temperature box, a transfer device, a workbench and the accelerometer data acquisition system as claimed in any one of claims 1 to 3, wherein the workbench is located inside the temperature box, an accelerometer installation tool is installed on the workbench, the workbench is connected to the transfer device, and the accelerometer data acquisition system is used to collect the signal output by the accelerometer to be tested and transmit it to the industrial computer after processing; the transfer device adopts a multi-tooth indexing table to provide high-precision angle position indexing control; One end of the connecting shaft is connected to the workbench, the other end of the connecting shaft is connected to one end of the heat-insulating shaft, and the other end of the heat-insulating shaft is connected to the indexing device; The accelerometer installation tool is provided with four installation surfaces for installing the accelerometer to be tested, the four installation surfaces form a rectangular frame, each installation surface is provided with a plurality of installation holes for installing the accelerometer to be tested, and the plurality of installation holes on each installation surface are distributed in an array; A reference block is fixed on the adapter flange of the multi-tooth indexing table. The outer diameter of the reference block is matched with the tolerance of the inner hole of the insulation shaft to ensure that the insulation shaft and the indexing table are coaxial. The insulation shaft is provided with an axial hole. When the insulation shaft contacts the worktable surface of the multi-tooth indexing table, the reference block is located in the axial hole of the insulation shaft, and the outer diameter of the reference block is the same as the aperture of the axial hole of the insulation shaft.
5. An accelerometer data acquisition method, characterized in that: The steps include: Collecting data using the accelerometer data acquisition system as described in any one of claims 1 to 3; The main control circuit starts the timer; When the timing cycle has not arrived, the data converted by the ADC is read and put into the queue. When the timing cycle arrives, the sampled data in the queue is filtered. Substitute the filtered sampled data into the calibration formula containing calibration coefficients a and b to obtain the output data. The calibration formula is: .
Citation Information
Patent Citations
Fully differential signal conditioning circuit for current excitation sensors
CN106018865A
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CN106768299A
Analog-to-digital conversion calibration method and device
CN107181489A
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CN115902297A
MEMS gyro test system with double-shaft turntable
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