Circuit board assembly and method of making the same

Abstract

The application provides a circuit board assembly and a manufacturing method thereof. The manufacturing method sets an electronic component by first setting a through hole in a substrate, then forms a window in a first insulating layer, sets a conductive layer and the conductive block in the window, and then forms an inner conductor and a second circuit layer by using electroplating technology, which can reduce the concave caused by electroplating, and improve the conductive rate and reliability of the electronic component and the second circuit layer. In addition, the through hole is formed by a depth-limiting mechanical drilling to electrically connect the first circuit layer and the second circuit layer, which can increase the aperture of the through hole. When the electronic component is a high-voltage chip, the through hole can withstand high-voltage input and output, reduce the risk of melting, and further improve the product reliability.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of circuit board manufacturing, in particular to a circuit board assembly and a manufacturing method thereof. BACKGROUND

[0002] With the increasing demand for integration and functionality of integrated circuit technology, the packaging requirements for integrated circuits are becoming more stringent. The existing technology usually adopts Ball Grid Array (BGA) to package and connect the integrated circuit device and the printed circuit board assembly. The BGA technology is suitable for packaging of high-density, high-performance, and multi-pin chips. However, when packaging high-voltage chips (such as vehicle-mounted chips with a voltage greater than 800V), using electroplating hole filling technology to form a conductive path will result in a large recess, which is not conducive to high-voltage transmission, thereby affecting the reliability of the product. SUMMARY

[0003] Therefore, the present application provides a manufacturing method of a circuit board assembly, which can greatly enhance the conductivity rate and reliability of the electronic component after being connected with the circuit board assembly, and improves the disadvantages of BGA technology when packaging high-voltage chips.

[0004] In addition, the present application also provides a circuit board assembly manufactured by the above manufacturing method.

[0005] An embodiment of the present application provides a manufacturing method of a circuit board assembly, comprising the following steps:

[0006] providing a substrate, wherein the substrate is provided with a through hole;

[0007] a release film is arranged on one side of the substrate, wherein the release film seals one end of the through hole;

[0008] an electronic component is arranged in the through hole, wherein the electronic component comprises a body and an electrode arranged on one side of the body, and the side of the body away from the electrode faces the release film;

[0009] a first insulating layer is arranged on the side of the substrate away from the release film, wherein the first insulating layer is partially filled into the through hole to fix the electronic component, and a window is formed through the first insulating layer, and the electrode is exposed from the window;

[0010] a conductive layer is arranged in the window, wherein the conductive layer covers the electronic component and the side wall of the window;

[0011] a conductive block is arranged in the window, wherein one side of the conductive block is connected to the conductive layer;

[0012] the release film is removed, and a second insulating layer is arranged on the side of the substrate away from the first insulating layer;

[0013] forming an inner conductor corresponding to the windowed electroplating, and forming a first circuit layer on a surface of the second insulating layer away from the substrate; the inner conductor covering the conductive block;

[0014] a third insulating layer and a first seed layer are arranged on a surface of the first insulating layer away from the substrate, and the third insulating layer covers the first circuit layer;

[0015] at least one opening is formed through the third insulating layer, the first seed layer, the substrate and the second insulating layer, and at least one first blind hole is formed through the third insulating layer and the first seed layer, at least part of the first circuit layer is exposed by the opening, and at least part of the inner conductor is exposed by the first blind hole;

[0016] a conductive hole and a first conductive body are respectively formed in the opening and the first blind hole by electroplating, and a second circuit layer is formed on a surface of the third insulating layer away from the second insulating layer, the first conductive body is electrically connected to the inner conductor and the second circuit layer, and the conductive hole is electrically connected to the second circuit layer and the first circuit layer, thereby obtaining a circuit board assembly.

[0017] The application further provides a circuit board assembly, which comprises a first circuit layer, a second insulating layer, a substrate, an inner insulating body and a second circuit layer arranged in sequence, the substrate is provided with a through hole, the through hole is provided with an electronic element, the electronic element is provided with a conductive block on a side facing the second circuit layer, and the conductive block is connected to the electronic element through a conductive layer;

[0018] the inner insulating body is provided with a first conductive body and an inner conductor corresponding to the electronic element, the inner conductor covers the conductive block, and the electronic element is electrically connected to the second circuit layer through the inner conductor and the first conductive body;

[0019] The circuit board assembly further comprises a conductive hole penetrating through the inner insulating body, the substrate and the second insulating layer, and the conductive hole is electrically connected to the first circuit layer and the second circuit layer.

[0020] The manufacturing method of the circuit board assembly provided in the application can reduce the generation of recesses and improve the conductive rate and reliability of the electronic element and the second circuit layer when the inner conductor is formed by subsequent electroplating, thereby being beneficial to high-voltage input and output and improving product reliability. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a sectional view of a substrate provided in an embodiment of the application.

[0022] Figure 2 is a cross-sectional view of the substrate after a release film is attached to the substrate side. Figure 1

[0023] Figure 3 is a cross-sectional view of the substrate after an electronic component is disposed in the through hole. Figure 2

[0024] Figure 4 is a cross-sectional view of the substrate after a first insulating layer is laminated to the side of the substrate facing away from the release film. Figure 3

[0025] Figure 5 is a cross-sectional view of the substrate after a window is formed through the first insulating layer, the release film is removed, and a second insulating layer is disposed on the side of the substrate facing away from the first insulating layer. Figure 4

[0026] Figure 6 is a cross-sectional view of the substrate after a conductive layer is disposed in the window. Figure 5

[0027] Figure 7 is a cross-sectional view of the substrate after a conductive block is disposed in the window. Figure 6

[0028] Figure 8 is a cross-sectional view of the substrate after a first metal layer is disposed on the side of the first insulating layer and a second metal layer is disposed on the side of the second insulating layer. Figure 7

[0029] Figure 9 is a cross-sectional view of the substrate after the first metal layer is patterned to form an inner conductive body and the second metal layer is patterned to form a first wiring layer. Figure 8

[0030] Figure 10 is a cross-sectional view of the substrate after a third insulating layer and a first seed layer are disposed on the side of the inner conductive body facing away from the substrate. Figure 9

[0031] Figure 11 is a cross-sectional view of the substrate after a hole is formed through the first seed layer, a first inner insulating body, the substrate, and the second insulating layer, and a first blind hole is formed through a portion of the third insulating layer. Figure 10

[0032] Figure 12 is a cross-sectional view of the substrate after a third metal layer is disposed on the side of the first seed layer, a hole wall metal layer is disposed in the hole to form a conductive hole, and a first conductive body is formed in the first blind hole. Figure 11

[0033] Figure 13 ​​​​​​​​​​​is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer. Figure 12 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer.

[0034] Figure 14 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer. Figure 13 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer.

[0035] Figure 15 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer. Figure 14 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer.

[0036] Figure 16 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer. Figure 15 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer.

[0037] Figure 17 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer. Figure 16 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer.

[0038] Figure 18 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer. Figure 17 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer.

[0039] Figure 19 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer. Figure 18 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer.

[0040] Figure 20 is a cross-sectional view of the first metal layer after the first metal layer is patterned to form the first circuit layer.

[0041] Main element symbol explanation

[0042] Circuit board assembly 100 Fourth metal layer 412

[0043] Substrate 10 Second through body 414

[0044] Via hole 102 Through hole 42

[0045] Release film 104 Cover metal layer 422

[0046] Electronic element 11 Second circuit layer 43

[0047] Body 112 Third circuit layer 44

[0048] Electrode 114 First copper clad layer 50

[0049] First insulating layer 121 Fifth insulating layer 501

[0050] Window 122 Third seed layer 502

[0051] second insulating layer 123 third blind hole 503

[0052] conductive layer 13 second copper clad layer 51

[0053] conductive block 14 sixth insulating layer 511

[0054] first metal layer 152 fourth seed layer 512

[0055] second metal layer 154 fourth blind hole 513

[0056] inner conductor 20 fifth metal layer 60

[0057] first circuit layer 22 third conductor 61

[0058] inner insulator 31 sixth metal layer 62

[0059] third insulating layer 311 fourth conductor 63

[0060] first seed layer 312 fourth circuit layer 70

[0061] aperture 313 first solder pad 702

[0062] first blind hole 314 fifth circuit layer 72

[0063] fourth insulating layer 321 second solder pad 722

[0064] second seed layer 322 first anti-solder layer 80

[0065] second blind hole 323 first opening 802

[0066] third metal layer 402 second anti-solder layer 82

[0067] aperture wall metal layer 404 second opening 822

[0068] first conductor 406 thickness direction A

[0069] resin 408

[0070] The following detailed description will further describe the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0071] The technical solutions in the embodiments of the present application will be described clearly and completely in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all.

[0072] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application.

[0073] In order to make the technical means and effects taken by the present application to achieve the predetermined purpose further clear, the following will be described in detail in combination with the drawings and preferred embodiments.

[0074] Please refer to Figures 1 to 20 , an embodiment of the present application provides a manufacturing method of a circuit board assembly 100, comprising the following steps:

[0075] Step S11, please refer to Figure 1 , a substrate 10 is provided, the substrate 10 has a thickness direction A, and the substrate 10 is provided with a through hole 102 along the thickness direction A.

[0076] Among them, the substrate 10 can be a soft board, a hard board, a soft and hard combination board or a carrier board, etc., which can be single-layer or multi-layer.

[0077] Step S12, please refer to Figure 2 , a release film 104 is attached to one side of the substrate 10.

[0078] Among them, the release film 104 seals one end of the through hole 102, which is used for temporarily carrying electronic components 11 (see Figure 3 ) in the subsequent process.

[0079] Step S13, please refer to Figure 3 , the electronic components 11 are placed in the through hole 102.

[0080] Among them, the electronic components 11 include a body 112 and at least two electrodes 114 electrically connected to the body 112, two electrodes 114 are located on the same side of the body 112, and the side of the body 112 away from the electrodes 114 is also located on the release film 104.

[0081] In this embodiment, the electronic components 11 can be high-voltage chips, for example, can be vehicle-mounted chips with a voltage greater than 800V.

[0082] Step S14, please refer to Figure 4 , a first insulating layer 121 is arranged on the side of the substrate 10 away from the release film 104, and the first insulating layer 121 covers the electronic components 11.

[0083] The first insulating layer 121 is also partially filled in the through hole 102, i.e. the first insulating layer 121 fills the gap between the substrate 10 and the electronic component 11, so that the electronic component 11 can be firmly fixed in the substrate 10.

[0084] At step S15, referring to Figure 5 , at least two windows 122 are opened in the first insulating layer 121 along the thickness direction A, and each of the electrodes 114 is exposed by one of the windows 122.

[0085] The windows 122 are arranged corresponding to the through holes 102, and two of the windows 122 are arranged at intervals. Specifically, the windows 122 can be opened by mechanical drilling, laser drilling, plasma cutting, etc. In this embodiment, the width of each of the windows 122 is greater than the width of the electrode 114, so that at least part of the surface of the body 112 is also exposed by the window 122.

[0086] In some embodiments, step S15 further includes:

[0087] The release film 104 is removed;

[0088] A second insulating layer 123 is arranged on the side of the substrate 10 away from the first insulating layer 121.

[0089] The first insulating layer 121 and the second insulating layer 123 can be one of Ajinomoto Build-up Film (ABF), Prepreg (PP), epoxy resin, BT resin, Polyphenylene Oxide (PPO), polyimide (PI), Polyethylene Terephthalate (PET), and Polyethylene Naphthalate (PEN), etc. In this embodiment, the first insulating layer 121 and the second insulating layer 123 are both Prepreg.

[0090] At step S16, referring to Figure 6 , a conductive layer 13 is arranged in each of the windows 122.

[0091] The conductive layer 13 covers the electronic component 11 and the sidewall (not labeled) of the window 122, so as to form a metallized hole structure to facilitate subsequent electroplating in the window 122. Specifically, the conductive layer 13 can be formed by printing tin paste in the window 122.

[0092] Step S17, please refer to Figure 7 , the conductive block 14 is arranged in the window 122.

[0093] One end of the conductive block 14 is arranged on the conductive layer 13. The conductive block 14 can be a copper block. In this embodiment, the width of the conductive block 14 is approximately equal to the width of the electrode 114, and a gap is formed between the conductive block 14 and the window 122, thereby increasing the bonding reliability of the conductive layer 13 and the reliability of subsequent electroplating conduction.

[0094] The step S17 further includes curing the conductive layer 13.

[0095] In this embodiment, the material of the conductive layer 13 is tin paste, which can be reflow heated and melted, and then cooled and solidified to achieve curing, thereby firmly welding the electronic component 11 and the conductive block 14 together.

[0096] Step S18, please refer to Figure 8 , the first metal layer 152 is arranged on the side of the first insulating layer 121 away from the substrate 10, and the second metal layer 154 is arranged on the side of the second insulating layer 123 away from the substrate 10. The first metal layer 152 is partially filled into the window 122.

[0097] Specifically, the first metal layer 152 and the second metal layer 154 can be formed by horizontal electroplating combined with vertical continuous electroplating. By first arranging the conductive block 14 in the window 122, the volume of the conductive block 14 is large, thereby reducing the concave during electroplating in the window 122, thereby reducing the resistance, and further greatly enhancing the conductive rate and reliability of the subsequent conduction of the electronic component 11 to the circuit board.

[0098] Step S19, please refer to Figure 9 , the first metal layer 152 is patterned to form at least two inner conductive bodies 20, and the second metal layer 154 is patterned to form a first circuit layer 22.

[0099] Each of the inner conductive bodies 20 corresponds to one of the windows 122, and the inner conductive body 20 covers the conductive block 14. In some embodiments, along the thickness direction A, the surface of the inner conductive body 20 away from the conductive block 14 is higher than the surface of the first insulating layer 121 away from the substrate 10.

[0100] In some embodiments, the inner conductive body 20 also partially fills the gap between the conductive block 14 and the window 122, so that the bottom surface and side surface of the inner conductive body 20 also partially connect the conductive layer 13, so as to further enhance the electrical connection reliability.

[0101] Specifically, the inner conductive body 20 and the first circuit layer 22 can be formed by respectively disposing a photosensitive dry film on the surfaces of the first metal layer 152 and the second metal layer 154, exposing, developing, etching, and removing the film.

[0102] Step S20, referring to Figure 10 , a third insulating layer 311 and a first seed layer 312 are stacked on the side of the inner conductive body 20 away from the substrate 10, and a fourth insulating layer 321 and a second seed layer 322 are stacked on the side of the first circuit layer 22.

[0103] The third insulating layer 311 covers the inner conductive body 20, and the fourth insulating layer 321 covers the first circuit layer 22 and fills the gap between the first circuit layer 22 and the second insulating layer 123. The third insulating layer 311 connects the first insulating layer 121 to form an inner insulating body 31.

[0104] Step S21, referring to Figure 11 , at least one opening 313 is formed through the first seed layer 312, the inner insulating body 31, the substrate 10, and the second insulating layer 123 in the thickness direction A, and at least part of the first circuit layer 22 is exposed by the opening 313; at least two first blind holes 314 are formed in the first seed layer 312 and part of the third insulating layer 311, and at least part of the inner conductive body 20 is exposed by the first blind hole 314; at least one second blind hole 323 is formed through the second seed layer 322 and the fourth insulating layer 321, and at least part of the first circuit layer 22 is exposed by the second blind hole 323.

[0105] In this embodiment, the opening 313 can be formed by a depth drilling technique, and the first blind hole 314 and the second blind hole 323 can be formed by a laser drilling technique. The aperture of the opening 313 is greater than or equal to 0.5 mm.

[0106] Step S22, referring to Figure 12 , a third metal layer 402 is disposed on the side of the first seed layer 312, a hole wall metal layer 404 is formed on the inner wall of the opening 313, and part of the third metal layer 402 fills into the first blind hole 314 to form a first conductive body 406; a fourth metal layer 412 is disposed on the side of the second seed layer 322, and part of the fourth metal layer 412 fills into the second blind hole 323 to form a second conductive body 414.

[0107] The opening 313 and the hole wall metal layer 404 jointly form a through hole 42, the through hole 42 electrically connects the third metal layer 402 and the first circuit layer 22, the first through body 406 electrically connects the inner side conductive body 20 and the third metal layer 402, and the second through body 414 electrically connects the first circuit layer 22 and the fourth metal layer 412.

[0108] Specifically, the third metal layer 402 and the fourth metal layer 412 and the through hole 42 can be formed by horizontal electroplating combined with vertical continuous electroplating.

[0109] By adopting the mechanical drilling technology to form the opening 313, the aperture of the through hole 42 can be greater than or equal to 0.5 mm, which is larger than the aperture of the through hole formed by laser drilling in a traditional printed circuit board, and has stronger ability to withstand high voltage, thereby reducing the risk of melting and breaking, improving the reliability of the through hole, and improving the conductive speed.

[0110] Step S23, please refer to Figure 13 , filling the resin 408 in the through hole 42.

[0111] The step S23 further includes grinding the surface of the resin 408, so that the surface of the resin 408 is flush with the surface of the third metal layer 402, without recess.

[0112] Step S24, please refer to Figure 14 , a covering metal layer 422 is arranged on the surface of the third metal layer 402, and the covering metal layer 422 covers the surface of the resin 408.

[0113] Specifically, the covering metal layer 422 can be formed by electroplating.

[0114] Step S25, please refer to Figure 15 , patterning the third metal layer 402 and the covering metal layer 422 to form a second circuit layer 43, and patterning the fourth metal layer 412 to form a third circuit layer 44.

[0115] The second circuit layer 43 electrically connects the through hole 42 and the first through body 406, and the third circuit layer 44 electrically connects the second through body 414, so that the electronic component 11 is electrically connected to the second circuit layer 43, and then the electronic component 11 is electrically connected to the third circuit layer 44.

[0116] Step S26, please refer to Figure 16A first copper clad layer 50 is arranged on one side of the second circuit layer 43, and a second copper clad layer 51 is arranged on one side of the third circuit layer 44.

[0117] The first copper clad layer 50 comprises a fifth insulating layer 501 and a third seed layer 502 stacked together, and the fifth insulating layer 501 covers the second circuit layer 43. The second copper clad layer 51 comprises a sixth insulating layer 511 and a fourth seed layer 512 stacked together, and the sixth insulating layer 511 covers the third circuit layer 44.

[0118] In step S27, referring to Figure 17 At least one third blind hole 503 is formed through the first copper clad layer 50, and at least part of the second circuit layer 43 is exposed by the third blind hole 503. At least one fourth blind hole 513 is formed through the second copper clad layer 51, and at least part of the third circuit layer 44 is exposed by the fourth blind hole 513.

[0119] Specifically, the third blind hole 503 and the fourth blind hole 513 can be formed by laser drilling.

[0120] In step S28, referring to Figure 18 A fifth metal layer 60 is formed on one side of the first copper clad layer 50, and part of the fifth metal layer 60 fills into the third blind hole 503 to form a third conductive body 61. A sixth metal layer 62 is formed on one side of the second copper clad layer 51, and part of the sixth metal layer 62 fills into the fourth blind hole 513 to form a fourth conductive body 63.

[0121] Specifically, the fifth metal layer 60, the third conductive body 61, the sixth metal layer 62 and the fourth conductive body 63 can be formed by horizontal electroplating combined with vertical continuous electroplating.

[0122] In step S29, referring to Figure 19 The fifth metal layer 60 is patterned to form a fourth circuit layer 70, and the sixth metal layer 62 is patterned to form a fifth circuit layer 72.

[0123] The third conductive body 61 electrically connects the fourth circuit layer 70 and the second circuit layer 43, and the fourth conductive body 63 electrically connects the fifth circuit layer 72 and the third circuit layer 44. The fourth circuit layer 70 comprises a plurality of first solder pads 702, and the fifth circuit layer 72 comprises a plurality of second solder pads 722.

[0124] In step S30, referring to Figure 20 A second anti-solder layer 82 is arranged on one side of the fourth circuit layer 70 and on one side of the fifth circuit layer 72 to obtain a circuit board assembly 100.

[0125] The first anti-welding layer 80 covers the fourth circuit layer 70, and has at least one first opening 802, and the first soldering pad 702 is exposed by the first opening 802. The second anti-welding layer 82 covers the fifth circuit layer 72, and has at least one second opening 822, and the second soldering pad 722 is exposed by the second opening 822.

[0126] The manufacturing method of the circuit board assembly provided by the present application can reduce recesses and improve the conductive rate and reliability of the electronic component 11 and the second circuit layer 43 by forming the window 122 in the first insulating layer 121 and arranging the conductive layer 13 and the conductive block 14. In addition, the diameter of the through hole 42 can be increased by forming the through hole 42 by mechanical drilling with a fixed depth and electroplating, so that the through hole 42 can withstand high-voltage input and output, reduce the risk of melting, and further improve product reliability.

[0127] Please refer to Figure 10 An embodiment of the present application further provides a circuit board assembly 100 manufactured by the above manufacturing method. The circuit board assembly 100 comprises a first circuit layer 22, a second insulating layer 123, a substrate 10, an electronic component 11, an inner insulator 31, a conductive layer 13, a conductive block 14, an inner conductor 20, a second circuit layer 43, a through hole 42, and a first conductor 406. The circuit board assembly 100 has a thickness direction A, and the second insulating layer 123, the inner insulator 31, the substrate 10, the second insulating layer 123, and the first circuit layer 22 are sequentially stacked along the thickness direction A.

[0128] The substrate 10 is provided with a through hole 102, and the electronic component 11 is arranged in the through hole 102. The conductive layer 13 is arranged between the electronic component 11 and the conductive block 14, the conductive block 14 is electrically connected to the electronic component 11 through the conductive layer 13, the first conductor 406 and the inner conductor 20 are arranged in the inner insulator 31 along the thickness direction A, the inner conductor 20 covers the conductive block 14, and the first conductor 406 electrically connects the second circuit layer 43 and the inner conductor 20, so that the electronic component 11 is electrically connected to the second circuit layer 43 through the inner conductor 20 and the first conductor 406. In this embodiment, the conductive layer 13 also covers part of the bottom surface and the side surface of the inner conductor 20 to increase the reliability of the conductive connection. The material of the conductive layer 13 is tin paste, and the conductive block 14 is a copper block.

[0129] The via hole 42 penetrates the inner insulator 31, the substrate 10 and the second insulating layer 123 in sequence along the thickness direction A, the via hole 42 is arranged away from the through hole 102, and the via hole 42 electrically connects the first circuit layer 22 and the second circuit layer 43. The aperture of the via hole 42 is greater than 0.5 mm.

[0130] In some embodiments, the circuit board assembly 100 further comprises a fifth insulating layer 501, a third via body 61 and a fourth circuit layer 70, the fifth insulating layer 501 covers the second circuit layer 43, the third via body 61 penetrates the fifth insulating layer 501, and the third via body 61 electrically connects the fifth insulating layer 501 and the second circuit layer 43. The fourth circuit layer 70 comprises a plurality of first solder pads 702.

[0131] In some embodiments, the circuit board assembly 100 further comprises a second via body 414, a fourth insulating layer 321, a third circuit layer 44, a sixth insulating layer 511, a fourth via body 63 and a fifth circuit layer 72, the fourth insulating layer 321, the third circuit layer 44, the sixth insulating layer 511 and the fifth circuit layer 72 are sequentially stacked along the thickness direction A. The fourth insulating layer 321 covers the first circuit layer 22, the second via body 414 penetrates the fourth insulating layer 321, and the second via body 414 electrically connects the first circuit layer 22 and the third circuit layer 44. The sixth insulating layer 511 covers the third circuit layer 44, the fourth via body 63 penetrates the sixth insulating layer 511, and the fourth via body 63 electrically connects the third circuit layer 44 and the fifth circuit layer 72. The fifth circuit layer 72 comprises a plurality of second solder pads 722.

[0132] In some embodiments, the circuit board assembly 100 further comprises a first solder mask layer 80 and a second solder mask layer 82, the first solder mask layer 80 covers the fourth circuit layer 70, the first solder mask layer 80 has at least one first opening 802, and the first solder pad 702 is exposed by the first opening 802. The second solder mask layer 82 covers the fifth circuit layer 72, the second solder mask layer 82 has at least one second opening 822, and the second solder pad 722 is exposed by the second opening 822.

[0133] The above description is merely one optimized specific embodiment of the present application, but in actual application process, it cannot be limited to this embodiment.

Claims

1. A method for manufacturing a circuit board assembly, characterized in that: The following steps are involved: Providing a substrate, wherein the substrate is provided with a through hole; A release film is provided on one side of the substrate, wherein the release film seals one end of the through hole; An electronic component is arranged in the through hole, wherein the electronic component includes a body and an electrode arranged on one side of the body, and a side of the body facing away from the electrode faces the release film; A first insulating layer is provided on a side of the substrate facing away from the release film, wherein the first insulating layer partially fills the through hole to fix the electronic component, and a window is formed through the first insulating layer, and the electrode is exposed through the window; Disposing a conductive layer in the window, wherein the conductive layer covers the electronic component and the sidewall of the window; A conductive block is arranged in the window, wherein one side of the conductive block is connected to the conductive layer; removing the release film and disposing a second insulating layer on a side of the substrate facing away from the first insulating layer; forming an inner conductor corresponding to the window by electroplating, and forming a first circuit layer on the surface of the second insulating layer facing away from the substrate; the inner conductor covers the conductive block; Disposing a third insulating layer and a first seed layer on a surface of the first insulating layer facing away from the substrate, wherein the third insulating layer covers the inner conductor; At least one opening is formed through the third insulating layer, the first seed layer, the substrate, and the second insulating layer, and at least one first blind hole is formed through the third insulating layer and the first seed layer, wherein at least a portion of the first circuit layer is exposed through the opening, and at least a portion of the inner conductor is exposed through the first blind hole; A via hole and a first conductive body are formed in the corresponding opening and the above-mentioned first blind hole by electroplating, and a second circuit layer is formed on the side of the third insulating layer away from the second insulating layer. The first conductive body electrically connects the inner conductor and the second circuit layer, and the via hole electrically connects the second circuit layer and the first circuit layer to obtain a circuit board assembly.

2. The method for manufacturing a circuit board assembly according to claim 1, wherein: The opening is opened by adopting a fixed-depth mechanical drilling technology.

3. The method for manufacturing a circuit board assembly according to claim 2, wherein: The aperture of the opening is greater than or equal to 0.5 mm.

4. The method for manufacturing a circuit board assembly according to claim 1, wherein: The step of "electroplating to form inner conductors in the openings" includes: forming a first metal layer by electroplating on the surface of the first insulating layer, wherein a portion of the first metal layer is filled into the opening; The first metal layer is patterned to form the inner conductor.

5. The method for manufacturing a circuit board assembly according to claim 1, wherein: A surface of the inner conductor facing away from the electronic component is higher than a surface of the first insulating layer facing away from the substrate.

6. The method for manufacturing a circuit board assembly according to claim 1, wherein: The step of “stacking a third insulating layer and a first seed layer on a surface of the first insulating layer facing away from the substrate” further includes: A fourth insulating layer and a second seed layer are stacked on the surface of the second insulating layer provided with the first circuit layer, wherein the fourth insulating layer covers the first circuit layer; The step of "opening at least one first blind hole through the third insulating layer and the first seed layer" further includes: At least one second blind hole is formed through the fourth insulating layer and the second seed layer, and at least a portion of the first circuit layer is exposed through the second blind hole; The step of “electroplating in the first blind hole to form a first conductive body” further includes: A third circuit layer is formed on a surface of the fourth insulating layer facing away from the first circuit layer, and a second conductive body is formed in the second blind hole by electroplating, wherein the second conductive body electrically connects the first circuit layer and the third circuit layer.

7. The method for manufacturing a circuit board assembly according to claim 1, wherein: The step of "arranging a conductive layer in the window" includes: printing solder paste in the window to form the conductive layer.

8. The method for manufacturing a circuit board assembly according to claim 1, wherein: The electronic component is an on-board chip, and the voltage of the on-board chip is greater than 800V.

9. A circuit board assembly, characterized in that: The circuit board assembly includes a first circuit layer, a second insulating layer, a substrate, an inner insulator, and a second circuit layer stacked in sequence, the substrate having a through hole extending therethrough, an electronic component being disposed in the through hole, a conductive block being disposed on a side of the electronic component facing the second circuit layer, and the conductive block being connected to the electronic component via a conductive layer; A first conductive body and an inner conductor are stacked and penetrated in the inner insulator corresponding to the electronic component, the inner conductor covers the conductive block, and the electronic component is electrically connected to the second circuit layer through the inner conductor and the first conductive body; The circuit board assembly further includes a via hole penetrating the inner insulator, the substrate, and the second insulating layer, wherein the via hole electrically connects the first circuit layer and the second circuit layer.

10. The circuit board assembly according to claim 9, wherein: The aperture of the via hole is greater than or equal to 0.5 mm; The conductive layer is made of solder paste, and the conductive block is a copper block; The electronic component is an on-board chip, and the voltage of the on-board chip is greater than 800V.

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