Median right nerve electrical stimulator and processing method

Abstract

The invention discloses a median right nerve electrical stimulator and a processing method, relates to the technical field of electrical stimulators, and aims to solve the technical problems that in the prior art, the step length of adjusting parameters through keys of existing equipment is small, multi-parameter testing is encountered during clinical use, use is inconvenient, operation is complex, pulse stimulation parameter setting is too single, and time and labor are wasted. The problems that only parameters such as stimulation frequency, pulse width and stimulation current intensity are adjustable, clinical and research requirements cannot be met, equipment can only work in a single channel during operation, and clinical application cannot meet the condition that multiple patients use the equipment at the same time are solved.

Description

Technical Field

[0001] The present invention relates to the technical field of electrical stimulators, and in particular to a right median nerve electrical stimulator and a processing method. Background Art

[0002] In recent years, research on the theory of neuroplasticity in the field of rehabilitation medicine has revealed and confirmed its fundamental role in the recovery of motor function. Neuroplasticity generally refers to the biological properties of the nervous system changing its structure or function to adapt to changes in the internal and external environment of the organism, by establishing new neural connections and neural networks, reconstructing the cerebral cortical map, acquiring new skills, or repairing and compensating for damaged functions. The introduction and application of this theory has transformed the form of rehabilitation training from simple movement training based mainly on clinical experience to repetitive motor learning and neural stimulation with the training goal of improving the excitability and functional reconstruction of the nervous system.

[0003] Since Japanese scholar Yokotama first reported the use of median nerve electrical stimulation to treat patients with persistent vegetative state (PVS) in 1996, its clinical application has increased year by year. At present, median nerve electrical stimulation has been used to treat patients in acute coma at home and abroad, which can significantly shorten the coma time and reduce the disability rate. However, the current external median nerve electrical stimulator has the following disadvantages:

[0004] 1. The existing equipment uses buttons to adjust the parameter size in small steps, which is inconvenient and complicated to operate when encountering multi-parameter tests in clinical use;

[0005] 2. The pulse stimulation parameter settings are too simple. Only the stimulation frequency, pulse width and stimulation current intensity can be adjusted, which cannot meet clinical and research needs.

[0006] 3. When the device is running, it can only work on a single channel, and clinical applications cannot meet the needs of multiple patients using it at the same time;

[0007] Therefore, the market urgently needs to develop a right median nerve electrical stimulator and treatment method to help people solve existing problems. Summary of the invention

[0008] The purpose of the present invention is to provide a right median nerve electrical stimulator and processing method to solve the problem that the device proposed in the above background technology adopts a small step size for adjusting the parameter size by pressing buttons, which is inconvenient to use and complicated to operate when encountering multi-parameter testing in clinical use. The pulse stimulation parameter setting is too simple, and only parameters such as stimulation frequency, pulse width and stimulation current intensity are adjustable, which cannot meet clinical and research needs. When the device is running, it can only work on a single channel, and clinical applications cannot meet the situation where multiple patients use it at the same time.

[0009] To achieve the above-mentioned purpose, the present invention provides the following technical solutions: a right median nerve electrical stimulator and processing method, comprising a host computer and a slave computer, the host computer comprising a serial port screen, the serial port screen comprising a main interface, channel one and channel two, the slave computer comprising a main control unit circuit and an electrode sheet, the main control unit circuit comprising an STM32F373CCT6 circuit, a power supply circuit, a serial port screen display circuit, a channel isolation circuit, an I2C communication storage circuit, an indicator light circuit and a stimulation circuit; the output end of the power supply circuit is connected to the power input end of the host, the other control signal ends of the main control unit are respectively connected to the input end of the serial port screen and the input end of the stimulation circuit, the output end of the stimulation circuit is connected to the electrode sheet, and the power supply circuit adopts a 12V power conversion The output of the device, the power input end of the host is the input end of two step-down modules, the output end of the 12V power converter is connected to the input end of the two step-down modules, the output end of one of the step-down modules outputs a 5V voltage to power components such as a digital isolation chip and a serial port screen, and the output end of the other step-down module is divided into two paths, one path is connected to the boost chip output power supply 16.5V, and the other path is connected to the step-down chip output 3.3V. The serial port screen is communicatively connected to the STM32F373CCT6 chip, the stimulation circuit includes a stimulation circuit A and a stimulation circuit B, and the stimulation parameter command of the stimulation circuit at least includes stimulation parameter information of stimulation frequency, stimulation pulse width, stimulation intensity, treatment time, rise time, fall time and rest time.

[0010] In a preferred example, the present invention can be further configured as follows: the main control unit circuit includes an STM32F373CCT6 chip U5, a resistor R35, a resistor R36, a resistor R37, a capacitor C28, a 4P straight pin plug J3, a resistor R16, a capacitor C23, a capacitor C32, a capacitor C11, a capacitor C25, a capacitor C17, a capacitor C16, a capacitor C29, a capacitor C30 and a crystal oscillator Y1; the PA2 pin of U5 is connected to the anodes of R35, C28 and D13, the cathode of D13 is connected to VCC3_3D, the other end of R35 is connected to R36 and R37, the other end of C28 is connected to DGND and R37, and the other end of R36 is connected to 16.5V, the other end of R37 is connected to DGND and C28, the VCC pin of J3 is connected to VCC3_3D, the SWDIO pin of J3 is connected to the PA13 pin of the STM32F373CCT6 microcontroller, the SWCLK pin of J3 is connected to the PA14 pin of the STM32F373CCT6 microcontroller, the GND pin of J3 is connected to DGND, one end of R16 is connected to DGND, and the other end is connected to the BOOT0 pin of the STM32F373CCT6 microcontroller, one end of C23 is connected to DGND, and the other end is connected to VCC3_3D and STM32F373CCT 6 MCU VBAT pin, one end of C32 is connected to AGND, the other end is connected to 2_5VREF and STM32F373CCT6 MCU VDDA / VREF+ pin, the VSSA / VREF- pin of STM32F373CCT6 MCU is connected to AGND, one end of C11 and C25 is connected to VCC3_3D and STM32F373CCT6 MCU VDD_1 pin, the other end is connected to DGND and STM32F373CCT6 MCU VSS_2 pin, STM32F373CCT6 MCU VD One end of D_2 pin is connected to VDD_1 pin of STM32F373CCT6 microcontroller, and the other end is connected to C25. The VSSSD / VREFSD- pin of STM32F373CCT6 microcontroller is connected to AGND. One end of C17 is connected to VDDA and VSSD pin of STM32F373CCT6 microcontroller, and the other end is connected to VSSSD / VREFSD- pin and AGND. One end of C16 is connected to 2_5VREF and VREFSD+ pin of STM32F373CCT6 microcontroller, and the other end is connected to C17, VSSSD / VR EFSD- pin and AGND, one end of Y1 is connected to the PF0 / OSC_IN pin of the STM32F373CCT6 microcontroller and C29, and the other end is connected to the PF1 / OSC_OUT pin of the STM32F373CCT6 microcontroller and C30, one end of C29 is connected to the PF0 / OSC_IN pin of the STM32F373CCT6 microcontroller and Y1, and the other end is connected to DGND and C30, one end of C30 is connected to the PF1 / OSC_OUT pin of the STM32F373CCT6 microcontroller and Y1, and the other end is connected to DGND and C29. .

[0011] In a preferred example, the present invention can be further configured as follows: the channel isolation circuit includes a dual-channel digital isolator chip U2, a capacitor C4, a capacitor C8, and a 4P straight pin plug J1; the GND1 pin of U2 is connected to ISO_GND, one end of C4 is connected to the VDD1 pin of U2, and the other end is connected to ISO_GND and the GND1 pin of U2, the VCC pin of J1 is connected to ISO_5V and the VDD1 pin of U2, the RX pin of J1 is connected to the VIB pin of U2, the TX pin of J1 is connected to the VOA pin of U2, and the GND pin of J1 is connected to ISO_GND.

[0012] In a preferred example, the present invention can be further configured as follows: the I2C communication storage circuit includes a communication storage chip U6, a capacitor C22, a resistor R19, and a resistor R22; A0, A1, A2 and GND pins of U6 are connected to DGND, the VCC pin of U6 is connected to VCC3_3D, one end of C22 is connected to VCC3_3D and the VCC pin of U6, and the other end is connected to the WP pin of U6 and then to DGND, one end of R19 is connected to VCC3_3D and R22, and the other end is connected to the SCL pin of U6 and the PB6 pin of the STM32F373CCT6 microcontroller, one end of R22 is connected to VCC3_3D and R19, and the other end is connected to the SDA pin of U6 and the PB7 pin of the STM32F373CCT6 microcontroller.

[0013] In a preferred example, the present invention can be further configured as follows: the indicator light circuit includes a stimulation indicator light D7, a feedback indicator light D6, a working indicator light D5, a fault indicator light D3, a serial port frame indicator light D2, a resistor R14, a resistor R13, a resistor R12, a resistor R8, and a resistor R7; the VCC3_3D power supply output by the step-down circuit is respectively connected to one end of R14, R13, R12, R8, and R7, the other end of R14 is connected to the anode of D7, the cathode of D7 is connected to the PB0 pin of the STM32F373CCT6 single-chip microcomputer, the other end of R13 is connected to the anode of D6, the cathode of D6 is connected to the PB1 pin of the STM32F373CCT6 single-chip microcomputer, the other end of R12 is connected to the anode of D5, the cathode of D5 is connected to the PB2 pin of the STM32F373CCT6 single-chip microcomputer, the other end of R8 is connected to the anode of D3, and the cathode of D3 is connected to the STM32F373CCT6 single-chip microcomputer. The other end of R7 is connected to the PB2 pin of the TM32F373CCT6 microcontroller, and the cathode of D2 is connected to the PB3 pin of the STM32F373CCT6 microcontroller. The stimulation circuit A includes capacitor C54, inductor L7, capacitor C42, P-MOS tube Q7, resistor R34, resistor R33, NPN transistor Q5, resistor R30, resistor R29, NPN transistor Q6, resistor R32, resistor R28, 2P90 degree long curved needle socket P3, resistor R44, transformer T2, capacitor C50, Schottky diode D17, transient suppression diode D16, transient suppression diode D18, capacitor C20, diode D8, resistor R43, operational amplifier U10A, capacitor C55, resistor R48, P-MOS tube Q8, resistor R49, resistor R46, resistor R40, and operational amplifier U10B.

[0014] In a preferred example, the present invention can be further configured as follows: the stimulation circuit A includes capacitor C54, inductor L7, capacitor C42, P-MOS tube Q7, resistor R34, resistor R33, NPN transistor Q5, resistor R30, resistor R29, NPN transistor Q6, resistor R32, resistor R28, 2P90 degree long curved pin socket P3, resistor R44, transformer T2, capacitor C50, Schottky diode D17, transient suppression diode D16, transient suppression diode D18, capacitor C20, diode D8, resistor R43, operational amplifier U10A, capacitor C55, resistor R48, P-MOS tube Q8, resistor R49, resistor R46, resistor R40, and operational amplifier U10B.

[0015] In a preferred example, the present invention can be further configured as follows: one end of the stimulation circuit A is connected to 16.5V and L7 at C54, and the other end is connected to DGND; one end of L7 is connected to 16.5V and C54, and the other end is connected to the drain pin of C42, R33 and Q7; one end of C42 is connected to the drain pin of L7, R33 and Q7, and the other end is connected to DGND; one end of R33 is connected to the drain pin of C42, L7 and Q7, and the other end is connected to the collector pin of R34 and Q5; one end of R29 is connected to VCC3_3D, and the other end is connected to the collector pin of R30 and Q6; one end of R30 is connected to the collector pin of R29 and Q6. The anode of D16 is connected to DGND, the cathode is connected to the cathode of D17, C50, and the input pin V1 of T2. The anode of D18 is connected to DGND, and the cathode is connected to the anode of D17, C50, and the input pin V1 of T2. The anode of D18 is connected to DGND, and the cathode is connected to the anode of D17, C50, and the input pin V2 of T2. Input pin V2, the in-phase input terminal of U10A is connected to R43, the other end of R43 is connected to the anode of D8 and the DAC2 output terminal of the PA5 pin of the STM32F373CCT6 microcontroller, the cathode of D8 is connected to VCC3_3D, the V+ terminal of U10A is connected to the power supply 16.5V and C20, the other end of C20 is connected to DGND, the V- terminal of U10A is connected to DGND, the output terminal of U10A is connected to C55 and R48, the out-of-phase input terminal of U10A is connected to C55 and R46, the other end of R46 is connected to the in-phase input terminal of U10B, R40 and the S end of Q8, the other end of R40 is connected to DGND, U The output end of 10B is connected to the out-of-phase input end of U10B and the ADC0 output end of the PA0 pin of the STM32F373CCT6 microcontroller, the G end of Q8 is connected to R48 and R49, the other end of R49 is connected to DGND, the three S end pins of Q8 are short-connected to R46, R40 and the in-phase input end of U10B, the four D end pins of Q8 are short-connected to the V2 pin of T2, the V1 and V3 pins of T2 are short-connected, the V2 and V4 pins of T2 are short-connected, the Y1 and Y3 pins of T2 are short-connected and then connected to one end of R44 and pin 1 of P3, the Y4 and Y2 pins of T2 are short-connected and then connected to the other end of R44 and pin 2 of P3.

[0016] In a preferred example, the present invention can be further configured as follows: the stimulation circuit B includes an operational amplifier U7B, a resistor R15, a resistor R21, a P-MOS tube Q4, a resistor R24, a resistor R25, a capacitor C35, an operational amplifier U7A, a resistor R17, a diode D10, a capacitor C34, a transient suppression diode D4, a transient suppression diode D14, a Schottky diode D9, a capacitor C24, a transformer T1, a resistor R18, a 2P 90 degree long curved pin socket P2, a P-MOS tube Q3, a resistor R11, a resistor R10, an NPN transistor Q1, a resistor R6, a resistor R5, an NPN transistor Q2, a resistor R9, a resistor R4, a capacitor C21, an inductor L4, and a capacitor C41.

[0017] In a preferred example, the present invention can be further configured as follows: one end of the stimulation circuit B is connected to 16.5V and L4 at C41, and the other end is connected to DGND; one end of L4 is connected to 16.5V and C41, and the other end is connected to the drain pins of C21, R10 and Q3; one end of C21 is connected to the drain pins of L4, R10 and Q3, and the other end is connected to DGND; one end of R10 is connected to the drain pins of C21, L4 and Q3, and the other end is connected to the collector pins of R11 and Q1; one end of R5 is connected to VCC3_3D, and the other end is connected to the collector pins of R6 and Q2; one end of R6 is connected to the collector pins of R5 and Q2. The anode of D4 is connected to DGND, the cathode is connected to the cathode of D9, C24, and the input pin V1 of T1. The anode of D14 is connected to DGND, and the cathode is connected to the anode of D9, C24, and the input pin of T1. Pin V2, U7A's in-phase input terminal is connected to R17, the other end of R17 is connected to the anode of D10 and the DAC1 output terminal of the PA4 pin of the STM32F373CCT6 microcontroller, the cathode of D10 is connected to VCC3_3D, U7A's V+ terminal is connected to the power supply 16.5V and C34, the other end of C34 is connected to DGND, U7A's V- terminal is connected to DGND, U7A's output terminal is connected to C35 and R24, U7A's out-of-phase input terminal is connected to C35 and R21, the other end of R21 is connected to U7B's in-phase input terminal, R15 and the S end of Q4, the other end of R15 is connected to DGND, U7B The output end of Q4 is connected to the out-of-phase input end of U7B and the ADC1 output end of the PA1 pin of the STM32F373CCT6 microcontroller, the G end of Q4 is connected to R24 and R25, the other end of R25 is connected to DGND, the three S pins of Q4 are short-connected to R21, R15 and the in-phase input end of U7B, the four D pins of Q4 are short-connected to the V2 pin of T1, the V1 and V3 pins of T1 are short-connected, the V2 and V4 pins of T1 are short-connected, the Y1 and Y3 pins of T1 are short-connected and then connected to one end of R18 and pin 1 of P2, the Y4 and Y2 pins of T1 are short-connected and then connected to the other end of R18 and pin 2 of P2.

[0018] In a preferred example, the present invention can be further configured as follows: a start button, a pause button and a stop button are set on one part of the channel to control the output of electrical stimulation; an increase and decrease button of the stimulation current is set to control the output of current intensity, and the text displays the working status, stimulation / rest status, treatment time and remaining time of channel one, and the parameters of channel one also display the stimulation frequency, pulse width, rise time, fall time, stimulation time and rest time through text; a start button, a pause button and a stop button are set on the second part of the channel to control the output of electrical stimulation; an increase and decrease button of the stimulation current is set to control the output of current intensity, and the text displays the working status, stimulation / rest status, treatment time and remaining time of channel two, and the parameters of channel two also display the stimulation frequency, pulse width, rise time, fall time, stimulation time and rest time through text; the sliding buttons for stimulation frequency, pulse width, rise time, fall time, stimulation time and rest time are set on the interface of channel one; the same is true for channel two.

[0019] A processing method for a right median nerve electrical stimulator, including a main program flow chart design of a lower computer, a main program flow of a software design, and a software design program flow of a host computer;

[0020] The main program flow chart design of the lower computer includes the following steps:

[0021] A1: Start;

[0022] A2: System initialization;

[0023] A3: Serial port screen display;

[0024] A4: Parameter setting;

[0025] A5: Is the current intensity correct? If yes, proceed to the next step; if not, return to the parameter setting step;

[0026] A6: Electrical parameter output;

[0027] A7: End;

[0028] The main program flow of the software design of the lower computer includes the following steps:

[0029] B1: Start;

[0030] B2: Initialization of each unit;

[0031] B3: Parameters reset to zero;

[0032] B4: Send enable signal to MP1517;

[0033] B5: Determine whether the channel is in working state. If yes, proceed to the next step; if no, proceed to this step again;

[0034] B6: Determine whether the host computer has received the data from the microcontroller? If yes, proceed to the next step; if not, proceed to this step again;

[0035] B7: MCU receives data from host computer;

[0036] B8: DAC output;

[0037] The main program flow of the software design of the host computer includes the following steps:

[0038] C1: Start;

[0039] C2: Initialization;

[0040] C3: Determine whether there are complete instructions in the instruction queue. If yes, proceed to the next stage; if not, proceed to this judgment stage again;

[0041] C4: Parsing instructions;

[0042] C5: control update instructions, screen switching instructions and coordinate touch instructions;

[0043] C6: The instruction has been processed;

[0044] C7: Enter again to determine whether there is a complete instruction link in the instruction queue and process the next instruction.

[0045] Compared with the prior art, the present invention has the following beneficial effects:

[0046] Compared with the prior art, the output parameters of the stimulation current in the present invention can be adjusted, which is highly safe and avoids electric burns; the operating parameters can be set through the touch screen, which is simple to operate and easy to use; and the current output time is adjustable, and the output time can be observed from the screen when the stimulation current is output; the design of the serial port screen combined with the stimulation panel makes the volume smaller and improves portability. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 is a general connection block diagram of the power supply circuit in the present invention;

[0048] Figure 2 It is the circuit diagram on the left side of STM32F103CCT6 in the present invention;

[0049] Figure 3 It is the schematic diagram of the right circuit of STM32F103CCT6 in the present invention;

[0050] Figure 4 It is a circuit diagram of the serial port screen protection circuit and the connection circuit in the present invention;

[0051] Figure 5 is a circuit diagram of the I2C storage circuit in the present invention;

[0052] Figure 6 A circuit diagram of an indicator light circuit in the present invention;

[0053] Figure 7 This is a circuit diagram of the enable signal and 16.5V power input circuit of the stimulation circuit A in the present invention;

[0054] Figure 8 This is a current output circuit diagram of stimulation circuit A in the present invention;

[0055] Fig. 9 This is a circuit diagram of the B-path enable signal and 16.5V power input circuit of the stimulation circuit in the present invention;

[0056] Fig.10 This is a current output circuit diagram of stimulation circuit B in the present invention;

[0057] Fig.11 It is a design diagram for the touch screen control in the present invention;

[0058] Fig.12 It is the main program flow chart of the present invention;

[0059] Fig.13 It is the main program flow chart of the single chip microcomputer in the present invention;

[0060] Fig.14 This is a flow chart of the communication program between the serial port screen and the single-chip microcomputer in the present invention. DETAILED DESCRIPTION

[0061] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0062] In the description of the present application, it should be noted that the terms "upper", "lower", "inside", "outside", "top / bottom" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0063] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "provided with", "set / connected", "connected", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0064] See also Figure 1-14 , an embodiment provided by the present invention: a right median nerve electrical stimulator and processing method, including a host computer and a slave computer, the host computer includes a serial port screen, the serial port screen includes a main interface, channel one and channel two, the slave computer includes a main control unit circuit and an electrode sheet, the main control unit circuit includes an STM32F373CCT6 circuit, a power supply circuit, a serial port screen display circuit, a channel isolation circuit, an I2C communication storage circuit, an indicator light circuit and a stimulation circuit; the output end of the power supply circuit is connected to the power input end of the host, the other control signal ends of the main control unit are respectively connected to the input end of the serial port screen and the input end of the stimulation circuit, the output end of the stimulation circuit is connected to the electrode sheet, and the power supply circuit adopts a 12V power converter output, The power input end of the host is the input end of the two step-down modules, and the output end of the 12V power converter is connected to the input ends of the two step-down modules. The output end of one of the step-down modules outputs a 5V voltage to power components such as the digital isolation chip and the serial port screen. The output end of the other step-down module is divided into two paths, one is connected to the boost chip output power supply 16.5V, and the other is connected to the step-down chip output 3.3V. The serial port screen is connected to the STM32F373CCT6 chip for communication. The stimulation circuit includes stimulation circuit A and stimulation circuit B. The stimulation parameter command of the stimulation circuit at least includes stimulation parameter information of stimulation frequency, stimulation pulse width, stimulation intensity, treatment time, rise time, fall time and rest time.

[0065] See also Figure 2 and Figure 3The main control unit circuit includes STM32F373CCT6 chip U5, resistor R35, resistor R36, resistor R37, capacitor C28, 4P straight pin plug J3, resistor R16, capacitor C23, capacitor C32, capacitor C11, capacitor C25, capacitor C17, capacitor C16, capacitor C29, capacitor C30 and crystal oscillator Y1; the PA2 pin of U5 is connected to the anode of R35, C28 and D13, the cathode of D13 is connected to VCC3_3D, the other end of R35 is connected to R36, R37, the other end of C28 is connected to DGND and R37, the other end of R36 is connected to 16.5V, the other end of R37 is connected to DGND and C28, the VCC pin of J3 is connected to VCC3_3D, and the SWDIO pin of J3 is connected to VCC3_3D. The pin is connected to the PA13 pin of the STM32F373CCT6 microcontroller, the SWCLK pin of J3 is connected to the PA14 pin of the STM32F373CCT6 microcontroller, the GND pin of J3 is connected to DGND, one end of R16 is connected to DGND, and the other end is connected to the BOOT0 pin of the STM32F373CCT6 microcontroller, one end of C23 is connected to DGND, and the other end is connected to VCC3_3D and the VBAT pin of the STM32F373CCT6 microcontroller, one end of C32 is connected to AGND, and the other end is connected to 2_5VREF and the VDDA / VREF+ pin of the STM32F373CCT6 microcontroller, and the VSSA / VREF- pin of the STM32F373CCT6 microcontroller is connected to A GND, one end of C11 and C25 is connected to VCC3_3D and the VDD_1 pin of the STM32F373CCT6 microcontroller, and the other end is connected to DGND and the VSS_2 pin of the STM32F373CCT6 microcontroller. One end of the VDD_2 pin of the STM32F373CCT6 microcontroller is connected to the VDD_1 pin of the STM32F373CCT6 microcontroller, and the other end is connected to C25. The VSSSD / VREFSD- pin of the STM32F373CCT6 microcontroller is connected to AGND. One end of C17 is connected to VDDA and the VSSD pin of the STM32F373CCT6 microcontroller, and the other end is connected to the VSSSD / VREFSD- pin and AGND. One end of C16 is connected to 2 _5VREF and the VREFSD+ pin of the STM32F373CCT6 microcontroller, and the other end is connected to C17, VSSSD / VREFSD- pin and AGND, one end of Y1 is connected to the PF0 / OSC_IN pin of the STM32F373CCT6 microcontroller and C29, and the other end is connected to the PF1 / OSC_OUT pin of the STM32F373CCT6 microcontroller and C30, one end of C29 is connected to the PF0 / OSC_IN pin of the STM32F373CCT6 microcontroller and Y1, and the other end is connected to DGND and C30, one end of C30 is connected to the PF1 / OSC_OUT pin of the STM32F373CCT6 microcontroller and Y1, and the other end is connected to DGND and C29.

[0066] See also Figure 4 The channel isolation circuit includes a dual-channel digital isolator chip U2, capacitor C4, capacitor C8, and a 4P straight pin plug J1; the GND1 pin of U2 is connected to ISO_GND, one end of C4 is connected to the VDD1 pin of U2, and the other end is connected to ISO_GND and the GND1 pin of U2, the VCC pin of J1 is connected to ISO_5V and the VDD1 pin of U2, the RX pin of J1 is connected to the VIB pin of U2, the TX pin of J1 is connected to the VOA pin of U2, and the GND pin of J1 is connected to ISO_GND.

[0067] See also Figure 5 The I2C communication storage circuit includes a communication storage chip U6, a capacitor C22, a resistor R19, and a resistor R22; A0, A1, A2 and GND pins of U6 are connected to DGND, the VCC pin of U6 is connected to VCC3_3D, one end of C22 is connected to VCC3_3D and the VCC pin of U6, and the other end is connected to the WP pin of U6 and then to DGND, one end of R19 is connected to VCC3_3D and R22, and the other end is connected to the SCL pin of U6 and the PB6 pin of the STM32F373CCT6 microcontroller, one end of R22 is connected to VCC3_3D and R19, and the other end is connected to the SDA pin of U6 and the PB7 pin of the STM32F373CCT6 microcontroller.

[0068] See also Figure 6The indicator light circuit includes a stimulation indicator light D7, a feedback indicator light D6, a working indicator light D5, a fault indicator light D3, a serial port frame indicator light D2, a resistor R14, a resistor R13, a resistor R12, a resistor R8, and a resistor R7; the VCC3_3D power supply output by the buck circuit is connected to one end of R14, R13, R12, R8, and R7 respectively, the other end of R14 is connected to the anode of D7, the cathode of D7 is connected to the PB0 pin of the STM32F373CCT6 microcontroller, the other end of R13 is connected to the anode of D6, the cathode of D6 is connected to the PB1 pin of the STM32F373CCT6 microcontroller, the other end of R12 is connected to the anode of D5, the cathode of D5 is connected to the PB2 pin of the STM32F373CCT6 microcontroller, the other end of R8 is connected to the anode of D3, and the cathode of D3 is connected to the STM32F373CCT6 microcontroller. The other end of R7 is connected to the PB2 pin of the CT6 microcontroller, and the cathode of D2 is connected to the PB3 pin of the STM32F373CCT6 microcontroller. The stimulation circuit A includes capacitor C54, inductor L7, capacitor C42, P-MOS tube Q7, resistor R34, resistor R33, NPN transistor Q5, resistor R30, resistor R29, NPN transistor Q6, resistor R32, resistor R28, 2P90 degree long bent pin socket P3, resistor R44, transformer T2, capacitor C50, Schottky diode D17, transient suppression diode D16, transient suppression diode D18, capacitor C20, diode D8, resistor R43, operational amplifier U10A, capacitor C55, resistor R48, P-MOS tube Q8, resistor R49, resistor R46, resistor R40, and operational amplifier U10B.

[0069] See also Figure 7 and Figure 8 The stimulation circuit A includes capacitor C54, inductor L7, capacitor C42, P-MOS tube Q7, resistor R34, resistor R33, NPN transistor Q5, resistor R30, resistor R29, NPN transistor Q6, resistor R32, resistor R28, 2P90 degree long curved pin socket P3, resistor R44, transformer T2, capacitor C50, Schottky diode D17, transient suppression diode D16, transient suppression diode D18, capacitor C20, diode D8, resistor R43, operational amplifier U10A, capacitor C55, resistor R48, P-MOS tube Q8, resistor R49, resistor R46, resistor R40, and operational amplifier U10B.

[0070] See also Figure 7 and Figure 8, one end of the stimulation circuit A is connected to 16.5V and L7 through C54, and the other end is connected to DGND, one end of L7 is connected to 16.5V and C54, and the other end is connected to C42, R33 and the drain pin of Q7, one end of C42 is connected to the drain pin of L7, R33 and Q7, and the other end is connected to DGND, one end of R33 is connected to the drain pin of C42, L7 and Q7, and the other end is connected to R34 and the collector pin of Q5, one end of R29 is connected to VCC3_3D, and the other end is connected to R30 and the collector pin of Q6, one end of R30 is connected to R29 and the collector pin of Q6, and the other end is connected to the base pin of Q5, The emitter pin of Q5 is connected to R32, the emitter pin of Q6 and DGND, the ENA2 output terminal of the PB4 pin of the STM32F373CCT6 microcontroller is connected to R28, the other end of R28 is connected to the base pin of Q6 and R32, one end of R32 is connected to R28 and the base pin of Q6, and the other end is connected to the emitter pin of Q6, DGND and the emitter pin of Q5, the anode of D16 is connected to DGND, the cathode is connected to the cathode of D17, C50, and the input pin V1 of T2, the anode of D18 is connected to DGND, the cathode is connected to the anode of D17, C50, and the input pin V2 of T2, U10 The in-phase input terminal of A is connected to R43, the other end of R43 is connected to the anode of D8 and the DAC2 output terminal of the PA5 pin of the STM32F373CCT6 microcontroller, the cathode of D8 is connected to VCC3_3D, the V+ terminal of U10A is connected to the power supply 16.5V and C20, the other end of C20 is connected to DGND, the V- terminal of U10A is connected to DGND, the output terminal of U10A is connected to C55 and R48, the out-of-phase input terminal of U10A is connected to C55 and R46, the other end of R46 is connected to the in-phase input terminal of U10B, R40 and the S terminal of Q8, the other end of R40 is connected to DGND, the input terminal of U10B is connected to C55 and R48, the out-of-phase input terminal of U10A is connected to C55 and R46, the other end of R46 is connected to the in-phase input terminal of U10B, R40 and the S terminal of Q8, the other end of R40 is connected to DGND, the output ... The output terminal is connected to the out-of-phase input terminal of U10B and the ADC0 output terminal of the PA0 pin of the STM32F373CCT6 microcontroller, the G terminal of Q8 is connected to R48 and R49, the other end of R49 is connected to DGND, the three S pins of Q8 are short-connected to R46, R40 and the in-phase input terminal of U10B, the four D pins of Q8 are short-connected to the V2 pin of T2, the V1 and V3 pins of T2 are short-connected, the V2 and V4 pins of T2 are short-connected, the Y1 and Y3 pins of T2 are short-connected and then connected to one end of R44 and pin 1 of P3, the Y4 and Y2 pins of T2 are short-connected and then connected to the other end of R44 and pin 2 of P3.

[0071] See also Fig. 9 and Fig.10Stimulation circuit B includes operational amplifier U7B, resistor R15, resistor R21, P-MOS tube Q4, resistor R24, resistor R25, capacitor C35, operational amplifier U7A, resistor R17, diode D10, capacitor C34, transient suppression diode D4, transient suppression diode D14, Schottky diode D9, capacitor C24, transformer T1, resistor R18, 2P90 degree long bent pin socket P2, P-MOS tube Q3, resistor R11, resistor R10, NPN transistor Q1, resistor R6, resistor R5, NPN transistor Q2, resistor R9, resistor R4, capacitor C21, inductor L4, and capacitor C41.

[0072] See also Fig. 9 and Fig.10, the stimulation circuit B route C41 has one end connected to 16.5V and L4, and the other end connected to DGND, L4 has one end connected to 16.5V and C41, and the other end connected to C21, R10 and the drain pin of Q3, C21 has one end connected to L4, R10 and the drain pin of Q3, and the other end connected to DGND, R10 has one end connected to C21, L4 and the drain pin of Q3, and the other end connected to R11 and the collector pin of Q1, R5 has one end connected to VCC3_3D, and the other end connected to R6 and the collector pin of Q2, R6 has one end connected to R5 and the collector pin of Q2, and the other end connected to the base pin of Q1 , the emitter pin of Q1 is connected to R9, the emitter pin of Q2 and DGND, the ENA1 output terminal of the PB3 pin of the STM32F373CCT6 microcontroller is connected to R4, the other end of R4 is connected to the base pin of Q2 and R9, one end of R9 is connected to R4 and the base pin of Q2, and the other end is connected to the emitter pin of Q2, DGND and the emitter pin of Q1, the anode of D4 is connected to DGND, the cathode is connected to the cathode of D9, C24, and the input pin V1 of T1, the anode of D14 is connected to DGND, the cathode is connected to the anode of D9, C24, and the input pin V2 of T1, and the in-phase of U7A The input terminal is connected to R17, and the other end of R17 is connected to the anode of D10 and the DAC1 output terminal of the PA4 pin of the STM32F373CCT6 microcontroller. The cathode of D10 is connected to VCC3_3D. The V+ terminal of U7A is connected to the power supply 16.5V and C34, and the other end of C34 is connected to DGND. The V- terminal of U7A is connected to DGND. The output terminal of U7A is connected to C35 and R24. The out-of-phase input terminal of U7A is connected to C35 and R21. The other end of R21 is connected to the in-phase input terminal of U7B, R15 and the S end of Q4. The other end of R15 is connected to DGND. The output terminal of U7B is connected to The out-of-phase input terminal of U7B and the ADC1 output terminal of the PA1 pin of the STM32F373CCT6 microcontroller, the G terminal of Q4 is connected to R24 and R25, the other end of R25 is connected to DGND, the three S pins of Q4 are short-connected to R21, R15 and the in-phase input terminal of U7B, the four D pins of Q4 are short-connected to the V2 pin of T1, the V1 and V3 pins of T1 are short-connected, the V2 and V4 pins of T1 are short-connected, the Y1 and Y3 pins of T1 are short-connected and then connected to one end of R18 and pin 1 of P2, the Y4 and Y2 pins of T1 are short-connected and then connected to the other end of R18 and pin 2 of P2.

[0073] See also Fig.11, the start button, pause button and stop button are set to control the electrical stimulation output in one part of the channel; the increase and decrease buttons of the stimulation current are set to control the current intensity output, and the text displays the working status, stimulation / rest status, treatment time and remaining time of channel one, and the parameters of channel one are also displayed through texts such as stimulation frequency, pulse width, rise time, fall time, stimulation time and rest time; the start button, pause button and stop button are set to control the electrical stimulation output; the increase and decrease buttons of the stimulation current are set to control the current intensity output, and the text displays the working status, stimulation / rest status, treatment time and remaining time of channel two, and the parameters of channel two are also displayed through texts such as stimulation frequency, pulse width, rise time, fall time, stimulation time and rest time; the sliding buttons for stimulation frequency, pulse width, rise time, fall time, stimulation time and rest time are set on the channel one interface; the same is true for channel two.

[0074] A processing method for a right median nerve electrical stimulator, including a main program flow chart design of a lower computer, a main program flow of a software design, and a software design program flow of a host computer;

[0075] See also Fig.12 , the main program flow chart design of the lower computer includes the following steps:

[0076] A1: Start;

[0077] A2: System initialization;

[0078] A3: Serial port screen display;

[0079] A4: Parameter setting;

[0080] A5: Is the current intensity correct? If yes, proceed to the next step; if not, return to the parameter setting step;

[0081] A6: Electrical parameter output;

[0082] A7: End;

[0083] See also Fig.13 ,The main program flow of the software design of the lower computer includes the following steps:

[0084] B1: Start;

[0085] B2: Initialization of each unit;

[0086] B3: Parameters reset to zero;

[0087] B4: Send enable signal to MP1517;

[0088] B5: Determine whether the channel is in working state. If yes, proceed to the next step; if no, proceed to this step again;

[0089] B6: Determine whether the host computer has received the data from the microcontroller? If yes, proceed to the next step; if not, proceed to this step again;

[0090] B7: MCU receives data from host computer;

[0091] B8: DAC output;

[0092] See also Fig.14 ,The main program flow of the upper computer software design includes the following steps:

[0093] C1: Start;

[0094] C2: Initialization;

[0095] C3: Is there a complete instruction in the instruction queue? If yes, proceed to the next stage; if not, proceed to this judgment stage again;

[0096] C4: Parsing instructions;

[0097] C5: control update instructions, screen switching instructions and coordinate touch instructions;

[0098] C6: instruction processing completed;

[0099] C7: Enter again to determine whether there is a complete instruction in the instruction queue and process the next instruction

[0100] This processing method can control device channel selection, stimulation current intensity, cycle, stimulation waveform frequency, pulse width, rise time, fall time, stimulation time (adjustable in hours and minutes) and rest time, and the buttons can be automatically locked during the stimulation process to prevent accidental touches from affecting the stimulation parameters.

[0101] The power supply in the present invention adopts 12V power converter input, which controls the required signal through the built-in program of ST32F373CCT6 single chip microcomputer; the size of the stimulation pulse is controlled by the DAC of ST32F373CCT6 single chip microcomputer. In this example, the output pulse square wave, the stimulation current intensity is adjusted step by step by 1mA within the range of 0mA to 90mA, the stimulation frequency is adjusted step by step by 1Hz within the range of 1Hz to 160Hz, the pulse width is adjusted step by step by 10us within the range of 20us to 500us, the stimulation time is adjusted step by step by 1S within the range of 1S to 60S, the rest time is adjusted step by step by 1S within the range of 1S to 60S, the rise time is adjusted step by step by 1S within the range of 0S to 5S, the fall time is adjusted step by step by 1S within the range of 0S to 5S, the treatment time hour is adjusted step by step by 1h within the range of 0h to 10h, and the treatment time minute is adjusted step by step by 1min within the range of 5min to 59min.

[0102] The right median nerve electrical stimulator is an independent handheld device powered by a 12V power converter. The device is controlled by touch screen button input to control the intensity, pulse width and frequency of the output stimulation current. The display is displayed by a 7-inch serial port screen. The serial port screen is equipped with channel switching button selection, channel start button, stimulation current intensity control button, stimulation frequency control button, pulse width control button, stimulation time control button, rest time control button, rise time control button, fall time control button, treatment time hour control button, treatment time minute control button, parameter setting save button, etc. The screen displays the stimulation current intensity, working status, treatment time, remaining time, communication status, system startup prompt, and the parameters of the stimulation current frequency, pulse width, rise time, fall time and stimulation time in the channel. It is very convenient and intuitive to use.

[0103] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A right median nerve electrical stimulator, including a host computer and a slave computer, Features: The host computer includes a serial port screen, which includes a main interface, channel one and channel two. The slave computer includes a main control unit circuit and an electrode sheet. The main control unit circuit includes an STM32F373CCT6 circuit, a power supply circuit, a serial port screen display circuit, a channel isolation circuit, an I2C communication storage circuit, an indicator light circuit and a stimulation circuit. The output end of the power supply circuit is connected to the power input end of the host, and the other control signal ends of the main control unit are respectively connected to the input end of the serial port screen and the input end of the stimulation circuit. The output end of the stimulation circuit is connected to the electrode sheet. The power supply circuit adopts a 12V power converter output, and the power input end of the host is the input end of two step-down modules. The output end of the 12V power converter is connected to the input ends of two step-down modules, wherein the output end of one of the step-down modules outputs a 5V voltage to power components such as a digital isolation chip and a serial port screen, and the output end of the other step-down module is divided into two paths, one of which is connected to the boost chip output power supply 16.5V, and the other is connected to the step-down chip output 3.3V. The serial port screen is communicatively connected to the STM32F373CCT6 chip, and the stimulation circuit includes a stimulation circuit A and a stimulation circuit B. The stimulation parameter command of the stimulation circuit at least includes stimulation parameter information of stimulation frequency, stimulation pulse width, stimulation intensity, treatment time, rise time, fall time and rest time.

2. A right median nerve electrical stimulator according to claim 1, Features: The main control unit circuit includes an STM32F373CCT6 chip U5, a resistor R35, a resistor R36, a resistor R37, a capacitor C28, a 4P straight pin plug J3, a resistor R16, a capacitor C23, a capacitor C32, a capacitor C11, a capacitor C25, a capacitor C17, a capacitor C16, a capacitor C29, a capacitor C30 and a crystal oscillator Y1, the PA2 pin of U5 is connected to the anode of R35, C28 and D13, the cathode of D13 is connected to VCC3_3D, the other end of R35 is connected to R36 and R37, the other end of C28 is connected to DGND and R37, the other end of R36 is connected to 16.5V, the other end of R37 is connected to DGND and C28, the VCC pin of J3 is connected to VCC3_3D, and the SWDIO of J3 is connected to VCC3_3D. The pin is connected to the PA13 pin of the STM32F373CCT6 microcontroller, the SWCLK pin of J3 is connected to the PA14 pin of the STM32F373CCT6 microcontroller, the GND pin of J3 is connected to DGND, one end of R16 is connected to DGND, and the other end is connected to the BOOT0 pin of the STM32F373CCT6 microcontroller, one end of C23 is connected to DGND, and the other end is connected to VCC3_3D and the VBAT pin of the STM32F373CCT6 microcontroller, one end of C32 is connected to AGND, and the other end is connected to 2_5VREF and the VDDA / VREF+ pin of the STM32F373CCT6 microcontroller, and the VSSA / VREF- pin of the STM32F373CCT6 microcontroller is connected to AGND, one end of C11 and C25 is connected to VCC3_3D and the VDD_1 pin of the STM32F373CCT6 microcontroller, and the other end is connected to DGND and the VSS_2 pin of the STM32F373CCT6 microcontroller. One end of the VDD_2 pin of the STM32F373CCT6 microcontroller is connected to the VDD_1 pin of the STM32F373CCT6 microcontroller, and the other end is connected to C25. The VSSSD / VREFSD- pin of the STM32F373CCT6 microcontroller is connected to AGND. One end of C17 is connected to VDDA and the VSSD pin of the STM32F373CCT6 microcontroller, and the other end is connected to the VSSSD / VREFSD- pin and AGND. One end of C16 is connected 2_5VREF and the VREFSD+ pin of the STM32F373CCT6 microcontroller, and the other end is connected to C17, VSSSD / VREFSD- pin and AGND, one end of Y1 is connected to the PF0 / OSC_IN pin of the STM32F373CCT6 microcontroller and C29, and the other end is connected to the PF1 / OSC_OUT pin of the STM32F373CCT6 microcontroller and C30, one end of C29 is connected to the PF0 / OSC_IN pin of the STM32F373CCT6 microcontroller and Y1, and the other end is connected to DGND and C30, one end of C30 is connected to the PF1 / OSC_OUT pin of the STM32F373CCT6 microcontroller and Y1, and the other end is connected to DGND and C29.

3. A right median nerve electrical stimulator according to claim 2, Features: The channel isolation circuit includes a dual-channel digital isolator chip U2, a capacitor C4, a capacitor C8, and a 4P straight pin plug J1. The GND1 pin of U2 is connected to ISO_GND, one end of C4 is connected to the VDD1 pin of U2, and the other end is connected to ISO_GND and the GND1 pin of U2. The VCC pin of J1 is connected to ISO_5V and the VDD1 pin of U2. The RX pin of J1 is connected to the VIB pin of U2, the TX pin of J1 is connected to the VOA pin of U2, and the GND pin of J1 is connected to ISO_GND.

4. A right median nerve electrical stimulator according to claim 3, Features: The I2C communication storage circuit includes a communication storage chip U6, a capacitor C22, a resistor R19, and a resistor R22. A0, A1, A2 and GND pins of U6 are connected to DGND, a VCC pin of U6 is connected to VCC3_3D, one end of C22 is connected to VCC3_3D and the VCC pin of U6, and the other end is connected to the WP pin of U6 and then to DGND, one end of R19 is connected to VCC3_3D and R22, and the other end is connected to the SCL pin of U6 and the PB6 pin of the STM32F373CCT6 microcontroller, one end of R22 is connected to VCC3_3D and R19, and the other end is connected to the SDA pin of U6 and the PB7 pin of the STM32F373CCT6 microcontroller.

5. A right median nerve electrical stimulator according to claim 4, Features: The indicator light circuit includes a stimulation indicator light D7, a feedback indicator light D6, a working indicator light D5, a fault indicator light D3, a serial port frame indicator light D2, a resistor R14, a resistor R13, a resistor R12, a resistor R8, and a resistor R7. The VCC3_3D power supply output by the step-down circuit is respectively connected to one end of R14, R13, R12, R8 and R7, the other end of R14 is connected to the anode of D7, the cathode of D7 is connected to the PB0 pin of the STM32F373CCT6 single-chip microcomputer, the other end of R13 is connected to the anode of D6, the cathode of D6 is connected to the PB1 pin of the STM32F373CCT6 single-chip microcomputer, the other end of R12 is connected to the anode of D5, the cathode of D5 is connected to the PB2 pin of the STM32F373CCT6 single-chip microcomputer, the other end of R8 is connected to the anode of D3, and the cathode of D3 is connected to the STM32F373CCT6 single-chip microcomputer. The other end of R7 is connected to the PB2 pin of the CT6 microcontroller, and the cathode of D2 is connected to the PB3 pin of the STM32F373CCT6 microcontroller. The stimulation circuit A includes capacitor C54, inductor L7, capacitor C42, P-MOS tube Q7, resistor R34, resistor R33, NPN transistor Q5, resistor R30, resistor R29, NPN transistor Q6, resistor R32, resistor R28, 2P90 degree long bent needle socket P3, resistor R44, transformer T2, capacitor C50, Schottky diode D17, transient suppression diode D16, transient suppression diode D18, capacitor C20, diode D8, resistor R43, operational amplifier U10A, capacitor C55, resistor R48, P-MOS tube Q8, resistor R49, resistor R46, resistor R40, and operational amplifier U10B.

6. A right median nerve electrical stimulator according to claim 5, Features: The stimulation circuit A includes capacitor C54, inductor L7, capacitor C42, P-MOS tube Q7, resistor R34, resistor R33, NPN transistor Q5, resistor R30, resistor R29, NPN transistor Q6, resistor R32, resistor R28, 2P90 degree long curved needle socket P3, resistor R44, transformer T2, capacitor C50, Schottky diode D17, transient suppression diode D16, transient suppression diode D18, capacitor C20, diode D8, resistor R43, operational amplifier U10A, capacitor C55, resistor R48, P-MOS tube Q8, resistor R49, resistor R46, resistor R40, and operational amplifier U10B.

7. A right median nerve electrical stimulator according to claim 6, Features: The stimulation circuit A is connected by connecting one end of C54 to 16.5V and L7, and the other end to DGND; one end of L7 is connected to 16.5V and C54, and the other end to the drain pin of C42, R33 and Q7; one end of C42 is connected to the drain pin of L7, R33 and Q7, and the other end to DGND; one end of R33 is connected to the drain pin of C42, L7 and Q7, and the other end to the collector pin of R34 and Q5; one end of R29 is connected to VCC3_3D, and the other end to the collector pin of R30 and Q6; one end of R30 is connected to R29 and the collector pin of Q6, and the other end to the base pin of Q5 pin, the emitter pin of Q5 is connected to R32, the emitter pin of Q6 and DGND, the ENA2 output terminal of the PB4 pin of the STM32F373CCT6 microcontroller is connected to R28, the other end of R28 is connected to the base pin of Q6 and R32, one end of R32 is connected to R28 and the base pin of Q6, and the other end is connected to the emitter pin of Q6, DGND and the emitter pin of Q5, the anode of D16 is connected to DGND, the cathode is connected to the cathode of D17, C50, and the input pin V1 of T2, the anode of D18 is connected to DGND, the cathode is connected to the anode of D17, C50, and the input pin V2 of T2, U1 The in-phase input terminal of U10A is connected to R43, the other end of R43 is connected to the anode of D8 and the DAC2 output terminal of the PA5 pin of the STM32F373CCT6 microcontroller, the cathode of D8 is connected to VCC3_3D, the V+ terminal of U10A is connected to the power supply 16.5V and C20, the other end of C20 is connected to DGND, the V- terminal of U10A is connected to DGND, the output terminal of U10A is connected to C55 and R48, the out-of-phase input terminal of U10A is connected to C55 and R46, the other end of R46 is connected to the in-phase input terminal of U10B, R40 and the S terminal of Q8, the other end of R40 is connected to DGND, the input terminal of U10B is connected to C55 and R48, the out-of-phase input terminal of U10A is connected to C55 and R46, the other end of R46 is connected to the in-phase input terminal of U10B, R40 and the S terminal of Q8, the other end of R40 is connected to DGND, the output ... The output terminal is connected to the out-of-phase input terminal of U10B and the ADC0 output terminal of the PA0 pin of the STM32F373CCT6 microcontroller, the G terminal of Q8 is connected to R48 and R49, the other end of R49 is connected to DGND, the three S pins of Q8 are short-connected to R46, R40 and the in-phase input terminal of U10B, the four D pins of Q8 are short-connected to the V2 pin of T2, the V1 and V3 pins of T2 are short-connected, the V2 and V4 pins of T2 are short-connected, the Y1 and Y3 pins of T2 are short-connected and then connected to one end of R44 and pin 1 of P3, the Y4 and Y2 pins of T2 are short-connected and then connected to the other end of R44 and pin 2 of P3.

8. A right median nerve electrical stimulator according to claim 7, Features: The stimulation circuit B includes operational amplifier U7B, resistor R15, resistor R21, P-MOS tube Q4, resistor R24, resistor R25, capacitor C35, operational amplifier U7A, resistor R17, diode D10, capacitor C34, transient suppression diode D4, transient suppression diode D14, Schottky diode D9, capacitor C24, transformer T1, resistor R18, 2P90 degree long bent pin socket P2, P-MOS tube Q3, resistor R11, resistor R10, NPN transistor Q1, resistor R6, resistor R5, NPN transistor Q2, resistor R9, resistor R4, capacitor C21, inductor L4, and capacitor C41.

9. A right median nerve electrical stimulator according to claim 8, Features: The stimulation circuit B is routed such that one end of C41 is connected to 16.5V and L4, and the other end is connected to DGND, one end of L4 is connected to 16.5V and C41, and the other end is connected to the drain pin of C21, R10 and Q3, one end of C21 is connected to the drain pin of L4, R10 and Q3, and the other end is connected to DGND, one end of R10 is connected to the drain pin of C21, L4 and Q3, and the other end is connected to the collector pin of R11 and Q1, one end of R5 is connected to VCC3_3D, and the other end is connected to the collector pin of R6 and Q2, one end of R6 is connected to the collector pin of R5 and Q2, and the other end is connected to the base of Q1 The emitter pin of Q1 is connected to R9, the emitter pin of Q2 and DGND, the ENA1 output terminal of the PB3 pin of the STM32F373CCT6 microcontroller is connected to R4, the other end of R4 is connected to the base pin of Q2 and R9, one end of R9 is connected to R4 and the base pin of Q2, and the other end is connected to the emitter pin of Q2, DGND and the emitter pin of Q1, the anode of D4 is connected to DGND, the cathode is connected to the cathode of D9, C24, and the input pin V1 of T1, the anode of D14 is connected to DGND, the cathode is connected to the anode of D9, C24, and the input pin V2 of T1, and the same as U7A. The phase input terminal is connected to R17, and the other end of R17 is connected to the anode of D10 and the DAC1 output terminal of the PA4 pin of the STM32F373CCT6 microcontroller. The cathode of D10 is connected to VCC3_3D. The V+ terminal of U7A is connected to the power supply 16.5V and C34, and the other end of C34 is connected to DGND. The V- terminal of U7A is connected to DGND. The output terminal of U7A is connected to C35 and R24. The out-of-phase input terminal of U7A is connected to C35 and R21. The other end of R21 is connected to the in-phase input terminal of U7B, R15 and the S end of Q4. The other end of R15 is connected to DGND. The output terminal of U7B is connected to The out-of-phase input terminal of U7B and the ADC1 output terminal of the PA1 pin of the STM32F373CCT6 microcontroller, the G terminal of Q4 is connected to R24 and R25, the other end of R25 is connected to DGND, the three S pins of Q4 are short-connected to R21, R15 and the in-phase input terminal of U7B, the four D pins of Q4 are short-connected to the V2 pin of T1, the V1 and V3 pins of T1 are short-connected, the V2 and V4 pins of T1 are short-connected, the Y1 and Y3 pins of T1 are short-connected and then connected to one end of R18 and pin 1 of P2, the Y4 and Y2 pins of T1 are short-connected and then connected to the other end of R18 and pin 2 of P2.

10. A right median nerve electrical stimulator according to claim 9, Features: One part of the channel is equipped with a start button, a pause button and a stop button to control the output of electrical stimulation, and the increase and decrease buttons of the stimulation current are set to control the output of the current intensity. The text displays the working status, stimulation / rest status, treatment time and remaining time of channel one, and the parameters of channel one also display the stimulation frequency, pulse width, rise time, fall time, stimulation time and rest time through text. The second part of the channel is equipped with a start button, a pause button and a stop button to control the output of electrical stimulation, and the increase and decrease buttons of the stimulation current are set to control the output of the current intensity. The text displays the working status, stimulation / rest status, treatment time and remaining time of channel two, and the parameters of channel two also display the stimulation frequency, pulse width, rise time, fall time, stimulation time and rest time through text. The channel one interface sets sliding buttons for the stimulation frequency, pulse width, rise time, fall time, stimulation time and rest time, and the same is true for channel two.

11. A processing method for a right median nerve electrical stimulator, based on the right median nerve electrical stimulator according to claim 10, It is characterized in that Including the main program flow chart design of the lower computer, the main program flow of software design and the software design program flow of the upper computer; The main program flow chart design of the lower computer includes the following steps: A1: Start; A2: System initialization; A3: Serial port screen display; A4: Parameter setting; A5: Is the current intensity correct? If yes, proceed to the next step; if not, return to the parameter setting step; A6: Electrical parameter output; A7: End; The main program flow of the software design of the lower computer includes the following steps: B1: Start; B2: Initialization of each unit; B3: Parameters reset to zero; B4: Send enable signal to MP1517; B5: Determine whether the channel is in working state. If yes, proceed to the next step; if no, proceed to this step again; B6: Determine whether the host computer has received the data from the microcontroller? If yes, proceed to the next step; if not, proceed to this step again; B7: MCU receives data from host computer; B8: DAC output; The main program flow of the software design of the host computer includes the following steps: C1: Start; C2: Initialization; C3: Is there a complete instruction in the instruction queue? If yes, proceed to the next stage; if not, proceed to this judgment stage again; C4: Parsing instructions; C5: control update instructions, screen switching instructions and coordinate touch instructions; C6: instruction processing completed; C7: Enter again to determine whether there is a complete instruction link in the instruction queue and process the next instruction.

Images