Voltage regulation circuit, BOOST circuit, switching power supply and electronic equipment

Abstract

The invention discloses a voltage regulation circuit, a BOOST circuit, a switching power supply and electronic equipment, and belongs to the technical field of electronic equipment. The voltage regulation circuit is applied to a BOOST circuit and comprises an error operation unit, a pulse width modulation unit and a ramp voltage regulation unit. The ramp voltage adjusting unit can slow down the rising degree of the output voltage and reduce the overshoot voltage of the BOOST circuit by transmitting the third ramp voltage larger than the error amplification voltage to the pulse width modulation unit under the condition that the feedback voltage is larger than the maximum value of the voltage range where the first reference voltage is located. Moreover, under the condition that the feedback voltage is smaller than the minimum value of the voltage range where the first reference voltage is located, the ramp voltage adjusting unit can transmit the first ramp voltage smaller than the error amplification voltage to the pulse width modulation unit, so that the reduction degree of the output voltage is slowed down, the undershoot voltage of the BOOST circuit is reduced, and the output voltage of the BOOST circuit is improved. And the load transient response capability is improved.

Description

Technical Field

[0001] The present application belongs to the technical field of electronic equipment, and specifically relates to a voltage regulation circuit, a BOOST circuit, a switching power supply and electronic equipment. Background Art

[0002] A BOOST circuit is a DC-to-DC converter that can make the output voltage higher than the input voltage. A BOOST circuit is often used in a switching power supply to convert a low-voltage DC power source into a high-voltage direct power source to provide high-voltage electrical energy.

[0003] In actual use, if the load current of the BOOST circuit changes, the output voltage of the BOOST circuit will also change. Under the action of the load transient jump, the process of the output voltage of the BOOST circuit changing from the initial state to the stable state is the load transient response process. Load transient response capability is an important performance of the BOOST circuit.

[0004] However, in order to ensure the overall performance of the BOOST circuit, the bandwidth of the current BOOST circuit is usually small. The quality of the load transient response capability is limited by the bandwidth of the BOOST circuit, which makes the load transient response capability of the current BOOST circuit poor, resulting in large overshoot voltage, large undershoot voltage, and long stable state recovery time under the action of load transient jump. Summary of the invention

[0005] The embodiments of the present application provide a voltage regulation circuit, a BOOST circuit, a switching power supply and an electronic device, which can, to a certain extent, solve the problems of large overshoot voltage, large undershoot voltage and long stable state recovery time in the current BOOST circuit under the action of load transient jump.

[0006] In a first aspect, a voltage regulation circuit is provided, which is applied to a BOOST circuit, and includes: an error calculation unit, a pulse width modulation (PWM) unit, and a slope voltage adjustment unit;

[0007] The error calculation unit is connected to the voltage output terminal of the BOOST circuit and the first input terminal of the PWM unit, and is used to generate an error amplified voltage of the feedback voltage of the voltage output terminal and the first reference voltage, and transmit the error amplified voltage to the first input terminal;

[0008] The slope voltage adjustment unit is connected to the voltage output terminal and the second input terminal of the PWM unit, and is used for transmitting the second slope voltage to the second input terminal when the feedback voltage is within the voltage range where the first reference voltage is located, transmitting the first slope voltage less than the error amplification voltage to the second input terminal when the feedback voltage is less than the minimum value of the voltage range, and transmitting the third slope voltage greater than the error amplification voltage to the second input terminal when the feedback voltage is greater than the maximum value of the voltage range;

[0009] The PWM unit is used to compare the voltages received by the first input terminal and the second input terminal, adjust the duty cycle of the PWM signal, and output the PWM signal, and the PWM signal is used to adjust the output voltage of the BOOST circuit.

[0010] In a second aspect, a BOOST circuit is provided, wherein the BOOST circuit comprises: any voltage regulating circuit described in the first aspect.

[0011] In a third aspect, a switching power supply is provided, wherein the switching power supply comprises: any voltage regulating circuit described in the first aspect, or the BOOST circuit described in the second aspect.

[0012] In a fourth aspect, an electronic device is provided, comprising: the voltage regulating circuit described in any one of the first aspect, or the BOOST circuit described in the second aspect, or the switching power supply described in the third aspect.

[0013] In the voltage regulation circuit, BOOST circuit, switching power supply and electronic device provided by the embodiment of the present application, the voltage regulation circuit includes: an error operation unit, a PWM unit and a ramp voltage adjustment unit. The error operation unit is used to generate the feedback voltage of the voltage output terminal of the BOOST circuit and the error amplified voltage of the first reference voltage, and transmit the error amplified voltage to the first input terminal of the PWM unit. The ramp voltage adjustment unit is used to transmit the second ramp voltage to the second input terminal when the feedback voltage is within the voltage range where the first reference voltage is located, and transmit the first ramp voltage less than the error amplified voltage to the second input terminal when the feedback voltage is less than the minimum value of the voltage range, and transmit the third ramp voltage greater than the error amplified voltage to the second input terminal when the feedback voltage is greater than the maximum value of the voltage range. The PWM unit is used to compare the magnitude of the voltage received at its first input terminal and the second input terminal, adjust the duty cycle of the generated PWM signal Vpwm, and output the PWM signal Vpwm.

[0014] In this technical solution, when the feedback voltage is greater than the maximum value of the voltage range, indicating that the load current has jumped downward and the output voltage of the BOOST circuit has increased instantaneously, the slope voltage adjustment unit can transmit a third slope voltage greater than the error amplification voltage to the PWM unit so that the PWM unit outputs a PWM signal Vpwm with a reduced duty cycle, thereby reducing the output voltage of the BOOST circuit, slowing down the increase in the output voltage, and thereby reducing the overshoot voltage of the BOOST circuit, reducing the recovery time of the output voltage of the BOOST circuit from the initial change state to the stable state, and improving the load transient response capability of the BOOST circuit.

[0015] Similarly, when the feedback voltage is less than the minimum value of the voltage range, indicating that the load current has jumped upward and the output voltage of the BOOST circuit has dropped instantaneously, the slope voltage adjustment unit can transmit a first slope voltage less than the error amplification voltage to the PWM unit so that the PWM unit outputs a PWM signal Vpwm with an increased duty cycle, thereby increasing the output voltage of the BOOST circuit and slowing down the degree of reduction in the output voltage, thereby reducing the undershoot voltage of the BOOST circuit, reducing the recovery time of the output voltage of the BOOST circuit from the initial change state to the stable state, and improving the load transient response capability of the BOOST circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a structural diagram of a BOOST circuit provided by the related technology;

[0017] Figure 2 It is a timing diagram of a BOOST circuit provided by the related technology;

[0018] Figure 3 It is a structural schematic diagram of a BOOST circuit provided in an embodiment of the present application;

[0019] Figure 4 is a structural schematic diagram of another BOOST circuit provided in an embodiment of the present application;

[0020] Figure 5 is a timing diagram of a BOOST circuit provided in an embodiment of the present application;

[0021] Figure 6 is a timing diagram of another BOOST circuit provided in an embodiment of the present application;

[0022] Figure 7 is a structural diagram of another BOOST circuit provided in an embodiment of the present application;

[0023] Figure 8 This is a timing diagram of another BOOST circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0025] A BOOST circuit is a DC-DC converter that can make the output voltage higher than the input voltage. A BOOST circuit is often used in a switching power supply to convert a low-voltage DC power supply into a high-voltage direct power supply to provide high-voltage electrical energy.

[0026] In actual use, if the load current of the BOOST circuit changes, the output voltage of the BOOST circuit will also change. Under the action of the load transient jump, the process of the output voltage of the BOOST circuit changing from the initial state to the stable state is the load transient response process. Load transient response capability is an important performance of the BOOST circuit.

[0027] However, in order to ensure the overall performance of the BOOST circuit, the bandwidth of the current BOOST circuit is usually small. For example, the transfer function G of the BOOST circuit vd (s) Satisfy:

[0028]

[0029] Among them, V g Represents the input voltage of the BOOST circuit. D represents the duty cycle of the BOOST circuit, which refers to the proportion of the conduction time of the switch tube of the BOOST circuit in a switching cycle. R represents the load resistance of the BOOST circuit. C represents the load capacitance of the BOOST circuit. S represents the operating frequency of the BOOST circuit, and its value range is usually [0,1 / 2×T], where T represents the switching frequency of the switch tube of the BOOST circuit. L represents the inductance value.

[0030] The transfer function G of the BOOST circuit vd(s) It can be seen that the BOOST circuit has a right half plane zero RHZ. In order to avoid the influence of the right half plane zero RHZ on the performance of the BOOST circuit, it is usually necessary to set the right half plane zero RHZ at at least ten times the bandwidth of the BOOST circuit. Therefore, the bandwidth of the BOOST circuit is usually small, so as to ensure the effective setting position of the right half plane zero RHZ and effectively reduce the influence of the right half plane zero RHZ on the performance of the BOOST circuit. In addition, for the current mode controlled BOOST circuit, there is a conjugate double pole at half the switching frequency. Therefore, it is also necessary to make the BOOST circuit have a smaller bandwidth to reduce the influence of the conjugate double pole on the circuit performance.

[0031] The quality of load transient response capability is limited by the bandwidth of the BOOST circuit, that is, the smaller bandwidth of the BOOST circuit weakens the load transient response capability of the BOOST circuit. Thus, under the effect of load transient jump, the current BOOST circuit has the problems of large overshoot voltage, large undershoot voltage, and long stable state recovery time.

[0032] For example, please refer to Figure 1 , which shows a schematic diagram of the structure of a BOOST circuit provided by the related art. Figure 1 As shown, the voltage-mode controlled BOOST circuit 1 includes: a voltage conversion circuit 10 and a voltage regulation circuit 20 .

[0033] The voltage conversion circuit 10 includes: an inductor L, a sixth switch tube P6, a fifth switch tube N5, an output capacitor Cout and a load resistor Rload. Among them, the fifth switch tube N5 is an N-type metal-oxide-semiconductor (NMOS). The sixth switch tube P6 is a P-type metal-oxide-semiconductor (PMOS). The current input end of the inductor L is connected to the voltage input end VIN of the BOOST circuit 1 for receiving the input voltage. The current output end of the inductor L is respectively connected to the source of the sixth switch tube P6 and the drain of the fifth switch tube N5. The source of the fifth switch tube N5 is grounded. The drain of the sixth switch tube P6 is connected to the voltage output end VOUT of the BOOST circuit 1 for providing an output voltage to the load. The drain of the sixth switch tube P6 is also connected to one end of the load resistor Rload and one end of the output capacitor Cout, and the other end of the load resistor Rload and the other end of the output capacitor Cout are grounded.

[0034] The voltage regulation circuit 20 includes: a first sampling resistor Rf1, a second sampling resistor Rf2, an error amplifier EA, a PWM comparator and a switch gate driving unit 201. Among them, one end of the first sampling resistor Rf1 is connected to the voltage output terminal VOUT of the BOOST circuit 1, and the other end of the first sampling resistor Rf1 is respectively connected to one end of the second sampling resistor Rf2 and the reverse input terminal of the error amplifier EA. The other end of the second sampling resistor Rf2 is grounded. The first sampling resistor Rf1 and the second sampling resistor Rf2 are connected in series to collect the output voltage of the voltage output terminal VOUT of the BOOST circuit 1, and according to the resistance values ​​of the first sampling resistor Rf1 and the second sampling resistor Rf2, the output voltage is converted into a feedback voltage Vfb, and the feedback voltage Vfb is transmitted to the error amplifier EA.

[0035] The positive input terminal of the error amplifier EA is used to receive the first reference voltage Vref1. The output terminal of the error amplifier EA is connected to the positive input terminal of the PWM comparator. The error amplifier EA is used to amplify the error between the feedback voltage Vfb and the first reference voltage Vref1 to generate an error amplified voltage Vc, and transmit the error amplified voltage Vc to the PWM comparator.

[0036] The inverting input terminal of the PWM comparator, i.e., the ramp voltage input terminal VRAMP, is used to receive the fourth ramp voltage. The output terminal of the PWM comparator is connected to the switch tube gate drive unit 201. The PWM comparator is used to compare the error amplified voltage Vc and the fourth ramp voltage, adjust the duty cycle of the PWM signal Vpwm according to the comparison result, and transmit the PWM signal Vpwm to the switch tube gate drive unit 201. Among them, the fourth ramp voltage can be a sawtooth wave generated by an oscillator. The larger the duty cycle of the PWM signal Vpwm, the greater the proportion of the error amplified voltage Vc greater than the fourth ramp voltage in a single cycle.

[0037] The switch gate drive unit 201 is also connected to the gate G2 of the sixth switch P6 and the gate G1 of the fifth switch N5. The switch gate drive unit 201 is used to adjust the conduction time of the sixth switch P6 and the fifth switch N5 in a single switching cycle according to the duty cycle of the PWM signal Vpwm, so as to adjust the output voltage of the BOOST circuit 1.

[0038] Please refer to Figure 2 , which shows a timing diagram of each signal in a BOOST circuit. Figure 2 As shown, in Figure 1In the BOOST circuit 1 shown, when the load current Iload of the BOOST circuit jumps upward, for example, when the load current Iload jumps from 1 milliampere (mA) to 50mA, the output voltage Vout of the BOOST circuit will be instantly pulled down, and the feedback voltage Vfb sampled by the first sampling resistor Rf1 and the second sampling resistor Rf2 will also be instantly reduced, and the inductor current of the inductor L (i.e., the output current of the inductor L) ILX will increase. The gap between the feedback voltage Vfb and the first reference voltage Vref1 increases. The error amplification voltage Vc output by the error amplifier EA increases, and the error amplification voltage Vc is greater than the fourth ramp voltage Vramp. Furthermore, the duty cycle of the PWM signal Vpwm output by the PWM comparator increases until the PWM signal Vpwm with the maximum duty cycle is output, so that the BOOST circuit operates at the maximum duty cycle.

[0039] According to the conversion ratio formula of BOOST circuit It can be seen that the output voltage Vout of the BOOST circuit is proportional to the input voltage Vin and the duty cycle D of the PWM signal Vpwm. Therefore, as the duty cycle D of the PWM signal Vpwm increases, the output voltage Vout of the BOOST circuit increases accordingly. As the output voltage Vout increases, the feedback voltage Vfb increases, the error amplification voltage Vc decreases, the duty cycle D of the PWM signal Vpwm decreases, and the output voltage Vout decreases, gradually entering a stable state and stabilizing at the design value of the BOOST circuit.

[0040] Depend on Figure 2 It can be seen that when the load current of the BOOST circuit jumps upward, the output voltage Vout of the BOOST circuit will also jump, and there will be a large undershoot, which makes the BOOST circuit have an undershoot voltage Vundr, and the output voltage Vout of the BOOST circuit has a recovery time Tre21 from the initial change state to the stable state.

[0041] Similarly, when the load current Iload of the BOOST circuit jumps downward, for example, when the load current Iload jumps from 50mA to 1mA, the output voltage Vout of the BOOST circuit will be instantly raised, and the feedback voltage Vfb sampled by the first sampling resistor Rf1 and the second sampling resistor Rf2 will also increase instantly, and the inductor current ILX of the inductor L will decrease. The difference between the feedback voltage Vfb and the first reference voltage Vref1 is reduced. The error amplifier EA outputs the feedback voltage Vfb and the error amplified voltage Vc of the first reference voltage Vref1, and the error amplified voltage Vc is less than the fourth ramp voltage Vramp. Furthermore, the duty cycle of the PWM signal Vpwm output by the PWM comparator decreases until the PWM signal Vpwm with the minimum duty cycle is output, so that the BOOST circuit operates at the minimum duty cycle. As the duty cycle of the PWM signal Vpwm decreases, the output voltage Vout of the BOOST circuit decreases accordingly, the feedback voltage Vfb decreases, and the error amplified voltage Vc increases. As the error amplification voltage Vc increases, the duty cycle D of the PWM signal Vpwm increases, the output voltage Vout increases, and gradually enters a stable state, which is stable at the design value of the BOOST circuit.

[0042] Depend on Figure 2 It can be seen that when the load current of the BOOST circuit jumps downward, the output voltage Vout of the BOOST circuit will also jump, and there is a large overshoot phenomenon, which makes the BOOST circuit have an overshoot voltage Vover, and the output voltage Vout of the BOOST circuit has a recovery time Tre22 from the initial change state to the stable state. It should be noted that Figure 2 The reverse signal of the PWM signal Vpwm is shown in It is used to more clearly show the change of the duty cycle of the PWM signal Vpwm.

[0043] However, due to the small bandwidth of the BOOST circuit, in the case of a transient jump in the load current, the overshoot voltage and undershoot voltage of the BOOST circuit are large, and the stable state recovery time is long.

[0044] Please refer to Figure 3 , which shows a schematic diagram of the structure of a BOOST circuit provided by an embodiment of the present application. The BOOST circuit can solve the above-mentioned problems of the BOOST circuit to a certain extent. Figure 3 As shown, the BOOST circuit 1 may include a voltage conversion circuit 10 and a voltage regulating circuit 20 provided in an embodiment of the present application. The voltage conversion circuit 10 is used to convert the input voltage Vin of the BOOT circuit 1 into an output voltage Vout and output it through the output voltage terminal VOUT. In some embodiments, such as Figure 4As shown, the structure and function of the voltage conversion circuit 10 can refer to the aforementioned Figure 1 The voltage conversion circuit 10 of the BOOST circuit 1 shown in the figure is not described in detail in the present embodiment. It should be noted that the structure of the BOOST circuit provided in the present embodiment is not limited to the above Figure 1 The BOOST circuit structure shown. For example, the BOOST circuit can be a buck-boost circuit, a voltage-mode-controlled BOOST circuit, a current-mode-controlled BOOST circuit, a synchronous BOOST circuit, and an asynchronous BOOST circuit. The present application embodiment only takes the BOOST circuit 1 as a voltage-mode-controlled synchronous BOOST circuit as an example. Figure 3 and Figure 4 The voltage regulating circuit 20 of the BOOST circuit 1 includes: an error calculation unit 202 , a PWM unit 203 and a slope voltage adjustment unit 204 .

[0045] The error calculation unit 202 is connected to the voltage output terminal VOUT of the BOOST circuit 1 and the first input terminal of the PWM unit 203. The error calculation unit 202 is used to collect the feedback voltage Vfb of the voltage output terminal VOUT, generate an error amplified voltage Vc of the feedback voltage Vfb and the first reference voltage Vref1, and transmit the error amplified voltage Vc to the first input terminal of the PWM unit 203.

[0046] The ramp voltage adjustment unit 204 is connected to the voltage output terminal VOUT and the second input terminal (i.e., the ramp voltage input terminal VRAMP) of the PWM unit 203. The ramp voltage adjustment unit 204 is used to collect the feedback voltage Vfb. When the feedback voltage Vfb is within the voltage range where the first reference voltage Vref1 is located, the second ramp voltage Vramp2 is transmitted to the second input terminal of the PWM unit 203. When the feedback voltage Vfb is less than the minimum value of the voltage range, the first ramp voltage Vramp1 less than the error amplification voltage Vc is transmitted to the second input terminal of the PWM unit 203. When the feedback voltage Vfb is greater than the maximum value of the voltage range, the third ramp voltage Vramp3 greater than the error amplification voltage Vc is transmitted to the second input terminal of the PWM unit 203. Among them, the second ramp voltage Vramp2 is a ramp voltage generated by the oscillator. For ease of understanding, in the embodiment of the present application, the minimum value of the voltage range is referred to as the second reference voltage Vref2, and the maximum value of the voltage range is referred to as the third reference voltage Vref3 for explanation.

[0047] The PWM unit 203 is used to compare the voltages received at the first input terminal and the second input terminal, adjust the duty cycle of the generated PWM signal Vpwm, and output the PWM signal Vpwm. The PWM signal Vpwm is used to adjust the output voltage Vout of the voltage output terminal.

[0048] Optionally, the feedback voltage Vfb of the voltage output terminal VOUT may be the output voltage Vout of the voltage output terminal VOUT. Alternatively, the feedback voltage Vfb of the voltage output terminal VOUT may also be a voltage converted from the output voltage Vout, and the fluctuation of the feedback voltage Vfb may reflect the fluctuation of the output voltage Vout.

[0049] In an optional implementation, Figure 3 and Figure 4 As shown, the voltage regulation circuit 20 may further include: a voltage sampling unit 205. The voltage sampling unit 205 is used to collect the output voltage Vout of the voltage output terminal of the BOOST circuit 1, convert the output voltage Vout into a feedback voltage Vfb in proportion, and transmit the feedback voltage Vfb to the error calculation unit 202 and the slope voltage adjustment unit 204.

[0050] For example, Figure 4 As shown, the voltage sampling unit 205 may include a first sampling resistor Rf1 and a second sampling resistor Rf2. One end of the first sampling resistor Rf1 is connected to the voltage output terminal VOUT of the BOOST circuit 1, and the other end of the first sampling resistor Rf1 is respectively connected to one end of the second sampling resistor Rf2, the error calculation unit 202 and the ramp voltage adjustment unit 204. The other end of the second sampling resistor Rf2 is grounded. The first sampling resistor Rf1 and the second sampling resistor Rf2 are connected in series to convert the output voltage Vout of the voltage output terminal VOUT into the feedback voltage Vfb in proportion according to the resistance values ​​of the first sampling resistor Rf1 and the second sampling resistor Rf2.

[0051] In the embodiment of the present application, the error calculation unit 202 can collect the feedback voltage Vfb of the BOOST circuit 1 in real time to output the error amplified voltage Vc of the feedback voltage Vfb and the first reference voltage Vref1 to the PWM unit 203. The ramp voltage adjustment unit 204 can collect the feedback voltage Vfb of the BOOST circuit 1 in real time to compare the voltage range where the feedback voltage Vfb and the first reference voltage Vref1 are located.

[0052] Among them, since the second reference voltage Vref2 is less than the first reference voltage Vref1, and the output voltage Vout of the BOOST circuit 1 is in a stable state, the feedback voltage Vfb is equal to the first reference voltage Vref1. Therefore, the feedback voltage Vfb is less than the second reference voltage Vref2, which can indicate that the output voltage Vout of the BOOST circuit 1 decreases and the load current of the BOOST circuit 1 jumps upward.

[0053] When the feedback voltage Vfb is less than the second reference voltage Vref2, the slope voltage adjustment unit 204 transmits the first slope voltage Vramp1 which is less than the error amplified voltage Vc to the PWM unit 203, so that the PWM unit 203 compares the first slope voltage Vramp1 with the error amplified voltage Vc and outputs a PWM signal Vpwm with an increased duty cycle, thereby increasing the output voltage Vout of the BOOST circuit 1, so as to slow down the reduction degree of the output voltage Vout of the BOOST circuit 1 in the process of the load current jumping upward, and reduce the undershoot voltage of the BOOST circuit 1.

[0054] Similarly, since the third reference voltage Vref3 is greater than the first reference voltage Vref1 , the feedback voltage Vfb is greater than the third reference voltage Vref3 , which indicates that the output voltage Vout of the BOOST circuit 1 increases and the load current of the BOOST circuit 1 jumps downward.

[0055] When the feedback voltage Vfb is greater than the third reference voltage Vref3, the slope voltage adjustment unit 204 transmits a third slope voltage Vramp3 greater than the error amplified voltage Vc to the second input terminal of the PWM unit 203, so that the PWM unit 203 compares the first slope voltage Vramp1 with the error amplified voltage Vc and outputs a PWM signal Vpwm with a reduced duty cycle, thereby reducing the output voltage of the BOOST circuit 1 to slow down the increase in the output voltage Vout of the BOOST circuit 1 during the downward jump of the load current, thereby reducing the overshoot voltage of the BOOST circuit 1.

[0056] Furthermore, the slope voltage adjustment unit 204 can transmit a normal second slope voltage Vramp2 when the output voltage Vout of the BOOST circuit 1 is in a stable state to the second input terminal of the PWM unit 203 when the feedback voltage Vfb is between the second reference voltage Vref2 and the third reference voltage Vref3 (i.e., the feedback voltage Vfb is within the voltage range), indicating that the output voltage Vout of the BOOST circuit 1 is in a stable state, so as to maintain the voltage-regulated operation of the BOOST circuit 1.

[0057] Specifically similar to Figure 5 As shown, when the load current of the BOOST circuit 1 provided in the embodiment of the present application jumps upward, for example, when the load current jumps from 1 mA to 50 mA, the output voltage Vout of the BOOST circuit 1 will be instantly pulled down, and the inductor current ILX of the inductor L will increase. Accordingly, the feedback voltage Vfb collected by the error calculation unit 202 and the ramp voltage adjustment unit 204 decreases and is lower than the first reference voltage Vref1.

[0058] The error amplified voltage Vc output by the error calculation unit 202 increases. The ramp voltage adjustment unit 204 compares the feedback voltage Vfb, the second reference voltage Vref1 and the third reference voltage Vref3, determines that the feedback voltage Vfb is less than the second reference voltage Vref1, and transmits the first ramp voltage Vramp1 less than the error amplified voltage Vc to the second input terminal VRAMP of the PWM unit 203, so that the PWM unit 203 outputs the PWM signal Vpwm with the maximum duty cycle, so that the BOOST circuit operates at the maximum duty cycle, and the duty cycle of the PWM signal Vpwm increases. As the duty cycle of the PWM signal Vpwm increases, the output voltage Vout of the BOOST circuit increases. In turn, the feedback voltage Vfb increases until the ramp voltage adjustment unit 204 determines that the feedback voltage Vfb is between the second reference voltage Vref1 and the third reference voltage Vref3, and transmits the second ramp voltage Vramp2 when the output voltage Vout is in a stable state to the PWM unit 203, the duty cycle of the PWM signal Vpwm output by the PWM unit 203 remains unchanged, and the output voltage Vout of the BOOST circuit is constant.

[0059] Depend on Figure 5 It can be seen that when the load current Iload of the BOOST circuit 1 jumps upward, the output voltage Vout of the BOOST circuit 1 will also jump, and there is an undershoot phenomenon, so that the BOOST circuit 1 has an undershoot voltage Vundr. However, since the ramp voltage adjustment unit 204 can transmit the first ramp voltage Vramp1 less than the error amplification voltage Vc to the PWM unit 203 when the output voltage Vout decreases by a certain amplitude, so that the PWM unit 203 outputs a PWM signal Vpwm with an increased duty cycle to increase the output voltage Vout, the reduction degree of the output voltage Vout of the BOOST circuit 1 in the process of the load current Iload jumping upward is slowed down, the undershoot voltage Vundr of the BOOST circuit 1 is reduced, and the recovery time Tre41 of the output voltage Vout of the BOOST circuit 1 from the initial change state to the stable state is reduced.

[0060] Similarly, when the load current of the BOOST circuit 1 provided in the embodiment of the present application jumps downward, for example, when the load current jumps from 50mA to 1mA, the output voltage Vout of the BOOST circuit 1 will be instantly raised, and the inductor current ILX of the inductor L will be reduced. Accordingly, the feedback voltage Vfb collected by the error calculation unit 202 and the ramp voltage adjustment unit 204 increases and is higher than the first reference voltage Vref1.

[0061] The error amplified voltage Vc output by the error calculation unit 202 decreases. The ramp voltage adjustment unit 204 compares the feedback voltage Vfb, the second reference voltage Vref1 and the third reference voltage Vref3, determines that the feedback voltage Vfb is greater than the third reference voltage Vref3, and transmits the third ramp voltage Vramp3 greater than the error amplified voltage Vc to the PWM unit 203, so that the PWM unit 203 outputs the PWM signal Vpwm with the minimum duty cycle, so that the BOOST circuit operates at the minimum duty cycle, and the duty cycle of the PWM signal Vpwm decreases. As the duty cycle of the PWM signal Vpwm decreases, the output voltage Vout of the BOOST circuit decreases. In turn, the feedback voltage Vfb decreases until the ramp voltage adjustment unit 204 determines that the feedback voltage Vfb is between the second reference voltage Vref1 and the third reference voltage Vref3, and transmits the second ramp voltage Vramp2 when the output voltage Vout is in a stable state to the PWM unit 203, the duty cycle of the PWM signal Vpwm output by the PWM unit 203 remains unchanged, and the output voltage Vout of the BOOST circuit is constant.

[0062] Depend on Figure 5 It can be seen that when the load current Iload of the BOOST circuit 1 jumps downward, the output voltage Vout of the BOOST circuit 1 will also jump, and there will be an overshoot phenomenon, so that the BOOST circuit 1 has an overshoot voltage Vover. However, since the slope voltage adjustment unit 204 can transmit a third slope voltage Vramp3 greater than the error amplification voltage Vc to the PWM unit 203 when the output voltage Vout increases by a certain amplitude, so that the PWM unit 203 outputs a PWM signal Vpwm with a reduced duty cycle, so as to reduce the output voltage Vout, slow down the increase of the output voltage Vout of the BOOST circuit 1 during the process of the load current Iload jumping downward, reduce the overshoot voltage Vover of the BOOST circuit 1, and thereby reduce the recovery time Tre42 of the output voltage Vout of the BOOST circuit 1 from the initial change state to the stable state. It should be noted that Figure 5 The reverse signal of the PWM signal Vpwm is shown in It is used to more clearly show the change of the duty cycle of the PWM signal Vpwm.

[0063] Alternatively, if Figure 3 and Figure 4As shown, the slope voltage adjustment unit 204 includes: a comparison module 2041, a switch module 2042, a first slope voltage terminal VRAMP1, a second slope voltage terminal VRAMP2 and a third slope voltage terminal VRAMP3. The first slope voltage terminal VRAMP1 is used to provide a first slope voltage Vramp1 that is less than the error amplification voltage Vc. The second slope voltage terminal VRAMP2 is used to provide a second slope voltage Vramp2. The third slope voltage terminal VRAMP3 is used to provide a third slope voltage Vramp3 that is greater than the error amplification voltage Vc.

[0064] The comparison module 2041 is connected to the voltage output terminal VOUT and the switch module 2042. The switch module 2042 is also connected to the second input terminal of the PWM unit 203, the first slope voltage terminal VRAMP1, the second slope voltage terminal VRAMP2 and the third slope voltage terminal VRAMP3.

[0065] The comparison module 2041 is used to control the switch module 2042 to connect the first ramp voltage terminal VRAMP1 and the second input terminal of the PWM unit 203 when the feedback voltage Vfb is less than the minimum value of the voltage range of the first reference voltage Vref1 (i.e., the second reference voltage Vref2), so as to input the first ramp voltage Vramp1 to the second input terminal of the PWM unit 203. The comparison module 2041 is also used to control the switch module 2042 to connect the second ramp voltage terminal VRAMP2 and the second input terminal of the PWM unit 203 when the feedback voltage Vfb is within the voltage range (i.e., between the second reference voltage Vref2 and the third reference voltage Vref3), so as to input the second ramp voltage Vramp2 to the second input terminal of the PWM unit 203. The comparison module 2041 is also used to control the switch module 2042 to connect the third ramp voltage terminal VRAMP3 and the second input terminal of the PWM unit 203 when the feedback voltage Vfb is greater than the maximum value of the voltage range of the first reference voltage Vref1 (i.e., the third reference voltage Vref3), so as to input the third ramp voltage Vramp3 to the second input terminal of the PWM unit 203.

[0066] In an optional implementation, Figure 4 As shown, the comparison module 2041 includes: a first comparator Com1, a second comparator Com2 and a logic component 20411.

[0067] The first comparator Com1 is connected to the logic component 20411, the voltage output terminal VOUT and the switch module 2042. The first comparator Com1 is used to compare the feedback voltage Vfb with the minimum value of the voltage range where the first reference voltage Vref1 is located (i.e., the second reference voltage Vref2). When the feedback voltage Vfb is less than the second reference voltage Vref2, the first comparator Com1 transmits a first conduction signal to the switch module 2042 and the logic component 20411 to control the switch module 2042 to connect the first ramp voltage terminal VRAMP1 and the second input terminal of the PWM unit 203. The first comparator Com1 is also used to transmit a first shutdown signal to the switch module 2042 and the logic component 20411 to control the switch module 2042 to disconnect the first ramp voltage terminal VRAMP1 and the second input terminal of the PWM unit 203 when the feedback voltage Vfb is greater than or equal to the second reference voltage Vref2. The first conduction signal is used to control the switch module 2042 to connect the first ramp voltage terminal VRAMP1 and the second input terminal of the PWM unit 203. The first shutdown signal is used to control the switch module 2042 to disconnect the first slope voltage terminal VRAMP1 and the second input terminal of the PWM unit 203 .

[0068] The second comparator Com2 is connected to the logic component 20411, the voltage output terminal VOUT and the switch module 2042. The second comparator Com2 is used to compare the feedback voltage Vfb with the maximum value of the voltage range of the first reference voltage Vref1 (i.e., the third reference voltage Vref3). When the feedback voltage Vfb is greater than the third reference voltage Vref3, the second comparator Com2 transmits a second on signal to the switch module 2042 and the logic component 20411 to control the switch module 2042 to connect the third ramp voltage terminal VRAMP3 and the second input terminal of the PWM unit 203. The second comparator Com2 is also used to transmit a second off signal to the switch module 2042 and the logic component 20411 to control the switch module 2042 to disconnect the third ramp voltage terminal VRAMP3 and the second input terminal of the PWM unit 203 when the feedback voltage Vfb is less than or equal to the third reference voltage Vref3. The second on signal is used to control the switch module 2042 to connect the third ramp voltage terminal VRAMP3 and the second input terminal of the PWM unit 203. The second shutdown signal is used to control the switch module 2042 to disconnect the third slope voltage terminal VRAMP3 and the second input terminal of the PWM unit 203 .

[0069] The logic component 20411 is used to control the switch module 2042 to connect the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203 when the first shutdown signal and the second shutdown signal are received at the same time. Correspondingly, optionally, the logic component 20411 is also used to control the switch module 2042 to disconnect the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203 when the first shutdown signal and the second shutdown signal are not received at the same time. For example, the logic component 20411 is also used to control the switch module 2042 to disconnect the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203 when the first turn-on signal and the second turn-off signal are received at the same time, or when the first turn-off signal and the second turn-on signal are received at the same time.

[0070] In the embodiment of the present application, the switch module 2042 and the logic component 20411 may have a variety of circuit structures to achieve corresponding functions. The following description takes two structures as examples.

[0071] In the first alternative, if Figure 4 As shown, the switch module 2042 includes: a third switch tube N3 and a fourth switch tube P4. The control end of the third switch tube N3 is connected to the first comparator Com1, the first end of the third switch tube N3 is connected to the first slope voltage end VRAMP1, and the second end of the third switch tube N3 is connected to the second input end of the PWM unit 203. The third switch tube N3 is used to be turned on under the control of the first turn-on signal and turned off under the control of the first turn-off signal.

[0072] The control end of the fourth switch tube P4 is connected to the second comparator Com2, the first end of the fourth switch tube P4 is connected to the third slope voltage end VRAMP3, and the second end of the fourth switch tube P4 is connected to the second input end of the PWM unit 203. The fourth switch tube P4 is used to be turned on under the control of the second turn-on signal and turned off under the control of the second turn-off signal.

[0073] Optionally, the third switch tube N3 may be an NMOS tube. The gate of the third switch tube N3 is connected to the first comparator Com1, the drain of the third switch tube N3 is connected to the first ramp voltage terminal VRAMP1, and the source of the third switch tube N3 is connected to the second input terminal of the PWM unit 203. Accordingly, the first on-signal is a high-level signal, and the first off-signal is a low-level signal. The fourth switch tube P4 may be a PMOS tube. The gate of the fourth switch tube P4 is connected to the second comparator Com2, the source of the fourth switch tube P4 is connected to the third ramp voltage terminal VRAMP3, and the drain of the fourth switch tube P4 is connected to the second input terminal of the PWM unit 203. Accordingly, the second on-signal is a low-level signal, and the second off-signal is a high-level signal.

[0074] Further optionally, the first on-signal and the second off-signal may be signals of the same level. The first off-signal and the second on-signal may be signals of the same level. The logic component 20411 includes: a first inverter G1, a NAND gate L and a second inverter G2.

[0075] The first inverter G1 is connected to the first comparator Com1. The input end of the NAND gate L is connected to the first inverter G1 and the second comparator Com2. The output end of the NAND gate L is connected to the switch module 2042 and the second inverter G2. The second inverter G2 is also connected to the switch module 2042.

[0076] The logic component 20411 is used to transmit a third conduction signal to the switch module 2042 through the NAND gate L and transmit a fourth conduction signal through the second inverter G2 when receiving different level signals transmitted by the first comparator Com1 and the second comparator Com2 at the same time, so as to control the switch module 2042 to connect the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203.

[0077] That is, the logic component 20411 is used to transmit the third turn-on signal to the switch module 2042 through the NAND gate L and the fourth turn-on signal through the second inverter G2 when receiving two signals of different levels, namely the first turn-off signal and the second turn-off signal, so as to control the switch module 2042 to connect the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203. Correspondingly, the logic component 20411 is used to transmit the third turn-off signal to the switch module 2042 through the NAND gate L and the fourth turn-off signal through the second inverter G2 when receiving the same level signal at the same time, so as to control the switch module 2042 to disconnect the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203. The third turn-on signal and the fourth turn-on signal are used to control the switch module 2042 to connect the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203, so as to transmit the second slope voltage Vramp2 to the second input terminal of the PWM unit 203. The third shutdown signal and the fourth shutdown signal are used to control the switch module 2042 to disconnect the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203 .

[0078] Optionally, the switch module 204 includes a first switch tube N1 and a second switch tube P2. The control end of the first switch tube N1 is connected to the second inverter G2, the first end of the first switch tube N1 and the second end of the second switch tube P2 are both connected to the second input end of the PWM unit 203, the second end of the first switch tube N1 and the first end of the second switch tube P2 are both connected to the second ramp voltage end VRAMP2, and the control end of the second switch tube P2 is connected to the NAND gate L. The first switch tube N1 is used to be turned on under the control of the third conduction signal, and the second switch tube P2 is used to be turned on under the control of the fourth conduction signal. Correspondingly, the first switch tube N1 is used to be turned off under the control of the third shut-down signal, and the second switch tube P2 is used to be turned off under the control of the fourth shut-down signal.

[0079] For example, the first switch tube N1 is an NMOS tube. The gate of the first switch tube N1 is connected to the second inverter G2, the drain of the first switch tube N1 is connected to the second input terminal of the PWM unit 203, and the source of the first switch tube N1 is connected to the second ramp voltage terminal VRAMP2. The second switch tube P2 is a PMOS tube. The gate of the second switch tube P2 is connected to the NAND gate L, the source of the second switch tube P2 is connected to the second ramp voltage terminal VRAMP2, and the drain of the second switch tube P2 is connected to the second input terminal of the PWM unit 203. The first switch tube N1 and the second switch tube P2 constitute a transmission gate.

[0080] When both the first switch tube N1 and the second switch tube P2 are turned on, the first switch tube N1 and the second switch tube P2 form a loop. The drain of the first switch tube N1 is connected to the source, the source of the first switch tube N1 and the second switch tube P2, and the source and drain of the second switch tube P2 are connected. The path between the drain of the first switch tube N1 and the drain of the second switch tube P2 transmits the second ramp voltage Vramp2 to the second input terminal of the PWM unit 203.

[0081] For example, the first on signal, the second off signal, the third on signal, and the fourth off signal are all high level signals 1. Correspondingly, the first off signal, the second on signal, the third off signal, and the fourth on signal are all low level signals 0.

[0082] The ramp voltage adjustment unit 204 can output a high level signal 1 from the first comparator Com1 and a high level signal 1 from the second comparator Com2 when the BOOST circuit 1 jumps upward so that the feedback voltage Vfb is less than the second reference voltage Vref2. The logic component 20411 outputs a low level signal 0 to the first switch tube N1 and a high level signal 1 to the second switch tube P2. In this case, the first switch tube N1 is turned off, the second switch tube P2 is turned off, the third switch tube N3 is turned on, and the fourth switch tube P4 is turned off. The first ramp voltage terminal VRAMP1 is connected to the second input terminal of the PWM unit 203, and transmits the first ramp voltage Vramp1 to the second input terminal of the PWM unit 203.

[0083] When the output voltage Vout of the BOOST circuit 1 returns to a stable state, that is, the feedback voltage Vfb is greater than the second reference voltage Vref2, and the feedback voltage Vfb is less than the third reference voltage Vref3, the first comparator Com1 outputs a low level signal 0, and the second comparator Com2 outputs a high level signal 1. The logic component 20411 outputs a high level signal 1 to the first switch tube N1, and outputs a low level signal 0 to the second switch tube P2. In this case, the first switch tube N1 is turned on, the second switch tube P2 is turned on, the third switch tube N3 is turned off, and the fourth switch tube P4 is turned off. The second ramp voltage terminal VRAMP2 is connected to the second input terminal of the PWM unit 203, and the second ramp voltage Vramp2 is transmitted to the second input terminal of the PWM unit 203.

[0084] When the BOOST circuit 1 jumps downward so that the feedback voltage Vfb is greater than the third reference voltage Vref3, the first comparator Com1 outputs a low level signal 0, and the second comparator Com2 outputs a low level signal 0. The logic component 20411 outputs a low level signal 0 to the first switch tube N1, and outputs a high level signal 1 to the second switch tube P2. In this case, the first switch tube N1 is turned off, the second switch tube P2 is turned off, the third switch tube N3 is turned off, and the fourth switch tube P4 is turned on. The third ramp voltage terminal VRAMP3 is connected to the second input terminal of the PWM unit 203, and the third ramp voltage Vramp3 is transmitted to the second input terminal of the PWM unit 203.

[0085] Then, the output voltage Vout of the BOOST circuit 1 is restored to a stable state, that is, when the feedback voltage Vfb is greater than the second reference voltage Vref2 and the feedback voltage Vfb is less than the third reference voltage Vref3, the first comparator Com1 outputs a low level signal 0 and the second comparator Com2 outputs a high level signal 1. The logic component 20411 outputs a high level signal 1 to the first switch tube N1 and outputs a low level signal 0 to the second switch tube P2. In this case, the first switch tube N1 is turned on, the second switch tube P2 is turned on, the third switch tube N3 is turned off, and the fourth switch tube P4 is turned off. The second ramp voltage terminal VRAMP2 is connected to the second input terminal of the PWM unit 203, and the second ramp voltage Vramp2 is transmitted to the second input terminal of the PWM unit 203.

[0086] In the second optional case, the logic component is used to transmit a seventh turn-on signal to the switch module 2042 when the first turn-off signal and the second turn-off signal are received simultaneously, so as to control the switch module 2042 to connect the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203.

[0087] Correspondingly, optionally, the switch module 2024 includes: a third switch tube N3, a fourth switch tube P4 and a seventh switch tube P7.

[0088] The third switch tube N3 is connected to the first comparator Com1, the first slope voltage terminal VRAMP1 and the second input terminal of the PWM unit 203. The third switch tube N3 is used to turn on the first slope voltage terminal VRAMP1 and the second input terminal of the PWM unit 203 under the control of the first turn-on signal, and to disconnect the first slope voltage terminal VRAMP1 and the second input terminal under the control of the first turn-off signal.

[0089] The fourth switch tube P4 is connected to the second comparator Com2, the third slope voltage terminal VRAMN3 and the second input terminal of the PWM unit 203. The fourth switch tube P4 is used to turn on the third slope voltage terminal VRAMP3 and the second input terminal of the PWM unit 203 under the control of the second turn-on signal, and to disconnect the third slope voltage terminal VRAMP3 and the second input terminal under the control of the second turn-off signal.

[0090] The seventh switch tube P7 is connected to the logic component 20411, the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203. The seventh switch tube P7 is used to conduct the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203 under the control of the seventh conduction signal. The third switch tube N3 is also used to disconnect the second slope voltage terminal VRAMP2 and the second input terminal of the PWM unit 203 under the control of the seventh shutdown signal.

[0091] For example, the first on-signal and the second off-signal may both be low-level signals, and the first off-signal and the second on-signal may both be high-level signals. Accordingly, the third switch transistor N3 may be a PMOS transistor, the fourth switch transistor P4 may be an NMOS transistor, and the seventh switch transistor P7 may be a PMOS transistor. The logic comparator 20411 may be a NAND gate.

[0092] In an alternative case, if Figure 4 As shown, the third ramp voltage Vramp3 may be a power supply voltage Vdd, and the first ramp voltage Vramp1 may be a ground voltage Vgnd. Figure 4 As shown, the third slope voltage terminal VRAMP3 of the slope voltage adjustment unit 204 can be a power supply terminal, and the first slope voltage terminal VRAMP1 can be a ground terminal. The power supply terminal is used to provide a power supply voltage Vdd. The ground terminal is used to provide a ground voltage Vgnd. Accordingly, the slope voltage adjustment unit 204 can be used to transmit the ground voltage Vgnd to the second input terminal of the PWM unit 203 when the feedback voltage Vfb is less than the second reference voltage Vref2; and transmit the power supply voltage Vdd to the second input terminal of the PWM unit 203 when the feedback voltage Vfb is greater than the third reference voltage Vref3.

[0093] For example, Figure 6 As shown, when the load current of the BOOST circuit 1 provided in the embodiment of the present application jumps from 1 mA to 50 mA, the output voltage Vout of the BOOST circuit 1 will be instantly lowered, the feedback voltage Vfb will decrease, and the inductor current ILX of the inductor L will increase.

[0094] The error amplified voltage Vc output by the error calculation unit 202 increases. When the feedback voltage Vfb is less than the second reference voltage Vref1, the ramp voltage adjustment unit 204 transmits the ground voltage Vgnd (i.e., the first ramp voltage Vramp1) to the PWM unit 203, and the PWM unit 203 outputs the PWM signal Vpwm with the maximum duty cycle to increase the duty cycle of the PWM signal Vpwm and increase the output voltage Vout of the BOOST circuit. Furthermore, the feedback voltage Vfb increases until the ramp voltage adjustment unit 204 determines that the feedback voltage Vfb is between the second reference voltage Vref1 and the third reference voltage Vref3, and transmits the second ramp voltage Vramp2 to the PWM unit 203, and the PWM unit 203 outputs the PWM signal Vpwm with a constant duty cycle, and the output voltage Vout of the BOOST circuit is constant.

[0095] Depend on Figure 6It can be seen that when the load current Iload of the BOOST circuit 1 jumps upward, the output voltage Vout of the BOOST circuit 1 will also jump, and there will be an undershoot phenomenon. Since it takes a long time for the second input terminal of the PWM unit 203 to receive the ground voltage Vgnd and recover to receive the second ramp voltage Vramp2, the inductor charging time of the BOOST circuit 1 is long, the inductor current ILX is high, and the output voltage Vout of the BOOST circuit 1 increases. Therefore, before the output voltage Vout of the BOOST circuit 1 recovers from the undershoot state to the stable state, a large overshoot phenomenon will occur, causing the BOOST circuit to have a large secondary overshoot voltage.

[0096] However, by transmitting the ground voltage Vgnd to the PWM unit 203, the PWM unit 203 can output a PWM signal Vpwm with a maximum duty cycle to increase the output voltage Vout, slow down the decrease in the output voltage Vout of the BOOST circuit 1 during the upward jump of the load current Iload, reduce the undershoot voltage Vundr of the BOOST circuit 1, and thereby reduce the recovery time Tre51 of the output voltage Vout of the BOOST circuit from the initial change state to the stable state.

[0097] Similarly, when the load current of the BOOST circuit provided in the embodiment of the present application jumps from 50 mA to 1 mA, the output voltage Vout of the BOOST circuit will be instantly raised, the feedback voltage Vfb will increase, and the inductor current ILX of the inductor L will decrease.

[0098] The error amplified voltage Vc output by the error amplifier EA decreases. The ramp voltage adjustment unit 204 determines that the feedback voltage Vfb is greater than the third reference voltage Vref3, and transmits the power supply voltage Vdd to the PWM unit 203, so that the PWM unit 203 outputs the PWM signal Vpwm with the minimum duty cycle, so that the BOOST circuit operates at the minimum duty cycle, and the duty cycle of the PWM signal Vpwm decreases. As the duty cycle of the PWM signal Vpwm decreases, the output voltage Vout of the BOOST circuit is reduced. Furthermore, the feedback voltage Vfb decreases until the ramp voltage adjustment unit 204 determines that the feedback voltage Vfb is between the second reference voltage Vref1 and the third reference voltage Vref3, and transmits the output second ramp voltage Vramp2 to the PWM unit 203, and the PWM unit 203 outputs the PWM signal Vpwm with a constant duty cycle, and the output voltage Vout of the BOOST circuit is constant.

[0099] Depend on Figure 6It can be seen that when the load current Iload of the BOOST circuit 1 jumps downward, the output voltage Vout of the BOOST circuit 1 will also jump, and there is an overshoot phenomenon. By transmitting the power supply voltage Vdd to the PWM unit 203, the PWM unit 203 can output a PWM signal Vpwm with a reduced duty cycle to reduce the output voltage Vout, slow down the increase in the output voltage Vout of the BOOST circuit 1 during the downward jump of the load current Iload, reduce the overshoot voltage Vover of the BOOST circuit 1, and reduce the recovery time Tre52 of the output voltage Vout of the BOOST circuit from the initial change state to the stable state. It should be noted that Figure 5 The reverse signal of the PWM signal Vpwm is shown in It is used to more clearly show the change of the duty cycle of the PWM signal Vpwm.

[0100] In another optional case, the third ramp voltage Vramp3 may be the product of the error amplified voltage Vc and the first value. The first ramp voltage Vramp1 is the product of the error amplified voltage Vc and the second value. The first value is greater than 1, and the second value is a positive number less than 1. For example, the third ramp voltage Vramp3 may be 0.9×Vc. The first ramp voltage Vramp1 may be 1.1×Vc. Alternatively, the third ramp voltage Vramp3 may be 0.85×Vc. The first ramp voltage Vramp1 may be 1.15×Vc.

[0101] In the case where the third ramp voltage Vramp3 and the first ramp voltage Vramp1 are related to the error amplified voltage Vc, optionally, the ramp voltage adjustment unit 204 is also connected to the error calculation unit 202. The ramp voltage adjustment unit 204 is used to boost the error amplified voltage Vc to obtain the third ramp voltage, and to step down the error amplified voltage Vc to obtain the first ramp voltage.

[0102] Further optionally, if Figure 7 As shown, the slope voltage adjustment unit 204 further includes: a voltage acquisition module 2043. The voltage acquisition module 2043 may include a buffer Buff, a first voltage divider and a second voltage divider.

[0103] The first input terminal of the buffer Buff is connected to the error operation unit 202. The output terminal of the buffer Buff is grounded through the first voltage divider and the second voltage divider connected in series. The second input terminal of the buffer Buff is connected to the path between the first voltage divider and the second voltage divider. The first voltage divider is used to divide the output voltage of the buffer to obtain a third ramp voltage. The second voltage divider is used to divide the path voltage between the first voltage divider and the second voltage divider to obtain a first ramp voltage. Optionally, the positive input terminal of the buffer Buff is connected to the output terminal of the error operation unit 202. The inverting input terminal of the buffer Buff is connected to the path between the first voltage divider and the second voltage divider.

[0104] In an optional case, the first voltage divider includes a first resistor R1 and a second resistor R2. The second voltage divider includes a third resistor R3 and a fourth resistor R4. The output end of the buffer Buff is grounded through the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 connected in series in sequence. The second input end of the buffer Buff is connected to the path between the second resistor R2 and the third resistor R3. Optionally, the positive input end of the buffer Buff is connected to the output end of the error operation unit 202. The inverting input end of the buffer Buff is connected to the path between the second resistor R2 and the third resistor R3.

[0105] The first resistor R1 and the second resistor R2 are used to collect the voltage at the output end of the buffer Buff in proportion to the resistance values ​​of the first resistor R1 and the second resistor R2 according to the first value to obtain the third ramp voltage Vramp3. The path between the first resistor R1 and the second resistor R2 is connected to the third ramp voltage end VRAMP3 to provide the third ramp voltage Vramp3.

[0106] The third resistor R3 and the fourth resistor R4 are used to collect the voltage of the end of the second resistor R2 close to the third resistor R3 in proportion to the resistance of the third resistor R3 and the fourth resistor R4 according to the second value to obtain the first ramp voltage VramN1. The path between the first resistor R1 and the second resistor R2 is connected to the first ramp voltage terminal VRAMN1 to provide the first ramp voltage VramN1. It should be noted that, Figure 1 The third ramp voltage VramN3 is 1.1×Vc, and the first ramp voltage VramN1 is 0.9×Vc.

[0107] For example, Figure 8 As shown, when the load current of the BOOST circuit 1 provided in the embodiment of the present application jumps from 1 mA to 50 mA, the output voltage Vout of the BOOST circuit 1 will be instantly lowered, the feedback voltage Vfb will decrease, and the inductor current ILX of the inductor L will increase.

[0108] The error amplified voltage Vc output by the error calculation unit 202 increases. When the feedback voltage Vfb is less than the second reference voltage Vref1, the ramp voltage adjustment unit 204 transmits 0.9 times the error amplified voltage Vc to the PWM unit 203, and the PWM unit 203 outputs a PWM signal Vpwm with a maximum duty cycle, increasing the output voltage Vout of the BOOST circuit. Furthermore, the feedback voltage Vfb increases until the ramp voltage adjustment unit 204 determines that the feedback voltage Vfb is between the second reference voltage Vref1 and the third reference voltage Vref3, and transmits the second ramp voltage Vramp2 to the PWM unit 203, and the PWM unit 203 outputs a PWM signal Vpwm with a constant duty cycle, and the output voltage Vout of the BOOST circuit is constant.

[0109] Depend on Figure 8 It can be seen that when the load current Iload of the BOOST circuit 1 jumps upward, there is an undershoot phenomenon in the output voltage Vout of the BOOST circuit 1. By transmitting 0.9 times the error amplification voltage Vc to the PWM unit 203, the PWM unit 203 can output a PWM signal Vpwm with an increased duty cycle to increase the output voltage Vout, slow down the reduction degree of the output voltage Vout of the BOOST circuit 1 during the upward jump of the load current Iload, reduce the undershoot voltage Vundr of the BOOST circuit 1, and reduce the recovery time Tre61 of the output voltage Vout of the BOOST circuit from the initial change state to the stable state.

[0110] Similarly, when the load current of the BOOST circuit provided in the embodiment of the present application jumps from 50 mA to 1 mA, the output voltage Vout of the BOOST circuit will be instantly raised, the feedback voltage Vfb will increase, and the inductor current ILX of the inductor L will decrease.

[0111] The error amplified voltage Vc output by the error amplifier EA decreases. The ramp voltage adjustment unit 204 determines that the feedback voltage Vfb is greater than the third reference voltage Vref3, and transmits 1.1 times the error amplified voltage Vc to the PWM unit 203, so that the PWM unit 203 outputs a PWM signal Vpwm with a minimum duty cycle, reducing the output voltage Vout of the BOOST circuit. Furthermore, the feedback voltage Vfb decreases until the ramp voltage adjustment unit 204 determines that the feedback voltage Vfb is between the second reference voltage Vref1 and the third reference voltage Vref3, and transmits the output second ramp voltage Vramp2 to the PWM unit 203, and the PWM unit 203 outputs a PWM signal Vpwm with a constant duty cycle, and the output voltage Vout of the BOOST circuit is constant.

[0112] Depend on Figure 8It can be seen that when the load current Iload of the BOOST circuit 1 jumps downward, there is an overshoot phenomenon in the output voltage Vout of the BOOST circuit 1. By transmitting 1.1 times the error amplification voltage Vc to the PWM unit 203, the PWM unit 203 can output a PWM signal Vpwm with a reduced duty cycle to reduce the output voltage Vout, slow down the increase of the output voltage Vout of the BOOST circuit 1 during the downward jump of the load current Iload, reduce the overshoot voltage Vover of the BOOST circuit 1, and reduce the recovery time Tre62 of the output voltage Vout of the BOOST circuit from the initial change state to the stable state.

[0113] Alternatively, if Figure 4 and Figure 7 As shown, the error operation unit 202 includes an error amplifier EA. The inverting input terminal of the error amplifier EA is used to collect the feedback voltage Vfb of the voltage output terminal of the BOOST circuit 1. The positive input terminal of the error amplifier EA is used to receive the first reference voltage Vref1. The output terminal of the error amplifier EA is connected to the first input terminal of the PWM unit 203. The error amplifier EA is used to amplify the error between the feedback voltage Vfb and the first reference voltage Vref1, generate an error amplified voltage Vc, and transmit the error amplified voltage Vc to the PWM unit 203.

[0114] Further optionally, if Figure 4 and Figure 7 As shown, the PWM unit 203 includes: a PWM comparator. The second input end of the PWM unit 203 is the inverting input end of the PWM comparator, which is used to receive the signal transmitted by the ramp voltage adjustment unit 204. The first input end of the PWM unit 203 is the positive input end of the PWM comparator, which is used to receive the error amplification voltage Vc transmitted by the error calculation unit 202. The PWM comparator is used to compare the voltages received at the first input end and the second input end, and adjust the duty cycle of the PWM signal Vpwm according to the comparison result to generate the PWM signal Vpwm.

[0115] In an optional case, the voltage regulating circuit 20 further includes a switch tube gate driving unit 201. The switch tube gate driving unit 201 is connected to the switch tube of the BOOST circuit 1, and is used to adjust the conduction time of the switch tube in a single switching cycle according to the duty cycle of the PWM signal Vpwm, so as to adjust the output voltage of the BOOST circuit 1. For example, Figure 4 and Figure 7As shown, the switch tubes of the BOOST circuit 1 include a sixth switch tube P6 and a fifth switch tube N5. The switch tube gate driving unit 201 is used to adjust the conduction time of the sixth switch tube P6 and the fifth switch tube N5 in a single switching cycle according to the duty cycle of the PWM signal Vpwm to adjust the output voltage of the BOOST circuit 1.

[0116] By way of example, the switch tube gate driving unit 201 can be used to generate a driving signal for controlling the fifth switch tube N5 and the sixth switch tube P6 to be turned on when the PWM signal is at a high level, and to generate a driving signal for controlling the fifth switch tube N5 and the sixth switch tube P6 to be turned off when the PWM signal is at a low level, and to transmit the driving signal to the fifth switch tube N5 and the sixth switch tube P6 to control the turn-on time of the sixth switch tube P6 and the fifth switch tube N5 in a single switching cycle.

[0117] In summary, the voltage regulation circuit applied to the BOOST circuit provided in the embodiment of the present application includes: an error operation unit, a PWM unit and a ramp voltage adjustment unit. The error operation unit is used to generate the feedback voltage of the voltage output terminal of the BOOST circuit and the error amplified voltage of the first reference voltage, and transmit the error amplified voltage to the first input terminal of the PWM unit. The ramp voltage adjustment unit is used to transmit the second ramp voltage to the second input terminal when the feedback voltage is within the voltage range where the first reference voltage is located, and transmit the first ramp voltage less than the error amplified voltage to the second input terminal when the feedback voltage is less than the minimum value of the voltage range, and transmit the third ramp voltage greater than the error amplified voltage to the second input terminal when the feedback voltage is greater than the maximum value of the voltage range. The PWM unit is used to compare the magnitude of the voltage received at its first input terminal and the second input terminal, adjust the duty cycle of the generated PWM signal Vpwm, and output the PWM signal Vpwm.

[0118] In this technical solution, when the feedback voltage is greater than the maximum value of the voltage range, indicating that the load current has jumped downward and the output voltage of the BOOST circuit has increased instantaneously, the slope voltage adjustment unit can transmit a third slope voltage greater than the error amplification voltage to the PWM unit so that the PWM unit outputs a PWM signal Vpwm with a reduced duty cycle, thereby reducing the output voltage of the BOOST circuit, slowing down the increase in the output voltage, and thereby reducing the overshoot voltage of the BOOST circuit, reducing the recovery time of the output voltage of the BOOST circuit from the initial change state to the stable state, and improving the load transient response capability of the BOOST circuit.

[0119] Similarly, when the feedback voltage is less than the minimum value of the voltage range, indicating that the load current has jumped upward and the output voltage of the BOOST circuit has dropped instantaneously, the slope voltage adjustment unit can transmit a first slope voltage less than the error amplification voltage to the PWM unit so that the PWM unit outputs a PWM signal Vpwm with an increased duty cycle, thereby increasing the output voltage of the BOOST circuit and slowing down the degree of reduction in the output voltage, thereby reducing the undershoot voltage of the BOOST circuit, reducing the recovery time of the output voltage of the BOOST circuit from the initial change state to the stable state, and improving the load transient response capability of the BOOST circuit.

[0120] The embodiment of the present application also provides a BOOST circuit. The BOOST circuit may include the voltage regulation circuit provided in the embodiment of the present application. The BOOST circuit includes the aforementioned voltage regulation circuit, and thus has the same technical effect as the aforementioned voltage regulation circuit, which will not be described here to avoid repetition.

[0121] The embodiment of the present application also provides a switching power supply. The switching power supply may include the voltage regulation circuit provided in the embodiment of the present application, or include the BOOST circuit provided in the embodiment of the present application. The switching unit includes the aforementioned voltage regulation circuit, and thus has the same technical effect as the aforementioned voltage regulation circuit, and will not be described here in detail to avoid repetition.

[0122] The embodiment of the present application also provides an electronic device, which includes the voltage regulation circuit provided in the embodiment of the present application, or includes the BOOST circuit provided in the embodiment of the present application, or includes the switching power supply provided in the embodiment of the present application. The electronic device includes the aforementioned voltage regulation circuit, and thus has the same technical effect as the aforementioned voltage regulation circuit, and will not be described here to avoid repetition.

[0123] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A voltage regulating circuit, characterized in that: Applied to BOOST circuit, including: error calculation unit, pulse width modulation PWM unit and slope voltage adjustment unit; The error calculation unit is connected to the voltage output terminal of the BOOST circuit and the first input terminal of the PWM unit, and is used to generate an error amplified voltage of the feedback voltage of the voltage output terminal and the first reference voltage, and transmit the error amplified voltage to the first input terminal; The slope voltage adjustment unit is connected to the voltage output terminal and the second input terminal of the PWM unit, and is used for transmitting the second slope voltage to the second input terminal when the feedback voltage is within the voltage range where the first reference voltage is located, transmitting the first slope voltage less than the error amplification voltage to the second input terminal when the feedback voltage is less than the minimum value of the voltage range, and transmitting the third slope voltage greater than the error amplification voltage to the second input terminal when the feedback voltage is greater than the maximum value of the voltage range; The PWM unit is used to compare the voltages received by the first input terminal and the second input terminal, adjust the duty cycle of the PWM signal, and output the PWM signal, and the PWM signal is used to adjust the output voltage of the BOOST circuit.

2. The voltage regulating circuit according to claim 1, characterized in that: The slope voltage adjustment unit includes: a comparison module and a switch module; The comparison module is connected to the voltage output terminal and the switch module, and the switch module is also connected to the second input terminal, the first slope voltage terminal, the second slope voltage terminal and the third slope voltage terminal; The comparison module is used to control the switch module to connect the first slope voltage terminal and the second input terminal when the feedback voltage is less than the minimum value of the voltage range, control the switch module to connect the second slope voltage terminal and the second input terminal when the feedback voltage is within the voltage range, and control the switch module to connect the third slope voltage terminal and the second input terminal when the feedback voltage is greater than the maximum value of the voltage range.

3. The voltage regulating circuit according to claim 2, characterized in that: The comparison module includes: a first comparator, a second comparator and a logic component; The first comparator is connected to the logic component, the voltage output terminal and the switch module, and is used for transmitting the first on-signal to the switch module and the logic component to control the switch module to connect the first slope voltage terminal and the second input terminal when the feedback voltage is less than the minimum value of the voltage range, and transmitting the first off-signal to the switch module and the logic component to control the switch module to disconnect the first slope voltage terminal and the second input terminal when the feedback voltage is greater than or equal to the minimum value of the voltage range; The second comparator is connected to the logic component, the voltage output terminal and the switch module, and is used for transmitting the second on-signal to the switch module and the logic component to control the switch module to connect the third slope voltage terminal and the second input terminal when the feedback voltage is greater than the maximum value of the voltage range, and transmitting the second off-signal to the switch module and the logic component to control the switch module to disconnect the third slope voltage terminal and the second input terminal when the feedback voltage is less than or equal to the maximum value of the voltage range; The logic component is used for controlling the switch module to connect the second slope voltage terminal and the second input terminal when the first shutdown signal and the second shutdown signal are received simultaneously.

4. The voltage regulating circuit according to claim 3, characterized in that: The first on-signal and the second off-signal are signals of the same level, and the first off-signal and the second on-signal are signals of the same level; the logic component comprises: a first inverter, a NAND gate, and a second inverter; The first inverter is connected to the first comparator, the input end of the NAND gate is connected to the first inverter and the second comparator, the output end of the NAND gate is connected to the switch module and the second inverter, and the second inverter is also connected to the switch module; The logic component is used to transmit a third conduction signal to the switch module through the NAND gate and transmit a fourth conduction signal through the second inverter when receiving different level signals transmitted by the first comparator and the second comparator at the same time, so as to control the switch module to connect the second slope voltage terminal and the second input terminal.

5. The voltage regulating circuit according to claim 4, characterized in that: The switch module includes: a first switch tube and a second switch tube; The control end of the first switch tube is connected to the second inverter, the first end of the first switch tube and the second end of the second switch tube are both connected to the second input end, the second end of the first switch tube and the first end of the second switch tube are both connected to the second slope voltage end, and the control end of the second switch tube is connected to the NAND gate; The first switch tube is used to be turned on under the control of the third conduction signal, and the second switch tube is used to be turned on under the control of the fourth conduction signal.

6. The voltage regulating circuit according to any one of claims 3 to 5, characterized in that: The switch module further includes: a third switch tube and a fourth switch tube; The control end of the third switch tube is connected to the first comparator, the first end is connected to the first slope voltage end, and the second end is connected to the second input end, and is used to be turned on under the control of the first turn-on signal and turned off under the control of the first turn-off signal; The control end of the fourth switch tube is connected to the second comparator, the first end is connected to the third slope voltage end, and the second end is connected to the second input end, and is used to be turned on under the control of the second turn-on signal and turned off under the control of the second turn-off signal.

7. The voltage regulating circuit according to claim 1, characterized in that: The third ramp voltage is a power supply voltage, and the first ramp voltage is a ground voltage; Alternatively, the third slope voltage is the product of the error amplified voltage and a first value, the first slope voltage is the product of the error amplified voltage and a second value, the first value is greater than 1, and the second value is a positive number less than 1.

8. The voltage regulating circuit according to claim 7, characterized in that: The slope voltage adjustment unit is also connected to the error calculation unit, and is used for performing a voltage step-up process on the error amplified voltage to obtain the third slope voltage, and performing a voltage step-down process on the error amplified voltage to obtain the first slope voltage.

9. The voltage regulating circuit according to claim 8, characterized in that: The slope voltage adjustment unit further includes: a voltage acquisition module; The voltage acquisition module includes a buffer, a first voltage divider and a second voltage divider; the first input end of the buffer is connected to the error calculation unit, the output end of the buffer is grounded through the first voltage divider and the second voltage divider connected in series in sequence, the second input end of the buffer is connected to the path between the first voltage divider and the second voltage divider, the first voltage divider is used to divide the output voltage of the buffer to obtain the third ramp voltage, and the second voltage divider is used to divide the path voltage between the first voltage divider and the second voltage divider to obtain the first ramp voltage.

10. A BOOST circuit, characterized in that: The BOOST circuit comprises: the voltage regulating circuit according to any one of claims 1 to 9.

11. A switching power supply, characterized in that: The switching power supply comprises: the voltage regulating circuit according to any one of claims 1 to 9, or the BOOST circuit according to claim 10.

12. An electronic device, characterized in that: The electronic device comprises: the voltage regulating circuit according to any one of claims 1 to 9, or the BOOST circuit according to claim 10, or the switching power supply according to claim 11.

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