Method and apparatus for manufacturing display device

Abstract

The invention relates to a method and an apparatus for manufacturing a display device. According to an embodiment, a method of manufacturing a display device includes preparing a substrate including a lower electrode, a rib portion having a pixel opening overlapping the lower electrode, and a partition wall having a lower portion and an upper portion protruding from a side surface of the lower portion, forming an organic layer on the substrate by vapor deposition, the organic layer being in contact with the lower electrode through the pixel opening, an upper electrode covering the organic layer and in contact with the lower portion of the partition wall is formed on the substrate by vapor deposition. A first vapor deposition source for a first thin film used in the formation of an organic layer is provided with a first nozzle, and the first nozzle releases a material toward a substrate that moves relative to the first vapor deposition source. A second vapor deposition source used in the formation of the top electrode is provided with a second nozzle, and the second nozzle releases the material toward the substrate that moves relative to the second vapor deposition source. The axis of at least one of the first nozzle and the second nozzle is inclined with respect to the normal direction of the substrate in a direction orthogonal to the moving direction of the substrate in plan view.

Description

[0001] Cross-references to related applications

[0002] This application claims the priority based on Japanese Patent Application No. 2023-095512 applied for on June 9, 2023, and cites all the contents described in the Japanese Patent Application. Technical Field

[0003] Embodiments of the present invention relate to a method and apparatus for manufacturing a display device. Background Art

[0004] In recent years, display devices using organic light emitting diodes (OLEDs) as display elements have become practical. The display element includes a lower electrode, an organic layer covering the lower electrode, and an upper electrode covering the organic layer. A common voltage is applied to the upper electrode of each display element through wiring arranged in the display area.

[0005] The organic layer and the upper electrode are formed by vapor deposition on the substrate provided with the wiring. In this case, the connection between the upper electrode and the wiring may be blocked by the organic layer formed first. Summary of the invention

[0006] In general, according to an embodiment, a method for manufacturing a display device includes: preparing a substrate including a lower electrode, a rib having a pixel opening overlapping the lower electrode, and a partition having a conductive lower portion arranged on the rib and an upper portion protruding from a side surface of the lower portion, forming an organic layer on the substrate by evaporation, the organic layer being in contact with the lower electrode through the pixel opening and emitting light in response to application of a voltage, and forming an upper electrode covering the organic layer and in contact with the lower portion of the partition by evaporation on the substrate. The organic layer includes a first thin film. A first evaporation source used in forming the first thin film includes a first nozzle, and the first nozzle releases a vaporized material toward the substrate moving relative to the first evaporation source. A second evaporation source used in forming the upper electrode includes a second nozzle, and the second nozzle releases a vaporized material toward the substrate moving relative to the second evaporation source. Furthermore, an axis of at least one of the first nozzle and the second nozzle is inclined with respect to a normal direction of the substrate in a direction perpendicular to a moving direction of the substrate in a plan view.

[0007] In addition, according to an embodiment, a manufacturing device of a display device includes: a first evaporation device that forms an organic layer on a substrate, the substrate including a lower electrode, a rib having a pixel opening overlapping the lower electrode, and a partition having a conductive lower portion arranged on the rib and an upper portion protruding from a side surface of the lower portion, the organic layer contacts the lower electrode through the pixel opening and emits light in response to application of a voltage; and a second evaporation device that forms an upper electrode covering the organic layer and contacting the lower portion of the partition on the substrate. The organic layer includes a first thin film. The first evaporation device includes a first evaporation source provided with a first nozzle, and the first nozzle releases the vaporized material of the first thin film toward the substrate moving relative to the first evaporation source. The second evaporation device includes a second evaporation source provided with a second nozzle, and the second nozzle releases the vaporized material of the upper electrode toward the substrate moving relative to the second evaporation source. Furthermore, an axis of at least one of the first nozzle and the second nozzle is inclined with respect to a normal direction of the substrate in a direction perpendicular to a moving direction of the substrate in a plan view.

[0008] According to the embodiment, it is possible to provide a method and an apparatus for manufacturing a display device capable of satisfactorily connecting a wiring provided in a display region and an upper electrode of a display element. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a diagram showing a configuration example of a display device according to one embodiment.

[0010] Figure 2 It is a schematic plan view showing an example of the layout of sub-pixels.

[0011] Figure 3 It is along Figure 2 A schematic cross-sectional view of a display device taken along line III-III in FIG.

[0012] Figure 4 This is a diagram showing an example of a layer structure that can be applied to an organic layer.

[0013] Figure 5 It is along Figure 2 Schematic cross-sectional view of the display device along line VV in FIG.

[0014] Figure 6 It is a schematic plan view of a partition wall surrounding a sub-pixel.

[0015] Figure 7 This is a flowchart showing an example of a method for manufacturing a display device.

[0016] Fig. 8A It is a schematic cross-sectional view showing the manufacturing process of the display device.

[0017] Figure 8B It means continuation Fig. 8A A schematic cross-sectional view of the manufacturing process.

[0018] Figure 8C It means continuation Figure 8B A schematic cross-sectional view of the manufacturing process.

[0019] Fig.8D It means continuation Figure 8C A schematic cross-sectional view of the manufacturing process.

[0020] Fig. 8E It means continuation Fig.8D A schematic cross-sectional view of the manufacturing process.

[0021] Fig.8F It means continuation Fig. 8E A schematic cross-sectional view of the manufacturing process.

[0022] Figure 8G It means continuation Fig.8F A schematic cross-sectional view of the manufacturing process.

[0023] Fig. 9 This is a diagram showing a schematic configuration of a portion of a manufacturing apparatus for a display device.

[0024] Fig.10 This is a schematic plan view showing an example of the relationship between a substrate being transported and a vapor deposition source.

[0025] Fig.11 This is a schematic perspective view showing an example of the structure of a vapor deposition source that can be used for the hole injection layer.

[0026] Fig.12 This is a schematic perspective view showing still another example of the structure of a vapor deposition source that can be used for the hole injection layer.

[0027] Fig.13 It is a schematic perspective view showing an example of the configuration of a vapor deposition source that can be applied to a hole transport layer, an electron blocking layer, a light emitting layer, a hole blocking layer, an electron transport layer, and an electron injection layer.

[0028] Fig.14 This is a schematic perspective view showing an example of the structure of a vapor deposition source that can be applied to the upper electrode.

[0029] Fig.15 It is a schematic cross-sectional view showing a step of forming a hole injection layer.

[0030] Fig.16 It is a schematic cross-sectional view showing the steps of forming a hole transport layer, an electron blocking layer, a light emitting layer, a hole blocking layer, an electron transport layer, and an electron injection layer.

[0031] Fig.17 It is a schematic cross-sectional view showing the process of forming the upper electrode.

[0032] Fig.18 This is a diagram showing another example of the process of forming the upper electrode.

[0033] Fig.19 It is a schematic cross-sectional view showing a first modified example of a structure that can be applied to a partition wall.

[0034] Fig. 20 It is a schematic cross-sectional view showing a second modified example of a structure that can be applied to the partition wall. DETAILED DESCRIPTION

[0035] Several embodiments will be described with reference to the drawings.

[0036] The disclosed content is only an example, and for those skilled in the art, the content that can be easily thought of with respect to appropriate changes that maintain the gist of the invention is of course included in the scope of the present invention. In addition, in order to make the description clearer, the width, thickness, shape, etc. of each part are sometimes schematically shown in the drawings compared with the actual method, but this is only an example and does not limit the interpretation of the present invention. In addition, in this specification and each figure, the same reference numerals are sometimes used to mark the constituent elements that perform the same or similar functions as the constituent elements described above with respect to the figures that have appeared, and repeated detailed descriptions are appropriately omitted.

[0037] It should be noted that, in the drawings, as needed, for easy understanding, mutually orthogonal X-axis, Y-axis and Z-axis are recorded. The direction along the X-axis is called the X-direction, the direction along the Y-axis is called the Y-direction, and the direction along the Z-axis is called the Z-direction. The Z-direction is the normal direction of the plane including the X-direction and the Y-direction. In addition, observing various elements parallel to the Z-direction is called a top view.

[0038] The display device involved in each embodiment is an organic electroluminescent display device having an organic light emitting diode (OLED) as a display element, and can be mounted on various electronic devices such as televisions, personal computers, vehicle-mounted equipment, tablet terminals, smartphones, mobile phone terminals, wearable terminals, etc.

[0039] Figure 1 1 is a diagram showing a configuration example of a display device DSP according to an embodiment. The display device DSP includes an insulating substrate 10. The substrate 10 includes a display area DA for displaying an image and a peripheral area SA around the display area DA. The substrate 10 may be glass or a flexible resin film.

[0040] In the present embodiment, the shape of the substrate 10 in plan view is a rectangle, however, the shape of the substrate 10 in plan view is not limited to a rectangle, and may be other shapes such as a square, a circle, or an ellipse.

[0041] The display area DA includes a plurality of pixels PX arranged in a matrix in the X direction and the Y direction. The pixel PX includes a plurality of sub-pixels SP that display different colors. In the present embodiment, it is assumed that the pixel PX includes a blue sub-pixel SP1, a green sub-pixel SP2, and a red sub-pixel SP3. However, the pixel PX may include a sub-pixel SP of another color such as white together with the sub-pixels SP1, SP2, and SP3, or may include a sub-pixel SP of another color such as white instead of any of the sub-pixels SP1, SP2, and SP3.

[0042] The sub-pixel SP includes a pixel circuit 1 and a display element DE driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements composed of, for example, thin film transistors.

[0043] In the display area DA, a plurality of scanning lines GL for supplying scanning signals to the pixel circuits 1 of the sub-pixels SP, a plurality of signal lines SL for supplying video signals to the pixel circuits 1 of the sub-pixels SP, and a plurality of power supply lines PL are arranged. Figure 1 In the example of FIG. 5 , the scanning lines GL and the power lines PL extend in the X direction, and the signal lines SL extend in the Y direction.

[0044] The gate electrode of the pixel switch 2 is connected to the scanning line GL. One of the source electrode and the drain electrode of the pixel switch 2 is connected to the signal line SL, and the other is connected to the gate electrode of the driving transistor 3 and the capacitor 4. In the driving transistor 3, one of the source electrode and the drain electrode is connected to the power line PL and the capacitor 4, and the other is connected to the display element DE.

[0045] It should be noted that the configuration of the pixel circuit 1 is not limited to the illustrated example. For example, the pixel circuit 1 may include more thin film transistors and capacitors.

[0046] Figure 2 is a schematic top view showing an example of the layout of sub-pixels SP1, SP2, and SP3. Figure 2 In the example of FIG. 1 , the sub-pixels SP2 and SP3 are arranged in the X direction with the sub-pixel SP1. In addition, the sub-pixel SP2 and the sub-pixel SP3 are arranged in the Y direction.

[0047] When the sub-pixels SP1, SP2, and SP3 are arranged in this way, columns in which the sub-pixels SP2 and SP3 are alternately arranged in the Y direction and columns in which a plurality of sub-pixels SP1 are repeatedly arranged in the Y direction are formed in the display area DA. These columns are alternately arranged in the X direction. It should be noted that the layout of the sub-pixels SP1, SP2, and SP3 is not limited to Figure 2 Example.

[0048] The rib 5 is disposed in the display area DA. The rib 5 has pixel openings AP1, AP2, and AP3 in the sub-pixels SP1, SP2, and SP3, respectively. Figure 2 In the example, the pixel opening AP1 is larger than the pixel opening AP2, and the pixel opening AP2 is larger than the pixel opening AP3. That is, among the sub-pixels SP1, SP2, and SP3, the sub-pixel SP1 has the largest aperture ratio, and the sub-pixel SP3 has the smallest aperture ratio.

[0049] The sub-pixel SP1 includes a lower electrode LE1, an upper electrode UE1, and an organic layer OR1 respectively overlapping with the pixel opening AP1. The sub-pixel SP2 includes a lower electrode LE2, an upper electrode UE2, and an organic layer OR2 respectively overlapping with the pixel opening AP2. The sub-pixel SP3 includes a lower electrode LE3, an upper electrode UE3, and an organic layer OR3 respectively overlapping with the pixel opening AP3.

[0050] The lower electrode LE1, the upper electrode UE1, and the portion of the organic layer OR1 that overlaps with the pixel opening AP1 constitute the display element DE1 of the sub-pixel SP1. The lower electrode LE2, the upper electrode UE2, and the portion of the organic layer OR2 that overlaps with the pixel opening AP2 constitute the display element DE2 of the sub-pixel SP2. The lower electrode LE3, the upper electrode UE3, and the portion of the organic layer OR3 that overlaps with the pixel opening AP3 constitute the display element DE3 of the sub-pixel SP3. The display elements DE1, DE2, and DE3 may further include a cover layer described later. The ribs 5 surround these display elements DE1, DE2, and DE3, respectively.

[0051] A conductive partition wall 6 is disposed on the rib 5. The partition wall 6 overlaps the rib 5 as a whole and has the same planar shape as the rib 5. That is, the partition wall 6 has openings in the sub-pixels SP1, SP2, and SP3, respectively. From another point of view, the rib 5 and the partition wall 6 are lattice-shaped when viewed from above, and surround the sub-pixels SP1, SP2, and SP3, respectively. The partition wall 6 has a function as a wiring for supplying a common voltage to the upper electrodes UE1, UE2, and UE3.

[0052] Figure 3 It is along Figure 2 A schematic cross-sectional view of a display device DSP along line III-III in FIG. A circuit layer 11 is arranged on the substrate 10. The circuit layer 11 includes Figure 1The circuit layer 11 is covered with an organic insulating layer 12 , and the organic insulating layer 12 functions as a planarizing film that planarizes the unevenness generated in the circuit layer 11 .

[0053] The lower electrodes LE1, LE2, and LE3 are disposed on the organic insulating layer 12. The ribs 5 are disposed on the organic insulating layer 12 and the lower electrodes LE1, LE2, and LE3. The ends of the lower electrodes LE1, LE2, and LE3 are covered by the ribs 5. Figure 3 Although not shown in the cross section, the lower electrodes LE1 , LE2 , and LE3 are connected to the pixel circuit 1 of the circuit layer 11 through contact holes provided in the organic insulating layer 12 .

[0054] The partition wall 6 includes a conductive lower portion 61 disposed on the rib 5 and an upper portion 62 disposed on the lower portion 61. The upper portion 62 has a greater width than the lower portion 61. Thus, both ends of the upper portion 62 protrude from the side surfaces of the lower portion 61. Such a shape of the partition wall 6 is called a cantilever shape.

[0055] exist Figure 3 In the example of , the lower portion 61 has a bottom layer 63 disposed on the rib 5 and a shaft layer 64 disposed on the bottom layer 63. For example, the bottom layer 63 is formed to be thinner than the shaft layer 64. Figure 3 In the example, both ends of the bottom layer 63 protrude from the side surfaces of the shaft layer 64 .

[0056] The organic layer OR1 covers the lower electrode LE1 through the pixel opening AP1. The upper electrode UE1 covers the organic layer OR1 and is opposite to the lower electrode LE1. The organic layer OR2 covers the lower electrode LE2 through the pixel opening AP2. The upper electrode UE2 covers the organic layer OR2 and is opposite to the lower electrode LE2. The organic layer OR3 covers the lower electrode LE3 through the pixel opening AP3. The upper electrode UE3 covers the organic layer OR3 and is opposite to the lower electrode LE3. The upper electrodes UE1, UE2, and UE3 are in contact with the side surface of the lower portion 61 of the partition wall 6.

[0057] The display element DE1 includes a cap layer CP1 disposed on the upper electrode UE1. The display element DE2 includes a cap layer CP2 disposed on the upper electrode UE2. The display element DE3 includes a cap layer CP3 disposed on the upper electrode UE3. The cap layers CP1, CP2, and CP3 respectively function as optical adjustment layers for improving the extraction efficiency of light emitted from the organic layers OR1, OR2, and OR3.

[0058] In the following description, the multilayer body including the organic layer OR1, the upper electrode UE1 and the cover layer CP1 is referred to as the stacked film FL1, the multilayer body including the organic layer OR2, the upper electrode UE2 and the cover layer CP2 is referred to as the stacked film FL2, and the multilayer body including the organic layer OR3, the upper electrode UE3 and the cover layer CP3 is referred to as the stacked film FL3.

[0059] A portion of the laminate film FL1 is located above the upper portion 62. This portion is separated from the portion of the laminate film FL1 located below the partition wall 6 (the portion constituting the display element DE1). Similarly, a portion of the laminate film FL2 is located above the upper portion 62, and this portion is separated from the portion of the laminate film FL2 located below the partition wall 6 (the portion constituting the display element DE2). In addition, a portion of the laminate film FL3 is located above the upper portion 62, and this portion is separated from the portion of the laminate film FL3 located below the partition wall 6 (the portion constituting the display element DE3).

[0060] Seal layers SE1, SE2, and SE3 are respectively arranged in sub-pixels SP1, SP2, and SP3. Seal layer SE1 continuously covers cap layer CP1 and partition walls 6 around sub-pixel SP1. Seal layer SE2 continuously covers cap layer CP2 and partition walls 6 around sub-pixel SP2. Seal layer SE3 continuously covers cap layer CP3 and partition walls 6 around sub-pixel SP3.

[0061] exist Figure 3 In the example, the laminated film FL1 and the sealing layer SE1 on the partition wall 6 between the sub-pixels SP1 and SP2 are separated from the laminated film FL2 and the sealing layer SE2 on the partition wall 6. In addition, the laminated film FL1 and the sealing layer SE1 on the partition wall 6 between the sub-pixels SP1 and SP3 are separated from the laminated film FL3 and the sealing layer SE3 on the partition wall 6.

[0062] The sealing layers SE1, SE2, and SE3 are covered by the resin layer 13. The resin layer 13 is covered by the sealing layer 14. The sealing layer 14 is covered by the resin layer 15. The resin layers 13, 15, and the sealing layer 14 are continuously provided at least in the entire display area DA, and a part of them also reaches the peripheral area SA.

[0063] A cover member such as a polarizing plate, a touch panel, a protective film or a cover glass may be further disposed on the resin layer 15. Such a cover member may be bonded to the resin layer 15 via an adhesive layer such as OCA (Optical Clear Adhesive).

[0064] The organic insulating layer 12 is formed of an organic insulating material such as polyimide. The rib 5 and the sealing layers 14, SE1, SE2, and SE3 are formed of silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2 O 3 ) or other inorganic insulating materials. In one example, the rib 5 is formed of silicon oxynitride, and the sealing layers 14, SE1, SE2, and SE3 are formed of silicon nitride. The resin layers 13 and 15 are formed of resin materials (organic insulating materials) such as epoxy resin and acrylic resin.

[0065] The lower electrodes LE1, LE2, and LE3 include, for example, a reflective layer formed of silver and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer, respectively. Each conductive oxide layer is formed of a transparent conductive oxide such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide).

[0066] The upper electrodes UE1, UE2, UE3 are formed of a metal material such as an alloy of magnesium and silver (MgAg), etc. For example, the lower electrodes LE1, LE2, LE3 correspond to anodes, and the upper electrodes UE1, UE2, UE3 correspond to cathodes.

[0067] Figure 4 : is a diagram showing an example of a layer structure that can be applied to the organic layers OR1, OR2, and OR3. The organic layers OR1, OR2, and OR3 are composed of a plurality of thin films including a light-emitting layer EML. In the present embodiment, it is assumed that the organic layers OR1, OR2, and OR3 have a structure in which a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a light-emitting layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL are sequentially stacked in the Z direction. However, the organic layers OR1, OR2, and OR3 may have other structures such as a so-called tandem structure including a plurality of light-emitting layers EML.

[0068] The cover layers CP1, CP2, and CP3, for example, have a stacked structure formed by overlapping multiple transparent layers. These transparent layers may include layers formed by inorganic materials and layers formed by organic materials. In addition, these transparent layers have different refractive indices from each other. For example, the refractive indices of these transparent layers are different from the refractive indices of the upper electrodes UE1, UE2, and UE3 and the refractive indices of the sealing layers SE1, SE2, and SE3. It should be noted that at least one of the cover layers CP1, CP2, and CP3 may be omitted.

[0069] The bottom layer 63 and the shaft layer 64 of the partition wall 6 are formed of metal materials. As the metal material of the bottom layer 63, for example, molybdenum, titanium, titanium nitride (TiN), molybdenum-tungsten alloy (MoW) or molybdenum-niobium alloy (MoNb) can be used. As the metal material of the shaft layer 64, for example, aluminum, aluminum-neodymium alloy (AlNd), aluminum-yttrium alloy (AlY) or aluminum-silicon alloy (AlSi) can be used. It should be noted that the shaft layer 64 can be formed of an insulating material.

[0070] For example, the upper portion 62 of the partition wall 6 has a laminated structure of a lower layer formed of a metal material and an upper layer formed of a conductive oxide. As the metal material forming the lower layer, for example, titanium, titanium nitride, molybdenum, tungsten, molybdenum-tungsten alloy or molybdenum-niobium alloy can be used. As the conductive oxide forming the upper layer, for example, ITO or IZO can be used. It should be noted that the upper portion 62 may have a single-layer structure of a metal material. In addition, the upper portion 62 may include a layer formed of an insulating material.

[0071] A common voltage is supplied to the partition wall 6. The common voltage is supplied to the upper electrodes UE1, UE2, UE3 in contact with the side surface of the lower portion 61. Pixel voltages corresponding to the video signals of the signal lines SL are supplied to the lower electrodes LE1, LE2, LE3 through the pixel circuits 1 of the sub-pixels SP1, SP2, SP3.

[0072] The organic layers OR1, OR2, and OR3 emit light in response to the application of voltage. Specifically, if a potential difference is formed between the lower electrode LE1 and the upper electrode UE1, the light-emitting layer EML of the organic layer OR1 emits light in the blue wavelength region. If a potential difference is formed between the lower electrode LE2 and the upper electrode UE2, the light-emitting layer EML of the organic layer OR2 emits light in the green wavelength region. If a potential difference is formed between the lower electrode LE3 and the upper electrode UE3, the light-emitting layer EML of the organic layer OR3 emits light in the red wavelength region.

[0073] As another example, the light-emitting layers EML of the organic layers OR1, OR2, and OR3 may emit light of the same color (e.g., white). In this case, the display device DSP may include a color filter that converts the light emitted by the light-emitting layer EML into light of a color corresponding to the sub-pixels SP1, SP2, and SP3. In addition, the display device DSP may also include a layer including quantum dots that are excited by the light emitted by the light-emitting layer EML to generate light of a color corresponding to the sub-pixels SP1, SP2, and SP3.

[0074] Figure 5 It is along Figure 2Schematic cross-sectional view of the display device DSP along the VV line in FIG. The cross section shown in this figure corresponds to the YZ cross section defined by the Y direction and the Z direction, and shows three sub-pixels SP1 arranged in the Y direction. It should be noted that the substrate 10, the circuit layer 11, the resin layer 13, the sealing layer 14, and the resin layer 15 are omitted. In the following description, Figure 5 The left side partition wall 6 in the figure is referred to as the first partition wall 6A, and the right side partition wall 6 is referred to as the second partition wall 6B. These partition walls 6A and 6B are arranged to sandwich the partition wall in the Y direction. Figure 5 The central pixel opening AP1 in the.

[0075] exist Figure 5 In the example of FIG. 1 , the laminated film FL1 and the sealing layer SE1 are not interrupted on the partition walls 6A and 6B. That is, the sealing layer SE1 continuously covers the partition walls 6A and 6B and the cap layer CP1 of each sub-pixel SP1 .

[0076] like Figure 5 As shown in (a) and (b) in the figure, the organic layer OR1 includes a first layer L1 and a second layer L2 on the first layer L1. In this embodiment, it is assumed that the first layer L1 is composed of a hole injection layer HIL, and the second layer L2 is composed of a hole transport layer HTL, an electron blocking layer EBL, a light emitting layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL. However, in addition to the hole injection layer HIL, the first layer L1 may further include other layers such as the hole transport layer HTL. It should be noted that in Figure 5 In (a) and (b), the cap layer CP1 and the sealing layer SE1 are omitted.

[0077] The thickness of the first layer L1 and the second layer L2 decreases as they approach the partition walls 6A and 6B. Similarly, the thickness of the upper electrode UE1 decreases as they approach the partition walls 6A and 6B.

[0078] The first layer L1 has an end E1a on the first partition wall 6A side and an end E1b on the second partition wall 6B side. From the viewpoint of suppressing leakage current between the organic layer OR1 and the partition walls 6A and 6B, it is preferred that the hole injection layer HIL constituting the first layer L1 is not electrically connected to the partition wall 6. Figure 5 As shown, the end portions E1a and E1b are preferably separated from the bottom layers 63 of the partition walls 6A and 6B, respectively. However, the first layer L1 may be slightly in contact with at least one of the bottom layers 63 .

[0079] The second layer L2 has an end portion E2a on the first partition wall 6A side and an end portion E2b on the second partition wall 6B side. Figure 5In the examples (a) and (b), the end portions E2a and E2b are respectively located on the bottom layer 63 of the partition walls 6A and 6B. That is, the second layer L2 is in contact with the bottom layer 63 of the partition walls 6A and 6B. As another example, the second layer L2 may not be in contact with the bottom layer 63 of the first partition wall 6A. In addition, the second layer L2 may not be in contact with both the bottom layers 63 of the partition walls 6A and 6B.

[0080] like Figure 5 As shown in (a), the end E2a is separated from the axial layer 64 of the first partition wall 6A. As a result, an area not covered by the second layer L2 is formed on the upper surface of the bottom layer 63 of the first partition wall 6A. Figure 5 In the example of (b), the end E2b is in contact with the axial layer 64 of the second partition wall 6B. Thus, the upper surface of the bottom layer 63 of the second partition wall 6B is entirely covered by the second layer L2. As another example, the end E2b is separated from the axial layer 64 of the second partition wall 6B.

[0081] The upper electrode UE1 has an end portion E3a on the first partition wall 6A side and an end portion E3b on the second partition wall 6B side. Figure 5 In the example (a), the end E3a is located above the bottom layer 63 of the first partition wall 6A and is in contact with the shaft layer 64. However, the end E3a may be separated from the shaft layer 64. Figure 5 In the example of (b), the end E3b is located on the second layer L2 and is not in contact with the base layer 63 of the second partition wall 6B and the axial layer 64. As another example, the end E3b may be in contact with the axial layer 64 of the second partition wall 6B.

[0082] Figure 5 The line segment Va represented by the dashed line in (a) is a straight line passing through the first end 62a of the upper portion 62 of the first partition wall 6A and parallel to the Z direction. Figure 5 The line segment Vb indicated by the dashed line in (b) is a straight line that passes through the second end portion 62b of the upper portion 62 of the second partition wall 6B and is parallel to the Z direction.

[0083] The organic layer OR1 has a thickness T1a at the position intersecting with the line segment Va, that is, directly below the first end 62a. In addition, the organic layer OR1 has a thickness T1b at the position intersecting with the line segment Vb, that is, directly below the second end 62b. The thicknesses T1a and T1b correspond to the total thickness of the first layer L1 and the second layer L2.

[0084] The upper electrode UE1 has a thickness T2a at the position intersecting with the line segment Va, that is, directly below the first end 62a. In addition, the upper electrode UE1 has a thickness T2b at the position intersecting with the line segment Vb, that is, directly below the second end 62b. For example, the thickness T2a is smaller than the thickness T1a (T2a<T1a). In addition, the thickness T2b is smaller than the thickness T1b (T2b<T1b).

[0085] In this embodiment, the thickness T1a is smaller than the thickness T1b (T1a<T1b). In addition, the thickness T2a is larger than the thickness T2b (T2a>T2b). That is, the organic layer OR1 is formed to be thinner near the first partition wall 6A and thicker near the second partition wall 6B. In addition, the upper electrode UE1 is formed to be thicker near the first partition wall 6A and thinner near the second partition wall 6B.

[0086] In the present embodiment, the contact area between the lower portion 61 (the base layer 63 and the shaft layer 64) of the first partition wall 6A and the organic layer OR1 is smaller than the contact area between the lower portion 61 of the second partition wall 6B and the organic layer OR1.

[0087] In addition, the contact area between the lower portion 61 of the first partition wall 6A and the upper electrode UE1 is larger than the contact area between the lower portion 61 of the second partition wall 6B and the upper electrode UE1. Figure 5 In the example (b), the upper electrode UE1 does not contact the lower portion 61 of the second partition wall 6B. In this case, the contact area between the lower portion 61 of the second partition wall 6B and the upper electrode UE1 is zero. Not limited to this example, the upper electrode UE1 may contact the bottom layer 63 and the shaft layer 64 of the second partition wall 6B, and the contact area is not zero.

[0088] In this way, Figure 5 In the example, the organic layer OR1 is thinned and the upper electrode UE1 is thickened near the first partition wall 6A, thereby ensuring a large contact area between the bottom layer 63 of the first partition wall 6A and the upper electrode UE1. Thus, the upper electrode UE1 and the partition wall 6 can be well connected.

[0089] It should be noted that each sub-pixel SP1 disposed in the display area DA has Figure 5 That is, if we focus on the partitions 6A and 6B, the vicinity of one side surface of the lower portion 61 has Figure 5 The structure of (a) has a Figure 5 The structure of (b).

[0090] Figure 61 is a schematic top view of the partition wall 6 surrounding the sub-pixels SP1, SP2, and SP3. As shown in the figure, the four sides of the partition wall 6 surrounding the sub-pixel SP1 are defined as sides S1a, S1b, S1c, and S1d, the four sides of the partition wall 6 surrounding the sub-pixel SP2 are defined as sides S2a, S2b, S2c, and S2d, and the four sides of the partition wall 6 surrounding the sub-pixel SP3 are defined as sides S3a, S3b, S3c, and S3d. The sides S1a, S1b, S2a, S2b, S3a, and S3b are parallel to the X direction. The sides S1c, S1d, S2c, S2d, S3c, and S3d are parallel to the Y direction.

[0091] The sides S1a, S2b, and S3a surrounded by the dot-dash line frame correspond to the contact sides where the upper electrodes UE1, UE2, and UE3 are in contact with the partition wall 6. A common voltage is supplied to the upper electrodes UE1, UE2, and UE3 at least through these contact sides.

[0092] The structure of edge S1a is as follows Figure 5 The structure of the organic layer OR2, the upper electrode UE2 and the partition wall 6 at the edge S2b is similar to that of the organic layer OR2, the upper electrode UE2 and the partition wall 6. Figure 5 The structures of the organic layer OR1, the upper electrode UE1 and the first partition wall 6A shown in (a) are the same. In addition, the structures of the organic layer OR3, the upper electrode UE3 and the partition wall 6 at the side S3a are also the same as those shown in (a). Figure 5 The organic layer OR1, the upper electrode UE1, and the first partition wall 6A shown in (a) are the same in structure. Thus, similar to the upper electrode UE1, the upper electrodes UE2 and UE3 can also ensure good conduction with the partition wall 6.

[0093] In addition, the structure of edge S1b is as follows Figure 5 The structure of the organic layer OR2, the upper electrode UE2 and the partition wall 6 at the edge S2a is similar to that of the organic layer OR2, the upper electrode UE2 and the partition wall 6. Figure 5 The structures of the organic layer OR1, the upper electrode UE1 and the second partition wall 6B shown in (b) are the same. In addition, the structures of the organic layer OR3, the upper electrode UE3 and the partition wall 6 at the side S3b are also the same as those shown in (b). Figure 5 The structures of the organic layer OR1, the upper electrode UE1, and the second partition wall 6B shown in (b) are the same.

[0094] It should be noted that, in addition to the contact edge shown in the figure, the lower portion 61 may also contact the upper electrodes UE1, UE2, UE3 at another edge. Figure 6 Examples can be changed appropriately.

[0095] Figure 7 This is a flowchart showing an example of a method for manufacturing a display device DSP. FIG. 8A to FIG. 8G 1 is a schematic cross-sectional view showing the manufacturing process of the display device DSP. FIG. 8A to FIG. 8G In the figure, the substrate 10 and the circuit layer 11 are omitted.

[0096] When manufacturing the display device DSP, first, a circuit layer 11 and an organic insulating layer 12 are formed on a substrate 10. Fig. 8A As shown, lower electrodes LE1, LE2, and LE3 are formed on the organic insulating layer 12 (step PR1).

[0097] Next, if Figure 8B As shown, the rib 5 and the partition 6 are formed (step PR2). The pixel openings AP1, AP2, and AP3 of the rib 5 may be provided after the partition 6 is formed, or may be provided before the partition 6 is formed.

[0098] After preparing the substrate on which the lower electrodes LE1, LE2, LE3, the ribs 5, and the partitions 6 are formed through the steps PR1 and PR2, the steps for forming the display elements DE1, DE2, and DE3 are performed. In this embodiment, it is assumed that the display element DE1 is formed first, then the display element DE2 is formed, and finally the display element DE3 is formed. However, the order of forming the display elements DE1, DE2, and DE3 is not limited to this example.

[0099] When forming the display element DE1, first, as Figure 8C As shown in FIG. 1 , a laminated film FL1 and a sealing layer SE1 are formed (step PR3 ). Figure 3 As shown, the laminated film FL1 includes an organic layer OR1 in contact with the lower electrode LE1 through the pixel opening AP1, an upper electrode UE1 covering the organic layer OR1, and a cover layer CP1 covering the upper electrode UE1. The organic layer OR1, the upper electrode UE1, and the cover layer CP1 are formed by evaporation. In addition, the sealing layer SE1 is formed by CVD (Chemical Vapor Deposition). The laminated film FL1 is partitioned into a plurality of parts by the cantilevered partition wall 6. The sealing layer SE1 continuously covers the partitioned parts of the laminated film FL1 and the partition wall 6.

[0100] After step PR3, the laminate film FL1 and the sealing layer SE1 are patterned (step PR4). In this patterning, Fig.8D As shown in FIG. 1 , a resist R is disposed on the sealing layer SE1 . The resist R covers the sub-pixel SP1 and a part of the partition wall 6 around it.

[0101] Then, by etching with the resist R as a mask, as Fig. 8EAs shown, the portions of the laminated film FL1 and the sealing layer SE1 exposed from the resist R are removed. In other words, the portions of the laminated film FL1 and the sealing layer SE1 that overlap with the lower electrode LE1 remain, and the other portions are removed. Thus, a display element DE1 is formed in the sub-pixel SP1. For example, the etching includes wet etching and dry etching sequentially performed on the sealing layer SE1, the cap layer CP1, the upper electrode UE1, and the organic layer OR1. After these etchings, the resist R is removed.

[0102] The display element DE2 is formed in the same steps as the display element DE1. That is, when forming the display element DE2, the laminated film FL2 and the sealing layer SE2 are formed in the entire display area DA (step PR5). Figure 3 As shown, the stacked film FL2 includes an organic layer OR2 in contact with the lower electrode LE2 through the pixel opening AP2, an upper electrode UE2 covering the organic layer OR2, and a cover layer CP2 covering the upper electrode UE2.

[0103] The organic layer OR2, the upper electrode UE2 and the cap layer CP2 are formed by evaporation. In addition, the sealing layer SE2 is formed by CVD. The laminate film FL2 is partitioned into a plurality of parts by the cantilever partition wall 6. The sealing layer SE2 continuously covers the partitioned parts of the laminate film FL2 and the partition wall 6.

[0104] After step PR5, the laminate film FL2 and the sealing layer SE2 are patterned (step PR6). Fig.8F As shown, a display element DE2 is formed in the sub-pixel SP2.

[0105] The display element DE3 is formed by the same steps as the display elements DE1 and DE2. That is, when forming the display element DE3, the laminated film FL3 and the sealing layer SE3 are formed in the entire display area DA (step PR7). Figure 3 As shown, the stacked film FL3 includes an organic layer OR3 in contact with the lower electrode LE3 through the pixel opening AP3, an upper electrode UE3 covering the organic layer OR3, and a cap layer CP3 covering the upper electrode UE3.

[0106] The organic layer OR3, the upper electrode UE3 and the cap layer CP3 are formed by evaporation. In addition, the sealing layer SE3 is formed by CVD. The laminate film FL3 is partitioned into a plurality of parts by the cantilever partition wall 6. The sealing layer SE3 continuously covers the partitioned parts of the laminate film FL3 and the partition wall 6.

[0107] After step PR7, the laminate film FL3 and the sealing layer SE3 are patterned (step PR8). Figure 8G As shown, a display element DE3 is formed in the sub-pixel SP3.

[0108] After forming display elements DE1, DE2, and DE3, Figure 3 The resin layer 13, the sealing layer 14 and the resin layer 15 are shown (process PR9). After such processes, the display device DSP is completed.

[0109] Fig. 9 This is a diagram showing a schematic structure of a part of a manufacturing device 100 for a display device DSP. The manufacturing device 100 shown in the figure corresponds to a production line for forming an organic layer OR1 and an upper electrode UE1, and is provided with vapor deposition devices DD1 to DD7 for forming a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a light emitting layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL. The vapor deposition devices DD1 to DD7 constitute a first vapor deposition device for forming the organic layer OR1. The manufacturing device 100 also includes a vapor deposition device DD8 (a second vapor deposition device) for forming the upper electrode UE1.

[0110] The evaporation devices DD1 to DD8 respectively include chambers C1 to C8 whose interiors are maintained as a vacuum and evaporation sources DS1 to DS8 arranged inside the chambers C1 to C8. In addition, the manufacturing device 100 includes a conveying device CD for conveying a substrate 10X on which a partition wall 6 is formed after the process PR2. The substrate 10X may also be a mother substrate on which a plurality of panel portions corresponding to the display device DSP are formed. The conveying device CD conveys the substrate 10X to the chambers C1 to C8 in sequence. In the following description, the direction in which the substrate 10X passes through each chamber C1 to C8 (the direction in which the substrate 10X moves relative to the evaporation sources DS1 to DS8) is referred to as a moving direction FD.

[0111] It should be noted that in Fig. 9 , assuming that the organic layer OR1 has a structure in which a hole injection layer HIL, a hole transport layer HTL, an electron blocking layer EBL, a light emitting layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL are stacked in sequence, an example is shown in which the manufacturing device 100 includes evaporation devices DD1 to DD7. However, the structure of the evaporation device included in the manufacturing device 100 can be changed according to the structure of the thin film included in the organic layer OR1.

[0112] Fig.10 1 is a schematic plan view showing an example of the relationship between the transported substrate 10X and the vapor deposition sources DS (DS1 to DS8). The vapor deposition source DS includes a crucible CR, a long container CT connected to the crucible CR, and a plurality of nozzles N provided in the container CT.

[0113] The crucible CR heats the material stored therein to vaporize (evaporate or sublime) the material. The vaporized material is supplied to the container CT and discharged from each nozzle N toward the substrate 10X moving relative to the evaporation source DS in the moving direction FD. The plurality of nozzles N are arranged linearly along the nozzle arrangement direction ND on one surface of the container CT facing the substrate 10X.

[0114] For example, the substrate 10X is transported in a manner such that the moving direction FD is orthogonal to the nozzle arrangement direction ND. Fig.10 In the example, the width direction WD of the vapor deposition source DS, the moving direction FD, and the X direction, which are orthogonal to the nozzle arrangement direction ND, are parallel to each other.

[0115] In the following description, Fig.10 As shown in FIG. 1 , a first side SD1, a second side SD2, a third side SD3, and a fourth side SD4 are defined relative to the nozzle N. The first side SD1 and the second side SD2 are in opposite directions to each other. Fig.10 In the example of , the first side SD1 and the second side SD2 are parallel to the nozzle arrangement direction ND and the Y direction. That is, the first side SD1 and the second side SD2 are perpendicular to the moving direction FD when viewed from above. The third side SD3 and the fourth side SD4 are in opposite directions. Fig.10 In the example of , the third side SD3 is parallel to the moving direction FD, the width direction WD, and the X direction. In addition, the third side SD3 is directed to the upstream side in the moving direction FD, and the fourth side SD4 is directed to the downstream side in the moving direction FD.

[0116] Fig.11 1 is a schematic perspective view showing an example of the structure of the evaporation source DS1 applicable to the hole injection layer HIL. In the following description, the nozzle N of the evaporation source DS1 is referred to as the nozzle N0. The nozzle N0 discharges the vaporized material M of the hole injection layer HIL in the evaporation direction MD0.

[0117] The vapor deposition direction MD0 is, for example, parallel to the axis AX0 of the nozzle N0 (the extending direction of the nozzle N0). Fig.11 In the example of FIG. 1 , the axis AX0 is orthogonal to the nozzle arrangement direction ND and the width direction WD. The material M is discharged from the nozzle N0 at a predetermined diffusion angle with the vapor deposition direction MD0 as the center. The vapor deposition direction MD0 may also be referred to as a direction parallel to the central axis of the material M discharged from the nozzle N0, or a main release direction of the material M.

[0118] The vapor deposition source DS1 may further include a shield 20 surrounding the plurality of nozzles N. Fig.11 In the example shown in FIG. 1 , the hood 20 surrounds the container CT and each nozzle N0 and has a shape in which an opening is opened on the nozzle N0 side.

[0119] The shield 20 has a first side wall 21 and a second side wall 22 in the width direction WD. These side walls 21 and 22 protrude in the vapor deposition direction MD0 from the tip of each nozzle N0, and suppress the spread of the material M in the width direction WD.

[0120] Fig.12 1 is a schematic three-dimensional diagram showing another example of a structure that can be applied to the vapor deposition source DS1. In the example of this figure, a shield 30 is also arranged relative to the nozzle N0. The shield 30 is, for example, cylindrical and surrounds the nozzle N0, and is installed in the container CT. For example, the shield 30 is respectively provided relative to the plurality of nozzles N0 of the vapor deposition source DS1.

[0121] The shield 30 protrudes from the front end of the nozzle N0 in the vapor deposition direction MD0. The height of the shield 30 (the protruding length from the front end of the nozzle N0) is the same over the entire circumference of the nozzle N0. As a result, the spread of the material M discharged from the nozzle N0 is suppressed in all directions centered on the nozzle N0.

[0122] Fig.13 This is a schematic three-dimensional diagram showing an example of the configuration of evaporation sources DS2 to DS7 that can be applied to the hole transport layer HTL, the electron blocking layer EBL, the light emitting layer EML, the hole blocking layer HBL, the electron transport layer ETL, and the electron injection layer EIL. In the following description, the nozzle N of the evaporation source DS2 to DS7 is referred to as the nozzle N1. The nozzle N1 discharges the vaporized material M in the evaporation direction MD1.

[0123] The evaporation direction MD1 is, for example, parallel to the axis AX1 of the nozzle N1 (the extension direction of the nozzle N1). The material M is released from the nozzle N1 at a predetermined expansion angle with the evaporation direction MD1 as the center. The evaporation direction MD1 can also be referred to as a direction parallel to the central axis of the material M released from the nozzle N1, or a main release direction of the material M. Fig.13 In the example of , the axis AX1 of each nozzle N1 is inclined toward the first side direction SD1. Therefore, the vapor deposition direction MD1 is also inclined toward the first side direction SD1.

[0124] At least one of the evaporation sources DS2 to DS7 may also be Fig.13 As shown in the figure, the protective cover 20 is further provided. In addition, at least one of the vapor deposition sources DS2 to DS7 may further include Fig.12 The shield 30 is shown.

[0125] Fig.14 1 is a schematic perspective view showing an example of the structure of the vapor deposition source DS8 applicable to the upper electrode UE1. In the following description, the nozzle N of the vapor deposition source DS8 is referred to as the nozzle N2. The nozzle N2 discharges the vaporized material M in the vapor deposition direction MD2.

[0126] The evaporation direction MD2 is, for example, parallel to the axis AX2 of the nozzle N2 (the extension direction of the nozzle N2). The material M is discharged from the nozzle N2 at a predetermined expansion angle with the evaporation direction MD2 as the center. The evaporation direction MD2 can also be referred to as a direction parallel to the central axis of the material M discharged from the nozzle N2, or a main release direction of the material M. Fig.14 In the example of , the axis AX2 of each nozzle N2 is inclined toward the second side SD2. Therefore, the vapor deposition direction MD2 is also inclined toward the second side SD2.

[0127] The evaporation source DS8 can also be Fig.14 As shown in the figure, the evaporation source DS8 may further include a shield 20. Fig.12 The shield 30 is shown.

[0128] Fig.15 1 is a schematic cross-sectional view showing a process of forming a hole injection layer HIL using a vapor deposition source DS1. The cross section shown in this figure corresponds to Figure 5 Although one nozzle N0 and a container CT near it are shown above the substrate 10X, in reality, a plurality of nozzles N0 are arranged on the substrate 10X. Fig.15 in the left and right directions.

[0129] exist Fig.15 In the example of FIG. 1 , the axis AX0 of the nozzle N0 is parallel to the Z direction (the normal direction of the substrate 10X). That is, the vapor deposition direction MD0 is not inclined with respect to the Z direction.

[0130] As described above, the hole injection layer HIL is preferably separated from the bottom layer 63 of the partition wall 6. Therefore, in order to reduce the spread of the material M discharged from the nozzle N0, the evaporation source DS1 is preferably provided with Fig.12 The evaporation source DS1 may further include a protective cover 30. Fig.11 If the expansion of the material M is reduced, the material M is blocked by the upper portion 62 of the partition wall 6, and the material M is not easily attached to the lower portion 62. Thus, the contact between the hole injection layer HIL (first layer L1) and the lower portion 61 (bottom layer 63 and shaft layer 64) can be suppressed.

[0131] Fig.16 1 is a schematic cross-sectional view showing the steps of forming a hole transport layer HTL, an electron blocking layer EBL, a light emitting layer EML, a hole blocking layer HBL, an electron transport layer ETL and an electron injection layer EIL using evaporation sources DS2 to DS7. Fig.15 Although one nozzle N1 and its adjacent container CT are shown above the substrate 10X, in reality, multiple nozzles N1 are arranged on the substrate 10X. Fig.16 in the left and right directions.

[0132] The axis AX1 of the nozzle N1 is inclined toward the first side SD1 with respect to the Z direction. Thus, the axis AX1 and the vapor deposition direction MD1 form an acute angle θ1 with respect to the Z direction. The vapor deposition sources DS2 to DS7 may include at least one of the above-mentioned shields 20 and 30 .

[0133] If the evaporation direction MD1 of the evaporation sources DS2 to DS7 is as follows Fig.16 As shown in FIG. 1 , the material M is easily attached to the side surface of each partition wall 6 on the second side SD2 side, and is not easily attached to the side surface of the first side SD1 side. Figure 5 As shown, the second layer L2 having different thicknesses can be formed near the partition walls 6A and 6B.

[0134] Fig.17 This is a schematic cross-sectional view showing the process of forming the upper electrode UE1 using the vapor deposition source DS8. The cross section shown in this figure is equivalent to Fig.15 as well as Fig.16 Although one nozzle N2 and a container CT near it are shown above the substrate 10X, in reality, a plurality of nozzles N2 are arranged on the substrate 10X. Fig.17 in the left and right directions.

[0135] The axis AX2 of the nozzle N2 is inclined toward the second side SD2 relative to the Z direction. As a result, the vapor deposition direction MD2 is inclined in the direction opposite to the vapor deposition direction MD1. The axis AX2 and the vapor deposition direction MD2 form an acute angle θ2 relative to the Z direction. The angle θ2 may be equal to the angle θ1 or different from the angle θ1. The vapor deposition source DS8 may include at least one of the above-mentioned shields 20 and 30.

[0136] like Fig.17 As shown, if the evaporation direction MD2 of the evaporation source DS8 is inclined, the material M is easily attached to the side surface near the first side SD1 side of each partition wall 6, and is not easily attached to the side surface near the second side SD2 side. Figure 5 As shown, the upper electrodes UE1 having different thicknesses can be formed near the partition walls 6A and 6B.

[0137] Fig.18 1 is a diagram showing another example of the process of forming the upper electrode UE1. When the upper electrode UE1 is composed of the alloy of magnesium and silver as described above, the upper electrode UE1 is formed by co-evaporation of magnesium and silver.

[0138] Specifically, in the chamber C8 (refer to Fig. 9 ) is provided with a vapor deposition source DS8a for emitting a material Ma as magnesium and a vapor deposition source DS8b for emitting a material Mb as silver. These vapor deposition sources DS8a and DS8b are, for example, Fig.18As shown in the top view of (a), they are arranged in a manner close to each other in the moving direction FD.

[0139] Fig.18 (b) is observed along the moving direction FD Fig.18 Schematic side view of the evaporation sources DS8a and DS8b shown in (a). Fig.18 (c) is observed along the nozzle arrangement direction ND Fig.18 Schematic side view of the evaporation sources DS8a and DS8b shown in (a). Fig.18 As shown in (b) and (c), the vapor deposition source DS8a includes a nozzle N2a, and the vapor deposition source DS8b includes a nozzle N2b.

[0140] like Fig.18 As shown in (b), the axis AX2a of the nozzle N2a and the axis AX2b of the nozzle N2b are both inclined toward the second side SD2 relative to the Z direction. As a result, the evaporation direction MD2a of the evaporation source DS8a and the evaporation direction MD2b of the evaporation source DS8b are also inclined toward the second side SD2 relative to the Z direction. Fig.18 In (b), the angles formed by the axes AX2a, AX2b (or the vapor deposition directions MD2a, MD2b) and the Z direction are the same.

[0141] It is preferred that the region where the evaporation source DS8a releases the material Ma and the region where the evaporation source DS8b releases the material Mb overlap on the surface of the substrate 10X. Fig.18 In (c), the axes AX2a and AX2b are also inclined on the XZ plane defined by the X direction and the Z direction.

[0142] Specifically, the axis AX2a is inclined toward the fourth side SD4 relative to the Z direction. Therefore, the vapor deposition direction MD2a is also inclined toward the fourth side SD4 relative to the Z direction. In addition, the axis AX2b is inclined toward the third side SD3 relative to the Z direction. Therefore, the vapor deposition direction MD2b is also inclined toward the third side SD3 relative to the Z direction.

[0143] With such a configuration, the materials Ma and Mb are mixed in the moving direction FD and adhere to the substrate 10X. Therefore, it is possible to form an upper electrode UE1 having uniform properties over the entire substrate 10X.

[0144] It should be noted that in Fig.15 as well as Fig.16 , the case where each thin film of the organic layer OR1 is formed by one evaporation source is shown. However, the multiple thin films constituting the organic layer OR1, such as the hole injection layer HIL, the light-emitting layer EML, and the electron transport layer ETL, can be formed by co-evaporation of the host material and the dopant. Fig.18Similarly to the example of , a plurality of vapor deposition sources having different nozzle axes (inclinations in the vapor deposition direction) may be arranged in the chamber.

[0145] Above, use Figures 9 to 18 The described structure related to the evaporation of the organic layer OR1 and the upper electrode UE1 can also be applied to the evaporation of the organic layers OR2, OR3 and the upper electrodes UE2, UE3. That is, when forming the organic layers OR2, OR3 and the upper electrodes UE2, UE3, the evaporation direction MD0 of the hole injection layer HIL is also made parallel to the Z direction, and the evaporation direction MD1 of the hole transport layer HTL, the electron blocking layer EBL, the light emitting layer EML, the hole blocking layer HBL, the electron transport layer ETL and the electron injection layer EIL is tilted in the opposite direction to the evaporation direction MD2 of the upper electrodes UE2, UE3.

[0146] However, in Figure 6 When the sides S1a, S2b, and S3a are respectively set at the contact sides of the sub-pixels SP1, SP2, and SP3, the evaporation directions MD1 and MD2 when forming the organic layer OR2 and the upper electrode UE2 are respectively inclined in the opposite directions to the evaporation directions MD1 and MD2 when forming the organic layer OR1 and the upper electrode UE1. Thus, the thickness of the organic layer OR2 can be reduced near the side S2b, and the thickness of the upper electrode UE2 can be increased.

[0147] If the manufacturing method involved in this embodiment is used, Figure 5 As in the structure shown in the example, the organic layers OR1, OR2, OR3 can be made thinner near the contact edge, and the upper electrodes UE1, UE2, UE3 can be made thicker. Figure 5 as well as Figure 6 As described above, the upper electrodes UE1 , UE2 , and UE3 can be well electrically connected to the barrier ribs 6 at the contact edges.

[0148] In addition, in the present embodiment, the vapor deposition directions MD1 and MD2 of the vapor deposition sources DS2 to DS8 are inclined in a direction (the first side SD1 or the second side SD2) perpendicular to the moving direction FD. Fig.18 In other words, in a configuration where the deposition directions MD1 and MD2 are inclined in a direction parallel to the moving direction FD (the third side SD3 or the fourth side SD4), it is sometimes difficult to mix the materials emitted by the plurality of deposition sources used for co-deposition well in the moving direction FD. If the region where these materials are attached to the substrate 10X deviates in the moving direction FD, the film formed by deposition may have uneven properties in the thickness direction (e.g., uneven concentration of the dopant).

[0149] On the other hand, when the vapor deposition directions MD1 and MD2 are inclined in a direction (the first side SD1 or the second side SD2) perpendicular to the moving direction FD, for example Fig.18 As shown in (c), by tilting the evaporation direction of each evaporation source in a direction parallel to the moving direction FD, the materials emitted by each evaporation source can be well mixed in the moving direction FD. As a result, in the film formed by evaporation, it is not easy to produce uneven properties in the thickness direction.

[0150] It should be noted that in Figures 9 to 18 In the manufacturing method illustrated, the hole transport layer HTL, the electron blocking layer EBL, the light emitting layer EML, the hole blocking layer HBL, the electron transport layer ETL, and the electron injection layer EIL are examples of the first thin film formed by tilting the axis of the nozzle. In addition, the hole injection layer HIL is an example of the second thin film formed without tilting the axis of the nozzle.

[0151] As another example, all the thin films constituting the organic layer OR1 including the hole injection layer HIL may be formed by using a thin film having Fig.16 In the example of the embodiment, the nozzle with an axis inclined relative to the Z direction can be formed. In addition, at least one of the hole transport layer HTL, the electron blocking layer EBL, the light emitting layer EML, the hole blocking layer HBL, the electron transport layer ETL and the electron injection layer EIL can be formed by using a nozzle having an axis inclined relative to the Z direction. Fig.15 The example is similarly formed by a nozzle with an axis parallel to the Z direction.

[0152] That is, as long as at least one of the multiple thin films constituting the organic layer OR1 is formed using a nozzle having an axis inclined in the opposite direction to the nozzle N2 of the upper electrode UE1, the organic layer OR1 becomes thinner at the contact edge where the upper electrode UE1 is formed thicker. Therefore, compared with the case where all the multiple thin films are formed using a nozzle having an axis parallel to the Z direction, the conduction between the upper electrode UE1 and the partition wall 6 is improved.

[0153] In addition, the vapor deposition direction of at least one of the multiple thin films constituting the organic layer OR1 may be tilted in the same direction as the vapor deposition direction of the upper electrode UE1 and at a smaller angle than the vapor deposition direction of the upper electrode UE1. In this case, the upper electrode UE1 can also be formed at a position closer to the lower portion 61 than the organic layer OR1 at the contact edge.

[0154] As another example, all the multiple thin films constituting the organic layer OR1 may be formed using a nozzle having an axis parallel to the Z direction. Alternatively, at least one of the multiple thin films constituting the organic layer OR1 may be formed using a nozzle having an axis inclined relative to the Z direction, and the upper electrode UE1 may be formed using a nozzle having an axis parallel to the Z direction.

[0155] exist Figures 9 to 18 In the manufacturing method illustrated, a configuration is illustrated in which the substrate 10X is transported in the moving direction FD by the transport device CD, thereby the substrate 10X is relatively moved relative to the stationary evaporation sources DS1 to DS8. As another example, when the evaporation sources DS1 to DS8 are used for evaporation, the substrate 10X is stationary in each chamber C1 to C8, and the evaporation sources DS1 to DS8 are relatively moved relative to the substrate 10X. In this case, for example, the evaporation devices DD1 to DD8 are respectively provided with a driving mechanism for moving the evaporation sources DS1 to DS8 in the chambers C1 to C8.

[0156] The modification examples described above with respect to the organic layer OR1 and the upper electrode UE1 can also be similarly applied to the organic layers OR2 and OR3 and the upper electrodes UE2 and UE3 .

[0157] The structure of the partition wall 6 is not limited to Figure 5 The following are some modified examples that can be applied to the partition wall 6.

[0158] Fig.19 It is a schematic cross-sectional view showing the first variant of the structure that can be applied to the partition wall 6. In the example of the figure, the two end portions of the bottom layer 63 are aligned with the side surfaces of the shaft layer 64. The side surface on the right side of the partition wall 6 shown in the figure corresponds to the contact edge with the upper electrode UE1. That is, the upper electrode UE1 of the right sub-pixel SP1 in the figure is in contact with the side surfaces of the bottom layer 63 and the shaft layer 64. On the other hand, the organic layer OR1 of the right sub-pixel SP1 is separated from the side surfaces of the bottom layer 63 and the shaft layer 64. As another example, the organic layer OR1 may be in contact with the side surfaces of the bottom layer 63 and the shaft layer 64.

[0159] Fig. 20 6 is a schematic cross-sectional view showing a second modified example of the structure that can be applied to the partition wall 6. In the example of this figure, the lower portion 61 does not have the bottom layer 63. That is, the lower portion 61 is composed of the axial layer 64. In this figure, the side surface on the right side of the partition wall 6 also corresponds to the contact side, and the upper electrode UE1 contacts this side surface. Fig.19 The organic layer OR1 of the right sub-pixel SP1 is separated from the side surface of the shaft layer 64. As another example, the organic layer OR1 may be in contact with the side surface of the shaft layer 64.

[0160] Based on the display device, manufacturing method and manufacturing device of the display device described above as the embodiments of the present invention, all display devices, manufacturing methods and manufacturing devices that can be implemented by appropriate design changes by those skilled in the art also fall within the scope of the present invention as long as they include the main purpose of the present invention.

[0161] Within the scope of the concept of the present invention, those skilled in the art can think of various variations, which also belong to the scope of the present invention. For example, embodiments obtained by adding, deleting or designing the above-mentioned embodiments appropriately by those skilled in the art, or embodiments obtained by adding, omitting or changing the conditions of the processes are included in the scope of the present invention as long as they have the gist of the present invention.

[0162] In addition, regarding other effects brought about by the methods described in the above-mentioned embodiments, regarding the effects that are clear based on the records in this specification, or the effects that can be appropriately thought of by those skilled in the art, it is of course understood that they are the effects brought about by the present invention.

Claims

1. A method for manufacturing a display device, comprising: preparing a substrate including a lower electrode, a rib having a pixel opening overlapping the lower electrode, and a partition having a conductive lower portion disposed on the rib and an upper portion protruding from a side surface of the lower portion, An organic layer is formed on the substrate by evaporation, the organic layer contacts the lower electrode through the pixel opening and emits light in response to application of a voltage, forming an upper electrode covering the organic layer and contacting the lower portion of the partition wall on the substrate by evaporation, Wherein, the organic layer comprises a first thin film, The first vapor deposition source used for forming the first thin film includes a first nozzle, and the first nozzle releases a vaporized material toward the substrate that moves relative to the first vapor deposition source. The second vapor deposition source used in forming the upper electrode includes a second nozzle, and the second nozzle releases a vaporized material toward the substrate that moves relative to the second vapor deposition source. The axis of at least one of the first nozzle and the second nozzle is inclined with respect to the normal direction of the substrate in a direction perpendicular to the moving direction of the substrate in a plan view.

2. The method for manufacturing a display device according to claim 1, wherein: The axis of the first nozzle is inclined with respect to the normal direction toward a first side direction perpendicular to the moving direction in a plan view, The axis of the second nozzle is inclined with respect to the normal direction toward a second side opposite to the first side.

3. The method for manufacturing a display device according to claim 2, wherein: The first vapor deposition source includes a plurality of first nozzles arranged in a direction orthogonal to the moving direction in a plan view. The axes of the plurality of first nozzles are each inclined toward the first side.

4. The method for manufacturing a display device according to claim 2, wherein: The second vapor deposition source includes a plurality of second nozzles arranged in a direction orthogonal to the moving direction in a plan view. The axes of the plurality of second nozzles are each inclined toward the second side.

5. The method for manufacturing a display device according to claim 2, wherein: The organic layer includes a second thin film, The third vapor deposition source used in forming the second thin film includes a third nozzle for releasing the vaporized material. The axis of the third nozzle is parallel to the normal direction.

6. The method for manufacturing a display device according to claim 5, wherein: The first thin film is any one of a hole transport layer, an electron blocking layer, a light emitting layer, a hole blocking layer, an electron transport layer and an electron injection layer.

7. The method for manufacturing a display device according to claim 6, wherein: The second thin film is a hole injection layer.

8. The method for manufacturing a display device according to claim 2, wherein: The partition wall includes a first partition wall and a second partition wall which are arranged so as to sandwich the pixel opening. The upper portion of the first partition wall has a first end portion, The upper portion of the second partition wall has a second end portion, The organic layer is formed so that a thickness directly below the first end portion is smaller than a thickness directly below the second end portion.

9. The method for manufacturing a display device according to claim 8, wherein: The upper electrode is formed such that a thickness directly below the first end portion is greater than a thickness directly below the second end portion.

10. The method for manufacturing a display device according to claim 1, wherein: When forming the first thin film and the upper electrode, the substrate is moved relative to the first vapor deposition source and the second vapor deposition source which are stationary.

11. The method for manufacturing a display device according to claim 1, wherein: When forming the first thin film and the upper electrode, the first vapor deposition source and the second vapor deposition source are moved relative to the stationary substrate.

12. A manufacturing device for a display device, comprising: A first vapor deposition device for forming an organic layer on a substrate, the substrate comprising a lower electrode, a rib having a pixel opening overlapping the lower electrode, and a partition having a conductive lower portion disposed on the rib and an upper portion protruding from a side surface of the lower portion, the organic layer being in contact with the lower electrode through the pixel opening and emitting light in response to application of a voltage; and a second vapor deposition device for forming an upper electrode on the substrate so as to cover the organic layer and contact the lower portion of the partition wall; in, The organic layer includes a first thin film, The first vapor deposition device includes a first vapor deposition source provided with a first nozzle, and the first nozzle releases the vaporized first thin film material toward the substrate moving relative to the first vapor deposition source. The second vapor deposition device includes a second vapor deposition source provided with a second nozzle, and the second nozzle releases the vaporized material of the upper electrode toward the substrate moving relative to the second vapor deposition source. The axis of at least one of the first nozzle and the second nozzle is inclined with respect to the normal direction of the substrate in a direction perpendicular to the moving direction of the substrate in a plan view.

13. The manufacturing device of a display device according to claim 12, wherein: The axis of the first nozzle is inclined with respect to the normal direction toward a first side direction perpendicular to the moving direction in a plan view, The axis of the second nozzle is inclined with respect to the normal direction toward a second side opposite to the first side.

14. The manufacturing device of a display device according to claim 13, wherein: The first vapor deposition source includes a plurality of first nozzles arranged in a direction orthogonal to the moving direction in a plan view. The axes of the plurality of first nozzles are each inclined toward the first side.

15. The manufacturing device of a display device according to claim 13, wherein: The second vapor deposition source includes a plurality of second nozzles arranged in a direction orthogonal to the moving direction in a plan view. The axes of the plurality of second nozzles are each inclined toward the second side.

16. The manufacturing device of a display device according to claim 13, wherein: The organic layer includes a second thin film, The third vapor deposition source used in forming the second thin film includes a third nozzle for releasing the vaporized material. The axis of the third nozzle is parallel to the normal direction.

17. The manufacturing device of a display device according to claim 16, wherein: The first thin film is any one of a hole transport layer, an electron blocking layer, a light emitting layer, a hole blocking layer, an electron transport layer and an electron injection layer.

18. The manufacturing device of a display device according to claim 17, wherein: The second thin film is a hole injection layer.

19. The manufacturing apparatus of a display device according to claim 12, wherein: When forming the first thin film and the upper electrode, the substrate is moved relative to the first vapor deposition source and the second vapor deposition source which are stationary.

20. The manufacturing apparatus of a display device according to claim 12, wherein: When forming the first thin film and the upper electrode, the first vapor deposition source and the second vapor deposition source are moved relative to the stationary substrate.

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