Firmware upgrading method and device based on dual-core DSP servo driver

Abstract

The invention relates to a firmware upgrading method and device based on a dual-core DSP servo driver. The method comprises the steps that in a user verification mode, a main core obtains a firmware upgrading instruction according to verification information input by a user; if the firmware upgrading instruction is a core firmware upgrading command, the main core bootstrap program calls the main core to erase an on-chip flash memory of the main core and sends an application program file of the main core to complete software solidification. If the firmware upgrading instruction is an FPGA upgrading command, the main core bootstrap program calls the main core to erase the off-chip flash memory, and upgrading of the servo driver is completed. If the firmware upgrading instruction is a serial port switching command, the firmware main core bootstrap program calls a main core reset serial port and then enters an auxiliary core bootstrap program. And obtaining verification information through the auxiliary core bootstrap program, and calling the auxiliary core to complete software solidification of the auxiliary core and dual-core DSP reset. By adopting the method, the reliability, the safety, the flexibility and the efficiency of firmware upgrading can be improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a firmware upgrade method and device based on a dual-core DSP servo driver. Background Art

[0002] The servo drive based on dual-core DSP has two cores, one main core is used for the calculation of the core algorithm of the drive, and the secondary core communicates with the PLC (programmable logic controller) or the host computer software through EtherCAT (Ethernet control automation technology). The main and secondary cores of DSP have independent on-chip FLASH (flash memory) and RAM (random access memory), and share some peripherals. The two cores can exchange data through the shared RAM. The traditional method is to solve the software upgrade through the data exchange between the two cores, which has a large amount of repeated calculation of data and low processing efficiency. When the hardware is interrupted, the firmware upgrade data after the restart is lost, which leads to the obstruction of firmware upgrade.

[0003] At present, the common solution for dual-core upgrade is to use independent hardware interfaces, which increases the number of interfaces and costs. In addition, dual-core has a master-slave problem. The existing technology is to upgrade the slave core through the main core. This method requires writing a communication program between the main core and the slave core, which is cumbersome to process data and increases hardware consumption. Solving software upgrades through data interaction between the two cores involves repeated calculation of a large amount of data, low processing efficiency, and when the hardware is interrupted, the firmware upgrade data after restart is lost, which hinders the firmware upgrade. Summary of the invention

[0004] Based on this, it is necessary to provide a firmware upgrade method and device based on a dual-core DSP servo drive that can utilize hardware switching to improve the stability of firmware upgrades in order to address the above technical issues.

[0005] A firmware upgrade method based on a dual-core DSP servo driver, the method comprising:

[0006] In response to the firmware upgrade instruction sent by the host computer through the serial port, the dual-core DSP starts the main core boot program and enters the user verification mode. The dual-core DSP includes a DSP main core and a DSP secondary core.

[0007] In the user verification mode, the DSP main core obtains the firmware upgrade instruction according to the verification information input by the user.

[0008] If the firmware upgrade instruction is a core firmware upgrade command, the main core boot program calls the DSP main core to erase the on-chip flash memory data of the DSP main core, and sends the application file of the DSP main core to complete the software solidification. If the firmware upgrade instruction is an FPGA firmware upgrade command, the main core boot program calls the DSP main core to erase the off-chip flash memory data and sends the FPGA application to complete the servo drive firmware upgrade. If the firmware upgrade instruction is a serial port switching command, the firmware main core boot program calls the DSP main core to reset the serial port and then enters the sub-core boot program of the DSP sub-core.

[0009] The verification information is obtained through the sub-core boot program, and the DSP sub-core is called according to the verification information to complete the software solidification of the DSP sub-core and the reset of the dual-core DSP.

[0010] In one of the embodiments, it also includes: after the servo driver is powered on, the dual-core DSP enters the main core boot entry to prompt the user for operation, and responds to the firmware upgrade instruction sent by the host computer through the serial port according to the user operation to start the main core boot program to enter the user verification mode.

[0011] In one of the embodiments, it also includes: in the user verification mode, the DSP main core detects the debugging serial port to receive the verification information input by the user, the verification information obtains the verification result through the DSP main core application, the command upgrade mode of the DSP main core is started according to the verification result, and the firmware upgrade instruction is obtained.

[0012] In one embodiment, the method further includes: if the verification result is that the password is correct, the DSP main core enters the command upgrade mode and obtains the firmware upgrade instruction. Otherwise, the DSP main core waits for the user to input the next verification information.

[0013] In one of the embodiments, it further includes: if the firmware upgrade instruction is a serial port switching command, the main core boot program calls the DSP main core to reset the serial port, and guides the DSP sub-core to enter the sub-core boot program through the IPC interface.

[0014] In one of the embodiments, it also includes: obtaining verification information input by the user through the sub-core boot program, obtaining verification results of the verification information through the DSP sub-core application, and starting the command upgrade mode of the DSP sub-core according to the verification results to complete the software solidification of the DSP sub-core and the reset of the dual-core DSP.

[0015] In one embodiment, it also includes: starting the command upgrade mode of the DSP sub-core according to the verification result, and receiving the firmware upgrade instruction input by the user. If the firmware upgrade instruction is a sub-core firmware upgrade command, the sub-core boot program calls the DSP sub-core to erase the on-chip flash memory data of the DSP sub-core, and sends the application file of the DSP sub-core to complete the software solidification. If the firmware upgrade instruction is a restart command, the sub-core boot program calls the DSP sub-core to start the watchdog reset of the dual-core DSP.

[0016] A firmware upgrade device based on a dual-core DSP servo driver, the device comprising:

[0017] The upgrade instruction verification module is used to respond to the firmware upgrade instruction sent by the host computer through the serial port, and the dual-core DSP starts the main core boot program and enters the user verification mode. The dual-core DSP includes a DSP main core and a DSP secondary core.

[0018] The main core firmware upgrade instruction acquisition module is used for the DSP main core to obtain the firmware upgrade instruction according to the verification information input by the user in the user verification mode.

[0019] The main core firmware upgrade module is used to call the DSP main core to erase the on-chip flash memory data of the DSP main core if the firmware upgrade instruction is a core firmware upgrade command, and send the application file of the DSP main core to complete the software solidification. If the firmware upgrade instruction is an FPGA firmware upgrade command, the main core boot program calls the DSP main core to erase the off-chip flash memory data and send the FPGA application to complete the servo drive firmware upgrade. If the upgrade instruction is a serial port switching command, the firmware main core boot program calls the DSP main core to reset the serial port and then enters the sub-core boot program of the DSP sub-core.

[0020] The sub-core firmware upgrade module is used to obtain verification information through the sub-core boot program, and call the DSP sub-core according to the verification information to complete the software solidification of the DSP sub-core and the reset of the dual-core DSP.

[0021] A computer device comprises a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0022] In response to the firmware upgrade instruction sent by the host computer through the serial port, the dual-core DSP starts the main core boot program and enters the user verification mode. The dual-core DSP includes a DSP main core and a DSP secondary core.

[0023] In the user verification mode, the DSP main core obtains the firmware upgrade instruction according to the verification information input by the user.

[0024] If the firmware upgrade instruction is a core firmware upgrade command, the main core boot program calls the DSP main core to erase the on-chip flash memory data of the DSP main core, and sends the application file of the DSP main core to complete the software solidification. If the firmware upgrade instruction is an FPGA firmware upgrade command, the main core boot program calls the DSP main core to erase the off-chip flash memory data and sends the FPGA application to complete the servo drive firmware upgrade. If the firmware upgrade instruction is a serial port switching command, the firmware main core boot program calls the DSP main core to reset the serial port and then enters the sub-core boot program of the DSP sub-core.

[0025] The verification information is obtained through the sub-core boot program, and the DSP sub-core is called according to the verification information to complete the software solidification of the DSP sub-core and the reset of the dual-core DSP.

[0026] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the following steps:

[0027] In response to the firmware upgrade instruction sent by the host computer through the serial port, the dual-core DSP starts the main core boot program and enters the user verification mode. The dual-core DSP includes a DSP main core and a DSP secondary core.

[0028] In the user verification mode, the DSP main core obtains the firmware upgrade instruction according to the verification information input by the user.

[0029] If the firmware upgrade instruction is a core firmware upgrade command, the main core boot program calls the DSP main core to erase the on-chip flash memory data of the DSP main core, and sends the application file of the DSP main core to complete the software solidification. If the firmware upgrade instruction is an FPGA firmware upgrade command, the main core boot program calls the DSP main core to erase the off-chip flash memory data and sends the FPGA application to complete the servo drive firmware upgrade. If the firmware upgrade instruction is a serial port switching command, the firmware main core boot program calls the DSP main core to reset the serial port and then enters the sub-core boot program of the DSP sub-core.

[0030] The verification information is obtained through the sub-core boot program, and the DSP sub-core is called according to the verification information to complete the software solidification of the DSP sub-core and the reset of the dual-core DSP.

[0031] The above-mentioned firmware upgrade method and device based on dual-core DSP servo drive adopts a dual-core DSP servo drive, in which one core is used to run the current firmware and the other core is used to process the upgrade operation. The upgrade operation will not interrupt the normal operation of the servo drive because the current firmware and the upgrade operation are run on different cores. According to the judgment of the upgrade instruction input by the user, the main and auxiliary cores can be quickly switched through the scheduling of the hardware serial port to maintain the responsiveness and stability of the system during the upgrade. In addition, the servo drive supports different types of firmware upgrades, such as core firmware, FPGA firmware, etc. The system can select and execute different types of upgrades as needed without having to upgrade the entire system, thereby improving the flexibility of the firmware upgrade of the entire system. The system can quickly respond to upgrade failures or errors to ensure that there will be no downtime due to upgrade problems. If problems occur during the upgrade process, the system has the ability to roll back without affecting the operation, or hot switch to the old version, thereby avoiding cumbersome dual-core data interaction and communication. This makes the firmware upgrade of the dual-core DSP servo drive highly reliable, safe, flexible and efficient, and can be carried out without interrupting critical tasks, improving the maintainability and performance of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A hardware block diagram of a dual-core DSP servo driver in one embodiment;

[0033] Figure 2 A schematic flow chart of a firmware upgrade method based on a dual-core DSP servo driver in one embodiment;

[0034] Figure 3 A schematic diagram of a DSP main core boot program and firmware upgrade process in one embodiment;

[0035] Figure 4 A schematic diagram of a DSP secondary core boot program and firmware upgrade process in one embodiment;

[0036] Figure 5 It is a structural block diagram of a firmware upgrade device based on a dual-core DSP servo driver in one embodiment;

[0037] Figure 6 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0039] The present application provides a firmware upgrade method based on a dual-core DSP servo driver, which can be applied to Figure 1 The hardware system application environment of the dual-core DSP servo drive shown in FIG. Among them, dual-core DSP: The DSP main core (CPU1) is mainly used to run the control algorithm software. Its internal on-chip FLASH is used to store DSP software. FPGA chip: The FPGA chip is mainly used for external digital logic operations and the implementation of various encoder interface circuits. Off-chip FLASH: The off-chip FLASH is used to store FPGA programs and servo drive parameters. EtherCAT communication circuit: It mainly enables the servo drive to communicate with the EtherCAT master (host computer) as an EtherCAT slave (servo drive). Debug serial port: It is used to exchange information with the drive servo through commands. IGBT drive circuit: It is used to drive IGBT to realize servo motor current control.

[0040] In one embodiment, Figure 2 As shown, a firmware upgrade method based on a dual-core DSP servo drive is provided. Figure 1 The hardware system in the example is used to illustrate the process, including the following steps:

[0041] Step 202: In response to the firmware upgrade instruction sent by the host computer through the serial port, the dual-core DSP starts the main core boot program and enters the user verification mode.

[0042] The dual-core DSP includes a DSP main core and a DSP sub-core.

[0043] The software that needs to be solidified for the dual-core drive servo system is as follows:

[0044] 1) DSP main core (CPU1) boot program: stored in the FLASH on the main core chip;

[0045] 2) DSP secondary core (CPU2) boot program: stored in the secondary core on-chip FLASH;

[0046] 3) DSP main core (CPU1) application: storage and main core on-chip FLASH;

[0047] 4) DSP secondary core (CPU2) application: storage and secondary core on-chip FLASH;

[0048] 5) FPGA program: stored in the off-chip FLASH, and the firmware is upgraded and loaded through the DSP main core (CPU1).

[0049] Step 204: In the user verification mode, the DSP main core obtains a firmware upgrade instruction according to the verification information input by the user.

[0050] Step 206, if the firmware upgrade instruction is a core firmware upgrade instruction, the main core boot program calls the DSP main core to erase the on-chip flash memory data of the DSP main core, and sends the application file of the DSP main core to complete the software solidification. If the firmware upgrade instruction is an FPGA firmware upgrade command, the main core boot program calls the DSP main core to erase the off-chip flash memory data, and sends the FPGA application program to complete the servo drive firmware upgrade. If the firmware upgrade instruction is a serial port switching command, the firmware main core boot program calls the DSP main core to reset the serial port and then enters the sub-core boot program of the DSP sub-core.

[0051] Step 208, obtaining verification information through the sub-core boot program, and calling the DSP sub-core according to the verification information to complete the software fixation of the DSP sub-core and the reset of the dual-core DSP.

[0052] The above-mentioned firmware upgrade method based on a dual-core DSP servo drive adopts a dual-core DSP servo drive, in which one core is used to run the current firmware and the other core is used to process the upgrade operation. The upgrade operation will not interrupt the normal operation of the servo drive because the current firmware and the upgrade operation are run on different cores. According to the judgment of the upgrade instruction input by the user, the main and auxiliary cores can be quickly switched through the scheduling of the hardware serial port to maintain the responsiveness and stability of the system during the upgrade. In addition, the servo drive supports different types of firmware upgrades, such as core firmware, FPGA firmware, etc. The system can select and execute different types of upgrades as needed without having to upgrade the entire system, thereby improving the flexibility of the firmware upgrade of the entire system. The system can quickly respond to upgrade failures or errors to ensure that there will be no downtime due to upgrade problems. If problems occur during the upgrade process, the system has the ability to roll back without affecting the operation, or hot switch to the old version, thereby avoiding cumbersome dual-core data interaction and communication. This makes the firmware upgrade of the dual-core DSP servo drive highly reliable, safe, flexible and efficient, and can be carried out without interrupting critical tasks, improving the maintainability and performance of the system.

[0053] In one embodiment, after the servo drive is powered on, the dual-core DSP enters the main core boot entry to prompt the user for operation, and responds to the firmware upgrade instruction sent by the host computer through the serial port according to the user operation to start the main core boot program to enter the user verification mode.

[0054] In one of the embodiments, in the user verification mode, the DSP main core detects the debugging serial port to receive the verification information input by the user, the verification information obtains the verification result through the DSP main core application, and the command upgrade mode of the DSP main core is started according to the verification result, and the firmware upgrade instruction is obtained.

[0055] In one embodiment, if the verification result is that the password is correct, the DSP main core enters the command upgrade mode and obtains the firmware upgrade instruction. Otherwise, the DSP main core waits for the user to input the next verification information.

[0056] In one embodiment, if the firmware upgrade instruction is a serial port switching command, the main core boot program calls the DSP main core to reset the serial port, and guides the DSP sub-core to enter the sub-core boot program through the IPC interface.

[0057] In one embodiment, the verification information input by the user is obtained through the secondary core boot program, and the verification result is obtained through the DSP secondary core application program. The command upgrade mode of the DSP secondary core is started according to the verification result to complete the software solidification of the DSP secondary core and the reset of the dual-core DSP.

[0058] It is worth noting that by requiring the user to enter verification information and passing it to the DSP secondary core application, the system can perform a verification step to secondarily ensure that only authorized users can perform secondary core upgrades. This helps improve the security of the system and prevent unauthorized users from operating the secondary core. The system is able to decide whether to perform an upgrade based on the verification information. This means that not only can the secondary core be upgraded, but it can also decide whether the upgrade is necessary, and automatically trigger or skip the upgrade process based on the results of the verification information. In upgrade mode, part of the dual-core DSP will be upgraded, so this technical means needs to ensure the stability of the upgrade. By verifying before the upgrade, the risk of upgrade failure can be reduced, thereby improving the stability of the dual-core DSP. It helps to ensure that the firmware upgrade process of the servo drive is safe and controllable and will not affect the normal operation of the system.

[0059] In one embodiment, the command upgrade mode of the DSP sub-core is started according to the verification result, and the firmware upgrade instruction input by the user is received. If the firmware upgrade instruction is a sub-core firmware upgrade command, the sub-core boot program calls the DSP sub-core to erase the on-chip flash memory data of the DSP sub-core, and sends the application file of the DSP sub-core to complete the software solidification. If the firmware upgrade instruction is a restart command, the sub-core boot program calls the DSP sub-core to start the watchdog reset of the dual-core DSP.

[0060] It is worth noting that different upgrade operations are allowed to be performed according to the firmware upgrade instructions input by the user. This makes the system more flexible and can perform core firmware upgrades or restart operations as needed. When the firmware upgrade instruction is a core firmware upgrade command, the secondary core boot program calls the DSP secondary core to perform the core firmware upgrade. This helps to ensure consistency between the main core and the secondary core, as well as the stability and functionality of the dual-core DSP. When the firmware upgrade instruction is a restart command, the secondary core boot program is responsible for starting the watchdog to reset the dual-core DSP. This allows the system to restart after the upgrade process, ensuring that the new firmware takes effect at startup while maintaining the stability of the dual-core DSP. This ensures the stable operation of the servo drive system and the effective management of firmware updates.

[0061] In one embodiment, if Figure 3 As shown in the figure, the DSP main core boot program and firmware upgrade process are shown. The specific steps are as follows:

[0062] 1) The servo drive is powered on to reset the DSP main core (CPU1). The DSP enters the main core boot entry and starts a 5-second countdown to prompt the user to operate.

[0063] 2) The DSP main core (CPU1) detects whether there is a carriage return character input at the debugging serial port. If a carriage return character is received, it waits for the user to enter a password.

[0064] 3) The DSP main core (CPU1) boots the program to verify whether the password is correct. If the password is correct, it enters the command upgrade mode. Otherwise, it continues to wait for the user to enter the password.

[0065] 4) After the DSP main core (CPU1) enters the command upgrade mode, it waits for the user to input the upgrade command. If it receives the upgrade DSP1 firmware command sent by the user through the debug serial port, the DSP main core (CPU1) erases the corresponding sector of the FLASH on the DSP main core (CPU1) chip, and prompts the user to send the main core application bin file through the XMODEM protocol to complete the software solidification.

[0066] 5) If the command received is to upgrade the FPGA firmware, the DSP main core (CPU1) erases the off-chip FLASH and prompts the user to send the FPGA application program through the XMODEM protocol.

[0067] 6) If the serial port switching command is received, the DSP main core (CPU1) reconfigures the serial port and guides the DSP secondary core (CPU2) to enter the secondary core (CPU2) boot program through IPC.

[0068] In one embodiment, if Figure 4 As shown in the figure, the DSP secondary core boot program and firmware upgrade process are shown. The specific steps are as follows:

[0069] 1) The DSP main core (CPU1) boots and the DSP enters the secondary core boot entry. At this time, the DSP secondary core (CPU2) occupies the serial port resources, displays the CPU2 information, and starts a 5-second countdown to prompt the user to operate.

[0070] 2) The DSP sub-core (CPU2) detects whether there is a carriage return character input at the debugging serial port. If a carriage return character is received, it waits for the user to enter a password.

[0071] 3) The DSP sub-core (CPU2) boots the program to verify whether the password is correct. If the password is correct, it enters the command upgrade mode. Otherwise, it continues to wait for the user to enter the password.

[0072] 4) After the DSP sub-core (CPU2) enters the command upgrade mode, it waits for the user to input the upgrade command. If it receives the upgrade command of the DSP sub-core (CPU2) firmware sent by the user through the debugging serial port, the DSP sub-core (CPU2) erases the corresponding sector of the FLASH on the DSP sub-core (CPU2) chip, and prompts the user to send the sub-core application bin file through the XMODEM protocol to complete the software solidification.

[0073] 5) If REBOOT is received, the DSP sub-core (CPU2) starts the watchdog and resets the DSP.

[0074] It should be understood that although Figure 2-4 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 2-4 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0075] In one embodiment, Figure 5 As shown, a firmware upgrade device based on a dual-core DSP servo driver is provided, comprising: an upgrade instruction verification module 502, a main core firmware upgrade instruction acquisition module 504, a main core firmware upgrade module 506 and a secondary core firmware upgrade module 508, wherein:

[0076] The upgrade instruction verification module 502 is used to respond to the firmware upgrade instruction sent by the host computer through the serial port, and the dual-core DSP starts the main core boot program and enters the user verification mode. The dual-core DSP includes a DSP main core and a DSP secondary core.

[0077] The main core firmware upgrade instruction acquisition module 504 is used for the DSP main core to obtain the firmware upgrade instruction according to the verification information input by the user in the user verification mode.

[0078] The main core firmware upgrade module 506 is used for, if the firmware upgrade instruction is a core firmware upgrade command, the main core boot program calls the DSP main core to erase the on-chip flash memory data of the DSP main core, and sends the application file of the DSP main core to complete the software solidification. If the firmware upgrade instruction is an FPGA firmware upgrade command, the main core boot program calls the DSP main core to erase the off-chip flash memory data, and sends the FPGA application program to complete the servo drive firmware upgrade. If the upgrade instruction is a serial port switching command, the firmware main core boot program calls the DSP main core to reset the serial port and then enters the sub-core boot program of the DSP sub-core.

[0079] The secondary core firmware upgrade module 508 is used to obtain verification information through the secondary core boot program, and call the DSP secondary core according to the verification information to complete the software fixation of the DSP secondary core and the reset of the dual-core DSP.

[0080] The specific definition of a firmware upgrade device based on a dual-core DSP servo driver can be found in the above definition of a firmware upgrade method based on a dual-core DSP servo driver, which will not be repeated here. Each module in the above-mentioned firmware upgrade device based on a dual-core DSP servo driver can be implemented in whole or in part by software, hardware, and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0081] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 6 As shown. The computer device includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a firmware upgrade method based on a dual-core DSP servo driver is implemented. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covered on the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse, etc.

[0082] Those skilled in the art will understand that Figure 5-6 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0083] In one embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0084] In response to the firmware upgrade instruction sent by the host computer through the serial port, the dual-core DSP starts the main core boot program and enters the user verification mode. The dual-core DSP includes a DSP main core and a DSP secondary core.

[0085] In the user verification mode, the DSP main core obtains the firmware upgrade instruction according to the verification information input by the user.

[0086] If the firmware upgrade instruction is a core firmware upgrade command, the main core boot program calls the DSP main core to erase the on-chip flash memory data of the DSP main core, and sends the application file of the DSP main core to complete the software solidification. If the firmware upgrade instruction is an FPGA firmware upgrade command, the main core boot program calls the DSP main core to erase the off-chip flash memory data and sends the FPGA application to complete the servo drive firmware upgrade. If the firmware upgrade instruction is a serial port switching command, the firmware main core boot program calls the DSP main core to reset the serial port and then enters the sub-core boot program of the DSP sub-core.

[0087] The verification information is obtained through the sub-core boot program, and the DSP sub-core is called according to the verification information to complete the software solidification of the DSP sub-core and the reset of the dual-core DSP.

[0088] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0089] In response to the firmware upgrade instruction sent by the host computer through the serial port, the dual-core DSP starts the main core boot program and enters the user verification mode. The dual-core DSP includes a DSP main core and a DSP secondary core.

[0090] In the user verification mode, the DSP main core obtains the firmware upgrade instruction according to the verification information input by the user.

[0091] If the firmware upgrade instruction is a core firmware upgrade command, the main core boot program calls the DSP main core to erase the on-chip flash memory data of the DSP main core, and sends the application file of the DSP main core to complete the software solidification. If the firmware upgrade instruction is an FPGA firmware upgrade command, the main core boot program calls the DSP main core to erase the off-chip flash memory data and sends the FPGA application to complete the servo drive firmware upgrade. If the firmware upgrade instruction is a serial port switching command, the firmware main core boot program calls the DSP main core to reset the serial port and then enters the sub-core boot program of the DSP sub-core.

[0092] The verification information is obtained through the sub-core boot program, and the DSP sub-core is called according to the verification information to complete the software solidification of the DSP sub-core and the reset of the dual-core DSP.

[0093] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0094] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0095] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention. It should be pointed out that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A firmware upgrade method based on a dual-core DSP servo driver, characterized in that: The method comprises: In response to the firmware upgrade instruction sent by the host computer through the serial port, the dual-core DSP starts the main core boot program and enters the user verification mode; the dual-core DSP includes a DSP main core and a DSP sub-core; In the user verification mode, the DSP main core obtains the firmware upgrade instruction according to the verification information input by the user; If the firmware upgrade instruction is a main core firmware upgrade command, the main core boot program calls the DSP main core to erase the on-chip flash memory data of the DSP main core, and sends the application file of the DSP main core to complete the software solidification; if the firmware upgrade instruction is an FPGA firmware upgrade command, the main core boot program calls the DSP main core to erase the off-chip flash memory data, and sends the FPGA application to complete the servo drive firmware upgrade; if the firmware upgrade instruction is a serial port switching command, the firmware main core boot program calls the DSP main core to reset the serial port and then enters the sub-core boot program of the DSP sub-core; The verification information is obtained through the sub-core boot program, and the DSP sub-core is called according to the verification information to complete the software solidification of the DSP sub-core and the resetting of the dual-core DSP.

2. The method according to claim 1, characterized in that in, In response to the firmware upgrade command sent by the host computer through the serial port, the dual-core DSP starts the main core boot program and enters the user verification mode, including: After the servo drive is powered on, the dual-core DSP enters the main core boot entry to prompt the user for operation, and responds to the firmware upgrade command sent by the host computer through the serial port according to the user operation to start the main core boot program to enter the user verification mode.

3. The method according to claim 1, characterized in that In the user verification mode, the DSP main core obtains the firmware upgrade instruction according to the verification information input by the user, including: In the user verification mode, the DSP main core detects the debugging serial port to receive verification information input by the user, the verification information obtains the verification result through the DSP main core application, starts the command upgrade mode of the DSP main core according to the verification result, and obtains the firmware upgrade instruction.

4. The method according to claim 3, characterized in that Starting the command upgrade mode of the DSP main core according to the verification result and obtaining the firmware upgrade instruction includes: If the verification result is that the password is correct, the DSP main core enters the command upgrade mode and obtains the firmware upgrade instruction; otherwise, the DSP main core waits for the user to input the next verification information.

5. The method according to claim 1, characterized in that If the firmware upgrade instruction is a serial port switching command, the main core boot program calls the DSP main core to reset the serial port and then enters the secondary core boot program of the DSP secondary core, including: If the firmware upgrade instruction is a serial port switching command, the main core boot program calls the DSP main core to reset the serial port, and guides the DSP sub-core to enter the sub-core boot program through the IPC interface.

6. The method according to claim 5, characterized in that The verification information is obtained by the sub-core boot program, and the DSP sub-core is called according to the verification information to complete the software solidification of the DSP sub-core and the resetting of the dual-core DSP, including: The verification information input by the user is obtained through the secondary core boot program, and the verification result of the verification information is obtained through the DSP secondary core application program. The command upgrade mode of the DSP secondary core is started according to the verification result to complete the software solidification of the DSP secondary core and the reset of the dual-core DSP.

7. The method according to claim 6, characterized in that Starting the command upgrade mode of the DSP secondary core according to the verification result to complete the software solidification of the DSP secondary core and the resetting of the dual-core DSP includes: Starting the command upgrade mode of the DSP sub-core according to the verification result, and receiving the firmware upgrade instruction input by the user; If the firmware upgrade instruction is a secondary core firmware upgrade command, the secondary core boot program calls the DSP secondary core to erase the on-chip flash memory data of the DSP secondary core, and sends the application file of the DSP secondary core to complete software solidification; if the firmware upgrade instruction is a restart command, the secondary core boot program calls the DSP secondary core to start the watchdog to reset the dual-core DSP.

8. A firmware upgrade device based on a dual-core DSP servo driver, characterized in that: The device comprises: The upgrade instruction verification module is used to respond to the firmware upgrade instruction sent by the host computer through the serial port, and the dual-core DSP starts the main core boot program and enters the user verification mode; the dual-core DSP includes a DSP main core and a DSP secondary core; A main core firmware upgrade instruction acquisition module, used for the DSP main core to obtain the firmware upgrade instruction according to the verification information input by the user in the user verification mode; The main core firmware upgrade module is used for, if the firmware upgrade instruction is a core firmware upgrade command, the main core boot program calls the DSP main core to erase the on-chip flash memory data of the DSP main core, and sends the application file of the DSP main core to complete the software solidification; if the firmware upgrade instruction is an FPGA firmware upgrade command, the main core boot program calls the DSP main core to erase the off-chip flash memory data, and sends the application of the FPGA to complete the servo drive firmware upgrade; if the upgrade instruction is a serial port switching command, the firmware main core boot program calls the DSP main core to reset the serial port and then enters the sub-core boot program of the DSP sub-core; The secondary core firmware upgrade module is used to obtain the verification information through the secondary core boot program, and call the DSP secondary core according to the verification information to complete the software solidification of the DSP secondary core and the reset of the dual-core DSP.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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