Terminal dormancy awakening method based on state machine

Abstract

According to the technical scheme, the terminal dormancy awakening method based on the state machine comprises the steps that NAD and MCU interact through GPIO pins, and state synchronization is guaranteed; a layered dormancy voting mechanism is adopted in the application process in the NAD dormancy process, it is guaranteed that all services of the NAD are sequentially processed and completed, after NAD dormancy is completed, the MCU is interactively notified again through GPIO pins, the MCU is made to enter the dormancy state, and therefore the dormancy time sequence of the terminal is guaranteed; a layered wake-up voting mechanism is adopted in an application process in the NAD wake-up process, it is guaranteed that all services of the NAD are sequentially initialized and completed, after NAD wake-up is completed, the MCU is interactively notified again through the GPIO pin, wake-up states are guaranteed to be synchronous, and therefore the wake-up time sequence of the terminal is guaranteed; and the NAD updates the state machine in time through the change of the GPIO pin level combination, so that correct switching of the dormancy wake-up process is ensured.

Description

Technical Field

[0001] The invention relates to the field of automobile remote control, and in particular to a terminal sleep awakening method based on a state machine. Background Art

[0002] The current basic architecture of the vehicle-mounted TBOX terminal is the MCU+NAD mode. NAD generally determines whether NAD meets the hard conditions for entering sleep or waking up by unidirectionally detecting the changes in the GPIO pin level. NAD and MCU do not interact with each other through GPIO pins; NAD does not use a hierarchical sleep voting mechanism during sleep, and does not notify the MCU again after sleep is completed; NAD does not use a hierarchical wake-up voting mechanism during wake-up, and does not notify the MCU again after wake-up is completed; NAD does not use a state machine to maintain the sleep and wake-up state and its state machine switching.

[0003] NAD determines whether NAD meets the hard conditions for sleep or wake-up by unidirectionally detecting the GPIO pin level. NAD and MCU do not interact with each other through GPIO pins, and state synchronization cannot be guaranteed. During NAD sleep, a hierarchical sleep voting mechanism is not used, and it cannot be guaranteed that all NAD services are processed in sequence. After NAD sleeps, it does not notify the MCU again through GPIO pin interaction to put the MCU into sleep state, so the terminal sleep timing cannot be guaranteed. During NAD wake-up, a hierarchical wake-up voting mechanism is not used, and it cannot be guaranteed that all NAD services are initialized in sequence. After NAD wakes up, it does not notify the MCU again through GPIO pin interaction to ensure wake-up state synchronization, so the terminal wake-up timing cannot be guaranteed. NAD does not update the state machine in time through changes in the GPIO pin level combination, so the correct switching of the sleep and wake-up process cannot be guaranteed. Summary of the invention

[0004] The technical problem to be solved by the present invention is how to ensure that various services are processed in sequence and that various states are switched normally during the wake-up and sleep processes.

[0005] The present invention provides a terminal sleep awakening method based on a state machine, comprising: NAD and MCU interact through GPIO pins to ensure state synchronization; During NAD hibernation, the application process adopts a hierarchical hibernation voting mechanism to ensure that all NAD services are processed in sequence. After NAD hibernation is completed, the MCU is notified again through the GPIO pin interaction to put the MCU into hibernation, thereby ensuring the terminal hibernation timing; During the NAD wake-up process, a hierarchical wake-up voting mechanism is used to ensure that all NAD services are initialized in sequence. After the NAD wakes up, it also notifies the MCU again through the GPIO pin interaction to ensure the wake-up state synchronization, thereby ensuring the terminal wake-up timing; NAD updates the state machine in time through the changes in the GPIO pin level combination, thereby ensuring the correct switching of the sleep and wake-up processes.

[0006] Furthermore, the MCU and NAD interact through GPIO pins to determine whether the NAD meets the hard conditions for entering sleep or waking up, and update the state machine.

[0007] Furthermore, the NAD detection state machine enters the wake-up process and starts the hierarchical wake-up voting mechanism, first ensuring that all service layer processes are started, and then starting all application layer processes, so that all NAD services are initialized in sequence; then the MCU is notified of the completion of the wake-up process through GPIO pin interaction, and finally the terminal wakes up and works normally, ensuring the synchronization of the wake-up state, thereby ensuring the terminal wake-up timing.

[0008] Furthermore, the NAD detection state machine enters the sleep process and starts the hierarchical sleep voting mechanism, first ensuring that all application layer processes have completed sleep, and then all service layer processes have completed sleep, so that all NAD services are processed in sequence; then the MCU is notified of the completion of the sleep process through GPIO pin interaction, and finally the system suspends the terminal to enter sleep, thereby ensuring the terminal sleep timing.

[0009] Furthermore, during the NAD wake-up and hibernation process, the state machine is updated at any time by monitoring the changes in the GPIO pin level combination. During the wake-up process, the state machine detects that it needs to enter hibernation, and it needs to complete the wake-up process first, and then determine whether the state machine needs to enter hibernation. If necessary, it enters the hibernation process; during the hibernation process, the state machine detects that it needs to wake up, and it needs to complete the hibernation process first, and then determine whether the state machine needs to wake up. If necessary, it enters the wake-up process; the state machine manages the switching of the hibernation and wake-up states to ensure the timing integrity of the hibernation and wake-up process and the accuracy of the execution results.

[0010] Furthermore, the GPIO pins include: There are 2 GPIO pins on the MCU side: NAD_WAKEUP_MCU and NAD_TO_MCU; There are 2 GPIO pins on the NAD side: MCU_WAKEUP_NAD and MCU_TO_NAD.

[0011] Furthermore, the GPIO pin interaction includes: the MCU side notifies the NAD side of wake-up startup by pulling down the MCU_WAKEUP_NAD pin, and after the NAD side is successfully started, notifies the MCU side of the completion of the NAD side wake-up startup by pulling up the NAD_TO_MCU pin; the MCU side notifies the NAD side of preparation for sleep by pulling up the MCU_TO_NAD pin, and after the application layer process and service layer process on the NAD side sleep in turn, notifies the MCU side of the completion of the NAD side sleep by pulling down NAD_TO_MCU.

[0012] Furthermore, the state machine includes the following states: When the device is powered on, it will first run the MCU and start the NAD. Normal operation, MCU side startup is completed, and NAD side service layer process and application layer process are started respectively; Sleep: MCU notifies NAD that sleep conditions are met. During sleep, the application layer process and service layer process on the NAD side start voting to sleep respectively; The sleep process is completed. The application layer process and service layer process on the NAD side all vote to sleep and notify the MCU to sleep. Wake up, the MCU side notifies the NAD side that the wake-up conditions are met; During the wake-up process, the application layer process and service layer process on the NAD side wake up, vote and start respectively.

[0013] Furthermore, the GPIO pin states of the state machine are as follows: Power-on startup: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low; Normal operation: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low; Sleep: MCU_WAKEUP_NAD is low and MCU_TO_NAD is high; In sleep mode: MCU_WAKEUP_NAD is low and MCU_TO_NAD is high; Sleep complete: MCU_WAKEUP_NAD is high and MCU_TO_NAD is high; Wake-up: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low; Waking up: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low.

[0014] Furthermore, the updating of the state machine is achieved by monitoring the changes in the GPIO pin level combination, and the state machine updating is based on system interrupt notification rather than polling timing inspection.

[0015] Furthermore, the hierarchical wake-up voting mechanism ensures that all service layer processes are started first, and then starts all application layer processes; The hierarchical dormancy voting mechanism ensures that all application layer processes are fully dormant first, and then all service layer processes are fully dormant.

[0016] The present invention also includes a vehicle-mounted terminal device, which applies the above-mentioned sleep awakening method.

[0017] The present invention enables all services of NAD and MCU to be processed in sequence, thereby ensuring the synchronization of terminal sleep and wake-up timing and state; and updating the state machine in time, thereby ensuring the correct switching of the sleep and wake-up process. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is the GPIO pin diagram of the present invention; Figure 2 is a normal wake-up flow chart of the present invention; Figure 3 is a normal sleep flow chart of the present invention; Figure 4 It is a state transition diagram of the state machine of the present invention. Specific implementation methods

[0020] The following describes several preferred embodiments of the present invention with reference to the drawings in the specification, so that the technical content is clearer and easier to understand. The present invention can be embodied in many different forms of embodiments, and the protection scope of the present invention is not limited to the embodiments mentioned in the text.

[0021] Explanation of terms: In this specification and claims, the terms have the following specific meanings.

[0022] State machine: A state machine is a computational model that describes the behavior of a system or program as it transitions between different states. It can be used to model and control the behavior of complex systems, including software, hardware, and human behavior. A state machine usually consists of a set of states, a set of transition rules, and an initial state. Each state represents a specific state or situation in which a system or program is located. The transition rules define the conditions and actions for transitioning between different states. The initial state represents the state when the system or program starts. A state machine can be summarized into four elements, namely, the current state, the condition, the action, and the next state. Current state: refers to the current state. Condition: also known as an "event". When a condition is met, an action will be triggered or a state migration will be performed. Action: The action performed after the condition is met. After the action is completed, it can migrate to a new state or remain in the original state. Actions are not required. When the condition is met, no action can be performed and the system can migrate directly to a new state. Next state: The new state to be migrated to after the condition is met. The "sub-state" is relative to the "current state". Once the "sub-state" is activated, it will transform into a new "current state".

[0023] Terminal: refers to T-BOX. It is mainly composed of the following parts: Processor (CPU): responsible for logical operations and data processing, and is the core component of T-BOX. GPS module: used for vehicle positioning and provides the vehicle's geographic location information. Wireless communication module (such as 4G module, WIFI module, Bluetooth module, etc.): realizes the communication between T-BOX and the external network, and supports functions such as data transmission and remote control. Storage module (such as EMMC module): used to store vehicle information and data. CAN bus module: used to communicate with other systems of the vehicle to obtain vehicle status and control instructions. Power module: provides power supply for T-BOX and manages power-related functions such as sleep and wake-up. Other modules: such as GNSS module (supports GPS and Beidou system), Ethernet module, digital key control module (BLE module), etc. Depending on the specific vehicle model and application scenario, T-BOX may also include other specific modules.

[0024] MCU: Microcontroller Unit MCU ), also known as single chip microcomputer (SingleChip Microcomputer) or single chip microcomputer, is mainly responsible for vehicle end data collection and power management. NAD can also be written as SOC, SOC It is the abbreviation of System on a Chip, which is usually an ARM processor running the Linux operating system. It is mainly responsible for the Internet of Vehicles and business communications with the TSP platform.

[0025] The specific implementation methods of the present invention are as follows: 1. MCU and NAD mainly interact through GPIO pins to determine whether NAD meets the hard conditions for entering sleep or waking up and update the state machine.

[0026] 2. The NAD detection state machine enters the wake-up process and starts the hierarchical wake-up voting mechanism. First, it ensures that all service layer processes are started, then starts all application layer processes, and then notifies the MCU through GPIO pin interaction to complete the wake-up process. Finally, the terminal wakes up and works normally.

[0027] 3. The NAD detection state machine enters the sleep process and starts the hierarchical sleep voting mechanism. First, it ensures that all application layer processes have completed sleep, and then all service layer processes have completed sleep. Then, the MCU is notified of the completion of the sleep process through GPIO pin interaction. Finally, the system suspends the terminal and enters sleep.

[0028] 4. During the NAD wake-up and hibernation process, the state machine is updated at any time by monitoring the changes in the GPIO pin level combination. During the wake-up process, the state machine detects that it needs to enter hibernation. It needs to complete the wake-up process first, and then determine whether the state machine needs to enter hibernation. If necessary, it enters the hibernation process; during the hibernation process, the state machine detects that it needs to wake up. It needs to complete the hibernation process first, and then determine whether the state machine needs to wake up. If necessary, it enters the wake-up process; the state machine manages the switching of the hibernation and wake-up states to ensure the timing integrity of the hibernation and wake-up process and the accuracy of the execution results.

[0029] like Figure 1 The GPIO pins shown interact to determine the hard conditions for sleep and wake-up: Wake up interaction: The MCU side notifies the NAD side of the wake-up startup by pulling down the MCU _WAKEUP_NAD pin (inputting a low level to the MCU _WAKEUP_NAD pin). After the NAD side successfully starts, it notifies the MCU side of the completion of the NAD side wake-up startup by pulling up the NAD_TO_MCU pin (inputting a high level to the NAD_TO_MCU pin). Hibernate Interaction: The MCU side notifies the NAD side to prepare for sleep by pulling up the MCU_TO_NAD pin (inputting a high level to the MCU_TO_NAD pin). After the application layer and service layer processes on the NAD side sleep in turn, the MCU side is notified by pulling down NAD_TO_MCU that the NAD side sleeps. The MCU side detects the low level of the NAD_TO_MCU pin and then pulls up the MCU_WAKEUP_NAD pin (inputs a high level to the MCU_WAKEUP_NAD pin) and enters sleep itself.

[0030] Pin Description: There are 2 GPIO pins on the MCU side: NAD_WAKEUP_MCU and NAD_TO_MCU; There are 2 GPIO pins on the NAD side: MCU_WAKEUP_NAD and MCU_TO_NAD; The MCU side notifies the NAD side of the need to sleep or wake up by pulling up or down the two pins on the NAD side; The NAD side notifies the MCU side of the completion of sleep or wake-up by pulling up or down the two pins on the MCU side.

[0031] like Figure 2 As shown in the figure, the normal wake-up process is described as follows: After the MCU is awakened by the vehicle CAN bus, it notifies the NAD to wake up by pulling down the pin MCU_TO_NAD. After the NAD detects that the MCU_TO_NAD pin is at a low level, the NAD master control process first broadcasts a message to all service layer processes. After each service layer process is awakened, it notifies the NAD master control process that it has woken up, which is the so-called completed voting wake-up. The NAD master control program detects that all service layer processes have notified them that they have woken up, and then all service layer processes on the NAD side have voted to wake up. The NAD master control process then broadcasts a message to all application layer processes. After each application layer process is awakened, it notifies the NAD master control process that it has woken up, which is the so-called completed voting wake-up. The NAD master control process detects that all application layer processes have notified them that they have woken up, and then all application layer processes on the NAD side have voted to wake up. After the NAD side wakes up, it pulls up the pin NAD_TO_MCU to notify the MCU side that the NAD has started, and the terminal wakes up.

[0032] like Figure 3 As shown, the normal sleep process is described as follows: After the MCU detects that the vehicle CAN bus has stopped sending, it notifies the NAD to sleep by pulling up the pin MCU_TO_NAD. After the NAD detects that the MCU_TO_NAD pin is at a high level, the NAD master control process first broadcasts a message to all application layer processes. After each application layer process has completed sleep, it notifies the NAD master control process that it has completed sleep, which is the so-called completion of voting sleep. The NAD master control process detects that all application layer processes have notified them that they have completed sleep, and then all application layer processes on the NAD side have voted to sleep. The NAD master control process then broadcasts a message to all service layer processes. After each service layer process has completed sleep, it notifies the NAD master control process that it has completed sleep, which is the so-called completion of voting sleep. The NAD master control program detects that all service layer processes have notified them that they have completed sleep, and then all service layer processes on the NAD side have voted to sleep. After the NAD side has completed sleep, it pulls down the pin NAD_TO_MCU to notify the MCU side that the NAD has completed sleep. After the MCU detects that NAD_TO_MCU is at a low level, it also goes into sleep. At this time, the terminal sleep is complete.

[0033] like Figure 4 As shown in the state machine transition diagram State Machine: The state machine refers to the transition process between the states of a finite element. The above state machine has a total of 7 states, and the transition paths between the states are 1, 2, 3, 4, 5, 6, 7, 8, 9, and 10. Status description: Power-on startup: When the device is powered on, the MCU is first run and the NAD is started Normal operation: The MCU side is started, and the service layer process and application layer process on the NAD side are started. Sleep: The MCU side notifies the NAD side that the sleep conditions are met. Sleeping: The application layer process and service layer process on the NAD side start voting to sleep respectively Sleep complete: The NAD side application layer process and service layer process all sleep voting is completed and the MCU is notified to sleep Wake-up: The MCU side notifies the NAD side that the wake-up conditions are met. Waking up: The application layer process and service layer process on the NAD side wake up, vote and start Each state NAD and MCU status: Power-on startup: After the device is powered on, the MCU starts to start first. The MCU initializes and pulls the pin MCU_TO_NAD low. Then the NAD side is controlled to start power and pull the pin MCU_WAKEUP_NAD high. Then the NAD side starts to start. At this time, both the MCU and NAD are in the startup process.

[0034] Normal operation: MCU completes the initialization of all hardware modules and starts normal operation. The NAD side starts the system first, and then starts all service layer processes and application layer processes after the system starts. After all application processes on the NAD side are started, NAD pulls up the pin NAD_TO_MCU to notify the MCU side that the NAD startup or wake-up is complete. At this time, both the MCU and NAD are working normally.

[0035] Sleep: After the MCU determines that the vehicle stops sending CAN messages, the MCU pulls up the MCU_TO_NAD pin, pulls down the MCU_WAKEUP_NAD pin and notifies the NAD side to start sleeping. At this time, the MCU and NAD are both in normal working state.

[0036] In sleep: After NAD detects that MCU_TO_NAD is at a high level, it starts to let all application layer processes and service layer processes complete the sleep voting in sequence. At this time, the MCU works normally, and some application processes on the NAD side have been in sleep.

[0037] Sleep completion: All application processes on the NAD side have completed sleep. NAD pulls down the NAD_TO_MCU pin to notify the MCU to sleep. After the MCU detects that the NAD_TO_MCU pin is at a low level, it also goes into sleep. At this time, both the MCU and NAD go into sleep.

[0038] Wake-up: After the MCU detects that it is awakened by the vehicle's CAN bus, the MCU pulls down the MCU_TO_NAD pin to notify the NAD to wake up. At this time, the MCU works normally and the NAD waits to be awakened.

[0039] Waking up: After NAD detects that the pin MCU_TO_NAD is at a low level, it starts all application layer processes and service layer processes in sequence. At this time, the MCU works normally and some application processes on the NAD side have been awakened.

[0040] Status pin description: Power-on startup: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low Normal operation: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low Sleep: MCU_WAKEUP_NAD is low and MCU_TO_NAD is high In sleep mode: MCU_WAKEUP_NAD is low and MCU_TO_NAD is high Sleep complete: MCU_WAKEUP_NAD is high and MCU_TO_NAD is high Wake-up: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low Wake-up: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low State machine update: NAD detects changes in the high and low levels of the MCU_WAKEUP_NAD pin or the MCU_TO_NAD pin, and updates the latest state of the current state machine according to the GPIO pin description above. Under normal circumstances, the state machine transfers normally according to the arrow line. Arrows 8 and 9 need to be specially explained. Arrow 8 is detected during the wake-up process. The latest state of the state machine is dormant. In this case, it is necessary to complete the 7 wake-up process first, and then determine the latest state machine. If it is still dormant, continue to execute the sleep process. Arrow 9 is detected during the sleep process. The latest state of the state machine is wake-up. In this case, it is necessary to complete the 4 sleep process first, and then determine the latest state machine. If it is still awake, continue to execute the wake-up process.

[0041] Another embodiment of the present invention: 1.NAD determines sleep wakeup and updates the state machine based on the changes in the GPIO pin level combination A. Cold start judgment condition: MCU_WAKEUP_NAD high level and MCU_TO_NAD low level B. Sleep judgment condition: MCU_WAKEUP_NAD high level and MCU_TO_NAD high level C. Wake-up judgment condition: MCU_WAKEUP_NAD high level and MCU_TO_NAD low level 2. The NAD side detects that the state machine meets the wake-up conditions and starts the hierarchical wake-up voting mechanism. Hierarchy means dividing the service layer process and the application layer process. Both layers are actually application processes with no essential difference. The reason for dividing into two layers is to give priority to starting some applications, because other application processes depend on these application processes, so these high-priority application processes that other processes need to rely on are divided into the service layer, and the remaining application processes are divided into the application layer. Wake-up voting actually means that an application process informs the NAD master process that it has started and does not allow the NAD side to sleep. This mechanism first ensures that all service layer processes are started, then starts all application layer processes, and then notifies the MCU through GPIO pin interaction to complete the wake-up process, and finally all application processes on the terminal work normally.

[0042] 3. The NAD side detects that the state machine meets the sleep conditions and starts the hierarchical sleep voting mechanism. Hierarchy means dividing the service layer process and the application layer process. Both layers are actually application processes with no essential difference. The reason for dividing into two layers is to allow application processes that depend on other processes to sleep first, so these application processes are divided into the application layer, and the remaining application processes are divided into the service layer. Sleep voting actually means that an application process informs the NAD master process that it is in sleep and it allows the NAD side to sleep. Only when all application processes allow the system to sleep, it means that there is no business, and then the system can sleep. First, ensure that all application layer processes have completed sleep, and then let all service layer processes complete sleep, and then notify the MCU through GPIO pin interaction that the sleep process is completed, and finally call the operating system suspend command to put the terminal into sleep.

[0043] 4. During the NAD side wake-up and hibernation process, the state machine is updated at any time by monitoring the changes in the GPIO pin level combination. During the wake-up process, the state machine detects that the conditions for entering hibernation are met. It is necessary to complete the wake-up process first, and then determine whether the state machine still meets the conditions for entering hibernation. If so, it enters the hibernation process; during the hibernation process, the state machine detects that the wake-up conditions are met. It is necessary to complete the hibernation process first, and then determine whether the state machine still meets the wake-up conditions. If so, it enters the wake-up process; Using the state machine to manage the switching of the hibernation and wake-up states can ensure the timing integrity of the hibernation and wake-up process and the accuracy of the execution results.

[0044] Pin detection is notified through system interruption, rather than through polling timing inspection. Interrupt means that as long as there is a change in the pin level, the system will automatically detect and notify the application process. Interrupt is the core mechanism of the operating system. The operating system responds to and processes various events and requests through interruption, including hardware devices and software requests, to respond to system events, manage system resources, implement multi-tasking and handle abnormal situations, etc., and ensure the stability and reliability of the system.

[0045] The completion of the processing in sequence depends on the layered voting mechanism. The sleep voting first detects that all application layer processes have voted to sleep, and then detects that all service layer processes have voted to sleep. The wake-up voting first detects that all service layer processes have voted to wake up, and then detects that all application layer processes have voted to wake up.

[0046] A hierarchical voting mechanism is adopted. First, the NAD master control process broadcasts a message to all application layer processes to notify them to start sleeping. If a certain application layer process completes its business processing, it will send a message to the NAD master control process to indicate that it meets the sleeping conditions, which is the so-called sleeping voting. The NAD master control process detects that all application layer processes have sent sleeping messages to itself, and the application layer sleep is completed. Then the NAD master control process notifies all service layer processes to start sleeping. If a certain service layer process completes its business processing, it will send a message to the NAD master control process to indicate that it meets the sleeping conditions, which is the so-called sleeping voting. The NAD master control process detects that all service layer processes have sent sleeping messages to itself, and the service layer sleep is completed. At this time, all NAD-side application processes have completed sleep.

[0047] After all NAD application processes have completed hibernation, NAD will pull down the pin NAD_TO_MCU to notify NAD that hibernation is complete. After MCU detects that the NAD_TO_MCU pin is at a low level, it will also enter hibernation. At this time, the entire terminal enters hibernation state.

[0048] The present invention enables all services of NAD and MCU to be processed in sequence, thereby ensuring the synchronization of terminal sleep and wake-up timing and state; and updating the state machine in time, thereby ensuring the correct switching of the sleep and wake-up process.

[0049] The preferred specific embodiments of the present invention are described in detail above. It should be understood that ordinary technicians in the field can make many modifications and changes based on the concept of the present invention without creative work. Therefore, all technical solutions that can be obtained by technicians in the technical field through logical analysis, reasoning or limited experiments based on the concept of the present invention on the basis of the prior art should be within the scope of protection determined by the claims.

Claims

1. A terminal sleep awakening method based on a state machine, characterized in that: include: NAD and MCU interact through GPIO pins to ensure state synchronization; During NAD hibernation, the application process adopts a hierarchical hibernation voting mechanism to ensure that all NAD services are processed in sequence. After NAD hibernation is completed, the MCU is notified again through the GPIO pin interaction to put the MCU into hibernation, thereby ensuring the terminal hibernation timing; During the NAD wake-up process, the application process adopts a hierarchical wake-up voting mechanism to ensure that all NAD services are initialized in sequence. After the NAD wake-up is completed, the MCU is notified again through the GPIO pin interaction to ensure the wake-up state synchronization, thereby ensuring the terminal wake-up timing; NAD updates the state machine in time through the changes in the GPIO pin level combination, thereby ensuring the correct switching of the sleep and wake-up processes.

2. The method according to claim 1, characterized in that The MCU and NAD interact through GPIO pins to determine whether the NAD meets the hard conditions for entering sleep or waking up, and update the state machine.

3. The method according to claim 1, characterized in that The NAD detection state machine enters the wake-up process and starts the hierarchical wake-up voting mechanism. First, it ensures that all service layer processes are started, and then starts all application layer processes, so that all NAD services are initialized in sequence; then the MCU is notified of the completion of the wake-up process through GPIO pin interaction, and finally the terminal wakes up and works normally, ensuring the synchronization of the wake-up state, thereby ensuring the terminal wake-up timing.

4. The method according to claim 1, characterized in that: The NAD detection state machine enters the sleep process and starts the hierarchical sleep voting mechanism, first ensuring that all application layer processes are fully asleep, and then all service layer processes are fully asleep, so that all NAD services are processed in sequence; then the MCU is notified of the completion of the sleep process through GPIO pin interaction, and finally the system suspends the terminal to enter sleep, thereby ensuring the terminal sleep timing.

5. The method according to claim 1, characterized in that During the NAD wake-up and hibernation process, the state machine is updated at any time by monitoring the changes in the GPIO pin level combination. During the wake-up process, the state machine detects that it needs to enter hibernation, and it needs to complete the wake-up process first, and then determine whether the state machine needs to enter hibernation. If necessary, it enters the hibernation process; during the hibernation process, the state machine detects that it needs to wake up, and it needs to complete the hibernation process first, and then determine whether the state machine needs to wake up. If necessary, it enters the wake-up process; the state machine manages the switching of the hibernation and wake-up states to ensure the timing integrity of the hibernation and wake-up process and the accuracy of the execution results.

6. The method according to claim 1, characterized in that The GPIO pins include: There are 2 GPIO pins on the MCU side: NAD_WAKEUP_MCU and NAD_TO_MCU; There are 2 GPIO pins on the NAD side: MCU_WAKEUP_NAD and MCU_TO_NAD.

7. The method according to claim 6, characterized in that The GPIO pin interaction includes: the MCU side notifies the NAD side of wake-up startup by pulling down the MCU_WAKEUP_NAD pin; after the NAD side is successfully started, the MCU side is notified of the completion of the NAD side wake-up startup by pulling up the NAD_TO_MCU pin; the MCU side notifies the NAD side of preparation for sleep by pulling up the MCU_TO_NAD pin; after the application layer process and service layer process on the NAD side sleep in turn, the MCU side is notified of the completion of the NAD side sleep by pulling down the NAD_TO_MCU pin.

8. The method according to claim 1, characterized in that The state machine includes the following states: When the device is powered on, it will first run the MCU and start the NAD. Normal operation, MCU side startup is completed, and NAD side service layer process and application layer process are started respectively; Sleep, the MCU side notifies the NAD side that the sleep conditions are met; During sleep, the application layer process and service layer process on the NAD side start voting to sleep respectively; The sleep process is completed. The application layer process and service layer process on the NAD side all vote to sleep and notify the MCU to sleep. Wake up, the MCU side notifies the NAD side that the wake-up conditions are met; During the wake-up process, the application layer process and service layer process on the NAD side wake up, vote and start respectively.

9. The method according to claim 1, characterized in that: The GPIO pin states of the state machine are as follows: Power-on startup: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low; Normal operation: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low; Sleep: MCU_WAKEUP_NAD is low and MCU_TO_NAD is high; In sleep mode: MCU_WAKEUP_NAD is low and MCU_TO_NAD is high; Sleep complete: MCU_WAKEUP_NAD is high and MCU_TO_NAD is high; Wake-up: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low; Waking up: MCU_WAKEUP_NAD is high and MCU_TO_NAD is low.

10. The method according to claim 1, characterized in that The state machine is updated by monitoring the changes in the GPIO pin level combination, and the state machine update is based on system interrupt notification rather than polling timing check.

11. The method according to claim 1, characterized in that: Also includes, The hierarchical wake-up voting mechanism ensures that all service layer processes are started first, and then starts all application layer processes; The hierarchical dormancy voting mechanism ensures that all application layer processes are fully dormant first, and then all service layer processes are fully dormant.

12. A vehicle-mounted terminal device, characterized in that: The device adopts the sleep awakening method according to any one of claims 1 to 11.

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