Method and device for designing electronic circuit

Abstract

The invention provides an electronic circuit design method and an electronic circuit design device. The electronic circuit design method comprises the steps that a first electronic circuit design file is obtained, and the first electronic circuit design file has an XML format; converting the first electronic circuit design file into a second electronic circuit design file having a JSON format based on a conversion rule that associates a first XML tag corresponding to an electronic circuit design element with a JSON attribute corresponding to the same electronic circuit design element; and generating an electronic circuit design based on the second electronic circuit design file using an electronic design automation (EDA) tool.

Description

Technical Field

[0001] The present disclosure relates to the field of SoC (System on Chip) design, and in particular to a method and device for electronic circuit design, a storage medium, an electronic device, and a system. Background Art

[0002] Electronic Design Automation (EDA) tools are essential tools in the semiconductor industry that facilitate the design and verification of integrated circuits (ICs). These tools support all stages of the IC design process, including schematic capture, layout design, analog simulation, and verification / validation. As semiconductor technology advances, the complexity and scale of IC design have increased significantly, resulting in a large amount of design data.

[0003] Existing file processing technologies are unable to manage and manipulate data to ensure smooth design workflows and accurate results. In addition, existing file processing technologies often have difficulty keeping up with the growing demand, resulting in bottlenecks and inefficiencies in the design process. Therefore, there is a need in the art for systems and methods that can accurately and efficiently perform file processing when using EDA tools. Summary of the invention

[0004] The electronic circuit design method and device, storage medium, electronic device and system provided by the present disclosure at least solve the above-mentioned technical problems and other technical problems not mentioned above.

[0005] The present disclosure describes a system and method for a file processing method applied to an EDA tool. Embodiments of the present disclosure may be configured to convert an IP-XACT (Intellectual Property-Exchange Architecture) file in (XML, Extensible Markup Language) format to a JSON format based on a predetermined conversion rule. In some cases, the converted JSON format file may be processed using an EDA tool. Subsequently, the processed JSON file may be converted back to an XML format.

[0006] According to one aspect of an embodiment of the present disclosure, a method for electronic circuit design is provided, the method comprising: obtaining a first electronic circuit design file, wherein the first electronic circuit design file has an XML format; converting the first electronic circuit design file into a second electronic circuit design file having a JSON format based on a conversion rule, the conversion rule associating a first XML tag corresponding to an electronic circuit design element with a JSON attribute corresponding to the same electronic circuit design element; and generating an electronic circuit design based on the second electronic circuit design file using an electronic design automation (EDA) tool.

[0007] Optionally, generating the electronic circuit design includes: performing a parsing operation on the second electronic circuit design file to generate a JSON object; and performing an operation on the JSON object, wherein the operation includes at least one of creation, traversal, addition, deletion and modification.

[0008] Optionally, generating the electronic circuit design includes: serializing the object to obtain a serialized electronic circuit design file; and saving the serialized electronic circuit design file.

[0009] Optionally, converting the first electronic circuit design file into the second electronic circuit design file includes: verifying the first electronic circuit design file; parsing the verified first electronic circuit design file; converting the first electronic circuit design file based on the conversion rule to obtain a JSON object; and serializing the JSON object to obtain the second electronic circuit design file.

[0010] Optionally, the method further includes: verifying the second electronic circuit design file; parsing the verified second electronic circuit design file; converting the second electronic circuit design file based on the conversion rule to obtain an XML object; and serializing the XML object to obtain a third electronic circuit design file.

[0011] Optionally, the conversion rules maintain semantic consistency.

[0012] Optionally, generating the electronic circuit design includes: verifying the validity of the first electronic circuit design file based on a predetermined verification module, wherein the predetermined verification module includes predefined rules and predefined constraints, each of the predefined rules and the predefined constraints is specific to the first electronic circuit design file.

[0013] According to another aspect of an embodiment of the present disclosure, a device for electronic circuit design is provided, the device comprising: a file acquisition module, configured to obtain a first electronic circuit design file; wherein the first electronic circuit design file has an XML format; a conversion module, configured to convert the first electronic circuit design file into a second electronic circuit design file having a JSON format based on a conversion rule, the conversion rule associating a first XML tag corresponding to an electronic circuit design element with a JSON attribute corresponding to the same electronic circuit design element; and a file processing module, configured to generate an electronic circuit design based on the second electronic circuit design file.

[0014] Optionally, the file processing module is configured to: perform a parsing operation on the second electronic circuit design file to generate a JSON object; and perform an operation on the JSON object, wherein the operation includes at least one of creation, traversal, addition, deletion and modification.

[0015] Optionally, the file processing module is further configured to: serialize the object to obtain a serialized electronic circuit design file; and save the serialized electronic circuit design file.

[0016] Optionally, the conversion module is further configured to: verify the first electronic circuit design file; parse the verified first electronic circuit design file; convert the first electronic circuit design file based on the conversion rule to obtain a JSON object; and serialize the JSON object to obtain the second electronic circuit design file.

[0017] Optionally, the conversion module is further configured to: verify the second electronic circuit design file; parse the verified second electronic circuit design file; convert the second electronic circuit design file based on the conversion rule to obtain an XML object; and serialize the XML object to obtain a third electronic circuit design file.

[0018] Optionally, the conversion rules maintain semantic consistency.

[0019] Optionally, the file processing module is further configured to: verify the validity of the first electronic circuit design file based on a predetermined verification module; wherein the predetermined verification module includes predefined rules and predefined constraints, each of the predefined rules and the predefined constraints being specific to the first electronic circuit design file.

[0020] According to another aspect of an embodiment of the present disclosure, an electronic device is also provided, comprising: at least one processor; and at least one memory storing computer executable instructions, wherein when the computer executable instructions are executed by the at least one processor, the at least one processor is prompted to execute any of the electronic circuit design methods described above.

[0021] According to another aspect of an embodiment of the present disclosure, a computer-readable storage medium storing instructions is also provided, wherein when the instructions are executed by at least one computing device, the at least one computing device is prompted to execute any of the electronic circuit design methods described above.

[0022] According to another aspect of an embodiment of the present disclosure, a system is also provided, comprising at least one computing device and at least one storage device storing instructions, wherein when the instructions are executed by the at least one computing device, the at least one computing device is prompted to execute any of the electronic circuit design methods described above.

[0023] The technical solution provided by the embodiments of the present disclosure brings at least the following beneficial effects:

[0024] According to the electronic circuit design method and its device, storage medium, electronic device and system disclosed in the present invention, EDA tools can process lightweight JSON (JavaScript Object Notation) files without processing IP-XACT XML files that consume a lot of computing resources. Therefore, when there are a large number of IP-XACT XML files in the EDA tool, it is avoided that the processing of XML files consumes a large amount of memory and CPU resources, which has a negative impact on the performance of the EDA tool.

[0025] In addition, compared with XML DOM (Document Object Model) objects containing the same semantic information, JSON objects occupy much less memory resources. Therefore, accessing and maintaining the content in JSON objects is much simpler and more flexible than accessing and maintaining the content in XML DOM.

[0026] In addition, the IP-XACT file in JSON format and the IP-XACT file in XML format can be converted between each other conveniently and quickly through the predetermined conversion rules. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The drawings herein are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the description are used to explain the principles of the present disclosure, and do not constitute improper limitations on the present disclosure.

[0028] Figure 1A flowchart showing a file processing method applied to an EDA tool according to an exemplary embodiment of the present disclosure;

[0029] Figure 2 A flowchart showing conversion of a first electronic circuit design file into a second electronic circuit design file according to an exemplary embodiment of the present disclosure;

[0030] Figure 3 A flowchart showing processing of a second electronic circuit design file by an EDA tool according to an exemplary embodiment of the present disclosure;

[0031] Figure 4 A flowchart showing conversion of a second electronic circuit design file into a first electronic circuit design file according to an exemplary embodiment of the present disclosure;

[0032] Figure 5 A schematic diagram showing a file conversion tool of an exemplary embodiment of the present disclosure;

[0033] Figure 6 A block diagram showing a file processing device applied to an EDA tool according to an exemplary embodiment of the present disclosure;

[0034] Figure 7 A block diagram illustrating an electronic device according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0035] The rapid development of integrated circuit design has brought some challenges to existing EDA tools, especially in file processing. As the size and complexity of design files increase, traditional file processing methods are no longer sufficient, resulting in longer processing time and increased computing resource requirements. In addition, the variety of data formats and standards in the industry makes the integration and interoperability of various EDA tools more complicated. Therefore, a more efficient and flexible file processing method and apparatus is needed that can handle large-scale design files, support multiple data formats, and optimize resource utilization.

[0036] IP-XACT is a standard for describing intellectual property (IP). In some cases, the IP-XACT standard can be used to provide a unified metadata specification for EDA, semiconductor, and electronic design IP vendors. For example, the IP-XACT standard can be widely used in the field of SoC design. In some examples, EDA software in the SoC integration phase can include the functions of parsing IP-XACT files, processing IP-XACT data, and saving IP-XACT files.

[0037] In some cases, SoC projects may include a large number of IP-XACT files based on the Extensible Markup Language (XML) format. In addition, parsing and maintaining IP-XACT files may use a large amount of memory and central processing unit (CPU) resources, which may negatively affect the performance of the EDA program.

[0038] The present disclosure describes a system and method for a file processing method applied to an EDA tool. Embodiments of the present disclosure may be configured to convert an IP-XACT file in XML format to JSON format based on a predetermined conversion rule. In some cases, the converted JSON format file may be processed using an EDA tool. Subsequently, the processed JSON file may be converted back to XML format.

[0039] According to an embodiment of the present disclosure, an IP-XACT file can be obtained in JSON format. In some cases, the acquisition can be performed based on converting the IP-XACT file in XML format using predefined conversion rules. In some examples, the predefined conversion rules can be configured to ensure semantic consistency between the IP-XACT file in XML format and the IP-XACT file in JSON format.

[0040] Embodiments of the present disclosure may be configured to perform processing of an IP-XACT file in JSON format. In some cases, the processing of a JSON file may include: performing a check to ensure that the IP-XACT file in JSON format complies with rules and constraints based on a schema definition (JSON schema definition). Subsequently, the checked file is parsed to obtain a JSON object. In some cases, the JSON object may be operated on according to business logic and saved in a JSON file.

[0041] According to an embodiment of the present disclosure, the saved JSON file can be converted back to an IP-XACT file in XML format. In some cases, the conversion process can be performed using predefined rules to ensure semantic consistency, that is, the converted file can have the same semantics as the original IP-XACT file in XML format.

[0042] Embodiments of the present disclosure are configured to provide an electronic circuit design method. In some cases, the method includes obtaining a first electronic circuit design file, wherein the first electronic circuit design file has an XML format. In some cases, the first electronic circuit design file can be converted to a second electronic circuit design file having a JSON format according to a conversion rule that associates a first XML tag corresponding to an electronic circuit design element with a JSON attribute corresponding to the same electronic circuit design element. An electronic design automation (EDA) tool can be used to generate an electronic circuit design based on the second electronic circuit design file.

[0043] Therefore, by converting the IP-XACT file in XML format to JSON format, the embodiments of the present disclosure can process the IP-XACT file with significantly reduced resources (e.g., memory consumption, processing time, etc.). In addition, by converting the IP-XACT file to JSON format, the embodiments of the present disclosure ensure that the reading and parsing process of the JSON file can be executed by multiple programming languages ​​(e.g., Java, Python, etc.).

[0044] In order to enable ordinary persons in the art to better understand the technical solutions of the present disclosure, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings.

[0045] It should be noted that the terms "first", "second", etc. in the specification and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present disclosure described herein can be implemented in an order other than those illustrated or described herein. The implementation methods described in the following examples do not represent all implementation methods consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the attached claims.

[0046] It should be noted that the phrase "at least one of the items" in the present disclosure includes three types of parallel situations: "any one of the items", "a combination of any number of the items", and "all of the items". For example, "including at least one of A and B" includes the following three parallel situations: (1) including A; (2) including B; (3) including A and B. Another example is "executing at least one of step 1 and step 2" which means the following three parallel situations: (1) executing step 1; (2) executing step 2; (3) executing step 1 and step 2.

[0047] The prior art includes a lot of EDA software for the SoC integration stage, which includes the functions of parsing IP-XACT files in XML format, operating IP-XACT data, and saving IP-XACT files. In the case of SoC integration design, an IP can be encapsulated into a component (component, including configuration information) in IP-XACT, where the IP can be a configurable IP. In the case of EDA tools, this component can be instantiated by setting different parameter values.

[0048] IP-XACT is based on XML format. In some cases, there are two kinds of XML parsers, DOM (Document Object Model) parser and SAX (Simple API for XML Parsing) parser. In some cases, since SAX parser does not support writing XML files, SAX parser may not be used in EDA tools.

[0049] XML DOM can define a set of standard methods for accessing and maintaining XML documents. When parsing an XML file, the DOM parser will construct a DOM tree in memory, and each node in the DOM tree can represent a node in the XML file. In some cases, through DOM, scripting languages ​​(such as JavaScript, etc.) can be used to access and manipulate each node in the file. Optionally, each DOM node can contain a large amount of information, so the DOM tree will occupy a high memory space. Program developers can access nodes in the DOM tree through XPath (XML Path Language).

[0050] In the case of SoC projects, the presence of a large number of IP-XACT XML files will have a certain negative impact on the performance of the EDA program, because parsing and maintaining these files will take up a lot of memory and CPU resources. As the complexity of SoC design increases, the number of IP-XACT files included in an SoC project will increase, and the resource consumption and performance problems caused by parsing and maintaining IP-XACT files will become more and more serious.

[0051] Therefore, the present disclosure provides a file processing method, device, storage medium, electronic device and system for EDA tools. In some cases, the embodiments can process lightweight JSON files, so that when there are a large number of IP-XACT XML files in the EDA tool, the performance of the EDA tool will be greatly reduced because the file processing occupies a large amount of memory and CPU resources.

[0052] Compared with XML format, JSON format files are lightweight and easy to read. Therefore, most programming languages ​​(JavaScript, python, java, etc.) can include methods for parsing and serializing JSON files. In other words, accessing and maintaining the content in a JSON object is also much simpler and more flexible than maintaining and accessing the content of an XML DOM. When a JSON object and an XML DOM object each contain the same semantic information, the JSON object can occupy less memory resources when compared to the XML DOM object. Therefore, developing JSON-based applications is simpler than developing XML-based applications.

[0053] Next, we will refer to Figures 1 to 7 The present invention specifically describes the file processing method, device, storage medium, electronic device and system applied to EDA tools.

[0054] Figure 1 A flowchart showing a file processing method applied to an EDA tool according to an exemplary embodiment of the present disclosure is shown.

[0055] Reference Figure 1 In step 101, a first electronic circuit design file may be obtained, wherein the first electronic circuit design file is an IP-XACT file in XML format. In step 102, the first electronic circuit design file may be converted into a second electronic circuit design file, wherein the second electronic circuit design file is an IP-XACT file in JSON format.

[0056] In some cases, an IP-XACT file in XML format is a standardized file format defined by the IEEE 1685 standard. An IP-XACT file in XML format is used to describe and store metadata about electronic components / components, particularly IP (Intellectual Property) blocks, which are reusable units of logic, chip design, or other components used in system-on-chip (SoC) design. The XML format provides a structured, machine-readable representation of data that enables automation and interoperability between different design and verification tools.

[0057] In some examples, an IP-XACT XML file consists of several key sections, each of which encapsulates a specific type of information about an IP block, such as general information about the IP block, such as its name, version, and vendor; a description of the interfaces provided by the IP block for communicating with other components, such as bus type, protocol, and interface direction (e.g., master interface, slave interface); a list of ports (i.e., inputs and outputs) of the IP block, including name, direction, and data type; a memory layout associated with the IP block, including address space, address blocks, and registers; configurable parameters for the IP block, which can be set to customize behavior; files associated with the IP block, such as source code, documentation, and scripts; and other vendor-specific information beyond the standard schema.

[0058] In addition, the IP-XACT file in JSON format refers to IP-XACT data represented using the JSON (JavaScript Object Notation) format. IP-XACT is used to describe and process electronic components and corresponding metadata, especially in system-on-chip (SoC) design. In some examples, IP-XACT defines an XML schema for capturing the structure and configuration of intellectual property (IP) blocks, making it easier to integrate and automate various design tools.

[0059] In the case of JSON format, an IP-XACT file can include similar information, but using the JSON syntax structure. For example, an IP-XACT file can include relevant information about an IP component, such as name, version, and vendor; specification of interfaces, including protocols and signals used; memory layout descriptions, including registers and address spaces; configurable parameters for IP blocks; and file information related to the component, such as source files, documentation, and scripts. In some examples, using JSON can make it easier to integrate IP-XACT files with web-based tools and services, or to exchange data in a lightweight, human-readable format.

[0060] According to an exemplary embodiment of the present disclosure, an IP-XACT file in JSON format may be obtained. In some cases, an IP-XACT file in JSON format may be directly generated according to the content that the file needs to describe, but the present disclosure is not limited thereto.

[0061] According to an exemplary embodiment of the present disclosure, the first electronic circuit design file may be converted based on a predetermined conversion rule to obtain a second electronic circuit design file. For example, the second electronic circuit design file is an IP-XACT file in JSON format.

[0062] According to an exemplary embodiment of the present disclosure, an existing IP-XACT file in XML format may be converted based on a predetermined conversion rule to obtain an IP-XACT file in JSON format.

[0063] According to an exemplary embodiment of the present disclosure, converting a first electronic circuit design file to obtain a second electronic circuit design file based on a predetermined conversion rule may include the following steps: verifying, parsing, converting based on a predetermined conversion rule, and serializing and saving the first electronic circuit design file to obtain the second electronic circuit design file. Figure 2 Describe the conversion process in detail.

[0064] Figure 2 A flow chart of converting a first electronic circuit design file into a second electronic circuit design file according to an exemplary embodiment of the present disclosure is shown.

[0065] Reference Figure 2 , the existing IP-XACT file in XML format can be converted. In some cases, the first conversion module includes a function of converting the existing IP-XACT file in XML format to obtain an IP-XACT file in JSON format. According to an embodiment, the validity of the IP-XACT file in XML format can be verified by XSD (IP-XACT XML Schema Definition) during the conversion process.

[0066] In some cases, the IP-XACT XML Schema Definition (XSD) is a specification used to define the structure and elements of an IP-XACT XML file that describes electronic components in a System-on-Chip (SoC) design. XSD provides a standardized format that ensures consistency and interoperability between different Electronic Design Automation (EDA) tools. In some cases, XSD defines various components including metadata, bus interfaces, ports, memory maps, parameters, and file sets. By adhering to the XSD, the accuracy of the IP-XACT file can be verified to ensure that the file conforms to the specified structure and data types. Standardization facilitates the automation of the design, integration, and verification processes, enabling efficient IP management and seamless integration of IP blocks from different vendors. IP-XACT XSD plays a vital role in the semiconductor industry, supporting the reliable exchange and reuse of IP components in complex electronic systems.

[0067] According to an embodiment, successful verification represents that the file meets specific constraints. In some examples, the file can be parsed to obtain XML DOM. In some examples, XML DOM can be converted into JSON object based on predetermined conversion rules. In addition, the IP-XACT file of JSON format can be saved by serializing JSON object to complete the conversion of the IP-XACT file of XML format to the IP-XACT file of JSON format.

[0068] Return to reference Figure 1 In step 103, the second electronic circuit design file may be processed.

[0069] According to an exemplary embodiment of the present disclosure, processing the second electronic circuit design file may include the following steps: the validity of the second electronic circuit design file may be checked or verified based on a predetermined verification module. In some cases, the predetermined verification module may include predefined rules and constraints, which are specific to / specific to the second electronic circuit design file.

[0070] Figure 3 A flow chart showing processing of a second electronic circuit design file by an EDA tool according to an exemplary embodiment of the present disclosure is shown.

[0071] Reference Figure 3 According to an exemplary embodiment of the present disclosure, a predetermined verification module may be configured to perform validity verification / validation on the acquired IP-XACT file in JSON format. In some cases, performing validity verification may ensure that the acquired file complies with predetermined rules and constraints.

[0072] For example, an IP-XACT JSON Schema Definition can be defined as a predetermined verification module to verify whether the data type, format, relationship between key-value pairs, data integrity, etc. in the IP-XACT file in JSON format meet the predetermined rules and constraints to ensure the reliability and availability of the data in the file.

[0073] The IP-XACT JSON Schema Definition (JSD) refers to the specification that defines the structure and elements of IP-XACT data represented in JSON format. The schema standardizes how to describe and document electronic components such as intellectual property (IP) blocks used in system-on-chip (SoC) designs. The JSD outlines the expected structure of JSON files, including key components such as metadata, bus interfaces, ports, memory maps, parameters, and related files. By adhering to the JSD, IP-XACT JSON files can be verified for consistency and correctness, ensuring that the files conform to the required format and data types. This standardization facilitates the integration, automation, and verification of IP components in various electronic design automation (EDA) tools. The IP-XACT JSD enables seamless interoperability and data exchange, promoting efficient IP management and reuse within the semiconductor industry.

[0074] Specifically, for example, in a JSON-formatted IP-XACT file, a component element may contain basic attributes such as "vendor", "library", "name", and "version". In addition, in some cases, a component element may contain complex attributes such as "memoryMaps". In addition, the corresponding Schema file may be defined as follows (JSD):

[0075] {

[0076] "$schema":"http: / / json-schema.org / draft-07 / schema#",

[0077] "$id":"schemas / Component",

[0078] "type":"object",

[0079] "properties":{

[0080] "vendor":{"type":"string"},

[0081] "library":{"type":"string"},

[0082] "name":{"type":"string"},

[0083] "version":{"type":"string"},

[0084] "memoryMaps":{"type":"array","items":{"$ref":"MemoryMap"}},

[0085] },

[0086] "required":["vendor","library","name","version"]

[0087] }

[0088] $schema: indicates the schema version used

[0089] $id: represents the base URI

[0090] $type: indicates the corresponding JSON data type

[0091] properties: indicates the properties contained in the object (including optional properties and required properties)

[0092] Required: indicates that the attribute must be included

[0093] In some cases, in the IP-XACT file in JSON format, the component elements may lack attributes, such as whether the attribute type is correct, whether the attribute name is correct, etc., which can be verified through the corresponding schema file. In addition, each programming language can include a corresponding library to verify the JSON file according to the schema, such as JavaScript's "ajv", Python's "jsonschema", etc., which can be selected according to the specific usage scenario.

[0094] According to an exemplary embodiment of the present disclosure, processing the second electronic circuit design file may include the following steps: parsing the second electronic circuit design file to obtain a JSON object; and performing corresponding operations on the JSON object based on business logic. For example, the operations include at least one of the following items: creating, traversing, adding, deleting, and modifying the JSON object.

[0095] According to an exemplary embodiment of the present disclosure, the EDA tool can load the IP-XACT file in the JSON format obtained into the memory of the EDA program and parse it to obtain the JSON object. In addition, the EDA tool can perform corresponding operations on the JSON object based on business logic. In some cases, the above-mentioned corresponding operations include but are not limited to at least one of the following items: creating, traversing, adding, deleting and modifying the JSON object. In other words, the operation of each node content in the IP-XACT file in the JSON format can be completed based on the operation on the JSON object, thereby realizing the dynamic modification of the content, style and structure of the IP-XACT file in the JSON format.

[0096] It is understandable that a user operation can be converted into business logic, or business logic can be generated based on the back end of the EDA tool.

[0097] According to an exemplary embodiment of the present disclosure, a portion of a JSON object may be represented as follows:

[0098] {

[0099] "ports":[{

[0100] "name":"port_A",

[0101] "direction":"in"

[0102] }]

[0103] }

[0104] According to an exemplary embodiment of the present disclosure, operations on JSON objects based on business logic may refer to the following examples.

[0105] For example, you can add a "port" with the name "port_B" to the JSON object based on business logic, and set the direction of the newly added "port" to "out" based on business logic:

[0106] {

[0107] "ports":[{

[0108] "name":"port_A",

[0109] "direction":"in"

[0110] },{

[0111] "name":"port_B",

[0112] "direction":"out"

[0113] }]

[0114] }

[0115] According to an exemplary embodiment of the present disclosure, processing the second electronic circuit design file may further include the following steps: the second electronic circuit design file obtained by serializing the JSON object may be saved.

[0116] In some cases, serialization of JSON objects refers to the process of converting JSON objects into a string format that is easy to transmit, store, or share. The serialization process may include encoding the structured data of a JSON object into a text-based representation. Serialization is critical for data exchange between systems or applications because it converts complex data structures into a standardized format that can be understood and processed by different platforms. The generated JSON string can be deserialized into a local data structure in the receiving system. The serialization process is widely used in network development, application interfaces, and data storage, facilitating the transmission and persistence of structured information.

[0117] According to an exemplary embodiment of the present disclosure, after the EDA tool completes the operation of the JSON object in the IP-XACT file in the JSON format based on the business logic, the operated JSON object can be saved as a processed IP-XACT file in the JSON format by serializing the JSON object.

[0118] According to an exemplary embodiment of the present disclosure, the processed second electronic circuit design file can be verified, parsed, converted based on a predetermined conversion rule, and serialized and saved to obtain a third electronic circuit design file. In some cases, the third electronic circuit design file is an IP-XACT file in XML format.

[0119] Figure 4 A flowchart of converting a second electronic circuit design file into a first electronic circuit design file according to an exemplary embodiment of the present disclosure is shown.

[0120] Reference Figure 4According to an exemplary embodiment of the present disclosure, the function of converting an IP-XACT file in JSON format to obtain an IP-XACT file in XML format is integrated into a second conversion module. In some cases, when the second conversion module needs to save an IP-XACT file in XML format, the processed IP-XACT file in JSON format is verified, parsed, converted based on predetermined conversion rules, and serialized and saved to obtain an IP-XACT file in XML format processed by the EDA tool of the present disclosure. It can be understood that the verification of the IP-XACT file in JSON format can be performed using the above-mentioned predetermined verification module. In addition, the parsing, serialization, and saving of the IP-XACT file in JSON format can be performed using the parsing, serialization, and saving methods in any programming language.

[0121] According to an embodiment, when the downstream of the EDA tool is a third-party EDA tool, the system can output an IP-XACTXML file for use by the third-party EDA tool. In some examples, the third-party EDA tool can only recognize IP-XACT files in XML format, but cannot recognize the JSON Schema (JSD) of the present disclosure.

[0122] According to an exemplary embodiment of the present disclosure, a predetermined conversion rule may be used to maintain semantic consistency.

[0123] According to an exemplary embodiment of the present disclosure, conversion can be performed based on a predetermined conversion rule to maintain semantic consistency between an IP-XACT file in XML format and an IP-XACT file in JSON format (for example, when converting between an IP-XACT file in XML format and an IP-XACT file in JSON format). Specifically, the predetermined conversion rule can be used to define a correspondence between program statements with the same semantics between different program languages. For example, in an IP-XACT file in XML format and an IP-XACT file in JSON format, a correspondence can be formed between program statements with the same semantics as shown in Table 1 below.

[0124] IP-XACT file in XML format IP-XACT file in JSON format <spirit:vendor> vendor_A< / spirit:vendor> {"vendor":"vendor_A"} <spirit:library> lib_A< / spirit:library> {"library":"lib_A"}

[0125] Table 1. Examples of correspondence between statements in different programming languages

[0126] According to an exemplary embodiment of the present disclosure, the system can ensure through predetermined conversion rules that the IP-XACT file in JSON format or the IP-XACT file in XML format obtained by conversion can have the same semantics as the original file, so as to achieve the purpose of obtaining the same semantics when performing file processing based on the IP-XACT file in JSON format or transferring the IP-XACT file in XML format to a downstream tool for processing.

[0127] It is understood that each of the first electronic circuit design file and the third electronic circuit design file described herein is an IP-XACT file in XML format. In some cases, when performing conversion between an IP-XACT file in JSON format and an IP-XACT file in XML format, the first electronic circuit design file and the third electronic circuit design file may be the same or different.

[0128] According to an exemplary embodiment of the present disclosure, the predetermined conversion rules may include data cleaning and repair rules for cleaning and repairing errors, missing data, and inconsistent parts of the files before and after the conversion in the file data before and after the conversion to ensure the quality and accuracy of the file data. For example, duplicate data records may be deleted, missing data may be filled, format errors may be corrected, etc.

[0129] Figure 5 A schematic diagram showing a file conversion tool according to an exemplary embodiment of the present disclosure.

[0130] Reference Figure 5 According to an exemplary embodiment of the present disclosure, the file conversion function can be encapsulated into a file conversion tool. In addition, the file conversion tool can integrate a first conversion module for converting an IP-XACT file in XML format into an IP-XACT file in JSON format, a second conversion module for converting an IP-XACT file in JSON format into an IP-XACT file in XML format, and a predetermined conversion rule based on the first conversion module and the second conversion module to realize the mutual conversion between the IP-XACT file in XML format and the IP-XACT file in JSON format.

[0131] According to an exemplary embodiment of the present disclosure, a test program for the present disclosure may be written using Node.js. In a test involving a file parsing function, the parsing of an IP-XACT file in XML format and an IP-XACT file in JSON format may be tested.

[0132] After converting a 5.7MB and a 78MB IP-XACT XML file into an IP-XACT JSON file, the test results show that parsing files in JSON format can have significant advantages in terms of parsing time, memory usage, serialization time and other performance.

[0133] XML JSON Performance Comparison File size 5.7M 9.7M Parsing time 1046ms 38.5ms ↓96％ Memory usage 79M 18M ↓77％ Serialization time 159.3ms 26ms ↓83％

[0134] Table 2. Comparative test (I)

[0135] XML JSON Performance Comparison File size 78M 109M Parsing time 10.3s 0.5s ↓95％ Memory usage 1020M 272M ↓73％ Serialization time 2498.5ms 268.5ms ↓89％

[0136] Table 3. Comparative test (II)

[0137] Figure 6 A block diagram showing a file processing apparatus applied to an EDA tool according to an exemplary embodiment of the present disclosure.

[0138] Reference Figure 6 The exemplary embodiment of the present disclosure further provides a file processing device 600 applied to an EDA tool, which may include a file acquisition module 601 and a file processing module 602 .

[0139] The file acquisition module 601 can obtain a first electronic circuit design file, wherein the first electronic circuit design file has an XML format. The first electronic circuit design file can be converted into a second electronic circuit design file, wherein the second electronic circuit design file is an IP-XACT file in a JSON format.

[0140] The file processing module 602 may process the second electronic circuit design file.

[0141] According to an exemplary embodiment of the present disclosure, the second electronic circuit design file may be obtained by verifying, parsing, converting based on a predetermined conversion rule, and serializing and saving the first electronic circuit design file.

[0142] According to an exemplary embodiment of the present disclosure, the file processing module 602 can verify the validity of the second electronic circuit design file based on a predetermined verification module; wherein the predetermined verification module may include predefined rules and constraints, and the predefined rules and constraints are for the second electronic circuit design file.

[0143] According to an exemplary embodiment of the present disclosure, the file processing module 602 can parse the second electronic circuit design file to obtain a JSON object; and can perform corresponding operations on the JSON object based on business logic, wherein the operations include at least one of the following items: creation, traversal, addition, deletion and modification.

[0144] According to an exemplary embodiment of the present disclosure, the file processing module 602 may save the second electronic circuit design file obtained by serializing the JSON object.

[0145] According to an exemplary embodiment of the present disclosure, the file processing device 600 applied to the EDA tool may further include a conversion module ( Figure 6 (not shown), the processed second electronic circuit design file can be verified, parsed, converted based on predetermined conversion rules and serialized and saved to obtain a third electronic circuit design file, wherein the third electronic circuit design file is an IP-XACT file in XML format.

[0146] According to an exemplary embodiment of the present disclosure, a predetermined conversion rule may be used to maintain semantic consistency.

[0147] It can be understood that in the exemplary embodiment of the file processing device 600 applied to the EDA tool, the specific implementation process can be substantially the same as the exemplary embodiment of the file processing method applied to the EDA tool, and will not be elaborated herein.

[0148] The file processing device 600 applied to the EDA tool can be configured as software, hardware, firmware or any combination of the above items to perform specific functions. For example, the device can correspond to a dedicated integrated circuit, a pure software code, or a module combining software and hardware. In addition, one or more functions implemented by the device can also be uniformly executed by components in a physical entity device (e.g., a processor, a client or a server, etc.).

[0149] Figure 7 A block diagram illustrating an electronic device according to an exemplary embodiment of the present disclosure.

[0150] Reference Figure 7 The electronic device 700 includes at least one memory 701 and at least one processor 702, wherein the at least one memory 701 stores a set of computer executable instructions. When the set of computer executable instructions is executed by the at least one processor 702, a file processing method applied to an EDA tool according to an exemplary embodiment of the present disclosure is executed.

[0151] As an example, the electronic device 700 may be a PC, a tablet device, a personal digital assistant, a smart phone, or other device capable of executing the above-mentioned instruction set. Here, the electronic device 700 may not be a single electronic device, but may also be a collection of devices or circuits capable of executing the above-mentioned instructions (or instruction sets) individually or jointly with reference to the present disclosure. The electronic device 700 may also be part of an integrated control system or a system manager. In addition, the electronic device 700 may be configured as a portable electronic device interconnected with an interface locally or remotely (e.g., via wireless transmission).

[0152] In the electronic device 700, the processor 702 may include a central processing unit (CPU), a graphics processing unit (GPU), a programmable logic device, a dedicated processor system, a microcontroller or a microprocessor. As an example and not limitation, the processor may also include an analog processor, a digital processor, a microprocessor, a multi-core processor, a processor array, a network processor, etc.

[0153] The processor 702 may execute instructions or codes stored in the memory 701. For example, the memory 701 may also store data. Instructions and data may also be sent and received over a network via a network interface device, wherein the network interface device may employ any known transmission protocol.

[0154] The memory 701 may be integrated with the processor 702, for example, by placing RAM or flash memory within an integrated circuit microprocessor or the like. In addition, the memory 701 may include a separate device, such as an external disk drive, a storage array, or any other storage device that can be used by a database system. The memory 701 and the processor 702 may be operationally coupled, or may communicate with each other, such as through an I / O port, a network connection, etc., so that the processor 702 can read files stored in the memory 701.

[0155] In addition, the electronic device 700 may also include a video display (such as a liquid crystal display) and a user interaction interface (such as a keyboard, a mouse, a touch input device, etc.) In some examples, the components of the electronic device 700 may be connected to each other via a bus and / or a network.

[0156] According to an exemplary embodiment of the present disclosure, a computer-readable storage medium storing instructions may be provided, wherein when the instructions are executed by at least one computing device, the at least one computing device is prompted to execute the above-mentioned file processing method applied to EDA tools.

[0157] Examples of computer-readable storage media include read-only memory (ROM), random-access programmable read-only memory (PROM), electrically erasable programmable read-only memory (EEPROM), random-access memory (RAM), dynamic random-access memory (DRAM), static random-access memory (SRAM), flash memory, nonvolatile memory, CD-ROM, CD-R, CD+R, CD-RW, CD+RW, DVD-ROM, DVD-R, DVD+R, DVD-RW, DVD+RW, DVD-RAM, BD-ROM, BD-R, BD-R, BD-RW, etc. , BD-RE, Blu-ray or optical disk storage, hard disk drive (HDD), solid state drive (SSD), card storage (such as, multimedia card, secure digital (SD) card or extreme digital (XD) card), magnetic tape, floppy disk, magneto-optical data storage device, optical data storage device, hard disk, solid state disk and any other device, any other device is configured to store computer programs and any associated data, data files and data structures in a non-transitory manner and provide the computer programs and any associated data, data files and data structures to a processor or computer so that the processor or computer can execute the computer program. The computer program in the above-mentioned computer-readable storage medium can be run in an environment deployed in a computer device such as a client, a host, an agent device, a server, etc. In addition, in one example, the computer program and any associated data, data files and data structures are distributed on a networked computer system, so that the computer program and any associated data, data files and data structures are stored, accessed and executed in a distributed manner by one or more processors or computers. It should be noted that the instructions can also be used to execute additional steps in addition to the above steps or to perform more specific processing when executing the above steps. These additional steps and further processing contents have been mentioned in the description of the relevant methods, so they will not be repeated here to avoid repetition.

[0158] Another embodiment of the present disclosure relates to a system including at least one computing device and at least one storage device storing instructions, wherein the instructions, when executed by the at least one computing device, prompt the at least one computing device to execute the above-mentioned file processing method applied to EDA tools.

[0159] It should be noted that the system according to the exemplary embodiments of the present disclosure can completely rely on the execution of computer programs or instructions to realize corresponding functions, that is, each unit corresponds to each step in the functional architecture of the computer program, so that the entire system is called through a special software package (e.g., lib library) to realize the corresponding functions.

[0160] On the other hand, when the above-mentioned system is implemented in software, firmware, middleware or microcode, the program code or code segment for performing the corresponding operation can be stored in a computer-readable medium such as a storage medium, so that at least one processor or at least one computing device can perform the corresponding operation by reading and running the corresponding program code or code segment.

[0161] According to an exemplary embodiment of the present disclosure, the storage device may be integrated with the computing device, for example, RAM or flash memory is arranged within an integrated circuit microprocessor, etc. In addition, the storage device may include an independent device, such as an external disk drive, a storage array, or any other storage device that can be used by a database system. The storage device and the computing device may be operationally coupled, or may communicate with each other, such as through an I / O port, a network connection, etc., so that the computing device can read instructions stored in the storage device.

[0162] According to the file processing method, device, storage medium, electronic device and system applied to EDA tools provided by the present disclosure, the EDA tool no longer directly processes IP-XACT XML files, but processes lightweight JSON files, thereby avoiding the negative impact on the performance of the EDA tool caused by the large amount of memory and CPU resources required to process a large number of IP-XACT XML files in the EDA tool.

[0163] In addition, when both JSON objects and XML DOM objects contain the same semantic information, the memory resources occupied by JSON objects are significantly reduced compared to XML DOM objects. Therefore, accessing and maintaining the content in JSON objects is much simpler and more flexible than XML DOM.

[0164] In addition, the IP-XACT file in JSON format and the IP-XACT file in XML format can be converted between each other conveniently and quickly through the predetermined conversion rules.

[0165] The above describes various exemplary embodiments of the present disclosure, and it should be understood that the above description is only exemplary and not exhaustive, and the present disclosure is not limited to the disclosed exemplary embodiments. Without departing from the scope and spirit of the present disclosure, many modifications and changes are obvious to those of ordinary skill in the art. Therefore, the scope of protection of the present disclosure should be based on the scope of the claims.

Claims

1. A method for designing an electronic circuit, the method comprising: include: Obtaining a first electronic circuit design file, wherein the first electronic circuit design file is in XML format; converting the first electronic circuit design file into a second electronic circuit design file having a JSON format based on a conversion rule, the conversion rule associating a first XML tag corresponding to an electronic circuit design element with a JSON attribute corresponding to the same electronic circuit design element; and An electronic circuit design is generated based on the second electronic circuit design file using an electronic design automation (EDA) tool.

2. The method according to claim 1, in, Generating the electronic circuit design comprises: performing a parsing operation on the second electronic circuit design file to generate a JSON object; and An operation is performed on the JSON object, wherein the operation includes at least one of creation, traversal, addition, deletion, and modification.

3. The method according to claim 2, in, Generating the electronic circuit design comprises: serializing the object to obtain a serialized electronic circuit design file; and The serialized electronic circuit design file is saved.

4. The method according to claim 1, in, Converting the first electronic circuit design file into the second electronic circuit design file includes: Verifying the first electronic circuit design file; parsing the verified first electronic circuit design file; transforming the first electronic circuit design file based on the transformation rule to obtain a JSON object; and The JSON object is serialized to obtain the second electronic circuit design file.

5. The method according to claim 1, further comprising: include: verifying the second electronic circuit design file; parsing the verified second electronic circuit design file; transforming the second electronic circuit design file based on the transformation rule to obtain an XML object; as well as The XML object is serialized to obtain a third electronic circuit design file.

6. The method according to claim 1, in, The conversion rules maintain semantic consistency.

7. The method according to claim 1, in, Generating the electronic circuit design comprises: verifying the validity of the first electronic circuit design file based on a predetermined verification module, The predetermined verification module includes predefined rules and predefined constraints, and each of the predefined rules and the predefined constraints is specific to the first electronic circuit design file.

8. A device for electronic circuit design, the device include: A file acquisition module is configured to obtain a first electronic circuit design file; wherein the first electronic circuit design file is in XML format; a conversion module configured to convert the first electronic circuit design file into a second electronic circuit design file having a JSON format based on a conversion rule, the conversion rule associating a first XML tag corresponding to an electronic circuit design element with a JSON attribute corresponding to the same electronic circuit design element; and The file processing module is configured to generate an electronic circuit design based on the second electronic circuit design file.

9. An electronic device, It is characterized in that include: at least one processor; at least one memory storing computer executable instructions, Wherein, when the computer executable instructions are executed by the at least one processor, the at least one processor is prompted to execute the method for designing an electronic circuit as claimed in any one of claims 1 to 7.

10. A computer-readable storage medium storing instructions, in, When the instructions are executed by at least one computing device, the at least one computing device is prompted to execute the electronic circuit design method according to any one of claims 1 to 7.

11. A system comprising at least one computing device and at least one storage device storing instructions, in, When the instructions are executed by the at least one computing device, the at least one computing device is prompted to perform the electronic circuit design method according to any one of claims 1 to 7.

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