A method for manufacturing a SBD device

Abstract

The present application provides a method for manufacturing an SBD device, the steps of which include: obtaining a diffusion zone window on the epitaxial layer on the front side of a silicon wafer; etching the epitaxial layer to obtain a diffusion zone groove; coating a boron source on the surface of the silicon wafer and performing a furnace tube process on it to form a PN junction in the groove; removing excess boron source on the surface of the silicon wafer and in the groove, and then etching the oxide layer on the gold semi-contact window to form a barrier zone; processing the barrier zone to form a Schottky silicide; processing the front side of the silicon wafer to obtain a front terminal area field plate structure. The manufacturing method of the present application adopts a boron source coating method to replace the existing ion implantation method, which not only has good adjustability, but also can obtain a boron source layer thickness with uniform thickness and good consistency in the doping area; at the same time, the Schottky-based structure is optimized to extend the edge of the barrier zone to the middle of the diffusion zone groove, which can protect the weakest and most easily broken-down part of the barrier zone, improve the device quality and ensure the performance parameters, improve the yield of finished products, and also significantly reduce the production cost.

Description

Technical Field

[0001] The present application belongs to the technical field of power device manufacturing, and in particular, relates to a method for manufacturing a SBD device. Background Art

[0002] Schottky diode, also known as Schottky barrier diode (SBD for short), is a low-power, ultra-high-speed semiconductor device. The most notable feature is the extremely short reverse recovery time, which can be as small as a few nanoseconds; the forward conduction voltage drop is only about 0.4V. It is mostly used as a high-frequency, low-voltage, high-current rectifier diode, freewheeling diode, and protection diode. It is also used as a rectifier diode and a small signal detector diode in microwave communication circuits. It is more common in communication power supplies, inverters, etc.

[0003] SBD Schottky diodes use metal-semiconductor junctions as Schottky barriers to produce rectification effects, which is different from the PN junctions produced by semiconductor-semiconductor junctions in general diodes. The characteristics of the Schottky barrier make the on-state voltage drop of the Schottky diode lower and can increase the switching speed.

[0004] The Schottky diode is very different from the PN junction diode in terms of structural principle. Its interior is composed of anode metal (barrier layer made of materials such as molybdenum or aluminum), silicon dioxide (SiO2) electric field elimination material, N-epitaxial layer (phosphorus material), N-type silicon substrate, N+ cathode layer and cathode metal. A Schottky barrier is formed between the N-type substrate and the anode metal. When a forward bias is applied to both ends of the Schottky barrier (the anode metal is connected to the positive pole of the power supply, and the N-type substrate is connected to the negative pole of the power supply), the Schottky barrier layer becomes narrower and its internal resistance becomes smaller. Conversely, if a reverse bias is applied to both ends of the Schottky barrier, the Schottky barrier layer becomes wider and its internal resistance becomes larger.

[0005] In the current mature SBD preparation process, ion implantation is mainly used for P-type doping. This process is not only complicated in process steps, but also extremely expensive in corresponding production equipment, and the equipment maintenance and fuel costs are also high. Summary of the invention

[0006] The present application provides a method for manufacturing an SBD device, which solves the technical problems of expensive production equipment and high maintenance costs of the existing ion implantation doping method, and the products obtained by the manufacturing method of the present application can also reach the quality standards of products obtained by existing ion implantation.

[0007] In order to solve at least one of the above technical problems, the technical solution adopted in this application is:

[0008] A method for manufacturing a SBD device, comprising the steps of:

[0009] Obtaining a diffusion region window on the epitaxial layer on the front side of the silicon wafer;

[0010] Etching the epitaxial layer to obtain a diffusion region trench;

[0011] A boron source is coated on the surface of the silicon wafer and subjected to a furnace tube process to form a PN junction in the groove;

[0012] Remove the excess boron source on the silicon wafer surface and in the trench, and then etch the oxide layer on the gold semi-contact window to form a barrier region;

[0013] Processing the barrier region to form Schottky silicide;

[0014] The front side of the silicon wafer is processed to obtain a front terminal region field plate structure.

[0015] Furthermore, the step of obtaining a diffusion region window on the epitaxial layer on the front side of the silicon wafer is specifically as follows:

[0016] A silicon dioxide oxide layer is grown on the epitaxial layer of the N-type silicon substrate by thermal oxidation;

[0017] Then coating a layer of photoresist on the oxide layer, and exposing and developing the photoresist to obtain the diffusion region window on the photoresist layer;

[0018] The thickness of the oxide layer is 0.1-1.5um; the thickness of the photoresist is 0.8-1.2um.

[0019] Furthermore, the etching of the epitaxial layer to obtain the diffusion region trench is specifically as follows:

[0020] Based on the diffusion area window pattern, the oxide layer on the surface of the silicon wafer is etched by BOE solution until the epitaxial layer is exposed;

[0021] Removing the photoresist on the oxide layer;

[0022] The oxide layer is used as a hard mask, and an etching solution is used to etch the epitaxial layer to etch a groove where the diffusion area is located.

[0023] Further, the BOE solution is a mixed solution of HF aqueous solution and NH4F aqueous solution, and the volume ratio thereof is 7:1; the etching solution used for etching the groove is a mixed solution of nitric acid, acetic acid, and hydrofluoric acid;

[0024] The depth of the groove is 0.5-1.5um, and the width is 30-80um.

[0025] Further, when a boron source is coated on the surface of a silicon wafer having grooves,

[0026] First, a boron source is coated on the surface of the silicon wafer in a unidirectional rotating manner to form a 1000Å-20KÅ boron source layer film on the surface of the silicon wafer and in the grooves;

[0027] The boron source layer film is then dried and solidified.

[0028] Furthermore, the rotation speed during coating of the boron source is 1.8-3.5 rpm; the temperature during drying and curing is 130-170° C., and the drying time is 15-30 min.

[0029] Furthermore, the solidified silicon wafer is controlled to be thermally oxidized in a mixed atmosphere of N2 and O2, so that the boron element diffuses into the Si in the groove to form a 2-10um PN junction; at the same time, another oxide layer grows on the surface of the silicon wafer and in the groove, and there is excess boron source attached to the surface of the oxide layer on the surface of the silicon wafer and in the groove.

[0030] Furthermore, the removal of excess boron source on the silicon wafer surface and in the grooves, and then etching the oxide layer on the gold semi-contact window to form a barrier region, is specifically as follows:

[0031] A chemical etching method is used, and hydrofluoric acid is used for rinsing to remove the excess boron source on the surface of the silicon wafer and the oxide layer in the groove, and to expose the oxide layer;

[0032] Then the oxide layer on the surface of the silicon wafer and in the grooves is etched, and the oxide layer between adjacent grooves is etched away to form a barrier region.

[0033] Furthermore, metal Ni / NiPt is sputtered on the barrier region to deposit a metal Ni layer / NiPt layer with a thickness of 200-1500Å; and the Ni layer / NiPt metal layer is annealed for 1h in a N2 atmosphere to form the Schottky silicide on the barrier region.

[0034] Furthermore, the front side of the silicon wafer is processed to obtain the front terminal region field plate structure, specifically: a mixed solution of concentrated hydrochloric acid and concentrated nitric acid is used to clean the surface of the silicon wafer for 10-30 minutes to remove excess metal Ni / NiPt that has not reacted with Si;

[0035] Then, metal Ti, Ni, and Ag are evaporated sequentially on the front side of the silicon wafer through the PVD process to form a TiNiAg metal layer;

[0036] The front side of the silicon wafer is then processed by photolithography and wet etching methods to form a terminal region field plate structure with a front electrode.

[0037] A manufacturing method for an SBD device designed by the present application adopts a boron source coating method to replace the existing ion implantation method, which not only has good adjustability, but also can obtain a boron source layer thickness with uniform thickness and good consistency in the doping area; at the same time, the Schottky-based layer structure is optimized to extend the edge of the barrier region to the middle of the diffusion region trench, which can protect the weakest and most easily broken-down part of the barrier region, improve the device quality and ensure the performance parameters, improve the finished product yield, and also significantly reduce the production cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 is a flow chart of the manufacturing method in the present application;

[0039] Figure 2 It is a schematic diagram of the structure of a silicon wafer with a diffusion region window in the present application;

[0040] Figure 3 is a schematic diagram of the structure of a silicon wafer with grooves in the present application;

[0041] Figure 4 is a schematic diagram of the structure of a silicon wafer after being coated with a boron source in this application;

[0042] Figure 5 It is a schematic diagram of the structure of the silicon wafer after the PN junction is formed in this application;

[0043] Figure 6 is a schematic diagram of the structure of the barrier region obtained by etching in this application;

[0044] Figure 7 It is a schematic diagram of the structure of the field plate in the positive terminal area of ​​the silicon wafer in this application.

[0045] In the figure: 10, substrate; 20, epitaxial layer; 30, oxide layer; 40, trench; 50, boron source layer; 60, barrier region; 61, silicide; 70, metal layer. DETAILED DESCRIPTION

[0046] The present application is described in detail below with reference to the accompanying drawings and specific embodiments.

[0047] This embodiment provides a method for manufacturing a SBD device, such as Figure 1 As shown, the steps include:

[0048] S1. Obtain a diffusion region window on the epitaxial layer on the front side of the silicon wafer.

[0049] like Figure 2 As shown, an epitaxial layer 20 is first grown on the front side of an N-type silicon base substrate 10; then a layer of silicon dioxide is grown on the epitaxial layer 20 by thermal oxidation, and the silicon dioxide layer is an initial oxide layer 30, and its thickness is 0.1-1.5 um.

[0050] Then, a layer of photoresist is coated on the oxide layer 30, and the thickness of the photoresist is 0.8-1.2um. Then, the photoresist layer is exposed and developed based on the diffusion region template to obtain a diffusion region window on the photoresist layer. The diffusion region is the location of the trench where the PN junction is located.

[0051] S2. Etching the epitaxial layer to obtain a diffusion region groove.

[0052] like Figure 3 As shown, based on the pattern of the diffusion area window, the oxide layer 30 on the surface of the silicon wafer is etched by BOE solution until the epitaxial layer 20 is exposed, wherein the BOE solution is a mixed solution of HF aqueous solution and NH4F aqueous solution, and the volume ratio is 7:1; wherein the concentration ratio of HF in the HF aqueous solution is 45-55%; and the concentration ratio of NH4F in the NH4F aqueous solution is 30-50%. At this time, the photoresist on the oxide layer 30 still exists.

[0053] The photoresist on the oxide layer 30 is then removed, and the initial oxide layer 30 is used as a hard mask to etch the epitaxial layer 20 with an etching solution to etch a groove 40 where the diffusion region is located on the epitaxial layer 20. The etching solution used to etch the groove 40 is a mixed solution of nitric acid, acetic acid, and hydrofluoric acid.

[0054] Finally, the structure of the obtained groove 40 is a groove-shaped structure, the middle of which is a horizontal surface and the two sides of which are arc-shaped curved surface structures, and the depth of the groove 40 is 0.5-1.5um and the width is 30-80um. The Schottky layer barrier region is located between adjacent grooves 40.

[0055] S3. Coat a boron source on the surface of the silicon wafer and perform a furnace tube process on it to form a PN junction in the groove.

[0056] like Figure 4 As shown, a layer of boron source glue is printed and coated on the surface of the silicon wafer with the groove 40. Since the glue has fluidity and a certain viscosity, the printing method needs to be paid attention to during printing and coating. In this embodiment, the boron source is printed and coated on the surface of the silicon wafer and the groove in a unidirectional rotation manner, and the rotation speed during coating the boron source is 1.8-3.5rpm; a boron source layer 50 thin film with a thickness of 1000Å-20KÅ can be coated on the surface of the silicon wafer and in the groove 40 to form.

[0057] Then, the film of the boron source layer 50 is dried and solidified to solidify the flowing liquid, wherein the temperature during the drying and solidification is 130-170° C. and the drying time is 15-30 minutes.

[0058] like Figure 5As shown, the cured silicon wafer is then controlled to be thermally oxidized in a furnace tube under a mixed atmosphere of N2 and O2, so that the boron element diffuses into the Si in the groove to form a 2-10um PN junction. Since the surface of the oxide layer 30 also contains Si, when the PN junction is formed, another oxide layer 30 will grow on the surface of the initial oxide layer 30 on the surface of the silicon wafer, so that the height of the oxide layer 30 on the surface of the silicon wafer is higher than the height of the initial oxide layer 30. Moreover, another oxide layer 30 is grown on the surface of the PN junction in the groove 40. Among them, the excess boron source will adhere to the surface of the oxide layer 30 and the surface of the oxide layer 30 above the groove 40.

[0059] S4. Remove excess boron source from the silicon wafer surface and the groove, and then etch the oxide layer on the gold semi-contact window to form a barrier region.

[0060] like Figure 6 As shown, a chemical etching method is used to remove excess boron source on the surface of the silicon wafer and the surface of the oxide layer 30 in the groove, and hydrofluoric acid is used as the etching liquid until the surface of the silicon wafer and the oxide layer 30 on the groove are exposed.

[0061] Then, the oxide layer 30 on the surface of the silicon wafer and in the grooves is etched, and the oxide layer between adjacent grooves is etched away, and half of the oxide layer 30 in the grooves is removed to form a gold semiconductor contact window with a "π" structure to form a barrier region 60.

[0062] That is, the barrier region 60 includes a main section located on the surface of the epitaxial layer 20 and an extension section located in the middle of the trench 40. The extension sections on both sides form a "π"-shaped structure with the main section, and the length of the extension section is at least half of the oxide layer 30 in the trench 40, that is, the end point of the extension section is located at the midline position of the trench 40. Since the electric field lines at the edge of the barrier region 60 are most concentrated, this position is most likely to be broken down, but the curved surface structure of the extension section of the barrier region 60 with a "π"-shaped structure can protect the electric field at the weakest part of the barrier region 60, improve its safety performance, reduce the probability of its breakdown, and ensure its performance parameters.

[0063] S5. Process the barrier region to form Schottky silicide.

[0064] like Figure 7 As shown, a metal Ni / NiPt layer with a thickness of 200-1500Å is deposited and grown on the barrier region 60 by sputtering metal Ni / NiPt on the “π”-shaped structure barrier region. The metal Ni / NiPt layer is then annealed for 1 hour in a N2 atmosphere to form the Schottky silicide 61 on the barrier region 60.

[0065] S6. Process the front side of the silicon wafer to obtain a front terminal region field plate structure.

[0066] like Figure 7 As shown, a mixed solution consisting of concentrated hydrochloric acid and concentrated nitric acid is used to clean the surface of the silicon wafer for 10-30 minutes to remove excess metal Ni / NiPt that has not reacted with Si.

[0067] Then, metals Ti, Ni, and Ag are evaporated in sequence on the front side of the silicon wafer through the PVD process to form a Ti layer, a Ni layer, and an Ag layer in sequence. These three metal layers together form a metal layer 70. The front side of the silicon wafer is then processed through photolithography and wet etching methods to form a terminal area field plate structure with a front electrode.

[0068] A manufacturing method for an SBD device designed by the present application adopts a boron source coating method to replace the existing ion implantation method, which not only has good adjustability, but also can obtain a boron source layer thickness with uniform thickness and good consistency in the doping area; at the same time, the Schottky-based layer structure is optimized to extend the edge of the barrier region to the middle of the diffusion region trench, which can protect the weakest and most easily broken-down part of the barrier region, improve the device quality and ensure the performance parameters, improve the finished product yield, and also significantly reduce the production cost.

[0069] The above detailed description of the embodiments of the present application is only a preferred embodiment of the present application and cannot be considered to limit the scope of implementation of the present application. All equivalent changes and improvements made within the scope of the present application should still fall within the scope of the patent coverage of the present application.

Claims

1. A method for manufacturing a SBD device, characterized in that the steps include: Obtaining a diffusion region window on the epitaxial layer on the front side of the silicon wafer; Etching the epitaxial layer to obtain a diffusion region trench; A boron source is coated on the surface of the silicon wafer and subjected to a furnace tube process to form a PN junction in the groove; Remove the excess boron source on the silicon wafer surface and in the trench, and then etch the oxide layer on the gold semi-contact window to form a barrier region; Processing the barrier region to form Schottky silicide; Processing the front side of the silicon wafer to obtain a front terminal region field plate structure; The method removes the excess boron source on the silicon wafer surface and in the groove, and then etches the oxide layer on the gold semi-contact window to form a barrier region, specifically: A chemical etching method is used, and hydrofluoric acid is used for rinsing to remove the excess boron source on the surface of the silicon wafer and the oxide layer in the groove, and to expose the oxide layer; Then the oxide layer on the surface of the silicon wafer and in the grooves is etched, and the oxide layer between adjacent grooves is etched away to form a barrier region; The barrier region includes a main section located on the surface of the epitaxial layer and an extended section located in the middle of the groove. The extended sections on both sides form a "π"-shaped structure with the main section, and the length of the extended section is at least half of the oxide layer in the groove.

2. The method for manufacturing a SBD device according to claim 1, characterized in that: The step of obtaining a diffusion region window on the epitaxial layer on the front side of the silicon wafer is specifically as follows: A silicon dioxide oxide layer is grown on the epitaxial layer of the N-type silicon substrate by thermal oxidation; Then coating a layer of photoresist on the oxide layer, and exposing and developing the photoresist to obtain the diffusion region window on the photoresist layer; The thickness of the oxide layer is 0.1-1.5um; the thickness of the photoresist is 0.8-1.2um.

3. A method for manufacturing a SBD device according to claim 1 or 2, characterized in that: The step of etching the epitaxial layer to obtain the diffusion region trench is specifically as follows: Based on the diffusion area window pattern, the oxide layer on the surface of the silicon wafer is etched by BOE solution until the epitaxial layer is exposed; Removing the photoresist on the oxide layer; The oxide layer is used as a hard mask, and an etching solution is used to etch the epitaxial layer to etch a groove where the diffusion area is located.

4. The method for manufacturing a SBD device according to claim 3, characterized in that: The BOE solution is a mixed solution of HF aqueous solution and NH4F aqueous solution, with a volume ratio of 7:1; the etching solution used for etching the groove is a mixed solution of nitric acid, acetic acid, and hydrofluoric acid; The depth of the groove is 0.5-1.5um, and the width is 30-80um.

5. A method for manufacturing a SBD device according to any one of claims 1 to 2 and 4, characterized in that: When a boron source is applied to the surface of a silicon wafer having grooves, First, a boron source is coated on the surface of the silicon wafer in a unidirectional rotating manner to form a 1000Å-20KÅ boron source layer film on the surface of the silicon wafer and in the grooves; The boron source layer film is then dried and solidified.

6. The method for manufacturing a SBD device according to claim 5, characterized in that: The rotation speed during coating of the boron source is 1.8-3.5 rpm; the temperature during drying and curing is 130-170° C., and the drying time is 15-30 min.

7. The method for manufacturing a SBD device according to claim 6, characterized in that: The solidified silicon wafer is then thermally oxidized in a mixed atmosphere of N2 and O2 to diffuse the boron element into the Si in the groove to form a 2-10um PN junction. At the same time, another oxide layer grows on the surface of the silicon wafer and in the groove, and there is excess boron source attached to the surface of the oxide layer on the surface of the silicon wafer and in the groove.

8. The method for manufacturing a SBD device according to claim 1, characterized in that: Then, metal Ni / NiPt is sputtered on the barrier region to deposit a metal Ni layer / NiPt layer with a thickness of 200-1500Å; and then the metal Ni layer / NiPt layer is annealed in a N2 atmosphere for 1 hour to form the Schottky silicide on the barrier region.

9. A method for manufacturing a SBD device according to any one of claims 1-2, 4, 6-8, characterized in that: The front side of the silicon wafer is processed to obtain the front terminal region field plate structure, specifically: the surface of the silicon wafer is cleaned for 10-30 minutes using a mixed solution composed of concentrated hydrochloric acid and concentrated nitric acid to remove excess metal Ni / NiPt that has not reacted with Si; Then, metal Ti, Ni, and Ag are evaporated sequentially on the front side of the silicon wafer through the PVD process to form a TiNiAg metal layer; The front side of the silicon wafer is then processed by photolithography and wet etching methods to form a terminal region field plate structure with a front electrode.

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