Sealing structure and sealing method of GaN transistor and gate driver

By sealing the GaN transistor with the gate driver on a ceramic substrate and dissipating heat using heat conduction glue and metal shell, the performance bottlenecks and reliability problems of GaN power devices in high frequency and high voltage applications are solved, and compactness is achieved. Efficient power conversion solution.

CN119132982APending Publication Date: 2024-12-13SHANGHAI SUNSHINE TECH CO LTD
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Patent Information

Application Number
CN202411286088.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-13
Publication Date
2024-12-13

AI Technical Summary

Technical Problem

GaN power devices in high frequency and high voltage applications result in system performance bottlenecks due to on-resistance, switching speed and thermal management capabilities, and external gate drivers increase system complexity, cost and reliability risks.

Method used

Using a GaN transistor and gate driver combined structure, a compact, efficient and reliable power conversion solution is achieved through the combination of ceramic substrate, heat conduction glue and metal shell, using the colloid between ceramic substrate and GaN transistor and gate driver. Fill and heat conduction glue for effective heat dissipation.

Benefits of technology

It improves the heat dissipation capability, structural reliability and overall performance of GaN transistors and gate drivers, realizes the compactness of the system and performance optimization, and reduces cost and reliability risks.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a sealing method and a sealing structure of a GaN transistor and a gate driver. The sealing method comprises the following steps: providing a ceramic substrate; mounting a GaN transistor and a gate driver on the ceramic substrate, wherein the GaN transistor and the gate driver are arranged adjacently; filling a gap between the ceramic substrate and the GaN transistor and a gap between the ceramic substrate and the gate driver with colloid; forming heat conduction glue on the outer side surface of the GaN transistor; the GaN transistor and the gate driver are covered by the metal shell, and the heat conduction glue is abutted between the GaN transistor and the metal shell, so that high-frequency capability is realized, the loss rate is small, the reliability is good, and the heat dissipation performance is good.
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Description

Technical Field

[0001] The present invention relates to the field of sealing technology, and in particular to a sealing structure and a sealing method of a GaN transistor and a gate driver. Background Art

[0003] As modern electronic devices have increasing requirements for power density and energy efficiency, traditional silicon (Si)-based power devices have gradually approached their performance limits. Especially in high-frequency and high-voltage applications, the on-resistance, switching speed and thermal management capabilities of silicon-based devices limit the overall performance of the system. In order to break through these limitations, the industry began to seek new semiconductor materials, among which gallium nitride (GaN) stood out due to its wide bandgap characteristics and excellent electron mobility.

[0004] GaN power devices exhibit faster switching speeds, lower on-resistance, and higher operating temperature ranges, giving them significant advantages in applications such as power conversion, electric vehicle chargers, solar inverters, and LiDAR. However, the high performance of GaN devices also brings challenges in design and packaging. In particular, parasitic parameters between the gate driver and the GaN transistor can seriously affect the switching performance and electromagnetic compatibility (EMC) of the device.

[0005] At present, GaN power devices on the market usually need to be used with external gate drivers, which not only increases the complexity of system design, but also limits the reduction of overall size and optimization of performance. In addition, the use of external drivers also increases system costs and reliability risks. Summary of the invention

[0006] The purpose of the present invention is to address the deficiencies in the prior art and provide a GaN transistor and gate driver sealing structure and sealing method, so as to package the gate driver and the GaN power transistor together to achieve a more compact, efficient and reliable power conversion solution.

[0007] In order to achieve the above object, the present invention provides the following technical solutions:

[0008] The method for sealing the GaN transistor and the gate driver comprises the following steps:

[0009] a. providing a ceramic substrate;

[0010] b. mounting a GaN transistor and a gate driver on the ceramic substrate, wherein the GaN transistor and the gate driver are arranged adjacent to each other;

[0011] d. Filling colloid into the gaps between the ceramic substrate and the GaN transistor and the gate driver respectively;

[0012] f. forming a thermally conductive adhesive on the outer side of the GaN transistor;

[0013] g. Cover the GaN transistor and the gate driver with a metal shell, and place the thermal conductive adhesive between the GaN transistor and the metal shell.

[0014] As a preferred embodiment, the step b comprises the following steps:

[0015] b1. Attaching solder paste to the ceramic substrate, and then placing the GaN transistor and gate driver on the ceramic substrate;

[0016] b2. Mount the GaN transistor and the gate driver onto the ceramic substrate by reflow soldering.

[0017] As a preferred embodiment, between step b and step d, the sealing method further comprises the following steps:

[0018] c. Cleaning the areas between the ceramic substrate and the GaN transistor and the gate driver.

[0019] As a preferred embodiment, the step d comprises the following steps:

[0020] d1. Using a glue dispenser, fill glue in the gaps between the ceramic substrate and the GaN transistor and the gate driver respectively;

[0021] d2. Curing the glue to obtain the colloid.

[0022] As a preferred embodiment, between step d and step f, the sealing method further comprises the following steps:

[0023] e. Scan and detect the areas between the ceramic substrate and the GaN transistor and the gate driver respectively. If there is no gap, proceed to step f.

[0024] As a preferred embodiment, the thermal conductive glue includes TIM glue, and the step f includes the following steps:

[0025] The outer side of the GaN transistor away from the ceramic substrate is filled with TIM glue.

[0026] As a preferred embodiment, the step g comprises the following steps:

[0027] g1. Applying glue on the ceramic substrate, wherein the glue application area of ​​the ceramic substrate is located outside the GaN transistor and the gate driver;

[0028] g2. Fill the metal shell into the glue dispensing area of ​​the ceramic substrate so that the metal shell covers the GaN transistor and the gate driver.

[0029] As a preferred embodiment, the metal shell includes a side plate and a top plate, the top plate is closed and connected to the upper part of the side plate, and the lower part of the side plate is open, and then step g2 includes the following steps:

[0030] g21, placing the metal housing on the ceramic substrate with the lower portion of the side plate corresponding to the glue dispensing area, wherein the thermally conductive glue is located between the GaN transistor and the top plate;

[0031] g22. Apply pressure to the top plate of the metal shell, and fill the metal shell onto the ceramic substrate through solidification.

[0032] The present invention also provides a sealing structure of a GaN transistor and a gate driver, comprising a ceramic substrate, a GaN transistor, a gate driver, a colloid, a thermal conductive glue and a metal shell, wherein the GaN transistor and the gate driver are mounted on the ceramic substrate, the colloid is filled in the gaps between the ceramic substrate and the GaN transistor and the gate driver respectively, the outer side of the GaN transistor away from the ceramic substrate is provided with thermal conductive glue, the metal shell covers the GaN transistor and the gate driver, the metal shell is loaded on the ceramic substrate, and the thermal conductive glue abuts between the GaN transistor and the metal shell.

[0033] Compared with the prior art, this technical solution has the following advantages:

[0034] The GaN transistor and the gate driver are protected by the metal shell, and the heat conduction glue between the GaN transistor and the metal shell is used to effectively dissipate the heat of the GaN transistor. In addition, the ceramic substrate is filled with colloids between the GaN transistor and the gate driver, respectively, which not only improves the reliability of the structure, but also the heat of the GaN transistor and the gate driver can be transferred to the ceramic substrate, thereby improving the heat dissipation capacity. In addition, the GaN transistor and the gate driver are adjacent to each other, achieving high frequency capability and low loss rate.

[0035] The present invention is further described below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a flow chart of the method for sealing the GaN transistor and the gate driver according to the present invention;

[0037] Figure 2 It is a schematic structural diagram of the sealed structure of the GaN transistor and the gate driver according to the present invention.

[0038] In the figure: 100, ceramic substrate; 200, GaN transistor; 300, gate driver; 400, colloid; 500, thermal conductive glue; 600, metal shell; 610, top plate; 620, side plate; 700, solder ball. DETAILED DESCRIPTION

[0039] The following description is used to disclose the present invention so that those skilled in the art can implement the present invention. The preferred embodiments described below are only examples, and those skilled in the art can think of other obvious variations. The basic principles of the present invention defined in the following description can be applied to other embodiments, variations, improvements, equivalents, and other technical solutions that do not deviate from the spirit and scope of the present invention.

[0040] First embodiment

[0041] like Figure 1 and Figure 2 As shown, the method for sealing the GaN transistor and the gate driver comprises the following steps:

[0042] a. providing a ceramic substrate 100;

[0043] b. mounting a GaN transistor 200 and a gate driver 300 on the ceramic substrate 100 , wherein the GaN transistor 200 and the gate driver 300 are arranged adjacent to each other;

[0044] d. Filling the colloid 400 in the gaps between the ceramic substrate 100 and the GaN transistor 200 and the gate driver 300;

[0045] f. forming a thermal conductive adhesive 500 on the outer surface of the GaN transistor 200;

[0046] g. The GaN transistor 200 and the gate driver 300 are covered with a metal shell 600 , and the thermal conductive glue 500 is abutted between the GaN transistor 200 and the metal shell 600 .

[0047] The GaN transistor 200 and the gate driver 300 are protected by the metal shell 600, and the heat conduction glue 500 between the GaN transistor 200 and the metal shell 600 is used to effectively dissipate the heat of the GaN transistor 200. In addition, the colloid 400 is filled between the ceramic substrate 100 and the GaN transistor 200 and the gate driver 300, respectively. This not only improves the reliability of the structure, but also allows the heat of the GaN transistor 200 and the gate driver 300 to be transferred to the ceramic substrate 100, thereby improving the heat dissipation capability, solving the problem in the prior art that the GaN transistor 200 and the gate driver 300 cannot be arranged adjacent to each other due to heat dissipation, cost and other issues, thereby achieving overall miniaturization and optimizing performance.

[0048] The inconsistency of the thermal expansion coefficient (CTE) of each material of the existing product leads to the problem of insufficient structural reliability. Therefore, in the step a, the ceramic substrate 100 is made of aluminum nitride ceramic material, wherein the thermal expansion coefficient of aluminum nitride ceramic material is about 2 to 3, the thermal expansion coefficient of copper is 17.5, and the thermal expansion coefficient of the GaN transistor 200 and the gate driver 300 is about 3 to 5, which is close to the thermal expansion coefficient of the aluminum nitride ceramic material. Therefore, the ceramic substrate 100 is selected to reduce the thermal mismatch as much as possible. The thermal conductivity of aluminum nitride ceramic material is also close to 230, and it also has a good thermal conductivity effect.

[0049] refer to Figure 1 and 2 , the step b comprises the following steps:

[0050] b1. Attach solder paste to the ceramic substrate 100, and then place the GaN transistor 200 and the gate driver 300 on the ceramic substrate 100;

[0051] b2. Mount the GaN transistor 200 and the gate driver 300 onto the ceramic substrate 100 by reflow soldering.

[0052] In step b1, the holes of the steel mesh are aligned with the pads of the ceramic substrate 100, the steel mesh is placed on the ceramic substrate 100, and then the solder paste is evenly applied on the steel mesh using a hanging knife. The solder paste includes solder and flux. After the steel mesh is removed, the solder paste is formed on the pads of the ceramic substrate 100, and finally the GaN transistor 200 and the gate driver 300 are placed on the ceramic substrate 100 according to the specified position and the solder paste on the corresponding pads. For example, the pins of the GaN transistor 200 are placed on the ceramic substrate 100 corresponding to the solder paste on the pads.

[0053] In step b2, the reflow soldering mainly controls the temperature curve so that the welding points of the GaN transistor 200 and the gate driver 300 and the ceramic substrate 100 are melted at high temperature to form a firm connection. Taking the GaN transistor 200 as an example, the welding point refers to the connection between the solder ball 700 of the GaN transistor 200, the solder paste and the solder pad of the ceramic substrate 100.

[0054] The product obtained in step b1 can be heated by a soldering furnace, wherein the temperature curve is the furnace temperature curve corresponding to the solder paste, and finally placed in a cooling zone for solidification to obtain a ceramic substrate 100 mounted with a GaN transistor 200 and a gate driver 300.

[0055] refer to Figure 1 and Figure 2 , between step b and step d, the sealing method further comprises the following steps:

[0056] c. Clean the areas between the ceramic substrate 100 and the GaN transistor 200 and the gate driver 300, especially the flux in the solder paste, to ensure that in the subsequent step d, the colloid 400 is evenly filled in the gaps between the ceramic substrate 100 and the GaN transistor 200 and the gate driver 300.

[0057] The cleaning may be performed by plasma cleaning. Since the GaN transistor 200 and the gate driver 300 are respectively connected to the ceramic substrate 100 through flux and pads, there are gaps between the GaN transistor 200 and the gate driver 300 and the ceramic substrate 100.

[0058] refer to Figure 1 and Figure 2 , the step d comprises the following steps:

[0059] d1. Use a glue dispenser to fill glue in the gaps between the ceramic substrate 100 and the GaN transistor 200 and the gate driver 300;

[0060] d2. Use an oven to cure the glue to obtain the colloid 400.

[0061] In step d1, the glue can be filled using an underfill process, that is, the ceramic substrate 100 equipped with the GaN transistor 200 and the gate driver 300 is moved to the track of the glue dispenser, and the glue dispensing head of the glue dispenser is used to fill the gaps between the ceramic substrate 100 and the GaN transistor 200 and the gate driver 300 respectively with glue, wherein the glue spontaneously fills the gaps through a capillary effect.

[0062] In step d2, the filled product is placed in a pressure oven and baked according to specific parameters to solidify the glue to obtain the colloid 400.

[0063] By filling the colloid 400 between the ceramic substrate 100 and the GaN transistor 200 and the gate driver 300, the following effects can be obtained:

[0064] 1. Enhanced mechanical connection: The colloid 400 provides additional adhesion between the GaN transistor 200 and the gate driver 300 and the ceramic substrate 100, respectively, which helps to resist mechanical stress caused by temperature changes, vibrations or mechanical shocks, thereby reducing the risk of device breakage or damage.

[0065] 2. Improve thermal performance: The colloid 400 can improve the heat conduction path and help transfer the heat generated by the GaN transistor 200 and the gate driver 300 to the ceramic substrate 100 more effectively, thereby possibly improving the overall heat dissipation efficiency.

[0066] 3. Reduce the impact of thermal cycling: During thermal cycling, colloid 400 can reduce the stress caused by mismatch in thermal expansion coefficients and protect devices from thermal fatigue damage.

[0067] 4. Filling gaps: Filling with colloid 400 provides more uniform stress distribution and reduces local stress concentration.

[0068] 5. Improve reliability: Through the above effects, Colloid 400 helps to improve the long-term reliability and life of electronic devices.

[0069] refer to Figure 1 and Figure 2 Between step d and step f, the sealing method further comprises the following steps:

[0070] e. Scan and detect the areas between the ceramic substrate 100 and the GaN transistor 200 and the gate driver 300, respectively. If there is no gap, proceed to step f.

[0071] The scanning detection is an ultrasonic scanning analysis (SAT), which detects whether there are gaps (holes) between the ceramic substrate 100 and the GaN transistor 200 and the gate driver 300 respectively. If there are gaps, it means that the cleaning is not done thoroughly in step c, and the oven parameters are not set properly in step d2, that is, corresponding adjustments are made so that there will be no holes in the future.

[0072] refer to Figure 1 and Figure 2The thermally conductive adhesive 500 includes TIM (Thermal Interface Material) adhesive, and the step f includes the following steps:

[0073] The outer side of the GaN transistor 200 away from the ceramic substrate 100 is filled with TIM glue.

[0074] Specifically, the product is placed in a glue dispenser, and TIM glue is dispensed on the outer side of the GaN transistor 200 away from the ceramic substrate 100. After the TIM glue is cured in step g22, it abuts between the GaN transistor 200 and the metal housing 600.

[0075] refer to Figure 1 and Figure 2 , the step g comprises the following steps:

[0076] g1. Applying glue on the ceramic substrate 100, wherein the glue application area of ​​the ceramic substrate 100 is located outside the GaN transistor 200 and the gate driver 300;

[0077] g2. Fill the metal shell 600 into the glue dispensing area of ​​the ceramic substrate 100 so that the metal shell 600 covers the GaN transistor 200 and the gate driver 300 .

[0078] Steps g1 and f can be completed simultaneously in a glue dispenser, that is, firstly TIM glue is filled on the outer side of the GaN transistor 200 away from the ceramic substrate 100, and then glue is dispensed on the ceramic substrate 100. Glue is dispensed on the ceramic substrate 100 for connection with the metal housing 600.

[0079] The metal housing 600 includes a side plate 620 and a top plate 610, wherein the top plate 610 is closed and connected to the upper portion of the side plate 620, and the lower portion of the side plate 620 is open, and the step g2 includes the following steps:

[0080] g21, placing the metal housing 600 on the ceramic substrate 100 with the lower portion of the side plate 620 corresponding to the glue dispensing area, wherein the thermal conductive glue 500 is located between the GaN transistor 200 and the top plate 610;

[0081] g22. Apply pressure to the top plate 610 of the metal shell 600, and fill the metal shell 600 onto the ceramic substrate 100 through curing.

[0082] The metal shell 600 can be made of metal materials such as copper. In step g22, a metal block of a certain weight can be placed on the top plate 610 of the metal shell 600 to facilitate the close connection between the side plate 620 of the metal shell 600 and the ceramic substrate 100, and to facilitate the close contact between the thermal conductive glue 500 and the GaN transistor 200 and the top plate 610. Finally, curing and baking are performed to obtain the following. Figure 2 The sealing structure shown in the figure includes the side plate 620 surrounding the periphery of the GaN transistor 200 and the gate driver 300, the GaN transistor 200 and the gate driver 300 are located between the top plate 610 and the ceramic substrate 100, and the thermal conductive glue 500 is tightly abutted between the GaN transistor 200 and the top plate 610.

[0083] refer to Figure 2 A pair of heat sinks may also be provided on the outer surface of the top plate 610, and the heat dissipation capacity thereof may be improved by utilizing the gaps between the heat sinks corresponding to the fans.

[0084] By providing the thermal conductive adhesive 500, the following effects can be achieved:

[0085] 1. Improving heat conduction efficiency: The heat conduction glue 500 fills the tiny air gap between the GaN transistor 200 and the metal housing 600, reducing the contact thermal resistance, thereby improving the efficiency of heat transfer from the GaN transistor 200 to the metal housing 600.

[0086] 2. Reduce overall thermal resistance: In small devices such as GaN, due to the small contact area, even the small thermal resistance of 500% thermal conductive glue may have a significant impact on the overall thermal resistance. Therefore, using high thermal conductivity materials with low thermal resistance is crucial to maintain low overall thermal resistance.

[0087] 3. Electrical isolation: The thermally conductive adhesive 500 provides the necessary electrical isolation between the GaN transistor 200 and the metal housing 600 to prevent electrical shorts or other electrical problems, especially when the top of a device such as a GaN FET is connected to a source potential.

[0088] 4. Compatibility and reliability: The thermally conductive adhesive 500 should be compatible with the materials of the GaN transistor 200 and the metal housing 600 to avoid chemical reactions and long-term performance degradation while maintaining reliability under the operating conditions of the device.

[0089] 5. Heat spreading support: Although the thermally conductive adhesive 500 itself may not directly benefit from the heat spreading effect of the metal housing 600, it is still critical to the thermal management of the entire system because it helps ensure that heat can be effectively transferred from the GaN transistor 200 to the metal housing 600.

[0090] 6. Material selection: When selecting thermal conductive adhesive 500, you need to consider its thermal conductivity and electrical insulation properties to ensure that it provides efficient heat transfer while also ensuring electrical safety.

[0091] For the same type of traditional packaging, the sealing method of this embodiment adopts an external metal shell 600 to protect the devices inside the package, such as the GaN transistor 200 and the gate driver 300, and transfers the heat generated by the GaN transistor 200 to the metal shell 600 through the thermal conductive glue 500, and dissipates the heat through the metal shell 600, thereby improving the heat dissipation and the protection effect. The reflow soldering process is used at the connection between the GaN transistor 200 and the gate driver 300 and the ceramic substrate 100 to improve the welding strength, and then the gap between the GaN transistor 200 and the gate driver 300 and the ceramic substrate 100 is filled with the glue 400 through the Underfill process to improve the thermal conductivity efficiency and balance the stress generated in the subsequent reliability test, thereby improving the mechanical properties of the overall product.

[0092] According to the inductance calculation formula L = 2l [ln (2l / d) - 0.75]

[0093] L = value of parasitic inductance; I = length of wire; d = diameter of wire.

[0094] L is proportional to I. If L is smaller, the high frequency is better, then d is shorter and the resistance is smaller. If L is larger, the high frequency cannot be achieved, then d is longer, then D is longer and the resistance is larger. That is, the shorter the wire is, the smaller the calculated parasitic inductance value is. According to the induced electromotive force calculation formula E=Ldi / dt, under the same current change rate, the smaller the inductance is, the smaller the induced electromotive force is. If the induced electromotive force is too large, it will cause the chip to be reversely broken down. Therefore, the GaN transistor 200 and the gate driver 300 are arranged adjacent to each other and encapsulated inside the metal housing 600, that is, the wire between the GaN transistor 200 and the gate driver 300 is short, which improves the performance and reliability of the chip under high-frequency applications.

[0095] Further explanation is given that the existing GaN transistor 200 and gate driver 300 are far apart due to factors such as cost and height. However, the present embodiment utilizes the arrangement of a metal housing 600, a thermally conductive adhesive 500, a ceramic substrate 100, and an adhesive 400, etc., which not only achieves high frequency capability, low loss rate, and low heat generation, but also extends service life and improves reliability.

[0096] Second embodiment,

[0097] like Figure 2As shown, the sealing structure of the GaN transistor and the gate driver is obtained by the sealing method of the first embodiment, wherein the sealing structure of the GaN transistor and the gate driver comprises a ceramic substrate 100, a GaN transistor 200, a gate driver 300, a colloid 400, a thermal conductive glue 500 and a metal shell 600, the GaN transistor 200 and the gate driver 300 are mounted on the ceramic substrate 100, the colloid 400 is filled in the gaps between the ceramic substrate 100 and the GaN transistor 200 and the gate driver 300 respectively, the thermal conductive glue 500 is arranged on the outer side of the GaN transistor 200 away from the ceramic substrate 100, the metal shell 600 covers the GaN transistor 200 and the gate driver 300, the metal shell 600 is filled on the ceramic substrate 100, and the thermal conductive glue 500 is abutted between the GaN transistor 200 and the metal shell 600.

[0098] The beneficial effects of the combined sealing structure of the GaN transistor and the gate driver can be referred to the first embodiment and will not be elaborated here.

[0099] The embodiments described above are only used to illustrate the technical ideas and features of the present invention, and their purpose is to enable technicians in this field to understand the contents of the present invention and implement them accordingly. The patent scope of the present invention cannot be limited only by this embodiment, that is, any equivalent changes or modifications made according to the spirit disclosed by the present invention still fall within the patent scope of the present invention.

Claims

1. A method for sealing a GaN transistor and a gate driver, characterized in that: The following steps are involved: a. providing a ceramic substrate (100); b. mounting a GaN transistor (200) and a gate driver (300) on the ceramic substrate (100), wherein the GaN transistor (200) and the gate driver (300) are arranged adjacent to each other; d. filling the gaps between the ceramic substrate (100) and the GaN transistor (200) and the gate driver (300) with colloid (400); f. forming a thermal conductive adhesive (500) on the outer side surface of the GaN transistor (200); g. Using a metal shell (600) to cover the GaN transistor (200) and the gate driver (300), and the thermal conductive glue (500) is in contact between the GaN transistor (200) and the metal shell (600).

2. The method for sealing a GaN transistor and a gate driver according to claim 1, wherein: The step b comprises the following steps: b1. attaching solder paste to the ceramic substrate (100), and then placing the GaN transistor (200) and the gate driver (300) on the ceramic substrate (100); b2. Using a reflow soldering method, the GaN transistor (200) and the gate driver (300) are mounted on the ceramic substrate (100).

3. The method for sealing a GaN transistor and a gate driver according to claim 1, wherein: Between step b and step d, the sealing method further comprises the following steps: c. Cleaning the areas between the ceramic substrate (100) and the GaN transistor (200) and the gate driver (300).

4. The method for sealing a GaN transistor and a gate driver according to claim 1, wherein: The step d comprises the following steps: d1. Using a glue dispenser, fill glue in the gaps between the ceramic substrate (100) and the GaN transistor (200) and the gate driver (300); d2. Curing the glue to obtain the colloid (400).

5. The method for sealing a GaN transistor and a gate driver according to claim 1, wherein: Between step d and step f, the sealing method further comprises the following steps: e. Scan and detect the areas between the ceramic substrate (100) and the GaN transistor (200) and the gate driver (300), and if there is no gap, proceed to step f.

6. The method for sealing a GaN transistor and a gate driver according to claim 1, wherein: The thermal conductive glue (500) includes TIM glue, and the step f includes the following steps: The outer side of the GaN transistor (200) away from the ceramic substrate (100) is filled with TIM glue.

7. The method for sealing a GaN transistor and a gate driver according to claim 1, wherein: The step g comprises the following steps: g1. applying glue on the ceramic substrate (100), wherein the glue application area of ​​the ceramic substrate (100) is located outside the GaN transistor (200) and the gate driver (300); g2. Fill the metal shell (600) into the glue dispensing area of ​​the ceramic substrate (100) so that the metal shell (600) covers the GaN transistor (200) and the gate driver (300).

8. The method for sealing a GaN transistor and a gate driver according to claim 7, wherein: The metal housing (600) comprises a side plate (620) and a top plate (610), wherein the top plate (610) is closed and connected to the upper portion of the side plate (620), and the lower portion of the side plate (620) is open, and the step g2 comprises the following steps: g21, placing the metal housing (600) on the ceramic substrate (100) with the lower portion of the side plate (620) corresponding to the glue dispensing area, wherein the thermal conductive glue (500) is located between the GaN transistor (200) and the top plate (610); g22. Apply pressure to the top plate (610) of the metal shell (600), and load the metal shell (600) onto the ceramic substrate (100) through curing.

9. A GaN transistor and gate driver co-sealed structure, characterized in that: The invention comprises a ceramic substrate (100), a GaN transistor (200), a gate driver (300), a colloid (400), a heat-conducting glue (500) and a metal shell (600). The GaN transistor (200) and the gate driver (300) are mounted on the ceramic substrate (100). The colloid (400) is filled in the gaps between the ceramic substrate (100) and the GaN transistor (200) and the gate driver (300). The heat-conducting glue (500) is arranged on the outer side of the GaN transistor (200) away from the ceramic substrate (100). The metal shell (600) covers the GaN transistor (200) and the gate driver (300). The metal shell (600) is filled on the ceramic substrate (100). The heat-conducting glue (500) is abutted between the GaN transistor (200) and the metal shell (600).

Citation Information

Patent Citations

  • Semiconductor device and method for manufacturing the same

    CN101150097A

  • Encapsulation structure and electronic device

    CN109786336A

  • Gallium nitride driving device, packaging method thereof and gallium nitride driving module

    CN116469841A

  • Electronic package with integrated heat spreader

    CN117043936A