Drive circuit for laser in transmitter and transmitter architecture

Abstract

The invention discloses a driving circuit for a laser in a transmitter and a transmitter architecture. The driving circuit comprises a transcoding module, a retiming module, a pulse generation module, an asymmetric feedforward amplification module, a first current adding module, a high-pass filtering module, a low-pass filtering module, a push-pull type driving module, a pre-driving module and a second current adding module. According to the technical scheme, due to the fact that the first current adding module and the second current adding module are arranged, PAM4 type current signal conversion can be carried out at the output end of the asymmetric feed-forward amplification module, the large-capacitance load at the output end is shared through the summation node, the parasitic capacitance of the driving circuit is reduced when the driving circuit outputs a third PAM4 type current signal, and therefore the driving circuit can output the third PAM4 type current signal. Concentrated superposition of heavy loads at the output end of the second current summing module is avoided, and therefore power consumption of the driving circuit is remarkably reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated module design, and in particular to a driving circuit for a laser in a transmitter and a transmitter architecture. Background Art

[0002] like Figure 1 As shown, a laser driving circuit commonly used in the prior art can compensate for the linearity of PAM4 (4-Level Pulse Amplitude Modulation) type signals. Specifically, a low-speed parallel data signal is converted into a high-speed serial data signal through a multiplexer, and a three-way timing pulse waveform required for equalization is generated through a pulse generating circuit, and divided into three signal paths of high, medium and low. The height of the upper eye, middle eye and lower eye in the eye diagram of the PAM4 type signal output is adjusted respectively through a feedforward amplifier, thereby improving the output quality of the signal. In addition, at the output stage, each input signal enters the output driver after passing through a pre-amplifier, and is summed at the output node to form a PAM4 current signal for driving the laser, thereby driving the laser.

[0003] Figure 1 Although the laser driving circuit shown can perform linear compensation and bandwidth compensation in the process of driving the laser, the driving circuit requires greater power consumption when performing linear compensation and bandwidth compensation to improve and compensate for the deteriorated linearity caused by bandwidth limitation, laser power saturation phenomenon and device relaxation effect.

[0004] Therefore, the prior art still needs to be improved and developed. Summary of the invention

[0005] In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a driving circuit and a transmitter architecture for a laser in a transmitter, so as to solve the problem that the laser driving circuit in the prior art requires greater power consumption when performing linear compensation and bandwidth compensation to improve and compensate for the deteriorated linearity caused by bandwidth limitation, laser power saturation phenomenon and device relaxation effect.

[0006] The technical solution adopted by the present invention to solve the technical problem is: to provide a driving circuit for a laser in a transmitter, comprising:

[0007] A transcoding module, used to convert binary code into three-way temperature code;

[0008] A retiming module connected to the transcoding module, the retiming module is used to receive the three-way temperature code and retime the three-way temperature code to reduce the jitter of the temperature code converted by the transcoding module;

[0009] A pulse generating module, connected to the retiming module, the pulse generating module is used to receive the three temperature codes after retiming to generate three timing pulse signals for feedforward equalization;

[0010] an asymmetric feedforward amplifier module, connected to the pulse generating module, and used for adjusting the height of the three-way timing pulse signal to output a first PAM4 type current signal;

[0011] A first current summing module, connected to the asymmetric feedforward amplifying module, the first current summing module is used to receive the first PAM4 type current signal output by the asymmetric feedforward amplifying module and add and output a second PAM4 type current signal;

[0012] A high-pass filtering module, wherein an input end of the high-pass filtering module is connected to the first current adding module;

[0013] A low-pass filter module, wherein an input end of the low-pass filter module and an input end of the high-pass filter module are connected to the first current summing module;

[0014] A push-pull driving module, wherein the input end of the push-pull driving module is connected to the output end of the high-pass filtering module, the push-pull driving module comprises a first voltage input end and a second voltage input end, the first voltage input end is connected to the first power supply end, the second voltage input end is connected to the second power supply end, and the second PAM4 type current signal is output to the push-pull driving module via the high-pass filtering module;

[0015] A pre-driver module, wherein the input end of the pre-driver module is connected to the output end of the low-pass filter module, the pre-driver module includes a third voltage input end and a fourth voltage input end, the third voltage input end is connected to the second power supply end, the fourth voltage input end is grounded, the second PAM4 type current signal is output to the pre-driver module via the low-pass filter module, and the pre-driver module is used to receive the current signal output by the low-pass filter module and adjust the linearization gain and high-frequency equalization capability to form a balanced current;

[0016] A second current summing module is connected to the output end of the pre-driving module and the output end of the push-pull driving module. The second current summing module is used to add the current signal output by the pre-driving module and the current signal output by the push-pull driving module to output a third PAM4 type current signal to drive the laser.

[0017] In a further arrangement of the present invention, the asymmetric feedforward amplification module comprises: a high path slice, a middle path slice and a low path slice respectively connected to the pulse generation module;

[0018] The high path slice, the middle path slice and the low path slice are also connected to the first current summing module respectively.

[0019] A further configuration of the present invention is that the first current summing module includes: a first resistor, one end of the first resistor is connected to the high path slice, the middle path slice and the low path slice, and the other end of the first resistor is connected to the input end of the high-pass filtering module and the input end of the low-pass filtering module.

[0020] According to a further configuration of the present invention, the second current summing module comprises: a second resistor, one end of the second resistor is connected to the output end of the push-pull driving module and the output end of the pre-driving module, and one end of the second resistor is connected to the laser.

[0021] According to a further configuration of the present invention, the push-pull driving module includes: a first transistor, a second transistor, a third transistor, a fourth transistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first inductor, a second inductor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first current source, and a load matching unit;

[0022] The gate of the first transistor is connected to one end of the third resistor and one end of the first capacitor, the drain of the first transistor is connected to the first power supply end, and the source of the first transistor is connected to the drain of the third transistor;

[0023] The gate of the third transistor is connected to one end of the second capacitor and one end of the fourth resistor, and the source of the third transistor is connected to one end of the first current source;

[0024] The drain of the second transistor is connected to the first power supply terminal, the gate of the second transistor is connected to one end of the fifth resistor and one end of the third capacitor, and the source of the second transistor is connected to one end of the first inductor;

[0025] The drain of the fourth transistor is connected to one end of the second inductor, the gate of the fourth transistor is connected to one end of the sixth resistor and one end of the fourth capacitor, and the source of the fourth transistor is connected to the source of the third transistor;

[0026] One end of the load matching unit is connected to the connection end of the source of the first transistor and the drain of the third transistor, and the other end of the load matching unit is connected to the second power supply end;

[0027] The other end of the third resistor and the other end of the fifth resistor are connected to the first bias voltage output terminal, the other end of the fourth resistor and the other end of the sixth resistor are connected to the second bias voltage output terminal, and the other end of the first current source is connected to the second power supply terminal;

[0028] The other end of the first capacitor, the other end of the second capacitor, the other end of the third capacitor and the other end of the fourth capacitor are connected to the output end of the high-pass filter module;

[0029] The other end of the first inductor is connected to the other end of the second inductor, wherein one end of the first inductor connected to the second inductor is the output end of the push-pull driving module.

[0030] According to a further configuration of the present invention, the load matching unit includes: a seventh resistor and a fifth capacitor, one end of the fifth capacitor is connected to the connection end of the source of the first transistor and the drain of the third transistor, the other end of the fifth capacitor is connected to one end of the seventh resistor, and the other end of the seventh resistor is connected to the second power supply end.

[0031] According to a further configuration of the present invention, the pre-driving module includes: an eighth resistor, a ninth resistor, a third inductor, a fourth inductor, a fifth inductor, a sixth inductor, a fifth transistor, a sixth transistor, a second current source, a third current source and an RC network;

[0032] One end of the eighth resistor is connected to the second power supply end, the other end of the eighth resistor is connected to one end of the third inductor, the other end of the third inductor is connected to one end of the fourth inductor, the other end of the fourth inductor is connected to the drain of the fifth transistor, the gate of the fifth transistor is connected to the output end of the low-pass filter module, and the source of the fifth transistor is connected to one end of the second current source;

[0033] One end of the ninth resistor is connected to the second power supply end, the other end of the ninth resistor is connected to one end of the fifth inductor, the other end of the fifth inductor is connected to one end of the sixth inductor, the other end of the sixth inductor is connected to the drain of the sixth transistor, the gate of the sixth transistor is connected to the output end of the low-pass filter module, and the source of the sixth transistor is connected to one end of the third current source;

[0034] The other ends of the second current source and the third current source are grounded, one end of the RC network is connected to the source of the fifth transistor, and the other end of the RC network is connected to the source of the sixth transistor;

[0035] One end of the third inductor connected to the fourth inductor and one end of the fifth inductor connected to the sixth inductor are output ends of the pre-driving module.

[0036] According to a further configuration of the present invention, the second power supply end is an output end of a low voltage drop linear regulator.

[0037] According to a further configuration of the present invention, the driving circuit further includes: a parasitic inductance suppression module, and the parasitic inductance suppression module is connected to the second current adding module and the laser.

[0038] The present invention also provides a transmitter architecture, which at least comprises: a laser and the driving circuit for the laser in the transmitter as described above, wherein the driving circuit is connected to the laser.

[0039] The beneficial effects of the present invention are:

[0040] The present invention provides a driving circuit and a transmitter architecture for a laser in a transmitter, wherein an asymmetric amplification module can alleviate the nonlinear relaxation effect when outputting a PAM4 type current signal to a laser, and can also compensate for the bandwidth loss on the circuit transmission path. In addition, due to the balancing effect of a pre-driving module, a push-pull driving module and an asymmetric feedforward amplification module, the ringing phenomenon caused by the complex conjugate pole of the third PAM4 type current signal output by the second current summing module is improved, and the linearity of the output third PAM4 type current signal is also improved. The pre-driving module can adjust the linearization gain and high-frequency balancing capability to form a balanced current, thereby reducing the bandwidth requirement for the push-pull driving module. Furthermore, due to the provision of a first current summing module, The module and the second current summing module, compared with the laser driving circuit in the prior art, can perform PAM4 type current signal conversion at the output end of the asymmetric feedforward amplifier module, and share the large capacitance load of the output end (the first current summing module and the second current summing module) through the summing node, so that the parasitic capacitance of the driving circuit itself is reduced when outputting the third PAM4 type current signal, avoiding the concentrated superposition of large loads at the output end of the second current summing module, thereby significantly reducing the power consumption of the driving circuit. It can be seen that when the driving circuit performs linear compensation and bandwidth compensation, the power consumption required to solve the problem of deteriorated linearity caused by linear compensation, bandwidth compensation, laser power saturation phenomenon and device relaxation effect is reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary personnel in this field, other drawings can be obtained based on the structures shown in these drawings without paying any creative work.

[0042] Figure 1 It is a circuit structure diagram of a driving circuit in the prior art.

[0043] Figure 2 It is a circuit structure diagram of a driving circuit for a laser in a transmitter according to the present invention.

[0044] Figure 3 It is a specific circuit structure diagram of a push-pull driving module and a pre-driving module in one embodiment of the present invention.

[0045] Figure 4 It is an optical eye diagram of an equalized output before being turned on in a driving circuit of a laser in a transmitter in one embodiment of the present invention.

[0046] Figure 5 It is an optical eye diagram output after balanced opening in a driving circuit of a laser in a transmitter in one embodiment of the present invention.

[0047] The marks in the accompanying drawings are: 10, driving circuit; 101, transcoding module; 102, retiming module; 103, pulse generating module; 104, asymmetric feedforward amplifying module; 105, first current adding module; 106, high-pass filtering module; 107, low-pass filtering module; 108, push-pull driving module; 1081, load matching unit; 109, pre-driving module; 110, second current adding module; 111, parasitic inductance suppression module; VDDH, first power supply terminal; VDDL, second power supply terminal; I1, first current source; I2, second current source; I3, third current source; I DAC a fourth current source; R3, a third resistor; R4, a fourth resistor; R5, a fifth resistor; R6, a sixth resistor; R7, a seventh resistor; R8, an eighth resistor; R9, a ninth resistor; L1, a first inductor; L2, a second inductor; L3, a third inductor; L4, a fourth inductor; L5, a fifth inductor; L6, a sixth inductor; L7, a seventh inductor; L8, an eighth inductor; C1, a first capacitor; C2, a second capacitor; C3, a third capacitor; C4, a fourth capacitor; M1, a first transistor; M2, a second transistor; M3, a third transistor; M4, a fourth transistor; M5, a fifth transistor; M6, a sixth transistor. DETAILED DESCRIPTION

[0048] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, the specific embodiments of the present invention are now described in detail with reference to the accompanying drawings. In the following description, it should be understood that the directions or positional relationships indicated by "front", "back", "up", "down", "left", "right", "longitudinal", "horizontal", "vertical", "horizontal", "top", "bottom", "inside", "outside", "head", "tail", etc. are based on the directions or positional relationships shown in the accompanying drawings, are constructed and operated in a specific direction, and are only for the convenience of describing the present technical solution, rather than indicating that the device or element referred to must have a specific direction, and therefore cannot be understood as a limitation to the present invention.

[0049] Lasers driven by current signals require output stage driver circuits that can provide modulation currents of about milliamperes. Due to the light-emitting principle of the laser, the equivalent time constants of the laser in the charging and discharging paths are inconsistent. In the eye diagram test, the rising edge is faster than the falling edge, which causes the eye diagram to be skewed and affects the quality of the output optical signal. At the same time, various parasitics in the signal link (including bonding wires and package parasitics) will also introduce bandwidth limitations. Therefore, bipolar transistor circuits with high current gain are often used to drive lasers in transmitters.

[0050] The surge in data-intensive applications and the exponential growth in data traffic have placed unprecedented demands on the performance and efficiency of data centers. To meet these challenges, data center operators are constantly seeking innovative solutions to provide cost-effective and high-speed data transmission solutions. Due to the advantages of high output power, high conversion efficiency and low manufacturing cost of lasers, laser-based driver circuit transmitter technology has been widely used in data center interconnection.

[0051] Despite these compelling advantages, the limitations of optical interconnect applications based on laser driver circuits must be recognized. Typically, interfaces (including bonding wires and packaging parasitics) introduce signal loss and bandwidth bottlenecks in the transmitter link, affecting overall system performance. Another challenge lies in the nonlinearity of the devices in the laser driver circuit. In the eye diagram, the devices exhibit amplitude distortion and fall times that are faster than rise times (relaxation effects). Complex modulation methods (such as PAM-4) can improve bandwidth utilization efficiency under limited bandwidth and device nonlinearity, but they will also require greater power consumption to improve and compensate for the deteriorated linearity caused by bandwidth limitations, laser power saturation, and device relaxation effects. That is, the laser driver circuit in the existing technology can ensure the output quality of the signal, but the power consumption is high.

[0052] Based on the above problems, the present invention provides a driving circuit 10 for a laser in a transmitter, such as Figure 2As shown, the driving circuit 10 may include a transcoding module 101, a retiming module 102, a pulse generating module 103, an asymmetric feedforward amplifying module 104, a first current adding module 105, a high-pass filtering module 106, a low-pass filtering module 107, a push-pull driving module 108, a pre-driving module 109 and a second current adding module 110.

[0053] Among them, the transcoding module 101 is used to convert the binary code into a three-way temperature code; the retiming module 102 is connected to the transcoding module 101, and the retiming module 102 is used to receive the three-way temperature code and retime the three-way temperature code to reduce the jitter of the temperature code converted by the transcoding module 101; the pulse generation module 103 is connected to the retiming module 102, and the pulse generation module 103 is used to receive the retimed three-way temperature code to generate three-way timing pulse signals for feedforward equalization; the asymmetric feedforward amplifier module 104 is connected to the pulse generation module 103, and the asymmetric feedforward amplifier module 104 is used to adjust the three-way timing The height of the pulse signal is used to output a first PAM4 current signal; the first current summing module 105 is connected to the asymmetric feedforward amplifier module 104, and the first current summing module 105 is used to receive the first PAM4 current signal output by the asymmetric feedforward amplifier module 104 and sum and output a second PAM4 current signal; the input end of the high-pass filter module 106 is connected to the first current summing module 105; the input end of the low-pass filter module 107 and the input end of the high-pass filter module 106 are connected to the first current summing module 105; the input end of the push-pull driving module 108 is connected to the high-pass filter module 10 6, the push-pull driving module 108 includes a first voltage input terminal and a second voltage input terminal, the first voltage input terminal is connected to the first power supply terminal VDDH, the second voltage input terminal is connected to the second power supply terminal VDDL, and the second PAM4 type current signal is output to the push-pull driving module 108 via the high-pass filtering module 106; a pre-driving module 109, the input terminal of the pre-driving module 109 is connected to the output terminal of the low-pass filtering module 107, the pre-driving module 109 includes a third voltage input terminal and a fourth voltage input terminal, the third voltage input terminal is connected to the second power supply terminal VDDL, and the fourth voltage input terminal is connected to the low-pass filtering module 107. The second PAM4 type current signal is output to the pre-driving module 109 via the low-pass filtering module 107. The pre-driving module 109 is used to receive the current signal output by the low-pass filtering module 107 and adjust the linearization gain and the high-frequency equalization capability to form a balanced current. The second current adding module 110 is connected to the output end of the pre-driving module 109 and the output end of the push-pull driving module 108. The second current adding module 110 is used to add the current signal output by the pre-driving module 109 and the current signal output by the push-pull driving module 108 to output a third PAM4 type current signal to drive the laser.

[0054] Specifically, the data input to the transcoding module 101 may be, but is not limited to, one channel of data, for example, two channels of parallel data, wherein the data input to the transcoding module 101 is output to the retiming module 102 in the form of three parallel channels of temperature codes, and the three channels of temperature codes are retimed by the retiming module 102 to reduce the jitter of the temperature codes converted by the transcoding module 101. The three channels of temperature codes retimed by the retiming module are transmitted to the pulse generating module 103, and the pulse generating module 103 forms the signal flow necessary for the asymmetric feedforward amplifier module 104 to perform feedforward equalization through different delays, that is, generates three channels of timing pulse signals for feedforward equalization.

[0055] In this embodiment, the asymmetric amplification module can alleviate the nonlinear relaxation effect when outputting the PAM4 type current signal to the laser, and can also compensate for the bandwidth loss on the circuit transmission path. In addition, due to the balancing effect of the pre-driving module 109, the push-pull driving module 108 and the asymmetric feedforward amplification module 104, the ringing phenomenon caused by the complex conjugate pole of the third PAM4 type current signal output by the second current summing module 110 is improved, and the linearity of the output third PAM4 type current signal is also improved. The pre-driving module 109 can adjust the linearization gain and high-frequency balancing capability to form a balanced current, thereby reducing the bandwidth requirements for the push-pull driving module 108. Furthermore, since the first current summing module 105 and the second current summing module 110 are provided, compared with the laser driving circuit in the prior art (in the prior art, the PAM4 current signal is converted only at the anode of the laser), the PAM4 current signal conversion can be performed at the output end of the asymmetric feedforward amplifier module 104, and the large capacitive load of the output end (the first current summing module 105 and the second current summing module 110) is shared by the summing node, so that the parasitic capacitance of the driving circuit 10 itself is reduced when outputting the third PAM4 current signal, and the concentrated superposition of the large load at the output end of the second current summing module 110 is avoided, thereby significantly reducing the power consumption of the driving circuit 10. It can be seen that when the driving circuit 10 performs linear compensation and bandwidth compensation, the power consumption required to solve the problem of deteriorated linearity caused by linear compensation, bandwidth compensation, laser power saturation phenomenon and device relaxation effect is reduced, and finally a high-speed, high-extinction ratio and high-optical modulation amplitude optical modulation output eye diagram is achieved.

[0056] In addition, since the push-pull driving module 108 and the pre-driving module 109 share the second power supply terminal VDDL, the current in the push-pull driving circuit 10 can be reused in the pre-driving module 109, further reducing the power consumption of the driving circuit 10.

[0057] Here, it should be noted that the transcoding module 101 can be any transcoding circuit structure in the prior art that can convert binary code into three-way temperature code. Those skilled in the art can determine the specific circuit structure of the transcoding module 101 according to actual needs, and no further limitations are made here.

[0058] The retiming module 102 can be any retiming circuit structure in the prior art that can retime the temperature code and reduce the jitter of the temperature code output by the transcoding module 101. Those skilled in the art can determine the specific circuit structure of the retiming module 102 according to actual needs, and no further limitations are made here.

[0059] In some embodiments, the high-pass filter module 106 may be any high-pass filter circuit capable of filtering low-frequency signals. Those skilled in the art may determine the specific circuit structure of the high-pass filter module 106 according to actual needs, and no further limitation is made herein.

[0060] Similarly, the low-pass filter module 107 can be any low-frequency filter circuit that can filter low-frequency signals. Those skilled in the art can determine the specific circuit structure of the low-pass filter module 107 according to actual needs, and no further limitation is made here.

[0061] In this embodiment, the high-pass filtering module 106 can filter out the low-frequency signal in the second PAM4 type current signal and retain the high-frequency signal, wherein the less the high-frequency signal is filtered out, the steeper the rising edge and the falling edge of the upper eye, the middle eye and the lower eye in the eye diagram signal will be, and the richer the high-frequency signal is, the larger the eye width of the upper eye, the middle eye and the lower eye in the formed eye diagram signal will be. The low-frequency signal filtered out by the high-pass filtering module 106 is further compensated by the low-pass filtering module 107, and the low-frequency signal affects the level height of the eye diagram signal. The richer the low-frequency signal is, the larger the eye height of the upper eye, the middle eye and the lower eye in the eye diagram signal will be. The flexibility in compensation is ensured by the setting method of the high-frequency filtering module and the low-frequency filtering module.

[0062] In some embodiments, Figure 2 As shown, the asymmetric feedforward amplification module 104 may include a high path slice, a middle path slice and a low path slice respectively connected to the pulse generation module 103; the high path slice, the middle path slice and the low path slice are also respectively connected to the first current addition module 105.

[0063] Specifically, in the three-way timing pulse signal generated by the pulse generating circuit, each of the timing pulse signals contains a leading mark (EQPRE) signal, a main mark (EQMA) signal and a trailing mark (EQPST) signal, and the three-way timing pulse signal is amplified by the asymmetric feedforward amplifier module 104. When the three-way timing pulse signal is amplified, four levels of amplitude are formed by high path slices, middle path slices and low path slices, and each slice (high path slice, middle path slice and low path slice) uses the leading mark, main mark and trailing mark in the timing pulse signal to adjust the speed of the rising edge and the falling edge in the four levels of amplitude conversion process, so that the eye diagram signal composed of the four levels of amplitude can be maximized, thereby improving the signal-to-noise ratio and bit error rate performance.

[0064] In some embodiments, the first current summing module 105 may include a first resistor, one end of which is connected to the high path slice, the middle path slice, and the low path slice, and the other end of the first resistor is connected to the input end of the high-pass filtering module 106 and the input end of the low-pass filtering module 107.

[0065] In this embodiment, only one load resistor (first resistor) needs to be provided to achieve current addition, that is, the first PAM4 type current signal output by the asymmetric amplification module is converted into a second PAM4 type current signal through the first resistor.

[0066] In some embodiments, the second current summing module 110 may include a second resistor, one end of the second resistor is connected to the output end of the push-pull driving module 108 and the output end of the pre-driving module 109 , and one end of the second resistor is connected to the laser.

[0067] In this embodiment, similarly, only a load resistor (second resistor) is required to form a third PAM4 type current signal outputted by the push-pull driving module 108 and the pre-driving module 109 to output the current signal to the laser.

[0068] In some embodiments, Figure 3 As shown, the push-pull driving module 108 may include a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first inductor L1, a second inductor L2, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a first current source I1 and a load matching unit 1081.

[0069] Among them, the gate of the first transistor M1 is connected to one end of the third resistor R3 and one end of the first capacitor C1, the drain of the first transistor M1 is connected to the first power supply terminal VDDH, and the source of the first transistor M1 is connected to the drain of the third transistor M3; the gate of the third transistor M3 is connected to one end of the second capacitor C2 and one end of the fourth resistor R4, and the source of the third transistor M3 is connected to one end of the first current source I1; the drain of the second transistor M2 is connected to the first power supply terminal VDDH, the gate of the second transistor M2 is connected to one end of the fifth resistor R5 and one end of the third capacitor C3, and the source of the second transistor M2 is connected to one end of the first inductor L1; the drain of the fourth transistor M4 is connected to one end of the second inductor L2, the gate of the fourth transistor M4 is connected to one end of the sixth resistor R6 and one end of the fourth capacitor C4, and the source of the fourth transistor M4 is connected to the third transistor M 3; one end of the load matching unit 1081 is connected to the connection end of the source of the first transistor M1 and the drain of the third transistor M3, and the other end of the load matching unit 1081 is connected to the second power supply terminal VDDL; the other end of the third resistor R3 and the other end of the fifth resistor R5 are connected to the first bias voltage output terminal, the other end of the fourth resistor R4 and the other end of the sixth resistor R6 are connected to the second bias voltage output terminal, and the other end of the first current source I1 is connected to the second power supply terminal VDDL; the other end of the first capacitor C1, the other end of the second capacitor C2, the other end of the third capacitor C3 and the other end of the fourth capacitor C4 are connected to the output terminal of the high-pass filtering module 106; the other end of the first inductor L1 is connected to the other end of the second inductor L2, wherein the end where the first inductor L1 is connected to the second inductor L2 is the output terminal of the push-pull driving module 108.

[0070] In this embodiment, the third resistor R3, the fourth resistor R4, the fifth resistor R5 and the sixth resistor R6 are bias resistors respectively, the first capacitor C1, the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 are isolation capacitors respectively, VCM0 is the first bias voltage, and VCM1 is the second bias voltage, wherein the third resistor R3 and the first capacitor C1 are AC-coupled during the conduction process of the first transistor M1, the fourth resistor R4 and the second capacitor C2 are AC-coupled during the conduction process of the third transistor M3, the fifth resistor R5 and the third capacitor C3 are AC-coupled during the conduction process of the second transistor M2, and the sixth resistor R6 and the fourth capacitor C4 are AC-coupled during the conduction process of the fourth transistor M4.

[0071] The first transistor M1 , the second transistor M2 , the third transistor M3 and the fourth transistor M4 are all P-MOS transistors (P-type Metal-Oxide-Semiconductor Field Effect Transistor, positive channel Metal Oxide Semiconductor).

[0072] In this embodiment, the first inductor L1 and the second inductor L2 are arranged in parallel using the inductor peaking technology, which can independently improve the balancing ability of the high-frequency signal of the push-pull driving module 108; wherein the load matching unit 1081 can achieve load balancing among the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4.

[0073] Specifically, the load matching unit 1081 may include a seventh resistor R7 and a fifth capacitor, one end of the fifth capacitor is connected to the connection end of the source of the first transistor M1 and the drain of the third transistor M3, the other end of the fifth capacitor is connected to one end of the seventh resistor R7, and the other end of the seventh resistor R7 is connected to the second power supply end VDDL.

[0074] In some embodiments, Figure 3 As shown, the pre-driving module 109 may include an eighth resistor R8, a ninth resistor R9, a third inductor L3, a fourth inductor L4, a fifth inductor L5, a sixth inductor L6, a fifth transistor M5, a sixth transistor M6, a second current source I2, a third current source I3 and an RC network; one end of the eighth resistor R8 is connected to the second power supply terminal VDDL, the other end of the eighth resistor R8 is connected to one end of the third inductor L3, the other end of the third inductor L3 is connected to one end of the fourth inductor L4, the other end of the fourth inductor L4 is connected to the drain of the fifth transistor M5, the gate of the fifth transistor M5 is connected to the output end of the low-pass filtering module 107, and the source of the fifth transistor M5 is connected to one end of the second current source I2; one end of the ninth resistor R9 is connected to the first inductor L3, the other end of the third inductor L3 is connected to one end of the fourth inductor L4, the other end of the fourth inductor L4 is connected to the drain of the fifth transistor M5, the gate of the fifth transistor M5 is connected to the output end of the low-pass filtering module 107, and the source of the fifth transistor M5 is connected to one end of the second current source I2; one end of the ninth resistor R9 is connected to the The second power supply terminal VDDL is connected, the other end of the ninth resistor R9 is connected to one end of the fifth inductor L5, the other end of the fifth inductor L5 is connected to one end of the sixth inductor L6, the other end of the sixth inductor L6 is connected to the drain of the sixth transistor M6, the gate of the sixth transistor M6 is connected to the output end of the low-pass filter module 107, and the source of the sixth transistor M6 is connected to one end of the third current source I3; the other ends of the second current source I2 and the third current source I3 are grounded, one end of the RC network is connected to the source of the fifth transistor M5, and the other end of the RC network is connected to the source of the sixth transistor M6; one end of the third inductor L3 connected to the fourth inductor L4 and one end of the fifth inductor L5 connected to the sixth inductor L6 are the output ends of the pre-driving module 109.

[0075] In this embodiment, the fifth transistor M5 and the sixth transistor M6 are a pair of differential working transistors, and both the fifth transistor M5 and the sixth transistor M6 are P-MOS transistors. The RC network is a commonly used resistor-capacitor circuit, which will not be described in detail here.

[0076] Among them, the third transistor M3, the fourth transistor M4, the fifth transistor M5 and the sixth transistor M6 share the second power supply terminal VDDL, so that a stacked design structure is adopted between the push-pull driving module 108 and the pre-driving module 109, and the voltage of the source and the drain of the transistors (the third transistor M3, the fourth transistor M4, the fifth transistor M5 and the sixth transistor) in the driving circuit 10 is reduced, so the breakdown risk of the transistors in the driving circuit 10 is reduced accordingly.

[0077] In some embodiments, the second power supply terminal VDDL is an output terminal of a low dropout regulator (LDO).

[0078] In some embodiments, Figure 2 As shown, the driving circuit 10 further includes a parasitic inductance suppression module 111 , and the parasitic inductance suppression module 111 is connected to the second current adding module 110 and the laser.

[0079] In a specific embodiment, if Figure 2 As shown, the parasitic inductance suppression module 111 may include a fourth current source IDAC, a seventh inductor L7 and an eighth inductor L8, wherein one end of the fourth current source IDAC is connected to the first power supply terminal VDDH, the other end of the fourth current source IDAC is connected to one end of the seventh inductor L7, the other end of the seventh inductor L7 is connected to one end of the eighth inductor L8, the other end of the eighth inductor L8 is connected to the laser, and the connection end between the seventh inductor L7 and the eighth inductor L8 is also connected to the output end of the second current summing module 110 (i.e., the other end of the second resistor).

[0080] In this embodiment, the parasitic inductance suppression module 111 can suppress the parasitic inductance generated by the driving circuit 10 at the output end of the second current summing module 110 .

[0081] like Figure 4 As shown in FIG. 1 , the optical eye diagram outputted by the laser driving circuit 10 used in the transmitter before the equalization is turned on is shown. Figure 5 As shown, this is the optical eye diagram outputted by the driving circuit 10 for the laser in the transmitter after equalization is turned on. After equalization is turned on, the driving circuit 10 for the laser in the transmitter can correct the eye diagram skew and amplitude distortion of the driving laser at a higher energy efficiency ratio at the same output rate, thereby achieving high-quality transmission of the optical eye diagram signal.

[0082] In some embodiments, the present invention further provides a transmitter architecture, which at least includes the driving circuit 10 for a laser in a transmitter as described above, wherein the driving circuit 10 is a driving circuit 10 for a laser in a transmitter, and the driving circuit 10 is connected to the laser.

[0083] The driving circuit 10 in the transmitter architecture may include a transcoding module 101, a retiming module 102, a pulse generating module 103, an asymmetric feedforward amplifying module 104, a first current adding module 105, a high-pass filtering module 106, a low-pass filtering module 107, a push-pull driving module 108, a pre-driving module 109 and a second current adding module 110; wherein the transcoding module 101 is used to convert a binary code into a three-way temperature code; the retiming module 102 is connected to the transcoding module 101, and the retiming module 102 is used to receive the three-way temperature code and retime the three-way temperature code to reduce the jitter of the temperature code converted by the transcoding module 101; the pulse generating module 103 and the retiming module 10 2, the pulse generating module 103 is used to receive the three-way temperature code after re-timing to generate three-way timing pulse signals for feedforward equalization; the asymmetric feedforward amplifying module 104 is connected to the pulse generating module 103, and the asymmetric feedforward amplifying module 104 is used to adjust the height of the three-way timing pulse signals to output a first PAM4 type current signal; the first current adding module 105 is connected to the asymmetric feedforward amplifying module 104, and the first current adding module 105 is used to receive the first PAM4 type current signal output by the asymmetric feedforward amplifying module 104 and add and output a second PAM4 type current signal; the input end of the high-pass filtering module 106 is connected to the first current adding module 105; the low-pass filtering The input end of the module 107 and the input end of the high-pass filter module 106 are connected to the first current summing module 105; the input end of the push-pull driving module 108 is connected to the output end of the high-pass filter module 106, the push-pull driving module 108 includes a first voltage input end and a second voltage input end, the first voltage input end is connected to the first power supply end VDDH, the second voltage input end is connected to the second power supply end VDDL, and the second PAM4 type current signal is output to the push-pull driving module 108 via the high-pass filter module 106; the pre-driving module 109, the input end of the pre-driving module 109 is connected to the output end of the low-pass filter module 107, the pre-driving module 109 includes a third voltage input end and a fourth voltage input end. The first input terminal is connected to the second power supply terminal VDDL, the second voltage input terminal is grounded, and the second PAM4 type current signal is output to the pre-driving module 109 through the low-pass filtering module 107. The pre-driving module 109 is used to receive the current signal output by the low-pass filtering module 107 and adjust the linear gain and high-frequency equalization capability to form a balanced current; the second current adding module 110 is connected to the output terminal of the pre-driving module 109 and the output terminal of the push-pull driving module 108. The second current adding module 110 is used to add the current signal output by the pre-driving module 109 and the current signal output by the push-pull driving module 108 to output a third PAM4 type current signal to drive the laser.

[0084] In this embodiment, the asymmetric amplification module can alleviate the nonlinear relaxation effect when outputting the PAM4 type current signal to the laser, and can also compensate for the bandwidth loss on the circuit transmission path. In addition, due to the balancing effect of the pre-driving module 109, the push-pull driving module 108 and the asymmetric feedforward amplification module 104, the ringing phenomenon caused by the complex conjugate pole of the third PAM4 type current signal output by the second current summing module 110 is improved, and the linearity of the output third PAM4 type current signal is also improved. The pre-driving module 109 can adjust the linearization gain and high-frequency balancing capability to form a balanced current, thereby reducing the bandwidth requirements for the push-pull driving module 108. Furthermore, since the first current summing module 105 and the second current summing module 110 are provided, compared with the laser driving circuit 10 in the prior art (in the prior art, when performing the PAM4 current signal conversion, the PAM4 current signal conversion is only performed at the anode of the laser), the PAM4 current signal conversion can be performed at the output end of the asymmetric feedforward amplifier module 104, and the large capacitive load of the output end (the first current summing module 105 and the second current summing module 110) is shared by the summing node, so that the parasitic capacitance of the driving circuit 10 itself is reduced when outputting the third PAM4 current signal, and the concentrated superposition of the large load at the output end of the second current summing module 110 is avoided, thereby significantly reducing the power consumption of the driving circuit 10. It can be seen that when the driving circuit 10 performs linear compensation and bandwidth compensation, the power consumption required to solve the problem of deteriorated linearity caused by linear compensation, bandwidth compensation, laser power saturation phenomenon and device relaxation effect is reduced, that is, the driving circuit 10 improves the energy efficiency of the transmitter architecture while ensuring the output signal quality.

[0085] Here, it should be pointed out that the description of the above transmitter architecture embodiment is similar to the description of the above embodiment of the driving circuit 10 for the laser in the transmitter, and has similar beneficial effects as the above driving circuit 10 for the laser in the transmitter. For technical details not disclosed in the embodiment of the transmitter architecture in this embodiment, please refer to the description of the embodiment of the driving circuit 10 for the laser in the transmitter of the present invention for understanding.

[0086] In summary, the present invention provides a driving circuit 10 for a laser in a transmitter and a transmitter architecture, which has the following beneficial effects:

[0087] The asymmetric amplification module can alleviate the nonlinear relaxation effect when outputting the PAM4 type current signal to the laser, and can also compensate for the bandwidth loss on the circuit transmission path. In addition, due to the balancing effect of the pre-driving module 109, the push-pull driving module 108 and the asymmetric feed-forward amplification module 104, the ringing phenomenon caused by the complex conjugate pole of the third PAM4 type current signal output by the second current summing module 110 is improved, and the linearity of the output third PAM4 type current signal is also improved. The pre-driving module 109 can adjust the linearization gain and high-frequency balancing capability to form a balanced current, thereby reducing the bandwidth requirements for the push-pull driving module 108. Furthermore, since the first current summing module 105 and the second current summing module 110 are provided, compared with the laser driving circuit 10 in the prior art (in the prior art, the PAM4 current signal is converted only at the anode of the laser), the PAM4 current signal conversion can be performed at the output end of the asymmetric feedforward amplifier module 104, and the large capacitive load of the output end (the first current summing module 105 and the second current summing module 110) is shared by the summing node, so that the parasitic capacitance of the driving circuit 10 itself is reduced when outputting the third PAM4 current signal, avoiding the concentrated superposition of the large load at the output end of the second current summing module 110, thereby significantly reducing the power consumption of the driving circuit 10. It can be seen that when the driving circuit 10 performs linear compensation and bandwidth compensation, the power consumption required to solve the problem of deteriorated linearity caused by linear compensation, bandwidth compensation, laser power saturation phenomenon and device relaxation effect is reduced.

[0088] It can be understood that the above embodiments only express the preferred implementation modes of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the patent scope of the present invention. It should be pointed out that, for ordinary technicians in this field, the above technical features can be freely combined without departing from the concept of the present invention, and several deformations and improvements can be made, which all belong to the protection scope of the present invention. Therefore, all equivalent changes and modifications made to the scope of the claims of the present invention should belong to the coverage of the claims of the present invention.

Claims

1. A driving circuit for a laser in a transmitter, characterized in that: include: A transcoding module, used to convert binary code into three-way temperature code; A retiming module connected to the transcoding module, the retiming module is used to receive the three-way temperature code and retime the three-way temperature code to reduce the jitter of the temperature code converted by the transcoding module; A pulse generating module, connected to the retiming module, the pulse generating module is used to receive the three temperature codes after retiming to generate three timing pulse signals for feedforward equalization; an asymmetric feedforward amplifier module, connected to the pulse generating module, and used for adjusting the height of the three-way timing pulse signal to output a first PAM4 type current signal; A first current summing module, connected to the asymmetric feedforward amplifying module, the first current summing module is used to receive the first PAM4 type current signal output by the asymmetric feedforward amplifying module and add and output a second PAM4 type current signal; A high-pass filtering module, wherein an input end of the high-pass filtering module is connected to the first current adding module; A low-pass filter module, wherein an input end of the low-pass filter module and an input end of the high-pass filter module are connected to the first current summing module; A push-pull driving module, wherein the input end of the push-pull driving module is connected to the output end of the high-pass filtering module, the push-pull driving module comprises a first voltage input end and a second voltage input end, the first voltage input end is connected to the first power supply end, the second voltage input end is connected to the second power supply end, and the second PAM4 type current signal is output to the push-pull driving module via the high-pass filtering module; A pre-driver module, wherein the input end of the pre-driver module is connected to the output end of the low-pass filter module, the pre-driver module includes a third voltage input end and a fourth voltage input end, the third voltage input end is connected to the second power supply end, the fourth voltage input end is grounded, the second PAM4 type current signal is output to the pre-driver module via the low-pass filter module, and the pre-driver module is used to receive the current signal output by the low-pass filter module and adjust the linearization gain and high-frequency equalization capability to form a balanced current; A second current summing module is connected to the output end of the pre-driving module and the output end of the push-pull driving module. The second current summing module is used to add the current signal output by the pre-driving module and the current signal output by the push-pull driving module to output a third PAM4 type current signal to drive the laser.

2. The driving circuit for a laser in a transmitter according to claim 1, characterized in that: The asymmetric feedforward amplification module comprises: a high path slice, a middle path slice and a low path slice respectively connected to the pulse generation module; The high path slice, the middle path slice and the low path slice are also connected to the first current summing module respectively.

3. The driving circuit for a laser in a transmitter according to claim 2, characterized in that: The first current summing module includes: a first resistor, one end of which is connected to the high path slice, the middle path slice and the low path slice, and the other end of the first resistor is connected to the input end of the high-pass filtering module and the input end of the low-pass filtering module.

4. The driving circuit for a laser in a transmitter according to claim 1, characterized in that: The second current summing module comprises: a second resistor, one end of the second resistor is connected to the output end of the push-pull driving module and the output end of the pre-driving module, and one end of the second resistor is connected to the laser.

5. The driving circuit for a laser in a transmitter according to claim 1, characterized in that: The push-pull driving module includes: a first transistor, a second transistor, a third transistor, a fourth transistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first inductor, a second inductor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first current source and a load matching unit; The gate of the first transistor is connected to one end of the third resistor and one end of the first capacitor, the drain of the first transistor is connected to the first power supply end, and the source of the first transistor is connected to the drain of the third transistor; The gate of the third transistor is connected to one end of the second capacitor and one end of the fourth resistor, and the source of the third transistor is connected to one end of the first current source; The drain of the second transistor is connected to the first power supply terminal, the gate of the second transistor is connected to one end of the fifth resistor and one end of the third capacitor, and the source of the second transistor is connected to one end of the first inductor; The drain of the fourth transistor is connected to one end of the second inductor, the gate of the fourth transistor is connected to one end of the sixth resistor and one end of the fourth capacitor, and the source of the fourth transistor is connected to the source of the third transistor; One end of the load matching unit is connected to the connection end of the source of the first transistor and the drain of the third transistor, and the other end of the load matching unit is connected to the second power supply end; The other end of the third resistor and the other end of the fifth resistor are connected to the first bias voltage output terminal, the other end of the fourth resistor and the other end of the sixth resistor are connected to the second bias voltage output terminal, and the other end of the first current source is connected to the second power supply terminal; The other end of the first capacitor, the other end of the second capacitor, the other end of the third capacitor and the other end of the fourth capacitor are connected to the output end of the high-pass filter module; The other end of the first inductor is connected to the other end of the second inductor, wherein one end of the first inductor connected to the second inductor is the output end of the push-pull driving module.

6. The driving circuit for a laser in a transmitter according to claim 5, characterized in that: The load matching unit includes: a seventh resistor and a fifth capacitor, one end of the fifth capacitor is connected to the connection end of the source of the first transistor and the drain of the third transistor, the other end of the fifth capacitor is connected to one end of the seventh resistor, and the other end of the seventh resistor is connected to the second power supply end.

7. The driving circuit for a laser in a transmitter according to claim 5 or 6, characterized in that: The pre-driving module includes: an eighth resistor, a ninth resistor, a third inductor, a fourth inductor, a fifth inductor, a sixth inductor, a fifth transistor, a sixth transistor, a second current source, a third current source and an RC network; One end of the eighth resistor is connected to the second power supply end, the other end of the eighth resistor is connected to one end of the third inductor, the other end of the third inductor is connected to one end of the fourth inductor, the other end of the fourth inductor is connected to the drain of the fifth transistor, the gate of the fifth transistor is connected to the output end of the low-pass filter module, and the source of the fifth transistor is connected to one end of the second current source; One end of the ninth resistor is connected to the second power supply end, the other end of the ninth resistor is connected to one end of the fifth inductor, the other end of the fifth inductor is connected to one end of the sixth inductor, the other end of the sixth inductor is connected to the drain of the sixth transistor, the gate of the sixth transistor is connected to the output end of the low-pass filter module, and the source of the sixth transistor is connected to one end of the third current source; The other ends of the second current source and the third current source are grounded, one end of the RC network is connected to the source of the fifth transistor, and the other end of the RC network is connected to the source of the sixth transistor; One end of the third inductor connected to the fourth inductor and one end of the fifth inductor connected to the sixth inductor are output ends of the pre-driving module.

8. The driving circuit for a laser in a transmitter according to claim 1, characterized in that: The second power supply end is an output end of a low voltage drop linear regulator.

9. The driving circuit for a laser in a transmitter according to claim 1, characterized in that: The driving circuit further includes: a parasitic inductance suppression module, and the parasitic inductance suppression module is connected to the second current adding module and the laser.

10. A transmitter architecture, characterized in that: At least: A laser and a driving circuit for a laser in a transmitter as claimed in any one of claims 1 to 9, wherein the driving circuit is connected to the laser.

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