PFC circuit control method and device, storage medium and product

Abstract

The invention discloses a PFC circuit control method and device, a storage medium and a product. The PFC circuit comprises a PFC inductor, an upper switch tube and a lower switch tube, the upper switch tube and the lower switch tube form an upper bridge structure and a lower bridge structure, one end of the PFC inductor is connected with an input power supply, the other end of the PFC inductor is connected with a middle access point of the upper bridge structure and the lower bridge structure, and the PFC circuit further comprises a sampling resistor arranged between the lower switch tube and a grounding end. In a first phase interval from the voltage zero point phase to a first set phase, controlling a lower switch tube to be conducted based on a set duty ratio, and obtaining a first current value in the first phase interval; the input power supply is in a voltage negative half period, in a second phase interval from the voltage zero point phase to a second set phase, the upper switching tube is controlled to be switched on based on the set duty ratio, and a second current value in the second phase interval is obtained; and determining whether the PFC circuit is abnormal based on the first current value and the second current value.

Description

Technical Field

[0001] The present application relates to the field of electronic control technology, and in particular to a control method, device, storage medium and product of a PFC circuit. Background Art

[0002] With the development of power electronics technology, PFC (Power Factor Correction) technology has been widely used with the advantages of high power factor, small harmonic current, stable output voltage, etc. The existing PFC circuit topology includes traditional bridge PFC and bridgeless PFC. Among bridgeless PFC, totem pole PFC has the advantages of low conduction loss and high circuit efficiency.

[0003] In the existing circuit topology using bridgeless (totem pole) PFC, the current of the PFC circuit can be sampled by resistors, but the PFC current can only be sampled when the main switch is turned off. Therefore, when the PFC main switch is turned on, if the PFC circuit is abnormal, the current cannot be sampled at this time, and effective protection cannot be achieved, which will lead to risks such as circuit burnout. Summary of the invention

[0004] In view of this, the embodiments of the present application provide a control method, device, storage medium and product for a PFC circuit, aiming to achieve current sampling while improving the safety of the circuit.

[0005] The technical solution of the embodiment of the present application is implemented as follows:

[0006] In a first aspect, an embodiment of the present application provides a control method for a PFC circuit, wherein the PFC circuit includes: a PFC inductor, an upper switch tube and a lower switch tube forming an upper and lower bridge structure, wherein one end of the PFC inductor is connected to an input power supply, and the other end of the PFC inductor is connected to a middle access point of the upper and lower bridge structures, and the PFC circuit further includes a sampling resistor arranged between the lower switch tube and a ground terminal, and the method includes:

[0007] The input power source is in a positive half cycle of voltage, and in a first phase interval from a voltage zero phase to a first set phase, the lower switch tube is controlled to be turned on based on a set duty cycle, and a first current value in the first phase interval is obtained;

[0008] The input power source is in a negative half cycle of voltage, and in a second phase interval from a voltage zero phase to a second set phase, the upper switch tube is controlled to be turned on based on a set duty cycle, and a second current value in the second phase interval is obtained;

[0009] Based on the first current value and the second current value, it is determined whether the PFC circuit is abnormal.

[0010] In some embodiments, determining whether the PFC circuit is abnormal based on the first current value and the second current value includes:

[0011] determining whether the PFC circuit is abnormal based on a first comparison result of the first current value and the third current value and a second comparison result of the second current value and the fourth current value;

[0012] The third current value is the current value of the first phase interval when the input power supply is in the negative half cycle of voltage and the upper switch tube and the lower switch tube are both in the off state;

[0013] The fourth current value is a current value in the second phase interval when the input power source is in a positive voltage half cycle and the upper switch tube and the lower switch tube are both in a closed state.

[0014] In some embodiments, determining whether the PFC circuit is abnormal based on a first comparison result between the first current value and the third current value and a second comparison result between the second current value and the fourth current value includes:

[0015] If the first current value is less than or equal to a third current value, and the second current value is less than or equal to a fourth current value, it is determined that the PFC circuit is abnormal.

[0016] In some embodiments, the PFC circuit further includes: a first driving circuit, for driving the upper switch tube and the lower switch tube, the first driving circuit including an upper switch tube driving circuit and a lower switch tube driving circuit, and determining whether the PFC circuit is abnormal based on a first comparison result between the first current value and the third current value and a second comparison result between the second current value and the fourth current value includes:

[0017] If the first current value is less than or equal to the third current value, and the second current value is greater than the fourth current value, it is determined that the lower switch tube or the lower switch tube driving circuit is abnormal; or,

[0018] If the first current value is greater than the third current value, and the second current value is less than or equal to the fourth current value, it is determined that the upper switch tube is abnormal or the upper switch driving circuit is abnormal.

[0019] In some embodiments, the set duty cycle is less than or equal to a set duty cycle threshold, and the method further includes:

[0020] Determining an upper limit value of the AC input voltage of the input power source based on an upper limit value of the first set phase and an upper limit value of the second set phase;

[0021] The set duty cycle threshold is generated based on the upper limit value of the AC input voltage, the inductance value of the PFC inductor, and the current change rate threshold.

[0022] In some embodiments, the PFC circuit further includes: an input AC voltage sampling circuit for detecting a supply voltage of the input power supply, and the method further includes:

[0023] Acquire a phase signal of the input AC voltage signal collected by the input AC voltage sampling circuit;

[0024] Based on the phase signal, it is determined whether the input power is in a positive voltage half cycle or a negative voltage half cycle.

[0025] In a second aspect, an embodiment of the present application provides a control device for a PFC circuit, wherein the PFC circuit includes: a PFC inductor, an upper switch tube and a lower switch tube forming an upper and lower bridge structure, one end of the PFC inductor is connected to an input power supply, and the other end of the PFC inductor is connected to a middle access point of the upper and lower bridge structures, the PFC circuit also includes a sampling resistor arranged between the lower switch tube and a ground terminal, and the control device includes:

[0026] A first control module, used for controlling the lower switch tube to be turned on based on a set duty cycle in a first phase interval from a voltage zero phase to a first set phase when the input power source is in a voltage positive half cycle, and obtaining a first current value in the first phase interval;

[0027] A second control module, used for controlling the upper switch tube to be turned on based on a set duty cycle in a second phase interval from a voltage zero phase to a second set phase when the input power supply is in a voltage negative half cycle, and obtaining a second current value in the second phase interval;

[0028] A determination module is used to determine whether the PFC circuit is abnormal based on the first current value and the second current value.

[0029] In a third aspect, an embodiment of the present application provides an electronic device, including: a PFC circuit, the PFC circuit including: a PFC inductor, an upper switch tube and a lower switch tube constituting an upper and lower bridge structure, one end of the PFC inductor is connected to an input power supply, and the other end of the PFC inductor is connected to a middle access point of the upper and lower bridge structure, the PFC circuit also includes a sampling resistor arranged between the lower switch tube and a ground terminal, and the electronic device also includes: a processor and a memory for storing a computer program that can be run on the processor, wherein:

[0030] The processor is used to execute the steps of the method described in the first aspect when running a computer program.

[0031] In a fourth aspect, an embodiment of the present application provides a computer storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method described in the first aspect are implemented.

[0032] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program, which, when executed by an electronic device, implements the steps of the method described in the first aspect of the embodiment of the present application.

[0033] The technical solution provided by the embodiment of the present application, the PFC circuit includes a PFC inductor, an upper switch tube and a lower switch tube constituting an upper and lower bridge structure, one end of the PFC inductor is connected to the input power supply, and the other end of the PFC inductor is connected to the middle access point of the upper and lower bridge structures, the PFC circuit also includes a sampling resistor arranged between the lower switch tube and the ground end, and the control method of the PFC circuit includes: when the input power supply is in the positive half cycle of the voltage, in a first phase interval from the voltage zero point phase to the first set phase, controlling the lower switch tube to be turned on based on the set duty cycle, and obtaining a first current value in the first phase interval; when the input power supply is in the negative half cycle of the voltage, in a second phase interval from the voltage zero point phase to the second set phase, controlling the upper switch tube to be turned on based on the set duty cycle, and obtaining a second current value in the second phase interval; based on the first current value and the second current value, determining whether the PFC circuit is abnormal.

[0034] In this way, in the embodiment of the present application, the main switch tube outputs according to a preset duty cycle in the first phase interval and the second phase interval near the voltage zero crossing point, thereby determining whether the PFC circuit is abnormal through the first current value and the second current value, thereby avoiding the risk of electric control burning due to PFC circuit abnormality after the PFC is normally turned on, and improving the safety of the PFC circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 A schematic diagram of the circuit structure of a PFC circuit provided in an embodiment of the present application;

[0036] Figure 2 A flow chart of a control method for a PFC circuit provided in an embodiment of the present application;

[0037] Figure 3 A schematic diagram of the switching waveform of the main switch tube provided in an embodiment of the present application;

[0038] Figure 4 This is a schematic diagram of the PFC current software control flow in an application example of this application;

[0039] Figure 5 A schematic diagram of the structure of a control device for a PFC circuit provided in an embodiment of the present application;

[0040] Figure 6 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0041] Description of reference numerals:

[0042] 1. Current sampling circuit; 2. Input AC voltage sampling circuit; 3. Bus voltage sampling circuit; 4. Load. DETAILED DESCRIPTION

[0043] The present application is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0045] The present application embodiment provides a PFC circuit, such as Figure 1 As shown, the PFC circuit includes: a PFC inductor L, an upper switch tube Q1 and a lower switch tube Q2 forming an upper and lower bridge structure, one end of the PFC inductor L is connected to the input power supply AC, and the other end of the PFC inductor L is connected to the middle access point a of the upper and lower bridge structures. The PFC circuit also includes a sampling resistor R arranged between the lower switch tube Q2 and the ground terminal GND.

[0046] It can be understood that the PFC circuit is a bridgeless totem pole PFC circuit, and the input power supply AC is an alternating current power supply for supplying power to the PFC circuit. Exemplarily, the supply voltage of the input power supply AC can be represented by Vac.

[0047] It can be understood that the PFC inductor L is arranged between the input power supply AC and the middle point a of the upper and lower bridge structures, one end of the PFC inductor L is connected to the input power supply AC, and the other end of the PFC inductor L is connected to the middle access point a of the upper and lower bridge structures. The PFC inductor L accumulates the power supplied from the input power supply AC as energy, and releases the energy to achieve the boost and power factor improvement of the totem pole PFC circuit.

[0048] It is understandable that the upper switch tube Q1 and the lower switch tube Q2 are high-frequency switch tubes, including but not limited to IGBT (Insulated Gate Bipolar Transistor), SIC (Silicon Carbide), GaN (Gallium Nitride), etc. The upper switch tube Q1 and the lower switch tube Q2 form an upper and lower bridge structure.

[0049] It is understandable that the PFC circuit further includes a sampling resistor R disposed between the lower switch tube Q2 and the ground terminal GND. By detecting the current flowing through the sampling resistor R, the current of the PFC inductor L can be determined.

[0050] It should be noted that the upper switch tube Q1 and the lower switch tube Q2 are complementary. In a voltage cycle, the upper switch tube Q1 and the lower switch tube Q2 are turned on and off alternately. That is, when one switch tube is turned on, the other switch tube is in the off state. This alternating operation ensures the continuity of current and the effective conversion of energy.

[0051] Here, in each half voltage cycle, the upper switch tube Q1 and the lower switch tube Q2, one as the main switch tube (to store energy on the PFC inductor L), and the other as the auxiliary switch tube (to release energy on the PFC inductor L), play the role of freewheeling, and the two switch tubes operate in rotation to store energy on the PFC inductor and release it to the output end of the PFC circuit.

[0052] It can be understood that when the input power supply AC is in the positive half cycle (Vac>0), the lower switch tube Q2 is the main switch tube and the upper switch tube Q1 is the auxiliary switch tube. The lower switch tube Q2 is turned on, the upper switch tube Q1 is turned off, and the PFC inductor L stores energy; the upper switch tube Q1 is turned on, the lower switch tube Q2 is turned off, and the PFC inductor L releases energy to the output end.

[0053] It can be understood that when the input power supply AC is in the negative half cycle (Vac<0), the upper switch tube Q1 is the main switch tube and the lower switch tube Q2 is the auxiliary switch tube. The upper switch tube Q1 is turned on, the lower switch tube Q2 is turned off, and the PFC inductor L stores energy; the upper switch tube Q1 is turned off, the lower switch tube Q2 is turned on, and the PFC inductor L releases energy to the output end.

[0054] Here, to ensure energy conversion, the PFC circuit first controls the main switch tube to turn on to store PFC energy, and then controls the auxiliary switch tube to turn on, and the PFC inductor L releases energy to the outside.

[0055] In some embodiments, the upper switch tube Q1 corresponds to the first rectifier tube Q3, the lower switch tube Q2 corresponds to the second rectifier tube Q4, the first rectifier tube Q3 and the second rectifier tube Q4 are connected in series to form an upper and lower bridge structure, which is connected in parallel with the upper and lower bridge structure formed by the upper switch tube Q1 and the lower switch tube Q2.

[0056] Furthermore, the first rectifier tube Q3 and the second rectifier tube Q4 are connected in series to form an upper and lower bridge structure, and an intermediate connection point b is set on the upper and lower bridge structures. The intermediate connection point b is connected to the input power supply AC, that is, one end of the input power supply AC is connected to the PFC inductor L, and the other end is connected to the intermediate connection point b.

[0057] It can be understood that the first rectifier tube Q3 and the second rectifier tube Q4 are rectifier tubes, including but not limited to high-frequency switching tubes such as IGBT, SIC, GaN, and ordinary rectifier diodes.

[0058] In some embodiments, the PFC circuit further includes a current sampling circuit 1, and a sampling resistor R is connected to the current sampling circuit 1. The current sampling circuit 1 is used to sample the current of the sampling resistor R, so as to determine the current of the PFC inductor L. Based on the current of the PFC inductor L, the duty cycle of the main switch tube can be calculated.

[0059] In some embodiments, the PFC circuit further includes: an input AC voltage sampling circuit 2 for detecting the supply voltage of the input power source AC. The input AC voltage sampling circuit can sample the input AC voltage Vac of the input power source AC.

[0060] In some embodiments, the PFC circuit further includes: a bus capacitor C and a bus voltage sampling circuit 3, wherein the two ends of the bus capacitor C are connected to the output end of the PFC circuit, one end of the bus capacitor C is connected to the ground end GND, and the bus voltage sampling circuit 3 is connected to the bus capacitor C.

[0061] It can be understood that in the PFC circuit, the two ends of the bus capacitor C are connected to the output end of the PFC circuit, the bus capacitor C is used to filter and smooth the output DC voltage VDC to ensure voltage stability, one end of the bus capacitor C is connected to the ground terminal GND, and serves as an energy storage element to help maintain continuous current flow. The bus voltage sampling circuit 3 is used to collect the voltage VDC at both ends of the bus capacitor, and convert the collected voltage into VBUS and output it to the controller MCU.

[0062] It can be understood that the bus capacitor C is connected in parallel with the load 4, and the load 4 may include: a fan, a compressor, a switching power supply, etc.

[0063] For example, if the circuit is applied to an air conditioner and the load is a medium-voltage machine of the air conditioner's outdoor unit, the input current can be adjusted in real time by controlling the PFC circuit to match the input voltage waveform, thereby increasing the power of the machine.

[0064] It can be understood that the PFC mode corresponding to the PFC circuit refers to obtaining the duty cycle Duty of the main switch tube based on the detected AC input voltage phase, bus output voltage, and PFC current. In each half cycle of the AC voltage, the upper switch tube Q1 or the lower switch tube Q2 is controlled to be opened and closed a predetermined number of times to achieve the bus voltage VDC boost and power correction.

[0065] It is understandable that the PFC circuit further includes a first drive circuit DRIVE1, a second drive circuit DRIVE2 and a controller MCU. The first drive circuit DRIVE1 is connected to the upper switch tube Q1 and the lower switch tube Q2 respectively, and the second drive circuit DRIVE2 is connected to the first rectifier tube Q3 and the second rectifier tube Q4 respectively.

[0066] Here, the first driving circuit DRIVE1 includes an upper switch tube driving circuit and a lower switch tube driving circuit.

[0067] It can be understood that in the PFC circuit, the controller MCU uses pulse width modulation (PWM) to adjust the input current so that it keeps the same phase as the input voltage, thereby achieving a high power factor.

[0068] It should be noted that the controller MCU can use the carrier signal as a reference during the PWM modulation process, and compare the carrier with the modulation wave (usually a part of the sine wave or the integral of the error signal) calculated according to the control algorithm to determine the on and off time of the PWM signal. The carrier determines the frequency of the PWM signal, and the modulation wave determines the width of each pulse, that is, the duty cycle.

[0069] In each carrier cycle, a series of pulse sequences are generated based on the comparison between the instantaneous value of the modulation signal and the carrier signal. The width variation of these pulses realizes precise control of the output.

[0070] In the bridgeless totem pole PFC, the controller generates a PWM drive signal. The first drive circuit DRIVE1 and the second drive circuit DRIVE2 are used to receive the PWM drive signal. The drive signal controls the on and off time of the switch tube (such as the switch tube Q2 above) by adjusting the duty cycle of the PWM signal, thereby controlling the current flowing through the inductor, so that the input current tracks the waveform of the input voltage to achieve unity power factor correction.

[0071] It can be understood that the duty cycle is the ratio of the high-level duration of the PWM signal to the entire carrier cycle time, and is used to characterize the on-time of the switch tube.

[0072] If the input power supply is in the positive half cycle of voltage at this time, the main switch tube is the lower switch tube Q2, and the duty cycle is 50%. At a high level, the lower switch tube Q2 has half of the on time in a carrier cycle, and the on time is equal to the off time.

[0073] It should be noted that when the PFC circuit is working, when the main switch tube is turned on, the PFC current does not flow through the sampling resistor R, that is, when the main switch tube is turned on, the PFC current cannot be sampled through the sampling resistor R.

[0074] Based on this, in the related art, when the PFC main switch is turned on, if an abnormality occurs in the PFC circuit, since the current cannot be sampled at this time, effective protection cannot be achieved, which may lead to risks such as circuit burning.

[0075] Based on this, the embodiment of the present application also provides a control method for a PFC circuit, such as Figure 2 As shown, the method comprises the following steps:

[0076] Step 210: When the input power supply is in the positive half cycle of the voltage, in a first phase interval from the voltage zero phase to the first set phase, the lower switch tube is controlled to be turned on based on the set duty cycle, and a first current value in the first phase interval is obtained.

[0077] It can be understood that based on the positive and negative values ​​of the voltage Vac of the input power supply, the voltage cycle can be divided into a positive voltage half cycle (Vac) and a negative voltage half cycle (Vac). From the above, it can be seen that if the voltage cycle is a positive voltage half cycle, the main switch tube is determined to be the lower switch tube and the auxiliary switch tube is the upper switch tube. If the voltage cycle is a negative voltage half cycle, the main switch tube is determined to be the upper switch tube and the auxiliary switch tube is the lower switch tube.

[0078] Here, the voltage zero phase is the zero crossing point in the AC cycle of the input power supply, that is, the moment when the voltage (Vac) changes from negative (Vac>0) to positive (Vac<0) or from positive to negative. The first phase interval refers to the phase interval from the voltage zero phase to the first set phase. The first set phase can be used for Phase1.

[0079] Here, the first current value is an average current value, and the average current value of the first phase interval is obtained. The set duty cycle refers to the ratio of the switch on time to the entire carrier cycle, which can be preset by the user.

[0080] It is understandable that in order to sample the current, the current sampling point should be set in the area where the current flowing through the sampling resistor is not 0. The PFC circuit includes a special current sampling circuit, which is connected to the sampling resistor and can sample the current flowing through the sampling resistor based on the current sampling point to generate a sampling current.

[0081] For example, Figure 1 As shown, when the input power supply is in the positive half cycle of voltage, the lower switch tube Q2 is the main switch tube. In the first phase interval from the voltage zero point phase to the first set phase Phase1, the lower switch tube Q2 (main switch tube) is controlled to be turned on based on the set duty cycle, and the average current value in the first phase interval, that is, the first current value, is obtained. The first current value can be represented by Iq2.

[0082] Step 220: When the input power supply is in the negative half cycle of the voltage, in the second phase interval from the voltage zero phase to the second set phase, the upper switch tube is controlled to be turned on based on the set duty cycle, and a second current value in the second phase interval is obtained.

[0083] Here, if Figure 1 As shown, the input power supply is in the negative half cycle of the voltage. At this time, the main switch tube of the PFC circuit is the upper switch tube Q1. The second set phase can be represented by Phase2. In the second phase interval from the voltage zero point phase to the second set phase Phase2, the upper switch tube Q1 is controlled to be turned on based on the set duty cycle, and the second current value Iq1 in the second phase interval is obtained.

[0084] Step 230: Determine whether the PFC circuit is abnormal based on the first current value and the second current value.

[0085] In this way, in the embodiment of the present application, the main switch tube outputs according to a preset duty cycle in the first phase interval and the second phase interval near the voltage zero crossing point, thereby determining whether the PFC circuit is abnormal through the first current value and the second current value, thereby avoiding the risk of electric control burning due to PFC circuit abnormality after the PFC is normally turned on, and improving the safety of the PFC circuit.

[0086] In some embodiments, determining whether the PFC circuit is abnormal based on the first current value and the second current value includes:

[0087] determining whether the PFC circuit is abnormal based on a first comparison result of the first current value and the third current value and a second comparison result of the second current value and the fourth current value;

[0088] The third current value is the current value of the first phase interval when the input power supply is in the negative half cycle of the voltage and the upper switch tube and the lower switch tube are both in the off state;

[0089] The fourth current value is the current value in the second phase interval when the input power supply is in the positive half cycle of the voltage and the upper switch tube and the lower switch tube are both in the off state.

[0090] Here, when the input power supply is in the negative half cycle of the voltage, the upper switch tube and the lower switch tube shown are both in the off state, and the current value of the first phase interval, that is, the third current value, is obtained. The third current value is the average current value, and the first current value is compared with the third current value to obtain a first comparison result. Assuming that the first current value is Iq2 and the third current value is I2, Iq2 and I2 are compared to generate a first comparison result. It can be understood that when the entire power cycle is in the off state, current will flow through the sampling resistor only near the peak of the AC voltage.

[0091] Here, when the input power supply is in the positive half cycle of the voltage, the upper switch tube and the lower switch tube are both in the off state, and at this time, the current value of the upper switch tube in the second phase interval under the second off time length, that is, the fourth current value, is obtained. The fourth current value is the average current value, and the second current value is compared with the fourth current value to obtain the second comparison result. Assuming that the second current value is Iq1 and the fourth current value is I1, the first comparison result is generated by comparing Iq1 and I1.

[0092] Here, based on the first comparison result and the second comparison result, it may be determined whether the PFC circuit is abnormal.

[0093] In some embodiments, determining whether the PFC circuit is abnormal based on a first comparison result between the first current value and the third current value and a second comparison result between the second current value and the fourth current value includes:

[0094] If the first current value is less than or equal to the third current value, and the second current value is less than or equal to the fourth current value, it is determined that the PFC circuit is abnormal.

[0095] It can be understood that the PFC circuit abnormalities include: PFC inductor short circuit, upper switch tube Q1 and lower switch tube Q2 abnormalities, upper switch tube drive circuit and lower switch tube drive circuit abnormalities.

[0096] Here, if the first current value is less than or equal to the third current value, this means that when the lower switch is turned on, the first current value does not increase as expected, but decreases or even does not change. Similarly, if the second current value is less than or equal to the fourth current value, this means that when the upper switch is turned on, the third current value does not increase, but decreases or even does not change. This may indicate that there are abnormalities in the circuit, such as a short circuit of the PFC inductor, abnormalities of the upper switch Q1 and the lower switch Q2, and abnormalities of the upper switch drive circuit and the lower switch drive circuit, which results in the current being unable to pass through the PFC inductor normally.

[0097] Exemplarily, if Iq2 is not greater than 12 and Iq1 is not greater than 11, the PFC circuit is abnormal (including the inductor L being short-circuited, the lower switch tube and the upper switch tube driving circuit being abnormal, and the lower switch tube Q2 and the upper switch tube Q1 being abnormal).

[0098] In some embodiments, determining whether the PFC circuit is abnormal based on a first comparison result between the first current value and the third current value and a second comparison result between the second current value and the fourth current value includes:

[0099] If the first current value is less than or equal to the third current value, and the second current value is greater than the fourth current value, it is determined that the lower switch tube or the lower switch tube driving circuit is abnormal; or,

[0100] If the first current value is greater than the third current value, and the second current value is less than or equal to the fourth current value, it is determined that the upper switch tube is abnormal or the upper switch driving circuit is abnormal.

[0101] It can be understood that the PFC circuit further includes: a first driving circuit for driving the upper switch tube and the lower switch tube, and the first driving circuit includes an upper switch tube driving circuit and a lower switch tube driving circuit.

[0102] It can be understood that when the first current value is less than or equal to the third current value, it means that the current does not increase or decrease when the lower switch tube is turned on during the positive half cycle of the voltage, and when the second current value is greater than the fourth current value, it indicates that the current increases when the upper switch tube is turned on during the negative half cycle of the voltage, and the upper switch tube works normally. Therefore, this indicates that there may be a fault in the lower switch tube or its driving circuit.

[0103] It can be understood that when the first current value is greater than the third current value, it means that during the positive half-cycle of the voltage, when the lower switch tube is turned on, the current increases, and the lower switch tube works normally. However, when the second current value is less than or equal to the fourth current value, it means that during the negative half-cycle of the voltage, when the upper switch tube is turned on, the current does not increase or decrease, which indicates that the upper switch tube or its driving circuit may be faulty.

[0104] Exemplarily, if Iq2 is not greater than 12 and Iq1 is greater than 11, the lower switch tube Q2 or the lower switch tube driving circuit is abnormal; if Iq2 is greater than 12 and Iq1 is not greater than 11, the upper switch tube Q1 or the upper switch tube driving circuit is abnormal.

[0105] In some embodiments, the duty cycle is set to be less than or equal to a set duty cycle threshold, and the method further includes:

[0106] Determining an upper limit value of an AC input voltage of an input power source based on an upper limit value of a first set phase and an upper limit value of a second set phase;

[0107] A set duty cycle threshold is generated based on the upper limit value of the AC input voltage, the inductance value of the PFC inductor, and the current change rate threshold.

[0108] It is understandable that the upper limits of Phase 1 and Phase 2 are determined by circuit hardware characteristics. First, the upper limit Vmax of the AC input voltage of the input power source needs to be determined based on the upper limit of the first set phase (Phase 1) and the upper limit of the second set phase (Phase 2).

[0109] It can be understood that dI / dt is the current change rate, which represents the change value of the time period I from 0 to It. Here, t can be regarded as the duty cycle (Duty), and the circuit hardware obtains the maximum instantaneous current I_max that the circuit can withstand. Then the current change rate threshold can be expressed as dI_max / dt(Duty).

[0110] Here, assuming that the inductance value of the PFC control loop is L, the relationship between the input voltage V, inductance and current change rate can be expressed as V = L*dI / dt, where V is the instantaneous value of the input voltage and dI / dt is the current change rate. If the upper limits of Phase1 and Phase2 are fixed, the upper limit value Vmax of the AC input voltage can be obtained. Based on the upper limit value Vmax, L and I_max of the AC input voltage, based on the above formula V = L*dI / dt, t is obtained, which is the set duty cycle threshold, where the set duty cycle is less than or equal to the set duty cycle threshold.

[0111] In some embodiments, the method further comprises:

[0112] Acquire a phase signal of an input AC voltage signal collected by an input AC voltage sampling circuit;

[0113] Based on the phase signal, the voltage cycle of the input power is determined.

[0114] It can be understood that the PFC circuit further includes: an input AC voltage sampling circuit for detecting the supply voltage Vac of the input power supply, and the input AC voltage sampling circuit is used to collect an input AC voltage signal input to the PFC circuit.

[0115] Here, the phase signal of the input AC voltage signal collected by the input AC voltage sampling circuit can be obtained. Based on the acquired phase signal, the position of the phase signal relative to the reference point (usually the voltage zero crossing point) is analyzed to determine whether the input power supply is in the positive half cycle or the negative half cycle of the voltage.

[0116] Below, the embodiment of the present application is described in detail with reference to an application example.

[0117] This application example takes an air conditioner as an example. In the topology of the bridgeless (totem pole) PFC adopted by the air conditioner outdoor unit electronic control, the PFC current (current flowing through the PFC inductor) is basically sampled at the current input end of the PFC inductor, and a current Hall sensor is added to sample the current.

[0118] When the air conditioner is running, the PFC control of the air conditioner outdoor unit electronic control totem pole needs to use the current flowing through the PFC inductor. The output end of the rectifier uses a resistor to sample the PFC current. Since the PFC current cannot be sampled when the main switch is turned on, the PFC current can only be sampled when the main switch is turned off. Therefore, when the PFC main switch is turned on, if the inductor is short-circuited or the drive circuit (including the switch) is abnormal, the current cannot be sampled at this time, so effective protection cannot be achieved, which will lead to risks such as circuit burning.

[0119] In order to solve the problem of circuit abnormality and inability to provide timely protection, this application example proposes a method in which, before the PFC is turned on, near the zero point of the input voltage, the main switch tube outputs according to a preset duty cycle, and samples the current in real time in the main switch tube off area. By changing the current, it is determined whether there is an abnormality in the PFC circuit.

[0120] The PFC control module of this application example is as follows Figure 1 As shown, it includes a PFC module (i.e. the aforementioned PFC circuit), a load module such as a compressor, and an MCU control module. The PFC module includes an input AC voltage sampling circuit, a bus sampling voltage circuit, a PFC current sampling circuit, and a switch tube (Q1 and Q2 are high-frequency switch tubes, which can be IGBT, C-coms, SIC, GaN, etc.; Q3 and Q4 are rectifier tubes, which can be IGBT, C-coms, SIC, GaN, etc. switch tubes and ordinary rectifier diodes). The PFC mode refers to obtaining the duty cycle Duty of the main switch tube according to the detected AC input voltage phase, bus output voltage, and PFC current. In each half cycle of the AC voltage, the high-frequency tube Q1 or Q2 is controlled to be opened and closed at a predetermined number of times to play the role of bus voltage boost and power correction. Q3 and Q4 tubes are used as rectifier tubes.

[0121] After PFC is turned on, the switching waveform of the main switch tube is as follows Figure 3 As shown, the switching waveform of the main switch tube after PFC is turned on is as follows Figure 3 As shown, when Q1 or Q2 is used as the main switch tube and is in the off state during the entire electrical cycle, current will flow through the sampling resistor only near the peak value of the AC voltage. Therefore, before the PFC is turned on, the average current I1 (i.e., the fourth current) between the zero point and Phase1 (i.e., the first set phase) is detected during the positive cycle (Vac>0), and the average current I2 (i.e., the third current) between the zero point and Phase2 (i.e., the second set phase) is detected during the negative cycle (Vac<0).

[0122] Then, between the zero point of the positive half cycle and Phase 1, the Q2 tube is controlled to output at a specific duty cycle Duty (i.e., the aforementioned set duty cycle), and the average current in the area (the sampling point is set in the area where the current flowing through the sampling resistor is not zero) Iq1 (i.e., the aforementioned first current) is detected. Between the zero point of the negative half cycle and Phase 2, the Q1 tube is controlled to output at a specific duty cycle Duty, and the average current in the area (the sampling point is set in the area where the current flowing through the sampling resistor is not zero) Iq2 is detected. When the main switch tube is turned on, the current flowing through the sampling resistor is prevented from being too large, so the Duty cannot be too large, and the main switch tube is turned on in the vicinity of the input voltage zero point (at this time, the instantaneous value of the input voltage is small).

[0123] Here, the upper limits of Duty, Phase1 and Phase2 are determined by the circuit hardware characteristics. For example, the inductance of the PFC control loop is L, then V=L*dI / dt, where V is the instantaneous value of the input voltage, dI / dt is the current change rate, and t can be regarded as the duty cycle. The change value of I from 0 to It in this time period can be obtained from the circuit hardware to obtain the maximum instantaneous current I_max that the circuit can withstand. Therefore, when the duty cycle Duty is fixed, the V value can be obtained, and thus the upper limits of Phase1 and Phase2 can be obtained. Similarly, by fixing the upper limits of Phase1 and Phase2 values, the V value can be obtained, and thus the duty cycle value can be obtained.

[0124] Based on the above Figure 1 The circuit structure diagram of this application example is as follows: Figure 4 As shown, the specific steps are as follows:

[0125] Step 401: Before PFC is turned on.

[0126] Before PFC is turned on, when Q1 or Q2 is used as the main switch and is in the off state during the entire power cycle, current will flow through the sampling resistor only near the peak of the AC voltage.

[0127] Step 402: Detect the input AC voltage phase.

[0128] Here, before the PFC is turned on, the AC input voltage Vac is detected in real time, the voltage phase is locked in real time through a phase-locked loop, the input AC voltage phase is detected, and the voltage cycle of the input AC voltage is determined.

[0129] Step 403: Detect the current average value I1 from the zero-crossing point of the positive half cycle to the phase Phase1.

[0130] Here, when the voltage cycle is in the positive half cycle, the current average value I1 between the zero crossing point of the positive half cycle and the phase Phase1 is detected.

[0131] Step 404: Detect the current average value I2 from the zero-crossing point of the negative half cycle to the phase Phase2.

[0132] Here, when the voltage cycle is in the negative half cycle, the current average value I2 between the half cycle zero crossing point and phase Phase2 is detected.

[0133] Step 405: The lower switch tube Q2 outputs with a fixed duty cycle between the zero-crossing point of the positive half cycle and the phase Phase1, and detects the average current value Iq2 in this interval.

[0134] Here, in the positive half cycle, the main switch tube of the PFC circuit is determined to be the lower switch tube Q2, and the lower switch tube Q2 is controlled to output with a fixed duty cycle between the zero crossing point and the phase Phase1, and the average current value Iq2 in this interval is detected.

[0135] Step 406: The switch tube Q1 is output with a fixed duty cycle between the zero-crossing point of the negative half cycle and the phase Phase2, and the average current value Iq1 in this interval is detected.

[0136] Step 407: If Iq2 is not greater than 12 and Iq1 is not greater than 11, the PFC circuit is abnormal; if Iq2 is not greater than 12 and Iq1 is greater than 11, the lower switch tube Q2 or the lower switch tube driving circuit is abnormal; if Iq2 is greater than 12 and Iq1 is not greater than 11, the upper switch tube Q1 or the upper switch tube driving circuit is abnormal.

[0137] Here, if Iq2 is not greater than I2 and Iq1 is not greater than I1, the PFC circuit is abnormal, which includes a short circuit of the PFC inductor, abnormalities of the upper switch tube Q1 and the lower switch tube Q2, and abnormalities of the driving circuits of the upper switch tube Q1 and the lower switch tube Q2.

[0138] Here, if Iq2 is not greater than I2 and Iq1 is greater than I1, it is determined that the lower switch tube Q2 or the lower switch tube driving circuit is abnormal.

[0139] Here, if Iq2 is greater than I2 and Iq1 is not greater than I1, it is determined that the upper switch tube Q1 or the driving circuit of the upper switch tube is abnormal.

[0140] Thus, this application example proposes that before PFC is turned on, near the input voltage zero point, the main switch tube outputs according to the preset duty cycle, and samples the current in real time in the main switch tube off area, and determines whether the PFC circuit is abnormal through the change of the current. This avoids the risk of electronic control burning due to inductor short circuit or circuit after PFC is turned on.

[0141] In order to implement the method of the embodiment of the present application, the embodiment of the present application also provides a control device for a PFC circuit. Figure 5As shown, the control device 500 includes: a first control module 501, a second control module 502 and a determination module 503. The first control module 501 is used for controlling the lower switch tube to be turned on based on a set duty cycle in a first phase interval from a voltage zero point phase to a first set phase when the input power supply is in a voltage positive half cycle, and obtaining a first current value in the first phase interval; the second control module 502 is used for controlling the upper switch tube to be turned on based on a set duty cycle in a second phase interval from a voltage zero point phase to a second set phase when the input power supply is in a voltage negative half cycle, and obtaining a second current value in the second phase interval; the determination module 503 is used for determining whether the PFC circuit is abnormal based on the first current value and the second current value.

[0142] In some embodiments, the determination module 503 is also used to determine whether the PFC circuit is abnormal based on a first comparison result between the first current value and the third current value and a second comparison result between the second current value and the fourth current value; wherein the third current value is the current value of the first phase interval when the input power supply is in the negative half cycle of the voltage, the upper switch tube and the lower switch tube are both in the closed state; the fourth current value is the current value of the second phase interval when the input power supply is in the positive half cycle of the voltage, the upper switch tube and the lower switch tube are both in the closed state.

[0143] In some embodiments, the determination module 503 is further configured to determine that the PFC circuit is abnormal if the first current value is less than or equal to the third current value, and the second current value is less than or equal to the fourth current value.

[0144] In some embodiments, the determination module 503 is further configured to determine that the lower switch tube or the lower switch tube driving circuit is abnormal if the first current value is less than or equal to the third current value and the second current value is greater than the fourth current value; or,

[0145] If the first current value is greater than the third current value, and the second current value is less than or equal to the fourth current value, it is determined that the upper switch tube is abnormal or the upper switch driving circuit is abnormal.

[0146] In some embodiments, the determination module 503 is also used to determine the upper limit value of the AC input voltage of the input power supply based on the upper limit value of the first set phase and the upper limit value of the second set phase; the control device 500 also includes a generation module 504, which is used to generate a set duty cycle threshold based on the upper limit value of the AC input voltage, the inductance value of the PFC inductor and the current change rate threshold.

[0147] In some embodiments, the control device 500 also includes an acquisition module 505 for acquiring a phase signal of the input AC voltage signal collected by the input AC voltage sampling circuit; the determination module 503 is also used to determine whether the input power supply is in a positive half-cycle of voltage or a negative half-cycle of voltage based on the phase signal.

[0148] In actual application, the first control module 501, the second control module 502, the determination module 503, the generation module 504 and the acquisition module 505 can be implemented by a processor in the control device. Of course, the processor needs to run the computer program in the memory to implement its functions.

[0149] It should be noted that: when the control device provided in the above embodiment controls the PFC circuit, only the division of the above program modules is used as an example. In practical applications, the above processing can be assigned to different program modules as needed, that is, the internal structure of the device is divided into different program modules to complete all or part of the above-described processing. In addition, the control device and the control method of the PFC circuit provided in the above embodiment belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.

[0150] Based on the hardware implementation of the above program modules and in order to implement the method of the embodiment of the present application, the embodiment of the present application also provides an electronic device. Figure 6 Only an exemplary structure of the electronic device is shown, not all structures, and it can be implemented as needed. Figure 6 Partial or complete structure shown.

[0151] like Figure 6 As shown, the electronic device 600 provided in the embodiment of the present application includes: at least one processor 601, a memory 602, a user interface 603 and at least one network interface 604. The various components in the electronic device 600 are coupled together through a bus system 605. It can be understood that the bus system 606 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 605 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, in Figure 6 Various buses are labeled as bus system 605 .

[0152] The user interface 603 may include a display, a keyboard, a mouse, a trackball, a click wheel, keys, buttons, a touch pad or a touch screen.

[0153] It can be understood that the electronic device of the embodiment of the present application also includes: a PFC circuit, the PFC circuit includes: a PFC inductor, an upper switch tube and a lower switch tube constituting an upper and lower bridge structure, one end of the PFC inductor is connected to the input power supply, and the other end of the PFC inductor is connected to the middle access point of the upper and lower bridge structures, the PFC circuit also includes a sampling resistor arranged between the lower switch tube and the ground end, based on the above-mentioned control method, by outputting the main switch tube according to a preset duty cycle in the first phase interval and the second phase interval near the voltage zero crossing point, so as to determine whether the PFC circuit is abnormal through the first current value and the second current value, thereby avoiding the risk of electric control burning due to the abnormality of the PFC circuit after the PFC is normally turned on, and improving the safety of the PFC circuit.

[0154] The memory 602 in the embodiment of the present application is used to store various types of data to support the operation of the electronic device. Examples of such data include: any computer program used to operate on the electronic device.

[0155] The control method of the electronic device disclosed in the embodiment of the present application can be applied to the processor 601, or implemented by the processor 601. The processor 601 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the control method of the electronic device can be completed by the hardware integrated logic circuit or software instructions in the processor 601. The above-mentioned processor 601 can be a general-purpose processor, a digital signal processor (DSP, Digital Signal Processor), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The processor 601 can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiment of the present application. The general-purpose processor can be a microprocessor or any conventional processor, etc. In combination with the steps of the method disclosed in the embodiment of the present application, it can be directly embodied as a hardware decoding processor to execute, or it can be executed by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium, which is located in the memory 602, and the processor 601 reads the information in the memory 602, and completes the steps of the control method of the electronic device provided in the embodiment of the present application in combination with its hardware.

[0156] In an exemplary embodiment, the electronic device may be implemented by one or more application specific integrated circuits (ASIC), DSP, programmable logic device (PLD), complex programmable logic device (CPLD), field programmable gate array (FPGA), general processor, controller, microcontroller (MCU), microprocessor, or other electronic components to execute the aforementioned method.

[0157] It can be understood that the memory 602 can be a volatile memory or a non-volatile memory, and can also include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disk, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a disk memory or a tape memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM, SyncLink Dynamic Random Access Memory), and direct RAM bus random access memory (DRRAM, Direct Rambus Random Access Memory).The memories described in the embodiments of the present application are intended to include, but are not limited to, these and any other suitable types of memories.

[0158] In an exemplary embodiment, the present application also provides a computer storage medium, which can be a computer-readable storage medium, on which a computer program is stored, and the computer program can be executed by the processor 601 of the electronic device to complete the steps of the method of the present application embodiment. The computer-readable storage medium can be a memory such as ROM, PROM, EPROM, EEPROM, Flash Memory, magnetic surface storage, optical disk, or CD-ROM.

[0159] In an exemplary embodiment, the embodiment of the present application further provides a computer program product, including a computer program, which can be executed by the processor 601 of the electronic device to complete the steps of the method of the embodiment of the present application.

[0160] It should be noted that: "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0161] In addition, the technical solutions described in the embodiments of the present application can be combined arbitrarily without conflict.

[0162] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A control method for a PFC circuit, characterized in that: The PFC circuit comprises: a PFC inductor, an upper switch tube and a lower switch tube constituting an upper and lower bridge structure, one end of the PFC inductor is connected to an input power supply, and the other end of the PFC inductor is connected to a middle access point of the upper and lower bridge structure, the PFC circuit further comprises a sampling resistor arranged between the lower switch tube and a ground terminal, and the method comprises: The input power source is in a positive half cycle of voltage, and in a first phase interval from a voltage zero phase to a first set phase, the lower switch tube is controlled to be turned on based on a set duty cycle, and a first current value in the first phase interval is obtained; The input power source is in a negative half cycle of voltage, and in a second phase interval from a voltage zero phase to a second set phase, the upper switch tube is controlled to be turned on based on a set duty cycle, and a second current value in the second phase interval is obtained; Based on the first current value and the second current value, it is determined whether the PFC circuit is abnormal.

2. The method according to claim 1, characterized in that The determining whether the PFC circuit is abnormal based on the first current value and the second current value includes: determining whether the PFC circuit is abnormal based on a first comparison result of the first current value and the third current value and a second comparison result of the second current value and the fourth current value; The third current value is the current value of the first phase interval when the input power supply is in the negative half cycle of voltage and the upper switch tube and the lower switch tube are both in the off state; The fourth current value is a current value in the second phase interval when the input power source is in a positive voltage half cycle and the upper switch tube and the lower switch tube are both in a closed state.

3. The method according to claim 2, characterized in that The determining whether the PFC circuit is abnormal based on a first comparison result between the first current value and the third current value and a second comparison result between the second current value and the fourth current value includes: If the first current value is less than or equal to a third current value, and the second current value is less than or equal to a fourth current value, it is determined that the PFC circuit is abnormal.

4. The method according to claim 2, characterized in that: The PFC circuit further includes: a first drive circuit, for driving the upper switch tube and the lower switch tube, the first drive circuit including an upper switch tube drive circuit and a lower switch tube drive circuit, and determining whether the PFC circuit is abnormal based on a first comparison result between the first current value and the third current value and a second comparison result between the second current value and the fourth current value, including: If the first current value is less than or equal to the third current value, and the second current value is greater than the fourth current value, it is determined that the lower switch tube or the lower switch tube driving circuit is abnormal; or, If the first current value is greater than the third current value, and the second current value is less than or equal to the fourth current value, it is determined that the upper switch tube is abnormal or the upper switch driving circuit is abnormal.

5. The control method according to claim 1, characterized in that: The set duty cycle is less than or equal to a set duty cycle threshold, and the method further includes: Determining an upper limit value of the AC input voltage of the input power source based on an upper limit value of the first set phase and an upper limit value of the second set phase; The set duty cycle threshold is generated based on the upper limit value of the AC input voltage, the inductance value of the PFC inductor, and the current change rate threshold.

6. The control method according to claim 1, characterized in that: The PFC circuit further includes: an input AC voltage sampling circuit for detecting the supply voltage of the input power supply, and the method further includes: Acquire a phase signal of the input AC voltage signal collected by the input AC voltage sampling circuit; Based on the phase signal, it is determined whether the input power is in a positive voltage half cycle or a negative voltage half cycle.

7. A control device for a PFC circuit, characterized in that: The PFC circuit includes: a PFC inductor, an upper switch tube and a lower switch tube forming an upper and lower bridge structure, one end of the PFC inductor is connected to an input power supply, and the other end of the PFC inductor is connected to a middle access point of the upper and lower bridge structure, the PFC circuit also includes a sampling resistor arranged between the lower switch tube and a ground terminal, and the control device includes: A first control module, used for controlling the lower switch tube to be turned on based on a set duty cycle in a first phase interval from a voltage zero phase to a first set phase when the input power source is in a voltage positive half cycle, and obtaining a first current value in the first phase interval; A second control module, used for controlling the upper switch tube to be turned on based on a set duty cycle in a second phase interval from a voltage zero phase to a second set phase when the input power supply is in a voltage negative half cycle, and obtaining a second current value in the second phase interval; A determination module is used to determine whether the PFC circuit is abnormal based on the first current value and the second current value.

8. An electronic device, characterized in that: include: A PFC circuit, the PFC circuit comprising: a PFC inductor, an upper switch tube and a lower switch tube constituting an upper and lower bridge structure, one end of the PFC inductor is connected to an input power supply, and the other end of the PFC inductor is connected to a middle access point of the upper and lower bridge structure, the PFC circuit further comprises a sampling resistor arranged between the lower switch tube and a ground terminal, the electronic device further comprises: a processor and a memory for storing a computer program that can be run on the processor, wherein, The processor is used to execute the steps of the method according to any one of claims 1 to 6 when running a computer program.

9. A computer storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the computer program implements the steps of the method according to any one of claims 1 to 6.

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