Surge current generating device and surge evaluation system and method of power device

Abstract

The invention provides a surge current generating device, and a surge evaluation system and evaluation method of a power device. The device comprises: an IGBT module; the first driving module is electrically connected with a gate electrode and an emitting electrode of the IGBT module, and is used for providing a driving voltage signal with a preset waveform parameter for the gate electrode of the IGBT module, so that the IGBT module outputs surge current in a conduction state, and the preset waveform parameter is used for representing that the waveform of the driving voltage signal is a sine half-wave waveform; the charging and discharging module is electrically connected with the collector electrode of the IGBT module and is used for supplying power to the collector electrode of the IGBT module; and the surge current output terminal is electrically connected with the emitting electrode of the IGBT module and is used for carrying out surge current test on the power device under the condition that the surge current output terminal is electrically connected with the power device. According to the invention, the surge current with the waveform similar to half sine wave can be controllably generated, and the amplitude and pulse duration are adjustable, so that the test result can more accord with the operation of the actual working condition, and the accurate surge evaluation of the MOSFET device is realized.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular, to a surge current generating device, a surge evaluation system for a power device, a surge evaluation method for a power device, a computer-readable storage medium, and an electronic device. Background Art

[0002] The main limiting factor of MOSFET devices is their reliability. The reliability of the device directly affects the reliable and stable operation of the system. Once the device degrades or fails, it may affect the safe operation of the converter or cause major safety problems. Therefore, it is necessary to explore the degradation characteristics and failure characteristics of MOSFET devices under different working conditions.

[0003] In actual converter applications, MOSFET devices may be subjected to single or multiple surge currents. Lightning pulses or power switches may cause surge currents. In electronic design, surge mainly refers to the strong pulse that may be higher than the power supply itself when the power supply is just turned on; it also refers to the interference of the power supply or other parts of the circuit with internal or external sharp pulses. The circuit is likely to burn out at the moment of the surge, causing PN junction capacitor breakdown, resistor burnout, etc. Surge current can be well observed in AC inductive loads such as transformers and motors. The surge current amplitude is usually twenty or thirty times the nominal value, and the duration level can cover microseconds to milliseconds. At present, the more commonly used test waveform is a 10ms sinusoidal current half wave, but its waveform form and duration scale are not close to the actual working conditions.

[0004] Therefore, how to achieve accurate surge assessment of MOSFET devices is a technical problem that urgently needs to be solved. Summary of the invention

[0005] The main purpose of the present application is to provide a surge current generating device, a surge assessment system for a power device, a surge assessment method for a power device, a computer-readable storage medium and an electronic device, so as to at least solve the problem in the prior art that it is difficult to achieve accurate surge assessment of MOSFET devices.

[0006] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a surge current generating device is provided, including: an IGBT module; a first driving module, electrically connected to the gate and emitter of the IGBT module, respectively, for providing a driving voltage signal with preset waveform parameters to the gate of the IGBT module, so that the IGBT module outputs a surge current when it is in a conducting state, wherein the preset waveform parameters are used to characterize that the waveform of the driving voltage signal is a half-sine wave waveform; a charging and discharging module, electrically connected to the collector of the IGBT module, for supplying power to the collector of the IGBT module; a surge current output terminal, electrically connected to the emitter of the IGBT module, for performing a surge current test on the power device when electrically connected to the power device.

[0007] Optionally, the first driving module includes: a waveform generating circuit, used to generate a voltage signal with a waveform of a half-sine wave; a control circuit, wherein the input end of the control circuit receives the control signal, and the output end of the control circuit is electrically connected to the waveform generating circuit, and is used to adjust the waveform generating circuit according to the control signal so that the voltage signal output by the waveform generating circuit has the preset waveform parameters.

[0008] Optionally, the first driving module further includes: an isolation amplifier circuit, which is electrically connected to the output end of the waveform generating circuit and the gate of the IGBT module respectively, and is used to amplify the driving voltage signal.

[0009] Optionally, the charging and discharging module includes: a voltage source; a capacitor module, connected in parallel with the voltage source, and one end of the capacitor module is electrically connected to the collector of the IGBT module, and the other end is grounded; a switch module, electrically connected to the voltage source and the capacitor module, respectively, for switching the charging and discharging of the capacitor module; a first control module, electrically connected to the switch module, for controlling the opening and closing of the switch module to control the charging and discharging of the capacitor module.

[0010] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a surge assessment system for a power device is provided, comprising the surge current generating device, a power device and a second driving module, wherein: the second driving module is electrically connected to the power device, and is used to control the conduction and cutoff of the power device or a parasitic diode in the power device; the emitter of the IGBT module in the surge current generating device is electrically connected to the power device.

[0011] Optionally, the surge assessment system further includes a surge current input terminal, and there are multiple power devices, wherein: at least one of the power devices is an NMOS device, and the surge current input terminal is electrically connected to the source of each of the power devices; and at least one of the power devices is a PMOS device, and the surge current input terminal is electrically connected to the drain of each of the power devices.

[0012] Optionally, the surge assessment system further has a test circuit board, the test circuit board has the surge current input terminal, the surge current input terminal is electrically connected to the emitter of the IGBT module, and the plurality of power devices are electrically connected to the surge current input terminal on the test circuit board via a transmission line.

[0013] According to another aspect of the present application, a surge assessment method for a power device is provided, using the surge assessment system for the power device, the surge assessment system comprising a surge current generating device, a power device, and a second driving module, the method comprising: controlling the charging and discharging module in the surge current generating device to supply power to the collector of the IGBT module; controlling the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and controlling the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs surge current to the power device.

[0014] Optionally, controlling the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module includes: receiving a target instruction, wherein the target instruction has the waveform parameters of a target surge current; determining the waveform parameters of a target sinusoidal half-wave voltage corresponding to the waveform parameters of the target surge current according to the target instruction and a preset relationship, wherein the preset relationship is used to characterize the correspondence between the waveform parameters of the surge current and the waveform parameters of the sinusoidal half-wave voltage; controlling the first driving module in the surge current generating device to provide the target sinusoidal half-wave voltage to the gate of the IGBT module so that the IGBT module outputs the target surge current.

[0015] Optionally, the surge assessment method also includes: establishing a preset database based on multiple first waveform parameters and multiple second waveform parameters, wherein the multiple first waveform parameters are waveform parameters of multiple sinusoidal half-wave voltages, and the second waveform parameters are waveform parameters of the output current of the IGBT module input with the sinusoidal half-wave voltage, and determining the waveform parameters of the target sinusoidal half-wave voltage corresponding to the waveform parameters of the target surge current based on the target instruction and the preset relationship, including: determining the waveform parameters of the target sinusoidal half-wave voltage from the waveform parameters of the multiple sinusoidal half-wave voltages based on the target instruction and the preset database.

[0016] According to another aspect of the present application, a surge assessment device for a power device is provided, which adopts the surge assessment system for the power device, the surge assessment system includes a surge current generating device, a power device and a second driving module, and the device includes: a first control module, used to control the charging and discharging module in the surge current generating device to supply power to the collector of the IGBT module; a second control module, used to control the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and control the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs surge current to the power device.

[0017] According to another aspect of the present application, a computer-readable storage medium is provided, wherein the computer-readable storage medium includes a stored program, wherein when the program is executed, the device where the computer-readable storage medium is located is controlled to execute the surge assessment method for the power device.

[0018] According to another aspect of the present application, an electronic device is also provided, comprising: one or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and the one or more programs include a method for executing a surge assessment of the power device.

[0019] By applying the technical solution of the present application, a surge current generating device is provided. Since the first driving module is electrically connected to the gate and emitter of the IGBT module respectively, a driving voltage signal with preset waveform parameters can be provided to the gate of the IGBT module. The preset waveform parameters are used to characterize that the waveform of the driving voltage signal is a half-sine wave waveform, so that the IGBT module outputs a surge current with a quasi-half-sine wave waveform when it is on. Therefore, when the charging and discharging module supplies power to the collector of the IGBT module, by electrically connecting the surge current output terminal electrically connected to the emitter of the IGBT module to the power device to be tested, the surge current test of the above-mentioned power device can be performed through the surge current generated by the emitter of the IGBT module. Therefore, by using the above-mentioned surge current generating device of the present application, the waveform parameters of the driving voltage of the IGBT module, such as the amplitude and period of the driving voltage, can be pre-debugged, and the transfer characteristic curve can be used to controllably generate a surge current with adjustable amplitude and adjustable pulse duration, so that the test results can be more in line with the actual operating conditions, and accurate surge evaluation of MOSFET devices can be achieved; and, when in the continuous generation mode, the above-mentioned surge current generating device is also convenient for automatic counting and has the characteristics of strong flexibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings constituting part of the present application are used to provide a further understanding of the present application. The exemplary embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0021] Figure 1 A structural block diagram of a surge current generating device provided according to an embodiment of the present application is shown;

[0022] Figure 2 A schematic structural diagram of a surge current generating device provided according to an embodiment of the present application is shown;

[0023] Figure 3 A schematic diagram of a circuit structure in which a surge current generating device is electrically connected to a power device according to an embodiment of the present application is shown;

[0024] Figure 4 Shows Figure 2 Schematic diagram of the charging process of the circuit structure;

[0025] Figure 5 Shows Figure 2 Schematic diagram of the discharge process of the circuit structure;

[0026] Figure 6 Shows Figure 2 Schematic diagram of the surge current generation process of the circuit structure;

[0027] Figure 7A structural block diagram of a surge assessment system for a power device provided according to an embodiment of the present application is shown;

[0028] Figure 8 A schematic structural diagram of a surge assessment system for a power device provided according to an embodiment of the present application is shown;

[0029] Fig. 9 A hardware structure block diagram of a mobile terminal for executing a surge assessment method for a power device provided in an embodiment of the present application is shown;

[0030] Fig.10 A schematic flow chart of a surge assessment method for a power device provided according to an embodiment of the present application is shown;

[0031] Fig.11 A schematic diagram showing the relationship between a pulse current waveform and a half-sine wave voltage waveform in a surge assessment method for a power device provided according to an embodiment of the present application is shown;

[0032] Fig.12 A structural block diagram of a surge assessment device for a power device provided according to an embodiment of the present application is shown.

[0033] The above drawings include the following reference numerals:

[0034] 10. IGBT module; 11. drive input control terminal; 20. first drive module; 21. waveform generating circuit; 22. isolation amplifier circuit; 30. charge and discharge module; 31. voltage source; 32. capacitor module; 301. first switch component; 302. second switch component; 303. third switch component; 331. first drive signal control terminal; 332. second drive signal control terminal; 333. third drive signal control terminal; 34. charging resistor; 35. discharge resistor; 40. surge current output terminal; 50. second drive module; 70. surge current input terminal; 80. ground terminal; 100. surge current generating device; 200. power device; 201. first power device; 202. second power device; 203. third power device; 204. fourth power device; 102. processor; 104. memory; 106. transmission device; 108. input and output device; 300. first control module; 400. second control module. DETAILED DESCRIPTION

[0035] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0036] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0037] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0038] As introduced in the background technology, in the prior art, MOSFET devices may be subjected to single or multiple surge current impacts. Lightning pulses or power switches may cause surge currents. Surge currents can be well observed in AC inductive loads such as transformers and motors, but their waveform form and duration scale are not close to actual working conditions. In order to solve the problem that it is difficult to achieve accurate surge assessment of MOSFET devices in the prior art, the embodiments of the present application provide a surge current generating device, a surge assessment system for a power device, a surge assessment method thereof, a computer-readable storage medium and an electronic device.

[0039] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0040] In order to achieve the above object, according to one embodiment of the present application, a surge current generating device is provided, such as Figure 1As shown, it includes an IGBT module 10, a first driving module 20, a charging and discharging module 30 and a surge current output terminal 40, wherein: the first driving module 20 is electrically connected to the gate and the emitter of the IGBT module 10 respectively, and is used to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module 10, so that the IGBT module 10 outputs a surge current when it is turned on, wherein the preset waveform parameters are used to characterize that the waveform of the driving voltage signal is a sinusoidal half-wave waveform; the charging and discharging module 30 is electrically connected to the collector of the IGBT module 10, and is used to supply power to the collector of the IGBT module 10; the surge current output terminal 40 is electrically connected to the emitter of the IGBT module 10, and is used to perform a surge current test on the power device when electrically connected to the power device.

[0041] In the above embodiment of the present application, since the first driving module 20 is electrically connected to the gate and emitter of the IGBT module 10 respectively, it is possible to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module 10, so that the IGBT module 10 outputs a surge current when it is on. Therefore, when the charging and discharging module 30 supplies power to the collector of the IGBT module 10, by electrically connecting the surge current output terminal 40 electrically connected to the emitter of the IGBT module 10 to the power device to be tested, the surge current test of the above power device can be performed through the surge current generated by the emitter of the IGBT module 10.

[0042] Therefore, by using the above-mentioned surge current generating device of the present application, the waveform parameters of the driving voltage of the IGBT module can be pre-debugged, such as the amplitude and period of the driving voltage, and the transfer characteristic curve can be used to controllably generate a surge current with a quasi-sine half-wave waveform, and the surge current waveform amplitude and pulse duration are adjustable, so that the test results can be more in line with the actual operating conditions, thereby achieving accurate surge evaluation of MOSFET devices; and, when in the continuous generation mode, the above-mentioned surge current generating device is also convenient for automatic counting and has the characteristics of strong flexibility.

[0043] In some optional embodiments, the first driving module includes a waveform generating circuit 21 and a control circuit (not shown in the figure), the waveform generating circuit is used to generate a voltage signal with a waveform of a half-sine wave, the input end of the control circuit receives the control signal, and the output end is electrically connected to the waveform generating circuit, and is used to adjust the waveform generating circuit according to the control signal so that the voltage signal output by the waveform generating circuit has preset waveform parameters.

[0044] In the above optional implementation, the method of using the control circuit to adjust the waveform parameters of the output voltage signal of the waveform generating circuit 21 includes but is not limited to: 1. By adjusting the power supply voltage in the waveform generating circuit 21, the amplitude of the output voltage signal is changed; 2. Changing the resistance value in the waveform generating circuit 21 can change the response time of the circuit, thereby changing the frequency and amplitude of the output voltage signal; 3. Changing the capacitance value in the waveform generating circuit 21 can change the frequency response of the circuit, thereby changing the frequency and amplitude of the output voltage signal; 4. Using adjustable resistors, capacitors or other components to automatically adjust the amplitude and frequency of the output voltage signal of the waveform generating circuit 21; 5. By adjusting the working state of the waveform generating circuit 21 through an external control signal, the amplitude and frequency of the output voltage signal can be adjusted. In short, by adjusting the component parameters in the waveform generating circuit 21 through the control circuit or using an external control signal, the amplitude and frequency of the output voltage signal of the waveform generating circuit 21 can be adjusted.

[0045] Exemplarily, the driving voltage of the IGBT module is pre-debugged, including the amplitude and period of the driving voltage corresponding to various driving modes of the IGBT module, and a data table of the corresponding relationship between the waveform parameters of the driving voltage of the IGBT module and the waveform parameters of the output current is formed, and pre-stored as a database, and then after receiving the target instruction, the above database is searched, and the driving mode of the IGBT module is selected by comparing with the data table, and the driving parameter value is set on the driving panel of the IGBT module, so that the driving of the IGBT module changes from the negative voltage off state to the on state, and through the setting of the drive, a sinusoidal half-wave voltage V with the required amplitude and pulse time is provided to the input. GE , thus outputting the required pulse waveform surge current i according to the transfer characteristic curve of the IGBT module, such as Fig.11 As shown, the peak current of the surge current i is i1, and the half-sine wave voltage V GE The peak of the surge current i and the peak of the surge current i both correspond to the time period T1, and there is a time period T2 between the time periods T1, wherein T1 can be 50 -20ms, T2 can be a single or repeated surge current of 300ms-1s. The above range can support more driving modes of IGBT modules, so that operators can select the driving mode of IGBT modules according to actual needs, and can realize surge testing of power devices such as SiC MOSFET in different application scenarios, so that the test results can be more in line with the actual working conditions, which is conducive to studying the degradation characteristics and failure characteristics of power devices under different working conditions.

[0046] In some optional embodiments, such as Figure 1 and Figure 2As shown, the surge current generating device in the embodiment of the present application further includes an isolation amplifier circuit 22, which is electrically connected to the output end of the first driving module 20 and the gate of the IGBT module 10, respectively, and is used to amplify the driving voltage signal. The isolation amplifier circuit 22 has a first submodule with a signal amplification function and a second submodule with a signal isolation function. The signal output by the first driving module 20 is amplified by the first submodule, and the gate and emitter of the IGBT module 10 are respectively amplified by the second submodule after signal isolation.

[0047] In some optional embodiments, such as Figure 1 and Figure 2 As shown, the charge and discharge module 30 includes a voltage source 31, a capacitor module 32 and a switch module, wherein: the capacitor module 32 is connected in parallel with the voltage source 31, and one end of the capacitor module 32 is electrically connected to the collector E of the IGBT module 10, and the other end is grounded; the switch module is electrically connected to the voltage source 31 and the capacitor module 32 respectively, and is used to switch the charging and discharging of the capacitor module 32.

[0048] In the above optional implementation, the capacitor module 32 can be placed in a charging process, a discharging process and a surge current process by means of the voltage source 31 and the switch module. When the capacitor module 32 is in the charging process, the capacitor module 32 can be charged, and after the charging process is switched to the surge current process, the IGBT module 10 can be powered by the charged capacitor module 32; and the gate and emitter of the IGBT module 10 are electrically connected to the first drive module 20, and the first drive module 20 can provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module 10, so that the IGBT module 10 outputs a surge current when it is turned on.

[0049] Specifically, Figure 2 As shown, the charge and discharge module 30 includes a voltage source 31, a capacitor module 32 and a switch module. The capacitor module 32 is connected in parallel with the voltage source 31, and one end of the capacitor module 32 is electrically connected to the collector C of the IGBT module 10, and the other end is grounded. The switch module is electrically connected to the voltage source 31 and the capacitor module 32 respectively, and the switch module includes a first switch component 301, a second switch component 302 and a third switch component 303. The above-mentioned charge and discharge module also includes a charging resistor 34 and a discharging resistor 35.

[0050] In order to realize the surge current test of power devices, such as Figure 2As described, the emitter of the IGBT module 10 is electrically connected to the source S of the device under test, the gate G2 and the source S of the device under test are electrically connected to the second driving module 50, the second driving module 50 is used to provide a turn-on voltage for the IGBT module 10, the drain D of the NMOS device is connected to a low level, and when the device under test or the parasitic diode therein is turned on, the surge current generated by the IGBT module 10 can enter the device under test to achieve surge current testing of the power device.

[0051] For example, Figure 3 As shown, the switch module in the charge and discharge module 30 includes a first switch component K1, a second switch component K2 and a third switch component K3. The first switch component K1 is electrically connected to the output end of the voltage source 31 and the first end of the capacitor C2 in the capacitor module, respectively. The second switch component K2 is electrically connected to the first end and the second end of the capacitor C2, respectively. The third switch component K3 is electrically connected to the first end of the capacitor C2 and the collector C of the IGBT module 10, respectively. The charge and discharge module 30 also includes a discharge resistor R1 and a charging resistor R2. The charging resistor R2 is electrically connected between the first switch component K1 and the first end of the capacitor C2, and the discharge resistor R1 is electrically connected between the output end of the charging resistor R2 and the second switch component K2.

[0052] In the above example, the first switch component K1, the second switch component K2 and the third switch component K3 are all in the off state. Figure 4 As shown, in order to put the capacitor module in a charging state, the first switch component K1 can be controlled to be closed so that the voltage source 31 outputs a preset voltage V to the capacitor C2. DC For charging; Figure 5 As shown, after charging the capacitor C2 for a preset time, such as 1s-2s, the first switch component K1 is controlled to be disconnected, and the third switch component K3 is controlled to be closed, so that the charging and discharging module 30 is electrically connected to the collector C of the IGBT module 10, and the collector C of the IGBT module 10 is powered. At the same time, the first driving module 20 provides a driving voltage signal with preset waveform parameters to the gate G1 of the IGBT module 10, so that the IGBT module 10 generates a surge current when it is turned on. The surge current output terminal is electrically connected to the emitter E of the IGBT module 10 for outputting the above-mentioned surge current. At this time, by connecting the above-mentioned surge current output terminal to the power device to be tested, the surge current test of the power device can be achieved.

[0053] In addition, if Figure 6 As shown, the capacitor module can also be put into a discharge process by controlling the second switch component K2 to be closed and making the first switch component K1 and the third switch component K3 both in an open state.

[0054] In the above optional implementation manner, the surge current generating device in the embodiment of the present application may further include a control unit, which is electrically connected to the switch module and is used to control the opening and closing of the switch module (such as the first switch component K1, the second switch component K2 and the third switch component K3) to control the capacitor module to be in the charging process, the discharging process and the surge current process respectively, thereby realizing automated surge current testing of the power device.

[0055] Specifically, Figure 2 As shown, the surge current generating device may also include a first drive signal control terminal 331, a second drive signal control terminal 332 and a third drive signal control terminal 333, the first drive signal control terminal 331 is electrically connected to the first switch component 301, the second drive signal control terminal 332 is electrically connected to the second switch component 302, and the third drive signal control terminal 333 is electrically connected to the third switch component 303, and the above-mentioned control unit is electrically connected to the above-mentioned first drive signal control terminal 331, the above-mentioned second drive signal control terminal 332 and the above-mentioned third drive signal control terminal 333 respectively, and sends a control signal to realize the control of the closing and closing of the first switch component 301, the second switch component 302 and the third switch component 303.

[0056] The surge current generating device in the embodiment of the present application may also include a signal receiving end, a database unit, a processing unit and a signal sending end, wherein: the database unit is used to store multiple first waveform parameters, multiple second waveform parameters corresponding to the multiple first waveform parameters one by one, and the corresponding relationship between the first waveform parameters and the second waveform parameters, the first waveform parameters are the waveform parameters of the half-sine wave voltage, and the second waveform parameters are the waveform parameters of the output current of the IGBT module input with the half-sine wave voltage; the processing unit is used to receive and parse the target instructions received by the signal receiving end to obtain the waveform parameters of the target surge current, and then obtain the waveform parameters of the target half-sine wave voltage corresponding to the waveform parameters of the target surge current from the database module to generate a control signal, which is sent to the control circuit in the first driving module through the signal sending end, so that the control circuit adjusts the waveform generating circuit according to the control signal, so that the voltage signal output by the waveform generating circuit has preset waveform parameters.

[0057] The following will be combined Figures 1 to 3 , the surge current generating device provided in the embodiment of the present application is specifically described.

[0058] like Figure 1 and Figure 2As shown, the surge current generating device includes an IGBT module 10, a first driving module 20, a charging and discharging module 30 and a surge current output terminal 40. The first driving module 20 is electrically connected to the gate G1 and the emitter E of the IGBT module 10 respectively, the charging and discharging module 30 is electrically connected to the collector C of the IGBT module 10, and the surge current output terminal 40 is electrically connected to the emitter E of the IGBT module 10. The charging and discharging module 30 includes a voltage source 31, a capacitor module 32 and a switch module. The capacitor module 32 is connected in parallel with the voltage source 31, and one end of the capacitor module 32 is electrically connected to the collector C of the IGBT module 10, and the other end is grounded. The switch module is electrically connected to the voltage source 31 and the capacitor module 32 respectively, and the switch module includes a first switch component 301, a second switch component 302 and a third switch component 303. The charging and discharging module also includes a charging resistor 34 and a discharging resistor 35.

[0059] The surge current output terminal in the surge current generating device is electrically connected to the source of the NMOS device. After the electrical connection, the circuit structure of the surge current generating device and the power device is as follows: Figure 3 As shown, Figure 2 The first switch component 301, the second switch component 302 and the third switch component 303 are respectively Figure 3 The first switch assembly K1, the second switch assembly K2 and the third switch assembly K3, the above Figure 2 The charging resistor 34 and the discharging resistor 35 are Figure 3 The discharge resistor R1 and the charging resistor R2 in the above Figure 2 The capacitor module 32 has Figure 3 The first driving module 20 is electrically connected to the gate G and the emitter E of the IGBT module 10 through the driving input control terminal 11.

[0060] The above-mentioned first switch component K1 is electrically connected to the output end of the voltage source and the first end of the capacitor C2 in the capacitor module, respectively, the second switch component K2 is electrically connected to the first end and the second end of the capacitor C2, respectively, the third switch component K3 is electrically connected to the first end of the capacitor C2 and the collector C of the IGBT module 10, the charging resistor R2 is electrically connected between the first switch component K1 and the first end of the capacitor C2; the discharge resistor R1 is electrically connected between the output end of the charging resistor R2 and the second switch component K2.

[0061] After the surge current output terminal in the surge current generating device is connected to the source S of the NMOS device, the following test steps are performed:

[0062] S1: Before the surge test of the MOSFET device begins, the first switch component K1, the second switch component K2 and the third switch component K3 are all controlled to be in the disconnected state, the surge current output terminal is electrically connected to the MOSFET to be tested, the voltage source is turned on, and the input voltage V is set. DC , control the first switch component K1 to close, and charge the capacitor C2;

[0063] S2: After the capacitor C2 is charged for 1s-2s, the first switch component K1 is disconnected and the third switch component K3 is closed;

[0064] S3: pre-debugging the driving voltage of the IGBT module, including the amplitude and waveform of the driving voltage, so as to form a data table between the waveform parameters of the driving voltage of the IGBT module and the waveform parameters of the output current;

[0065] S4: Refer to the data table, select the driving mode of the IGBT module, set the driving parameter value on the driving panel of the IGBT module, change the driving state of the IGBT module from the negative voltage off state to the on state, and provide a sinusoidal half-wave voltage with the required amplitude and pulse time to the input through the driving setting;

[0066] S5: According to the transfer characteristic curve of the IGBT module, the IGBT module outputs the required quasi-sinusoidal half-wave current to the MOSFET.

[0067] In order to achieve the above object, according to an embodiment of the present application, a surge assessment system for a power device is provided, such as Figure 7 and Figure 8 As shown, it includes the surge current generating device 100, the power device 200 and the second driving module 50 in the above embodiment, wherein: the second driving module 50 is electrically connected to the power device 200, and is used to control the conduction and cutoff of the power device 200 or the parasitic diode in the power device 200; the emitter E of the IGBT module 10 in the surge current generating device is electrically connected to the power device 200.

[0068] In the above-mentioned embodiment of the present application, the first driving module 20 in the surge current generating device can provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module 10, so that the IGBT module 10 outputs a surge current when it is on. Therefore, when the charging and discharging module in the current generating device supplies power to the collector of the IGBT module 10, the surge current test of the power device 200 can be performed through the surge current generated by the emitter E of the IGBT module 10.

[0069] Therefore, by using the above-mentioned surge assessment system of the present application, the IGBT module driving part can be designed and the transfer characteristic curve can be used to controllably generate a surge current waveform with adjustable amplitude and adjustable pulse duration, so that the test results can be more in line with the actual operating conditions and accurate surge assessment of MOSFET devices can be achieved; and, when in the continuous generation mode, the above-mentioned surge current generating device is also convenient for automatic counting and has the characteristics of strong flexibility.

[0070] In the above-mentioned surge assessment system of the embodiment of the present application, the surge assessment system also includes a test circuit board and a surge current input terminal located on the test circuit board, the surge current input terminal is electrically connected to the emitter of the IGBT module, and there may be multiple power devices, and the multiple power devices are electrically connected to the surge current input terminal through a transmission line on the test circuit board. Since in actual applications, multiple chips are often connected in parallel to increase the rated current capacity and meet industrial needs, the above-mentioned surge assessment system of the embodiment of the present application can realize surge current testing of multiple power devices, so that the test results can be more in line with the actual working conditions, and then more optimize the reasonable packaging layout, providing reference for module integration.

[0071] In the case where the MOSFET device in the surge assessment system is electrically connected to a plurality of power devices, each power device may be independently selected from any one of an NMOS device and a PMOS device.

[0072] Specifically, the surge assessment system provided in the embodiment of the present application can be as follows: Figure 8 As shown, the surge current output terminal 40 is electrically connected to the surge current input terminal 70, and the surge current input terminal 70 is electrically connected to the first power device 201, the second power device 202, the third power device 203 and the fourth power device 204, respectively, for outputting surge current to each power device, respectively. Taking the power device as an NMOS device as an example, the above-mentioned second driving module is electrically connected to the gate and source of the NMOS device, respectively, for providing a turn-on voltage, and the drain of the NMOS device is electrically connected to the ground terminal 80. Figure 8 Other structures in Figure 2 As shown, no further description is given here.

[0073] like Figure 8 As shown, an embodiment of the present application provides a surge evaluation system with four chips connected in parallel. The parasitic parameters of the driving branches of the four chips are adjustable and can be set to be symmetrical in pairs, which can provide the most practical guidance for future modular packaging.

[0074] It should be noted that the surge evaluation system is not limited to including the above four devices under test, and the embodiment of the present application does not specifically limit the number of devices under test electrically connected to the surge current output terminal.

[0075] The surge assessment system of the present application is described below by taking an NMOS device as an example.

[0076] like Figure 7 and Figure 8 As shown, the surge assessment system includes a surge current generating device 100, a power device 200 and a second driving module 50, the second driving module 50 is electrically connected to the power device 200, the emitter E of the IGBT module 10 in the surge current generating device is electrically connected to the power device 200, the surge current generating device 100 includes an IGBT module 10, a first driving module 20, a charging and discharging module 30 and a surge current output terminal 40, the first driving module 20 is electrically connected to the gate G1 and the emitter E of the IGBT module 10 respectively, the charging and discharging module 30 is electrically connected to the gate G1 and the emitter E of the IGBT module 10 The collector C is electrically connected, the surge current output terminal 40 is electrically connected to the emitter E of the IGBT module 10, the charging and discharging module 30 includes a voltage source 31, a capacitor module 32 and a switch module, the capacitor module 32 is connected in parallel with the voltage source 31, and one end of the capacitor module 32 is electrically connected to the collector C of the IGBT module 10, and the other end is grounded, the switch module is electrically connected to the voltage source 31 and the capacitor module 32 respectively, and the switch module includes a first switch component 301, a second switch component 302 and a third switch component 303, and the charging and discharging module also includes a charging resistor 34 and a discharging resistor 35.

[0077] The surge current output terminal in the surge current generating device is electrically connected to the source of the NMOS device. After the electrical connection, the circuit structure of the surge current generating device and the power device is as follows: Figure 3 As shown, Figure 8 The first switch component 301, the second switch component 302 and the third switch component 303 are respectively Figure 3 The first switch assembly K1, the second switch assembly K2 and the third switch assembly K3, the above Figure 8 The charging resistor 34 and the discharging resistor 35 are Figure 3 The discharge resistor R1 and the charging resistor R2 in the above Figure 8 The capacitor module 32 has Figure 3 Capacitor C2 in.

[0078] The above-mentioned first switch component K1 is electrically connected to the output end of the voltage source and the first end of the capacitor C2 in the capacitor module, respectively, the second switch component K2 is electrically connected to the first end and the second end of the capacitor C2, respectively, the third switch component K3 is electrically connected to the first end of the capacitor C2 and the collector C of the IGBT module 10, the charging resistor R2 is electrically connected between the first switch component K1 and the first end of the capacitor C2; the discharge resistor R1 is electrically connected between the output end of the charging resistor R2 and the second switch component K2.

[0079] The following test steps are performed using the above surge evaluation system:

[0080] S10: Before the surge test of the MOSFET device begins, the first switch component K1, the second switch component K2 and the third switch component K3 are all controlled to be in the disconnected state, the surge current output terminal is electrically connected to the MOSFET to be tested, the voltage source is turned on, and the input voltage V is set. DC , control the first switch component K1 to close, and charge the capacitor C2;

[0081] S20: After the capacitor C2 is charged for 1s-2s, the first switch component K1 is disconnected and the third switch component K3 is closed;

[0082] S30: pre-debugging the driving voltage of the IGBT module, including the amplitude and waveform of the driving voltage, so as to form a data table between the waveform parameters of the driving voltage of the IGBT module and the waveform parameters of the output current;

[0083] S40: referring to the data table, selecting the driving mode of the IGBT module, setting the driving parameter value on the driving panel of the IGBT module, changing the driving state of the IGBT module from the negative voltage off state to the on state, and providing a sinusoidal half-wave voltage of the required amplitude and pulse time to the input through the setting of the driving;

[0084] S50: According to the transfer characteristic curve of the IGBT module, the IGBT module is caused to output the required quasi-sine half-wave current to the MOSFET.

[0085] According to yet another embodiment of the present application, a surge assessment method for a power device is provided.

[0086] The method embodiments provided in the embodiments of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Taking running on a mobile terminal as an example, Fig. 9 FIG. 1 is a hardware structure block diagram of a mobile terminal of a method for evaluating surge of a power device according to an embodiment of the present invention. Fig. 9 As shown, the mobile terminal may include one or more ( Fig. 9 Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the mobile terminal may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Fig. 9 The structure shown is only for illustration and does not limit the structure of the mobile terminal. Fig. 9 More or fewer components as shown, or with Fig. 9 Different configurations are shown.

[0087] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the display method of device information in the embodiment of the present invention. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, the above method is implemented. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories can be connected to the mobile terminal via a network. Examples of the above-mentioned network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof. The transmission device 106 is used to receive or send data via a network. The above-mentioned specific examples of the network may include a wireless network provided by a communication provider of the mobile terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0088] In this embodiment, a surge assessment method for a power device running on a mobile terminal, a computer terminal or a similar computing device is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0089] Fig.10 FIG. 1 is a flow chart of a method for evaluating a surge in a power device according to an embodiment of the present application. Fig.10 As shown, using the surge assessment system for a power device in the above embodiment, the method includes the following steps:

[0090] Step S101, controlling the charging and discharging module in the surge current generating device to supply power to the collector of the IGBT module;

[0091] Step S102, controlling the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and controlling the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs surge current to the power device.

[0092] In the above-mentioned embodiment of the present application, since the first driving module is controlled to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, so that the IGBT module outputs a surge current when it is on. Therefore, when the charging and discharging module is controlled to supply power to the collector of the IGBT module, by electrically connecting the surge current output terminal electrically connected to the emitter of the IGBT module to the power device to be tested, the surge current test of the above-mentioned power device can be performed through the surge current generated by the emitter of the IGBT module.

[0093] Therefore, by adopting the surge assessment method of the power device mentioned above, the waveform parameters of the driving voltage of the IGBT module can be pre-debugged, such as the amplitude and period of the driving voltage, and the transfer characteristic curve can be used to controllably generate a surge current waveform with adjustable amplitude and adjustable pulse duration, so that the test results can be more in line with the actual operating conditions, thereby achieving accurate surge assessment of the MOSFET device; and, when in the continuous generation mode, the above-mentioned surge current generating device is also convenient for automatic counting and has the characteristics of strong flexibility.

[0094] For example, Figure 3 As shown, the charging and discharging module in the surge assessment system includes a voltage source 31, a capacitor module, a first switch component K1, a second switch component K2, a third switch component K3, a discharge resistor R1 and a charging resistor R2. The above-mentioned first switch component K1 is electrically connected to the output end of the voltage source and the first end of the capacitor C2 in the capacitor module, respectively, the second switch component K2 is electrically connected to the first end and the second end of the capacitor C2, respectively, the third switch component K3 is electrically connected to the first end of the capacitor C2 and the collector C of the IGBT module 10, and the charging resistor R2 is electrically connected between the first switch component K1 and the first end of the capacitor C2; the discharge resistor R1 is electrically connected between the output end of the charging resistor R2 and the second switch component K2.

[0095] In some optional embodiments, the above Figure 3 The surge assessment system shown in the figure controls the charging and discharging module in the surge current generating device to supply power to the collector of the IGBT module, including: sending a first control signal to the first switch component K1 to close the first switch component K1, and conducting the voltage source 31 with the capacitor C2 in the capacitor module; sending a second control signal to the second switch component K2 and the third switch component K3 to disconnect the second switch component K2 and close the third switch component K3, and conducting the capacitor C2 with the IGBT module 10 to supply power to the collector C of the IGBT module 10.

[0096] In some optional embodiments, the first driving module in the surge current generating device is controlled to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, including: receiving a target instruction, wherein the target instruction has the waveform parameters of the target surge current; determining the waveform parameters of the target sinusoidal half-wave voltage corresponding to the waveform parameters of the target surge current according to the target instruction and a preset relationship, wherein the preset relationship is used to characterize the correspondence between the waveform parameters of the surge current and the waveform parameters of the sinusoidal half-wave voltage; controlling the first driving module in the surge current generating device to provide the target sinusoidal half-wave voltage to the gate of the IGBT module, so that the IGBT module outputs the target surge current.

[0097] In the above optional implementation manner, a preset database can be established based on multiple first waveform parameters and multiple second waveform parameters, the multiple first waveform parameters are waveform parameters of multiple sinusoidal half-wave voltages, and the second waveform parameters are waveform parameters of the output current of the IGBT module input with a sinusoidal half-wave voltage. At this time, the waveform parameters of the target sinusoidal half-wave voltage corresponding to the waveform parameters of the target surge current are determined according to the target instructions and the preset relationship, including: determining the waveform parameters of the target sinusoidal half-wave voltage from the waveform parameters of multiple sinusoidal half-wave voltages according to the target instructions and the preset database.

[0098] Specifically, the waveform parameters of multiple sinusoidal half-wave voltages (i.e., first waveform parameters) can be obtained in advance, as well as the waveform parameters of the current corresponding to the output of the IGBT module (i.e., second waveform parameters) after the historical waveform parameters of the above-mentioned multiple sinusoidal half-wave voltages are input into the IGBT module. Then, a database is established with the above-mentioned first waveform parameters and the above-mentioned second waveform parameters, so that the database stores the waveform parameters of multiple sinusoidal half-wave voltages, the waveform parameters of multiple currents, and the corresponding relationship between the waveform parameters of each sinusoidal half-wave voltage and the waveform parameters of the corresponding current. Therefore, after parsing the target instruction and obtaining the waveform parameters of the target surge current to be generated, a search can be performed from the above-mentioned database to obtain the waveform parameters of the sinusoidal half-wave voltage corresponding to the waveform parameters of the target surge current, thereby providing the IGBT module with a sinusoidal half-wave voltage corresponding to the surge current with the required amplitude and pulse time.

[0099] Therefore, by adopting the above-mentioned surge assessment method of the embodiment of the present application, the waveform parameters of the driving voltage of the IGBT module can be pre-adjusted to generate a pulse current waveform with an arbitrarily adjustable amplitude within kiloamperes, a single or continuous and countable pulse current waveform can be generated, and the time scale of the current pulse waveform can be adjusted, ranging from microseconds (μs) to milliseconds (ms) level.

[0100] Exemplarily, the driving voltage of the IGBT module is pre-debugged, including the amplitude and period of the driving voltage corresponding to various driving modes of the IGBT module, and a data table of the corresponding relationship between the waveform parameters of the driving voltage of the IGBT module and the waveform parameters of the output current is formed, and pre-stored as a database, and then after receiving the target instruction, the above database is searched, and the driving mode of the IGBT module is selected by comparing with the data table, and the driving parameter value is set on the driving panel of the IGBT module, so that the driving of the IGBT module changes from the negative voltage off state to the on state, and through the setting of the drive, a sinusoidal half-wave voltage V with the required amplitude and pulse time is provided to the input. GE , thus outputting the required pulse waveform surge current i according to the transfer characteristic curve of the IGBT module, such as Fig.11 As shown, the peak current of the surge current i is i1, and the half-sine wave voltage V GE The peak of the surge current i and the peak of the surge current i both correspond to the time period T1, and there is a time period T2 between the time periods T1, wherein T1 can be 50 -20ms, T2 can be a single or repeated surge current of 300ms-1s. The above range can support more driving modes of IGBT modules, so that operators can select the driving mode of IGBT modules according to actual needs, and can realize surge testing of power devices such as SiC MOSFET in different application scenarios, so that the test results can be more in line with the actual working conditions, which is conducive to studying the degradation characteristics and failure characteristics of power devices under different working conditions.

[0101] The embodiment of the present application also provides a surge assessment device for a power device. It should be noted that the surge assessment device for a power device in the embodiment of the present application can be used to execute the surge assessment method for a power device provided in the embodiment of the present application. The device is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware for a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceived.

[0102] The following is an introduction to the surge assessment device for a power device provided in an embodiment of the present application.

[0103] Fig.12 Schematic diagram of a surge assessment device for a power device according to an embodiment of the present application. Fig.12 As shown, a surge assessment system for a power device in the above embodiment is used, and the device comprises:

[0104] A first control module 300, used to control the charge and discharge module in the surge current generating device to supply power to the collector of the IGBT module;

[0105] The second control module 400 is used to control the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and control the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs surge current to the power device.

[0106] In some optional embodiments, the charging and discharging module includes a voltage source, a capacitor module, a first switch component, a second switch component, a third switch component, a charging resistor and a discharging resistor. The first switch component is electrically connected to the output end of the voltage source and the first end of the capacitor module, respectively, the second switch component is electrically connected to the first end and the second end of the capacitor module, respectively, and the third switch component is electrically connected to the first end of the capacitor module and the collector of the IGBT module, respectively. The charging and discharging module in the surge current generating device is controlled to supply power to the collector of the IGBT module. The first control module 300 includes: a first sending submodule, which is used to send a first control signal to the first switch component K1 to close the first switch component K1, and the voltage source 31 is turned on with the capacitor C2 in the capacitor module; a second sending submodule, which is used to send a second control signal to the second switch component K2 and the third switch component K3 to disconnect the second switch component K2 and close the third switch component K3, and the capacitor C2 is turned on with the IGBT module 10 to supply power to the collector C of the IGBT module 10.

[0107] In some optional embodiments, the second control module 400 includes: a receiving submodule for receiving a target instruction, wherein the target instruction has a target waveform parameter; a determining submodule for determining a sinusoidal half-wave voltage waveform corresponding to the target waveform parameter from a preset database according to the target instruction, wherein the preset database includes a correspondence between multiple pulse current waveforms and multiple sinusoidal half-wave voltage waveforms, and the multiple pulse current waveforms include the target waveform parameters; a controlling submodule for controlling the first driving module in the surge current generating device to provide a sinusoidal half-wave voltage signal to the gate of the IGBT module so that the IGBT module outputs a surge current with a pulse waveform, wherein the sinusoidal half-wave voltage signal is used to reflect the sinusoidal half-wave voltage waveform corresponding to the target waveform parameters.

[0108] The surge assessment device for a power device includes a processor and a memory. The first control module 300 and the second control module 400 are stored in the memory as program units, and the processor executes the program units stored in the memory to implement corresponding functions. The modules are all located in the same processor; or, the modules are located in different processors in any combination.

[0109] The processor includes a core, which calls the corresponding program unit from the memory. One or more cores can be set, and accurate surge evaluation of MOSFET devices can be achieved by adjusting core parameters.

[0110] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM, and the memory includes at least one memory chip.

[0111] An embodiment of the present invention provides a computer-readable storage medium, which includes a stored program. When the program is executed, the device where the computer-readable storage medium is located is controlled to execute the surge assessment method for a power device in the above embodiment.

[0112] An embodiment of the present invention provides an electronic device, the device includes a processor, a memory, and a program stored in the memory and can be run on the processor, and the processor implements at least the following steps when executing the program: controlling the charging and discharging module in the surge current generating device to supply power to the collector of the IGBT module; controlling the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and controlling the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs surge current to the power device. The electronic device in this article can be a server, PC, PAD, mobile phone, etc.

[0113] The present application also provides a computer program product, which, when executed on a data processing device, is suitable for executing a program that is initialized with at least the following method steps: controlling the charging and discharging module in the surge current generating device to supply power to the collector of the IGBT module; controlling the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and controlling the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs surge current to the power device.

[0114] Obviously, those skilled in the art should understand that the above modules or steps of the present invention can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order than here, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present invention is not limited to any specific combination of hardware and software.

[0115] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0116] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0117] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0118] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0119] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0120] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0121] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0122] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0123] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0124] 1) By using the above-mentioned surge current generating device of the present application, the waveform parameters of the driving voltage of the IGBT module can be pre-adjusted. The preset waveform parameters are used to characterize the waveform of the driving voltage signal as a half-sine wave waveform, and the transfer characteristic curve is used to controllably generate a surge current with a quasi-half-sine wave waveform, and the surge current waveform amplitude and pulse duration are adjustable, so that the test results can be more in line with the actual working conditions, and accurate surge evaluation of MOSFET devices is achieved;

[0125] 2) In practical applications, multiple chips are often connected in parallel to increase the rated current capacity to meet industrial needs. The surge assessment system of the embodiment of the present application can realize surge current testing of multiple power devices, so that the test results can be more in line with the actual working conditions, thereby further optimizing the reasonable packaging layout and providing reference for module integration.

[0126] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A surge current generating device, characterized in that: include: IGBT modules; A first driving module, electrically connected to the gate and emitter of the IGBT module, respectively, for providing a driving voltage signal with preset waveform parameters to the gate of the IGBT module, so that the IGBT module outputs a surge current when it is turned on, wherein the preset waveform parameters are used to characterize that the waveform of the driving voltage signal is a half-sine wave waveform; A charge and discharge module, electrically connected to the collector of the IGBT module, and used to supply power to the collector of the IGBT module; The surge current output terminal is electrically connected to the emitter of the IGBT module and is used to perform a surge current test on the power device when electrically connected to the power device.

2. The surge current generating device according to claim 1, characterized in that: The first driving module comprises: A waveform generating circuit, used for generating a voltage signal having a waveform of a half-sine wave; A control circuit, wherein the input end of the control circuit receives a control signal, and the output end of the control circuit is electrically connected to the waveform generating circuit, and is used to adjust the waveform generating circuit according to the control signal so that the voltage signal output by the waveform generating circuit has the preset waveform parameters.

3. The surge current generating device according to claim 2, characterized in that: The first driving module further includes: The isolation amplifier circuit is electrically connected to the output end of the waveform generating circuit and the gate of the IGBT module respectively, and is used to amplify the driving voltage signal.

4. The surge current generating device according to claim 1, characterized in that: The charging and discharging module comprises: Voltage source; A capacitor module is connected in parallel with the voltage source, one end of the capacitor module is electrically connected to the collector of the IGBT module, and the other end is grounded; a switch module, electrically connected to the voltage source and the capacitor module respectively, and used for switching the charging and discharging of the capacitor module; The first control module is electrically connected to the switch module and is used to control the opening and closing of the switch module to control the charging and discharging of the capacitor module.

5. A surge assessment system for a power device, characterized in that: The invention comprises a surge current generating device, a power device and a second driving module according to any one of claims 1 to 4, wherein: The second driving module is electrically connected to the power device and is used to control the conduction and cutoff of the power device or a parasitic diode in the power device; The emitter of the IGBT module in the surge current generating device is electrically connected to the power device.

6. The surge assessment system according to claim 5, characterized in that The surge assessment system further includes a surge current input terminal, and the power device is multiple, wherein: At least one of the power devices is an NMOS device, and the surge current input terminal is electrically connected to a source of each of the power devices; At least one of the power devices is a PMOS device, and the surge current input terminal is electrically connected to a drain of each of the power devices.

7. The surge assessment system according to claim 5, characterized in that: The surge evaluation system also has a test circuit board, on which the surge current input terminal is provided. The surge current input terminal is electrically connected to the emitter of the IGBT module, and a plurality of the power devices are electrically connected to the surge current input terminal on the test circuit board via a transmission line.

8. A method for evaluating surge of a power device, characterized in that: A surge assessment system for a power device according to any one of claims 5 to 7, wherein the surge assessment system comprises a surge current generating device, a power device and a second driving module, and the method comprises: Controlling the charging and discharging module in the surge current generating device to supply power to the collector of the IGBT module; The first driving module in the surge current generating device is controlled to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and the second driving module is controlled to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs surge current to the power device.

9. The surge assessment method according to claim 8, characterized in that: The controlling the first driving module in the surge current generating device to provide a driving voltage signal having a preset waveform parameter to the gate of the IGBT module comprises: receiving a target instruction, wherein the target instruction has a waveform parameter of a target surge current; Determining the waveform parameters of the target half-sine wave voltage corresponding to the waveform parameters of the target surge current according to the target instruction and the preset relationship, wherein the preset relationship is used to characterize the corresponding relationship between the waveform parameters of the surge current and the waveform parameters of the half-sine wave voltage; The first driving module in the surge current generating device is controlled to provide the target sinusoidal half-wave voltage to the gate of the IGBT module, so that the IGBT module outputs the target surge current.

10. The surge assessment method according to claim 9, characterized in that: Also includes: A preset database is established according to a plurality of first waveform parameters and a plurality of second waveform parameters, wherein the plurality of first waveform parameters are waveform parameters of a plurality of half-sine wave voltages, and the second waveform parameters are waveform parameters of the output current of the IGBT module input with the half-sine wave voltage, The step of determining the waveform parameters of the target half-sine wave voltage corresponding to the waveform parameters of the target surge current according to the target instruction and the preset relationship includes: According to the target instruction and the preset database, the waveform parameters of the target half-sine wave voltage are determined from the waveform parameters of the plurality of half-sine wave voltages.

11. A surge assessment device for a power device, characterized in that: A surge assessment system for a power device according to any one of claims 5 to 7, wherein the surge assessment system comprises a surge current generating device, a power device and a second driving module, and the device comprises: A first control module, used for controlling the charging and discharging module in the surge current generating device to supply power to the collector of the IGBT module; The second control module is used to control the first driving module in the surge current generating device to provide a driving voltage signal with preset waveform parameters to the gate of the IGBT module, and control the second driving module to turn on the power device or the parasitic diode in the power device, so that the IGBT module is turned on and outputs surge current to the power device.

12. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes a stored program, wherein when the program is executed, the device where the computer-readable storage medium is located is controlled to execute the surge evaluation method for a power device according to any one of claims 8 to 10.

13. An electronic device, characterized in that: include: One or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and are configured to be executed by the one or more processors, and the one or more programs include a method for executing a surge assessment method for a power device as described in any one of claims 8 to 10.

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