Bridging device with data monitoring function and USB / UART (Universal Serial Bus / Universal Asynchronous Receiver / Transmitter) conversion device with bridging device

By designing a bridge device in the USB/UART conversion device and providing a virtual communication port for data shunting and monitoring, the problem of incorrect data transmission and baud rate synchronization in the prior art is solved, and the reliability and flexibility of data transmission are realized .

CN119149462APending Publication Date: 2024-12-17PROLIFIC TECH INC
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Patent Information

Application Number
CN202310701827.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-06-14
Publication Date
2024-12-17

AI Technical Summary

Technical Problem

The existing USB/UART conversion device may cause incorrect data transmission when the serial data baud rate is not determined, and it is necessary to ensure that the baud rate of the UART electrical connector is synchronized with the signal for data monitoring.

Method used

Design a bridge device, which is connected to the main computer and the UART interface to the external electronic device through the USB interface, provides at least 3 groups of virtual communication ports, allowing the main computer to use one group for data transmission, and realize data diversion through the other two groups and Listen to ensure the correctness of data transmission without ensuring that the UART baud rate is synchronized with the signal.

Benefits of technology

The data monitoring and transmission accuracy in the case of uncertain UART baud rate is achieved, the baud rate synchronization problem is avoided, the data transmission reliability is improved, and additional data is allowed to be integrated in the data transmission.

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Abstract

The invention mainly discloses a bridging device with a data monitoring function and a USB / UART (Universal Serial Bus / Universal Asynchronous Receiver / Transmitter) conversion device with the bridging device, the bridging device can be arranged on a circuit board in an integrated circuit (IC) chip mode, and the bridging device, a USB electric connector and a UART electric connector which are arranged on the circuit board form the USB / UART conversion device. When the bridging device is used, the USB electric connector is electrically connected to a main control computer, the UART electric connector is electrically connected to an external electronic device, and at the moment, the bridging device provides at least three groups of virtual COM ports for the main control computer, so that the main control computer can perform data transmission with the external electronic device by utilizing one group of virtual communication ports. In addition, when data transmission operation and data receiving operation are carried out, the main control computer can also utilize the other two groups of virtual communication ports to realize data distribution and monitor the distributed data.
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Description

Technical Field

[0001] The present invention relates to the technical field of USB-to-UART conversion devices, and more particularly to a bridge chip that can provide a host computer with at least three groups of virtual communication ports (Virtual COM ports), so that the host computer can use one group of virtual communication ports to transmit data with an external electronic device, and can also use the other two groups of virtual communication ports to achieve data diversion and data monitoring. Background Art

[0002] Due to the simple and direct transmission protocol, the universal asynchronous receiver / transmitter (UART) interface was widely used in early industrial control. RS232 electrical connectors, RS422 electrical connectors, and RS485 electrical connectors are commonly used UART interfaces. In addition, early personal computers were also equipped with RS232 electrical connectors for asynchronous data transmission with modems. However, due to the increasingly faster data transmission rate of the universal serial bus (USB) interface and its plug-and-play characteristics, the USB interface has gradually become a data transmission bridge between electronic devices such as personal hosts and notebook computers and external electronic devices.

[0003] However, since the communication distance of the USB interface is relatively short, it is not suitable for industrial control applications that require long-distance data transmission. Although the prior art can replace the USB interface with an Ethernet interface or a wireless network interface for long-distance data transmission, the Ethernet interface and the wireless network interface have the disadvantage of being too expensive. Therefore, the manufacturer of USB devices has developed a USB / UART conversion device, also known as a USB / UART bridge. Figure 1 , Figure 2 The first and second stereograms of a conventional USB / UART conversion device are shown. Figure 1 and Figure 2 As shown, the conventional USB / UART conversion device 1a includes: a USB interface 11a for coupling to a computer host 2a, a UART interface 12a ( Figure 2 Currently, famous commercial bridge chips 13a include FTDI-232 launched by Future Technology Devices International (FTDI) Ltd. of the United Kingdom and PL-2303 launched by Prolific Technology Inc. of Taiwan, China.

[0004] In some industrial control applications, it is necessary to perform data monitoring on the transmitted data to ensure the correctness of the data. Therefore, Chinese Patent No. CN101101567B discloses a dual serial port communication monitoring system, wherein the serial port communication refers to serial data transmission, which can also be called serial communication or sequence communication. Figure 3 FIG. 1 is a block diagram of a conventional dual serial communication monitoring system. Figure 3 As shown, the dual serial communication monitoring system 1b is coupled between a first electronic device 2b having a first RS232 interface 21b and a second electronic device 3b having a second RS232 interface 31b, and includes: a first USB / RS232 conversion device 11b, a second USB / RS232 conversion device 12b, a USB hub chip 13b, and a host computer 10b. In more detail, the first RS232 interface 21b transmits the first serial data to the signal receiving end (Rx) of the second RS232 interface 31b through its signal transmission end (Tx), and the second RS232 interface 31b transmits the second serial data to the signal receiving end (Rx) of the first RS232 interface 21b through its signal transmission end (Tx).

[0005] like Figure 3 As shown, the first USB / RS232 conversion device 11b is coupled to the first RS232 interface 21b to receive the first serial data, and convert the first serial data into a first USB data, so as to transmit the first USB data to the host computer 10b. On the other hand, the second USB / RS232 conversion device 12b is coupled to the second RS232 interface 31b to receive the second serial data, and convert the second serial data into a second USB data, so as to transmit the second USB data to the host computer 10b.

[0006] Figure 3 The dual serial communication monitoring system 1b shown can indeed be used to monitor the transmission data. However, the dual serial communication monitoring system 1b exhibits the following major disadvantages in actual use: when the baud rate of the first serial data is uncertain, the first USB data generated by the first USB / RS232 conversion device 11b based on the first serial data may be incorrect.

[0007] In summary, it can be seen that the existing USB / UART conversion device has practical defects that need to be improved. Therefore, the inventor of this case has made great efforts to study and invent, and finally developed a bridge device with data monitoring function and a USB / UART conversion device having the bridge device of the present invention. Summary of the invention

[0008] The main purpose of the present invention is to provide a bridge device with data monitoring function, which can be arranged on a circuit board in the form of an integrated circuit (IC) chip, and together with a USB electrical connector and a UART electrical connector arranged on the circuit board, form a USB / UART conversion device. When in use, the USB electrical connector is electrically connected to a host computer, and the UART electrical connector is electrically connected to an external electronic device. At this time, the bridge device will provide the host computer with at least 3 groups of virtual communication ports (Virtual COM port), so that the host computer can use 1 group of virtual communication ports and external electronic devices for data transmission. In addition, when performing data transmission operations and data receiving operations, the host computer can also use the other 2 groups of virtual communication ports to realize data diversion, thereby monitoring the diverted data to ensure the correctness of data transmission.

[0009] More importantly, when a master electronic device transmits data with an electronic device through the bridge device of the present invention, the master electronic device can ensure the correctness of data monitoring and intervention correction data without ensuring the baud rate of the UART electrical connector, because data monitoring is obtained at the data end after decoding and intervention correction data is performed before data encoding, both of which are not performed at the control end of the UART electrical connector. Therefore, it is not necessary to worry about whether the UART baud rate is synchronized with the original signal. In addition, the bridge device of the present invention can also adjust the baud rate of the UART electrical connector.

[0010] In addition, when the host electronic device uses a group of virtual communication ports to transmit data with the electronic device, the host electronic device can use one of the remaining groups of virtual communication ports to integrate additional data into the data being transmitted.

[0011] To achieve the above object, the present invention proposes an embodiment of the bridging device, which includes:

[0012] A USB data transmission unit, coupled to a USB interface, so as to communicate with a main control electronic device through the USB interface;

[0013] a UART data transmission unit, for coupling to a UART interface, so as to communicate with an electronic device through the UART interface;

[0014] At least three interface units, all coupled to the USB data transmission unit, and including a first interface unit, a second interface unit and a third interface unit;

[0015] At least three data cache units, including: a first data cache unit coupled to the second interface unit, a second data cache unit coupled to the first interface unit, and a third data cache unit coupled to the third interface unit;

[0016] a data distribution unit, coupled to the first data cache unit, the second data cache unit, and the third data cache unit;

[0017] a massive buffer unit coupled between the data distribution unit and the UART data transmission unit and having a control buffer; and

[0018] A control endpoint coupled to the control register;

[0019] When the electronic device transmits a first serial data to the UART data transmission unit through the UART interface, the UART data transmission unit receives the first serial data at a first baud rate, and then transmits the first serial data to the second data cache unit and the third data cache unit via the huge buffer unit and the data distribution unit, so that the USB data transmission unit receives the first serial data through the first interface unit and simultaneously receives the first serial data through the third interface unit;

[0020] When the main control electronic device transmits a first USB data to the USB data transmission unit through the USB interface, the USB data transmission unit caches the first USB data in the second data cache unit through the first interface unit, so that the data distribution unit reads the first USB data from the second data cache unit, and then transmits the first USB data to the bulk cache unit, so that the UART data transmission unit can receive the first USB data from the bulk cache unit;

[0021] Before the second data cache unit transmits the first USB data to the data shunt unit, the second data cache unit first shunts and transmits the first USB data to the first data cache unit, so that the USB data transmission unit can receive the first USB data through the second interface unit.

[0022] In one embodiment, during the process of the electronic device transmitting the first serial data to the main control electronic device through the bridge device of the present invention, the main control electronic device is capable of transmitting additional data to the USB data transmission unit, so that the USB data transmission unit incorporates the additional data into the first serial data through the third interface unit, the third data cache unit and the data diversion unit.

[0023] In one embodiment, during the process of the main control electronic device 2 transmitting the first USB data to the electronic device through the bridge device of the present invention, the main control electronic device is capable of transmitting additional data to the USB data transmission unit, so that the USB data transmission unit incorporates the additional data into the first USB data through the second interface unit, the first data cache unit and the data diversion unit.

[0024] In one embodiment, the bridge device is an electronic chip selected from the group consisting of an integrated circuit (IC) chip, a complex programmable logic device (CPLD) chip and a field programmable gate array (FPGA) chip.

[0025] In one embodiment, the USB interface includes a first USB electrical connector, the UART interface includes a first UART electrical connector, and the first UART electrical connector is an electrical connector selected from the group consisting of an RS232 electrical connector, an RS422 electrical connector and an RS485 electrical connector.

[0026] In a feasible embodiment, the aforementioned bridging device of the present invention further includes:

[0027] a memory coupled to the control register; and

[0028] A GPIO unit is coupled to the control register and includes at least one GPIO pin for coupling to the electronic device.

[0029] In one embodiment, the bulk cache unit includes:

[0030] The control register is coupled to the control endpoint, the memory and the GPIO unit;

[0031] A massive output buffer coupled to the data distribution unit and the UART data transmission unit;

[0032] a massive input register coupled to the data distribution unit and the UART data transmission unit; and

[0033] An interrupt input register is coupled to the UART data transmission unit, the first data buffer unit, the second data buffer unit, and the third data buffer unit.

[0034] In one embodiment, the USB data transmission unit comprises:

[0035] A USB physical layer (PHY) unit, for coupling to the USB interface; and

[0036] A USB serial interface engine (SIE) unit is coupled to the USB physical layer unit, the control endpoint, the first interface unit, the second interface unit and the third interface unit.

[0037] In one embodiment, the UART data transmission unit includes:

[0038] A controller, coupled to the interrupt input register and used to couple to the UART interface;

[0039] a data transfer buffer coupled to the controller and the massive output buffer; and

[0040] A data receiving register is coupled to the controller and the massive input register.

[0041] In one embodiment, the data distribution unit includes:

[0042] a first multiplexer having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the first data cache unit, the second input terminal is coupled to the second data cache unit, and the output terminal is coupled to the massive output buffer;

[0043] a second multiplexer having a first input terminal, a second input terminal and an output terminal, wherein the output terminal is coupled to the second data cache unit, the first input terminal is coupled to the huge input register, and the second input terminal is coupled to the third data cache unit;

[0044] The first data cache unit is coupled between the second input terminal of the first multiplexer and the second data cache unit.

[0045] In one embodiment, the first data cache unit includes:

[0046] a first register coupled to the second interface unit and the interrupt input register;

[0047] a second buffer coupled to the second interface unit and the first input end of the first multiplexer; and

[0048] A third buffer is coupled to the second interface unit and is also coupled between the second data buffer unit and the second input terminal of the first multiplexer.

[0049] In one embodiment, the second data cache unit includes:

[0050] a fourth register coupled to the first interface unit and the second input terminal of the first multiplexer, and coupled to the third register;

[0051] a fifth register coupled to the first interface unit and the interrupt input register of the massive cache unit; and

[0052] A sixth buffer is coupled to the first interface unit and the output end of the second multiplexer.

[0053] In one embodiment, the third data cache unit includes:

[0054] a seventh buffer coupled to the third interface unit and the second input end of the second multiplexer;

[0055] an eighth register coupled to the third interface unit and also coupled between the massive input register and the first input terminal of the second multiplexer; and

[0056] A ninth register is coupled to the third interface unit and the interrupt input register.

[0057] In one embodiment, the first interface unit includes:

[0058] A first endpoint, coupling the USB data transmission unit and the fifth buffer;

[0059] a second endpoint, coupling the USB data transmission unit and the fourth register; and

[0060] A third endpoint is coupled to the USB data transmission unit and the sixth register.

[0061] In one embodiment, the second interface unit includes:

[0062] A fourth endpoint, coupling the USB data transmission unit and the first buffer;

[0063] a fifth endpoint, coupling the USB data transmission unit and the second buffer; and

[0064] A sixth terminal is coupled to the USB data transmission unit and the third buffer.

[0065] In one embodiment, the third interface unit includes:

[0066] a seventh endpoint, coupling the USB data transmission unit and the ninth buffer;

[0067] an eighth endpoint, coupling the USB data transmission unit and the seventh register; and

[0068] A ninth terminal is coupled to the USB data transmission unit and the eighth buffer.

[0069] In a feasible embodiment, the main control electronic device is an electronic device selected from the group consisting of a notebook computer, a desktop computer, an all-in-one computer, an industrial computer, and a cloud server.

[0070] In addition, the present invention also discloses a USB / UART conversion device, which includes: a circuit board, a USB electrical connector, a UART electrical connector and the bridge device of the present invention as described above, wherein the USB electrical connector, the UART electrical connector and the bridge device are arranged on the circuit board, and the bridge device couples the USB electrical connector and the UART electrical connector. BRIEF DESCRIPTION OF THE DRAWINGS

[0071] Figure 1 A first stereoscopic diagram of a conventional USB / UART conversion device;

[0072] Figure 2 is a second stereoscopic diagram of a conventional USB / UART conversion device;

[0073] Figure 3 A block diagram of a conventional dual serial communication monitoring system;

[0074] Figure 4 A block diagram of a bridge device with data monitoring function according to the present invention;

[0075] Figure 5 for Figure 4 An exemplary stereoscopic diagram of a main control electronic device, an electronic device and a bridge device of the present invention is shown;

[0076] Figure 6 for Figure 5 A block diagram of the bridging device shown;

[0077] Figure 7 A device manager screen of the operating system of the host electronic device;

[0078] Figure 8 A device manager screen of the operating system of the host electronic device;

[0079] Fig. 9 A device manager screen of the operating system of the host electronic device;

[0080] Fig.10 for Figure 6 The block diagram of the data distribution unit, the first interface unit, the second interface unit, the third interface unit, the first data cache unit, the second data cache unit, and the third data cache unit shown;

[0081] Fig.11 for Figure 6 A block diagram of a USB data transfer unit is shown; and

[0082] Fig.12 for Figure 6 Figure 1 shows the block diagram of the UART data transmission unit.

[0083]

Explanation of symbols

[0084] 1a: USB / UART converter

[0085] 10a: Bridge chip

[0086] 11a: USB interface

[0087] 12a: UART interface

[0088] 2a: Computer host

[0089] 1b: Dual serial communication monitoring system

[0090] 10b: Host computer

[0091] 11b: First USB / RS232 conversion device

[0092] 12b: Second USB / RS232 conversion device

[0093] 13b:USB hub chip

[0094] 2b: First electronic device

[0095] 21b: First RS232 interface

[0096] 3b: Second electronic device

[0097] 31b: Second RS232 interface

[0098] 1: Bridge device

[0099] 1F1: USB interface

[0100] 1F2: UART interface

[0101] 1SB: The first USB electrical connector

[0102] 1ST: First UART electrical connector

[0103] 1SP: Circuit board

[0104] 10: Control endpoint

[0105] 11:USB data transmission unit

[0106] 111:USB physical layer unit

[0107] 112: USB Serial Interface Engine (SIE) unit

[0108] 12: First interface unit

[0109] 121: First endpoint

[0110] 122: Third endpoint

[0111] 123: The third endpoint

[0112] 13: Second interface unit

[0113] 131: The fourth endpoint

[0114] 132: Fifth endpoint

[0115] 133: Sixth endpoint

[0116] 14: The third interface unit

[0117] 141: Seventh endpoint

[0118] 142: Eighth endpoint

[0119] 143: Ninth Endpoint

[0120] 15: First data cache unit

[0121] 151: First Buffer

[0122] 152: Second Buffer

[0123] 153: Third Buffer

[0124] 16: Second data cache unit

[0125] 161: Fourth Buffer

[0126] 162: Fifth Buffer

[0127] 163: Sixth Buffer

[0128] 17: Third data cache unit

[0129] 171: 7th Buffer

[0130] 172: 8th Buffer

[0131] 173: Ninth Cache

[0132] 18: Data diversion unit

[0133] 181: First Multiplexer

[0134] 182: Second multiplexer

[0135] 19:UART data transmission unit

[0136] 190: Controller

[0137] 191: Data transfer buffer

[0138] 192: Data receiving buffer

[0139] 1M: Memory

[0140] 1PI:GPIO unit

[0141] 1MS: Massive Cache Unit

[0142] 1MS1: Control Buffer

[0143] 1MS2: Massive Output Buffer

[0144] 1MS3: Massive Input Buffer

[0145] 1MS4: Interrupt input register

[0146] 2: Main control electronics

[0147] 3: Electronic devices

[0148] 4:USB / UART conversion device DETAILED DESCRIPTION

[0149] In order to more clearly describe the bridge device with data monitoring function and the USB / UART conversion device having the bridge device proposed by the present invention, the preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0150] See also Figure 4 , which is a block diagram of a bridge device with data monitoring function of the present invention. Figure 4 As shown, the bridge device 1 of the present invention communicates with a host electronic device 2 through a USB interface 1F1, and communicates with an electronic device 3 through a UART interface 1F2. Figure 5 for Figure 4 The main control electronic device 2, the electronic device 3 and the exemplary stereogram of the bridge device 1 of the present invention are shown. Figure 4 and Figure 5As shown, in one embodiment, the USB interface 1F1 includes a first USB electrical connector 1SB, and the UART interface 1F2 includes a first UART electrical connector 1ST. It should be understood that the first USB electrical connector 1SB is used to electrically connect to a USB electrical connector of the host electronic device 2, and the first UART electrical connector 1ST is used to electrically connect to a UART electrical connector of the electronic device 3. In other words, Figure 5 As shown, the bridge device 1 of the present invention can be arranged on a circuit board 1SP in the form of an integrated circuit (IC) chip, and together with a first USB electrical connector 1SB and a first UART electrical connector 1ST arranged on the circuit board 1SP, form a USB / UART conversion device 4.

[0151] In a feasible embodiment, the bridge device 1 of the present invention can be implemented by using an FPGA chip or a CPLD chip in conjunction with a hardware description language (HDL). On the other hand, the first UART electrical connector 1ST can be an RS232 electrical connector, an RS422 electrical connector, or an RS485 electrical connector. Furthermore, the main control electronic device 2 can be an electronic device in the group consisting of a notebook computer, a desktop computer, an all-in-one computer, an industrial computer, and a cloud server.

[0152] Figure 6 for Figure 5 The block diagram of the bridge device is shown in FIG. Figure 5 and Figure 6 As shown, the bridge device 1 of the present invention mainly includes: a USB data transmission unit 11, a UART data transmission unit 19, at least three interface units (12, 13, 14), at least three data buffer units (15, 16, 17), a data distribution unit 18, a massive buffer unit 1MS, a control endpoint 10,

[0153] A memory 1M, and a GPIO unit 1PI. According to the design of the present invention, the USB data transmission unit 11 is used to couple a USB interface 1F1, so as to communicate with a host electronic device 2 through the USB interface 1F1. In contrast, the UART data transmission unit 19 is used to couple a UART interface 1F2, so as to communicate with an electronic device 3 through the UART interface 1F2.

[0154] like Figure 5 and Figure 6As shown, the control endpoint (EP0) 10 and the three interface units (12, 13, 14) are all coupled to the USB data transmission unit 11. Electronic engineers who are familiar with the design and manufacture of USB devices must know that a conventional USB device will have at least three endpoints (Endpoint), namely EP0, EP_IN and EP_OUT. Among them, EP0 is used to transmit configuration and control data and list device function descriptions, EP_OUT (i.e., EP1) is used to transmit data from the Host end (such as: the main control electronic device 2) to the Device end (such as: electronic device 3), and EP_IN (i.e., EP2) is used to transmit data from the Device end to the Host end. In a USB device, each Endpoint 1, 2, 3....15 can declare an IN direction or an OUT direction. Unlike conventional USB devices, Figure 6 As shown, in the bridge device 1 of the present invention, each interface unit (12, 13, 14) includes three endpoints, wherein one endpoint is used to transmit data from the Host end (i.e., the main control electronic device 2) to the Device end (i.e., the electronic device 3), and the other two endpoints are used to transmit data from the Device end to the Host end. Since the bridge device 1 of the present invention contains three interface units (12, 13, 14), when the USB data transmission unit 11 is connected to the main control electronic device 2 through the USB interface 1F1, 3 groups of virtual communication ports (Virtual COM port) will be displayed in the device manager of the main control electronic device 2. In this way, the main control electronic device 2 can use 1 group of virtual communication ports to transmit data with the electronic device 3. In addition, when performing data transmission operations and data receiving operations, the main control electronic device 2 can also use the other 2 groups of virtual communication ports to realize data diversion and monitor the diverted data to ensure the correctness of data transmission.

[0155] It is worth noting that a standard CDC-ACM driver can be used as a driver to be embedded in the memory 1M of the bridge device 1. Figure 7As shown, when the standard CDC-ACM driver is used as the driver, after the first USB electrical connector 1SB is connected to the second USB electrical connector 21 of the main control electronic device 2, the bridge device 1 of the present invention will provide the main control electronic device 2 with at least three sets of virtual communication ports (Virtual COM port), so that the main control electronic device 2 can use one set of virtual communication ports to perform data transmission with the external electronic device 3. In addition, when performing data transmission operations and data reception operations, the main control electronic device 2 can also use the other two sets of virtual communication ports to implement data diversion and monitor the diverted data, thereby ensuring the correctness of data transmission.

[0156] In a feasible embodiment, engineers can also edit the driver by themselves. Figure 8 As shown, in the case of using a self-edited driver, after the first USB electrical connector 1SB is connected to the second USB electrical connector 21 of the host electronic device 2, the bridge device 1 of the present invention will also provide the host electronic device 2 with at least three sets of virtual communication ports (Virtual COM port). Figure 7 and Figure 8 It can be found that Figure 7 The device names of the virtual communication ports shown are standard names, and Figure 8 The device name of the virtual communication port shown is a name customized by the engineer. Furthermore, it is also possible to mix and match the self-edited driver and the standard CDC-ACM driver. Fig. 9 As shown, when the self-edited driver and the standard CDC-ACM driver are used in combination, after the first USB electrical connector 1SB is connected to the second USB electrical connector 21 of the main control electronic device 2, the bridge device 1 of the present invention will also provide the main control electronic device 2 with at least 3 sets of virtual communication ports (Virtual COM port).

[0157] like Figure 6 As shown, the three interface units are all coupled to the USB data transmission unit 11, and include a first interface unit 12, a second interface unit 13 and a third interface unit 14. Further, Fig.10 for Figure 6 The block diagram of the data distribution unit, the first interface unit, the second interface unit, the third interface unit, the first data cache unit, the second data cache unit, and the third data cache unit is shown. Fig.10As shown, the first interface unit 12 includes a first terminal 121, a second terminal 122 and a third terminal 123, the second interface unit 13 includes a fourth terminal 131, a fifth terminal 132 and a sixth terminal 133, and the third interface unit 14 includes a seventh terminal 141, an eighth terminal 142 and a ninth terminal 143.

[0158] like Figure 6 As shown, the three data cache units include: a first data cache unit 15 coupled to the second interface unit 13, a second data cache unit 16 coupled to the first interface unit 12, and a third data cache unit 17 coupled to the third interface unit 14. Further, as Fig.10 As shown, the first data cache unit 15 includes: a first buffer (FIFO IN) 151 coupled to the fourth endpoint 131, a second buffer (FIFO OUT) 152 coupled to the fifth endpoint 132, and a third buffer (FIFO IN) 153 coupled to the sixth endpoint 133. It can be seen that the fifth endpoint 132 is EP_OUT, which is used to transmit data from the Host end (such as: the main control electronic device 2) to the Device end (such as: the electronic device 3). In addition, the fourth endpoint 131 and the sixth endpoint 133 are EP_IN, which are used to transmit data from the Device end to the Host end.

[0159] like Fig.10 As shown, the second data cache unit 16 includes: a fourth buffer (FIFO OUT) 161 coupled to the second endpoint 122 of the first interface unit 12 and the third buffer (FIFO IN) 153, a fifth buffer (FIFO IN) 162 coupled to the first endpoint 121 and the massive buffer unit 1MS, and a sixth buffer (FIFO IN) 163 coupled to the third endpoint 123. It can be seen that the second endpoint 122 is EP_OUT, which is used to transmit data from the Host end (such as: the main control electronic device 2) to the Device end (such as: the electronic device 3). In addition, the first endpoint 121 and the third endpoint 123 are EP_IN, which are used to transmit data from the Device end to the Host end.

[0160] On the other hand, the third data buffer unit 17 includes: a seventh buffer (FIFO OUT) 171 coupled to the eighth endpoint 142, an eighth buffer (FIFO IN) 17 coupled to the ninth endpoint 143, and a ninth buffer (FIFO IN) 163 coupled to the seventh endpoint 141. It can be seen that the eighth endpoint 142 is EP_OUT, which is used to transmit data from the Host end (such as: the main control electronic device 2) to the Device end (such as: the electronic device 3). In addition, the seventh endpoint 141 and the ninth endpoint 143 are EP_IN, which are used to transmit data from the Device end to the Host end.

[0161] like Figure 6 and Fig.10 As shown, the data distribution unit 18 is coupled to the first data buffer unit 15, the second data buffer unit 16, and the third data buffer unit 17, and includes: a first multiplexer 181 and a second multiplexer 182. On the other hand, the mass buffer unit 1MS is coupled between the data distribution unit 18 and the UART data transmission unit 19, and has a control buffer 1MS1, a mass output buffer 1MS2, a mass input buffer 1MS3, and an interrupt input buffer 1MS4. According to the design of the present invention, the first multiplexer 181 and the second multiplexer 182 both have a first input terminal, a second input terminal and an output terminal, wherein the first input terminal of the first multiplexer 181 is coupled to the second buffer (FIFO OUT) 152 of the first data cache unit 15, its second input terminal is coupled to the fourth buffer (FIFO OUT) 161 of the second data cache unit 16, and its output terminal is coupled to the massive output buffer 1MS2.

[0162] On the other hand, the first input terminal of the second multiplexer 182 is coupled to the massive input buffer 1MS3, the second input terminal thereof is coupled to the seventh buffer (FIFO OUT) 171 of the third data buffer unit 17, and the output terminal thereof is coupled to the sixth buffer (FIFO IN) 163 of the second data buffer unit 16. It is worth noting that Fig.10 As shown, the first data cache unit 15 is coupled to a common point between the second input terminal of the first multiplexer 181 and the sixth buffer (FIFO IN) 163 by means of its third buffer (FIFO IN) 153. Figure 6 and Fig.10As shown, the control buffer 1MS1 is coupled to the control endpoint (EP0) 10, the memory 1M and the GPIO unit 1PI, and the GPIO unit 1PI includes at least one GPIO pin for coupling the electronic device 3. It should be understood that the configuration and control data can be transmitted between the main control electronic device 2 and the electronic device 3 through the control endpoint 10 and the control buffer (ControlFIFO) 1MS1.

[0163] Continue to read Figure 6 and Fig.10 , and please also refer to Fig.11 , which is Figure 6 The block diagram of the USB data transfer unit is shown in FIG. Fig.12 for Figure 6 The block diagram of the UART data transmission unit is shown in FIG. 1 . In one embodiment, the USB data transmission unit 11 includes a USB physical layer (PHY) unit 111 and a USB serial interface engine (SIE) unit 112, wherein the USB physical layer (PHY) unit 111 is used to couple the USB interface 1F1, and the USB serial interface engine (SIE) unit 112 is coupled to the USB physical layer unit 111, the control endpoint 10, the first interface unit 12, the second interface unit 13, and the third interface unit 14. On the other hand, the UART data transmission unit 19 includes a controller 190, a data transmission buffer 191, and a data reception buffer 192, wherein the controller 190 is coupled to the UART interface 1F2, and the data transmission buffer 191 and the data reception buffer 192 are coupled to the controller 190. Furthermore, the data transmission buffer 191 is coupled to the massive output buffer 11MS2 , the data receiving buffer 192 is coupled to the massive input buffer 11MS3 , and the interrupt input buffer 1MS4 is further coupled to the fifth buffer 162 , the first buffer 151 and the ninth buffer 173 .

[0164] According to this design, when the electronic device 3 transmits a first serial data to the UART data transmission unit 19 through the UART interface 1F2, the UART data transmission unit 19 receives the first serial data at a first baud rate, and then transmits the first serial data to the sixth buffer (FIFO IN) 163 of the second data buffer unit 16 and the eighth buffer (FIFO IN) 172 of the third data buffer unit 17 through the massive buffer unit 1MS and the data diversion unit 18, so that the USB data transmission unit 11 receives the first serial data through the third endpoint 123 of the first interface unit 122, and simultaneously receives the first serial data through the ninth endpoint 143 of the third interface unit 14. In this way, data transmission is achieved using one set of virtual communication ports and the electronic device 3, and another set of virtual communication ports is used to monitor the data being transmitted, thereby ensuring the correctness of data transmission.

[0165] It is worth noting that, during the process of the electronic device 3 transmitting the first serial data to the main electronic device 2 via the bridge device, the main electronic device 2 may transmit an additional data to the USB data transmission unit 11, so that the USB data transmission unit 11 incorporates the additional data into the first serial data via the eighth endpoint 142 of the third interface unit 14, the seventh buffer (FIFO OUT) 171 of the third data buffer unit 17 and the data diversion unit 18.

[0166] On the other hand, when the main control electronic device 2 transmits a first USB data to the USB data transmission unit 11 through the USB interface 1F1, the USB data transmission unit 11 caches the first USB data in the fourth buffer (FIFO OUT) 161 of the second data buffer unit 16 through the second terminal 122 of the first interface unit 12, so that the data shunt unit 18 reads the first USB data from the fourth buffer (FIFO OUT) 161, and then transmits the first USB data to the huge buffer unit 1MS, so that the UART data transmission unit 19 can receive the first USB data from the huge buffer unit 1MS. It is worth noting that before the second data buffer unit 16 transmits the first USB data to the data shunt unit 18, the second data buffer unit 16 first shunts the first USB data to the third buffer (FIFO IN) 153 of the first data buffer unit 15, so that the USB data transmission unit 11 can receive the first USB data through the sixth terminal (EP6) 133 of the second interface unit 13. In this way, data transmission is achieved by using one set of virtual communication ports and the electronic device 3, and at the same time, another set of virtual communication ports is used to monitor the data in transmission, thereby ensuring the correctness of the data transmission.

[0167] It is worth noting that, during the process of the main electronic device 2 transmitting the first USB data to the electronic device 3 through the bridge device, the main electronic device 2 can transmit additional data to the USB data transmission unit 11, so that the USB data transmission unit 11 can merge the additional data into the first USB data through the fifth endpoint 132 of the second interface unit 13, the second buffer (FIFO OUT) 152 of the first data buffer unit 15 and the data diversion unit 18.

[0168] Thus, the above is a complete and clear description of a bridge device with data monitoring function and a USB / UART conversion device having the bridge device of the present invention. Furthermore, it can be known from the above that the present invention has the following advantages:

[0169] (1) The present invention provides a bridge device, which can be arranged on a circuit board in the form of an integrated circuit (IC) chip, and together with a USB electrical connector and a UART electrical connector arranged on the circuit board, form a USB / UART conversion device. When in use, the USB electrical connector is electrically connected to a host computer, and the UART electrical connector is electrically connected to an external electronic device. At this time, the bridge device will provide the host computer with at least 3 groups of virtual communication ports (Virtual COM port), so that the host computer can use 1 group of virtual communication ports and the external electronic device for data transmission. In addition, when performing data transmission operations and data reception operations, the host computer can also use the other 2 groups of virtual communication ports to realize data diversion, thereby monitoring the diverted data to ensure the correctness of data transmission.

[0170] (2) More importantly, when the master electronic device transmits data with the electronic device through the bridge device of the present invention, the master electronic device can ensure the correctness of data monitoring and intervention correction data without ensuring the baud rate of the UART electrical connector. Figure 3 Compared with the conventional technology shown, for the main control electronic device connected to the bridge device of the present invention, its data monitoring is obtained at the data end after decoding and the intervention correction data is performed before data encoding, both of which are not performed at the control end of the UART electrical connector, so there is no need to worry about whether the UART baud rate is synchronized with the original signal. On the contrary, in order to be able to monitor, the conventional technology needs to know the baud rate of the current UART electrical connector, and the baud rate must be consistent to correctly monitor the data. However, the design of the present invention is to perform data shunting and merging before the data transmitted from the USB end begins to enter the UART controller, and to perform data shunting and merging when the UART controller transmits after receiving the data, so there is no need to consider the need to synchronize with the baud rate of the original UART controller to obtain the correctness of the data.

[0171] (3) In addition, when the main control electronic device uses a group of virtual communication ports to transmit data with the electronic device, the main control electronic device can use one of the remaining groups of virtual communication ports to integrate additional data into the data being transmitted.

[0172] It must be emphasized that the above detailed description is a specific description of a feasible embodiment of the present invention, but the embodiment is not intended to limit the patent scope of the present invention. Any equivalent implementation or modification that does not deviate from the technical spirit of the present invention should be included in the patent scope of this case.

Claims

1. A bridging device, characterized in that: include: A USB data transmission unit, coupled to a USB interface, so as to communicate with a main control electronic device through the USB interface; a UART data transmission unit, for coupling to a UART interface, so as to communicate with an electronic device through the UART interface; At least three interface units, all coupled to the USB data transmission unit, and including a first interface unit, a second interface unit and a third interface unit; At least three data cache units, including: a first data cache unit coupled to the second interface unit, a second data cache unit coupled to the first interface unit, and a third data cache unit coupled to the third interface unit; a data distribution unit, coupled to the first data cache unit, the second data cache unit, and the third data cache unit; a massive buffer unit coupled between the data distribution unit and the UART data transmission unit and having a control buffer; and A control endpoint coupled to the control register; Wherein, when the electronic device transmits a first serial data to the UART data transmission unit through the UART interface, the UART data transmission unit receives the first serial data at a first baud rate, and then transmits the first serial data to the second data cache unit and the third data cache unit via the huge buffer unit and the data distribution unit, so that the USB data transmission unit receives the first serial data through the first interface unit and simultaneously receives the first serial data through the third interface unit; When the main control electronic device transmits a first USB data to the USB data transmission unit through the USB interface 1F1, the USB data transmission unit caches the first USB data in the second data cache unit through the first interface unit, so that the data distribution unit reads the first USB data from the second data cache unit, and then transmits the first USB data to the bulk cache unit, so that the UART data transmission unit can receive the first USB data from the bulk cache unit; Before the second data cache unit transmits the first USB data to the data shunt unit, the second data cache unit first shunts and transmits the first USB data to the first data cache unit, so that the USB data transmission unit can receive the first USB data through the second interface unit.

2. The bridging device according to claim 1, characterized in that: During the process of the electronic device transmitting the first serial data to the main electronic device through the bridge device, the main electronic device is able to transmit additional data to the USB data transmission unit, so that the USB data transmission unit incorporates the additional data into the first serial data through the third interface unit, the third data cache unit and the data diversion unit.

3. The bridging device according to claim 1, characterized in that: During the process of the main control electronic device transmitting the first USB data to the electronic device through the bridge device, the main control electronic device is capable of transmitting additional data to the USB data transmission unit, so that the USB data transmission unit incorporates the additional data into the first USB data through the second interface unit, the first data cache unit and the data diversion unit.

4. The bridging device according to claim 1, characterized in that: The bridge device is an electronic chip selected from the group consisting of an integrated circuit chip, a programmable logic element chip and a field programmable logic gate array chip.

5. The bridging device according to claim 1, characterized in that: The USB interface includes a first USB electrical connector, and the UART interface includes a first UART electrical connector.

6. The bridging device according to claim 5, characterized in that: The first UART electrical connector is an electrical connector selected from the group consisting of an RS232 electrical connector, an RS422 electrical connector and an RS485 electrical connector.

7. The bridging device according to claim 1, characterized in that: Yes also includes: a memory coupled to the control register; and A GPIO unit is coupled to the control register and includes at least one GPIO pin for coupling to the electronic device.

8. The bridging device according to claim 7, characterized in that: The massive cache unit comprises: The control register is coupled to the control endpoint, the memory and the GPIO unit; A massive output buffer coupled to the data distribution unit and the UART data transmission unit; a massive input register coupled to the data distribution unit and the UART data transmission unit; and An interrupt input register is coupled to the UART data transmission unit, the first data buffer unit, the second data buffer unit, and the third data buffer unit.

9. The bridging device according to claim 8, characterized in that: The USB data transfer unit comprises: A USB physical layer unit, for coupling to the USB interface; and A USB serial interface engine unit is coupled to the USB physical layer unit, the endpoint, the first interface unit, the second interface unit, and the third interface unit.

10. The bridging device according to claim 9, characterized in that: The UART data transmission unit includes: A controller, coupled to the interrupt input register and used to couple to the UART interface; a data transfer buffer coupled to the controller and the massive output buffer; and A data receiving register is coupled to the controller and the massive input register.

11. The bridging device according to claim 9, characterized in that: The data distribution unit includes: a first multiplexer having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the first data cache unit, the second input terminal is coupled to the second data cache unit, and the output terminal is coupled to the massive output register; and a second multiplexer having a first input terminal, a second input terminal and an output terminal, wherein the output terminal is coupled to the second data cache unit, the first input terminal is coupled to the huge input register, and the second input terminal is coupled to the third data cache unit; The first data cache unit is coupled between the second input terminal of the first multiplexer and the second data cache unit.

12. The bridging device according to claim 11, characterized in that: The first data cache unit includes: a first register coupled to the second interface unit and the interrupt input register; a second buffer coupled to the second interface unit and the first input end of the first multiplexer; and A third buffer is coupled to the second interface unit and is also coupled between the second data buffer unit and the second input terminal of the first multiplexer.

13. The bridging device according to claim 12, characterized in that: The second data cache unit includes: a fourth register coupled to the first interface unit and the second input terminal of the first multiplexer, and coupled to the third register; a fifth register coupled to the first interface unit and the interrupt input register of the massive cache unit; A sixth buffer is coupled to the first interface unit and the output end of the second multiplexer.

14. The bridging device according to claim 13, characterized in that: The third data cache unit includes: a seventh buffer coupled to the third interface unit and the second input end of the second multiplexer; an eighth register coupled to the third interface unit and also coupled between the massive input register and the first input terminal of the second multiplexer; and A ninth register is coupled to the third interface unit and the interrupt input register.

15. The bridging device according to claim 14, characterized in that The first interface unit comprises: A first endpoint, coupling the USB data transmission unit and the fifth buffer; a second endpoint, coupling the USB data transmission unit and the fourth register; and A third terminal is coupled to the USB data transmission unit 11 and the sixth register.

16. The bridging device according to claim 15, characterized in that The second interface unit comprises: A fourth endpoint, coupling the USB data transmission unit and the first buffer; a fifth endpoint, coupling the USB data transmission unit and the second buffer; and A sixth terminal is coupled to the USB data transmission unit and the third buffer.

17. The bridging device according to claim 16, characterized in that The third interface unit comprises: a seventh endpoint, coupling the USB data transmission unit and the ninth buffer; an eighth endpoint, coupling the USB data transmission unit and the seventh register; and A ninth terminal is coupled to the USB data transmission unit and the eighth buffer.

18. The bridging device according to claim 1, characterized in that: The main control electronic device is an electronic device selected from the group consisting of a notebook computer, a desktop computer, an all-in-one computer, an industrial computer, and a cloud server.

19. A USB / UART conversion device, characterized in that: include: A circuit board, a USB electrical connector, a UART electrical connector and a bridge device as described in any one of claims 1 to 17, wherein the USB electrical connector, the UART electrical connector and the bridge device are arranged on the circuit board, and the bridge device couples the USB electrical connector and the UART electrical connector.

20. Use of a bridging device according to any one of claims 1 to 18, characterized in that: It is used to connect between a main control electronic device and an electronic device, so that the main control electronic device can monitor data and / or intervene to correct data without synchronous baud rate when transmitting data with the electronic device through the bridge device.

Citation Information

Patent Citations

  • Double serial port communication monitoring system and method

    CN101101567B