Capacitor device and forming method thereof

Abstract

The invention discloses a capacitor device and a forming method thereof, and the structure comprises a plurality of stacked first electrode layers, second electrode layers located between the two adjacent first electrode layers, and first dielectric layers between the adjacent first electrode layers and second electrode layers. Each upper first electrode layer is located on the first side wall and part of the top surface of the lower second electrode layer, a first included angle is formed between the first side wall of the second electrode layer and the top surface of the second electrode layer, and the first included angle is an obtuse angle. Each upper second electrode layer is located on the second side wall and part of the top surface of the lower first electrode layer, a second included angle is formed between the second side wall of the first electrode layer and the top surface of the first electrode layer, and the second included angle is an obtuse angle; the first conductive plug is positioned on the first region and is connected with each first electrode layer; and the second conductive plug is positioned on the third region and is connected with each second electrode layer, so that the reliability of the capacitor is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a capacitor device and a method for forming the same. Background Art

[0002] In semiconductor integrated circuits, integrated capacitors fabricated on the same chip as transistor circuits are widely used. They are mainly metal-insulator-metal (MIM) capacitors and metal-oxide-metal (MOM) capacitors.

[0003] Among them, MIM capacitors use upper and lower metal layers as capacitor plates. For traditional MIM capacitors, there is only a single dielectric layer between the capacitor plates, and its equivalent capacitance density is limited by the thickness of the dielectric layer and the dielectric constant of the dielectric layer. For this reason, a multi-layer plate capacitor structure is introduced to obtain a higher equivalent capacitance density.

[0004] However, the performance of multi-layer plate capacitor structures still needs to be further improved. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a capacitor device and a method for forming the same, so as to improve the performance of the semiconductor structure.

[0006] In order to solve the above technical problems, the technical solution of the present invention provides a capacitor device, comprising: a substrate, the substrate comprising a first area, a second area and a third area arranged along a first direction, the second area being located between the first area and the third area; a metal layer structure located on the substrate, the metal layer structure comprising a plurality of first electrode layers stacked, a second electrode layer located between two adjacent first electrode layers, and a first dielectric layer located between the adjacent first electrode layers and the second electrode layers, each first electrode layer being located on the second area and also extending to the first area, each second electrode layer being located on the second area and also extending to the third area, each upper layer The first electrode layer is located on the first side wall and part of the top surface of the second electrode layer thereunder, a first angle is formed between the first side wall of the second electrode layer and the top surface of the second electrode layer, and the first angle is an obtuse angle; each upper second electrode layer is located on the second side wall and part of the top surface of the first electrode layer thereunder, a second angle is formed between the second side wall of the first electrode layer and the top surface of the first electrode layer, and the second angle is an obtuse angle; a first conductive plug is located on the first area, and the first conductive plug is connected to each first electrode layer; a second conductive plug is located on the third area, and the second conductive plug is connected to each second electrode layer.

[0007] Optionally, the first angle ranges from 100 degrees to 130 degrees; the second angle ranges from 100 degrees to 130 degrees.

[0008] Optionally, it also includes: a first lower metal layer located in the first area and a second lower metal layer located in the third area in the substrate; a second dielectric layer located on the surface of the metal layer structure; a first upper metal layer and a second upper metal layer separated from each other and located on the second dielectric layer; the first conductive plug also connects the first lower metal layer and the first upper metal layer; the second conductive plug also connects the second lower metal layer and the second upper metal layer.

[0009] Optionally, the number of layers of the metal layer structure is odd, and the first electrode layer is located at the bottom layer, and the capacitor device also includes: a dummy electrode layer on the second electrode layer on the top layer on the third zone, and the dummy electrode layer and the first electrode layer are separate from each other; the number of layers of the metal layer structure is odd, and the second electrode layer is located at the bottom layer, and the capacitor device also includes: a dummy electrode layer on the first electrode layer on the top layer on the first zone, and the dummy electrode layer and the second electrode layer are separate from each other.

[0010] Optionally, the material of the first electrode layer includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni; the material of the second electrode layer includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni.

[0011] Optionally, the material of the first dielectric layer includes a combination of one or more of HfO, AlO, ZrO and LaO.

[0012] Optionally, the thickness of the first electrode layer ranges from 300 angstroms to 800 angstroms; the thickness of the second electrode layer ranges from 300 angstroms to 800 angstroms.

[0013] Correspondingly, the technical solution of the present invention also provides a method for forming a capacitor device, comprising: providing a substrate, the substrate comprising a first area, a second area and a third area arranged along a first direction, the second area being located between the first area and the third area; forming a metal layer structure on the substrate, the metal layer structure comprising a plurality of first electrode layers stacked, a second electrode layer located between two adjacent first electrode layers, and a first dielectric layer located between the adjacent first electrode layers and the second electrode layers, each first electrode layer being located on the second area and extending to the first area, each second electrode layer being located on the second area and extending to the third area, and each upper first electrode layer The first side wall and part of the top surface of the second electrode layer under it are located, and a first angle is formed between the first side wall of the second electrode layer and the top surface of the second electrode layer, and the first angle is an obtuse angle. The second electrode layer of each upper layer is located on the second side wall and part of the top surface of the first electrode layer under it, and a second angle is formed between the second side wall of the first electrode layer and the top surface of the first electrode layer, and the second angle is an obtuse angle. After the metal layer structure is formed, a first conductive plug connecting each first electrode layer and a second conductive plug connecting each second electrode layer are formed, the first conductive plug is located on the first area, and the second conductive plug is located on the third area.

[0014] Optionally, the method for forming adjacent first electrode layers and second electrode layers includes: forming a first electrode material layer on a substrate, or forming a first dielectric layer and a first electrode material layer located on the first dielectric layer on an upper second electrode layer; patterning the first electrode material layer to form a first electrode layer; forming a first dielectric layer and a second electrode material layer located on the first dielectric layer on the first electrode layer; patterning the second electrode material layer to form a second electrode layer.

[0015] Optionally, the process of patterning the first electrode material layer includes a dry etching process.

[0016] Optionally, the process of patterning the second electrode material layer includes a dry etching process.

[0017] Optionally, the process for forming the first electrode material layer includes a physical vapor deposition process; and the process for forming the second electrode material layer includes a physical vapor deposition process.

[0018] Optionally, the substrate has a first lower metal layer located in the first area and a second lower metal layer located in the third area; the first conductive plug is also connected to the first lower metal layer; and the second conductive plug is also connected to the second lower metal layer.

[0019] Optionally, the method for forming the first conductive plug and the second conductive plug includes: forming a second dielectric layer on the surface of the metal layer structure; forming a first contact hole in the first region and in the metal layer structure and the second dielectric layer on the first region, wherein the first contact hole exposes the first lower metal layer at the bottom; forming a second contact hole in the third region and in the metal layer structure and the second dielectric layer on the third region, wherein the second lower metal layer is exposed at the bottom of the second contact hole; forming a first conductive plug in the first contact hole; and forming a second conductive plug in the second contact hole.

[0020] Optionally, after forming the second dielectric layer, a first upper metal layer and a second upper metal layer that are separate from each other are also formed, the first conductive plug is further connected to the first upper metal layer, and the second conductive plug is further connected to the second upper metal layer.

[0021] Optionally, the method for forming the first conductive plug, the second conductive plug, the first upper metal layer and the second upper metal layer further includes: after forming the first contact hole and the second contact hole, forming a conductive material layer on the surface of the second dielectric layer and in the first contact hole and the second contact hole; etching the conductive material layer until the surface of the second dielectric layer is exposed, forming the first conductive plug and the first upper metal layer located on the first conductive plug, and forming the second conductive plug and the second upper metal layer located on the second conductive plug.

[0022] Optionally, the metal layer structure has an odd number of layers, and the first electrode layer is located at the bottom, and the method also includes: when forming the top first electrode layer, a dummy electrode layer is also formed on the top second electrode layer on the third region, and the dummy electrode layer and the first electrode layer are separate from each other; the metal layer structure has an odd number of layers, and the second electrode layer is located at the bottom, and the method also includes: when forming the top second electrode layer, a dummy electrode layer is also formed on the top first electrode layer on the first region, and the dummy electrode layer and the second electrode layer are separate from each other.

[0023] Optionally, the first angle ranges from 100 degrees to 130 degrees; the second angle ranges from 100 degrees to 130 degrees.

[0024] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0025] In the capacitor device provided by the technical solution of the present invention, each upper first electrode layer is located on the first side wall and part of the top surface of the second electrode layer thereunder, and a first angle is provided between the first side wall of the second electrode layer and the top surface of the second electrode layer, and the first angle is an obtuse angle. The first angle is large, so that the sharpness of the corner of the second electrode layer adjacent to the first electrode layer is reduced, which is beneficial to reducing the electric field strength between the corner of the second electrode layer and the first electrode layer, thereby improving the reliability of the capacitor; similarly, the obtuse angle between the second side wall of the first electrode layer and the top surface of the first electrode layer is also beneficial to improving the reliability of the capacitor.

[0026] In the method for forming a capacitor device provided by the technical solution of the present invention, a first angle is formed between the first side wall of the formed second electrode layer and the top surface of the second electrode layer, and the first angle is an obtuse angle. The first angle is large, so that the sharpness of the corner of the second electrode layer adjacent to the first electrode layer is reduced, which is beneficial to reducing the electric field strength between the corner of the second electrode layer and the first electrode layer, thereby improving the reliability of the capacitor; similarly, the obtuse angle between the second side wall of the first electrode layer and the top surface of the first electrode layer is also beneficial to improving the reliability of the capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is a schematic diagram of the structure of a capacitor device;

[0028] Figures 2 to 4 It is a schematic structural diagram corresponding to each step in the method for forming a capacitor device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] It should be noted that the terms “surface” and “on” in this specification are used to describe relative positional relationships in space and are not limited to direct contact.

[0030] As the background technology, the performance of the capacitor device formed in the prior art needs to be improved. Now, a capacitor device is described and analyzed.

[0031] Figure 1 It is a structural diagram of a capacitor device.

[0032] Please refer to Figure 1The capacitor device comprises: a substrate 100, the substrate 100 comprises a first region I, a second region II and a third region III arranged along a first direction X, the second region II is located between the first region I and the third region II, the first region I has a first lower metal layer 101, and the third region III has a second lower metal layer 102; a plurality of first electrode structures and a plurality of second electrode structures stacked and arranged on the substrate 100, the first electrode structure comprises a first lead-out terminal 103 located on the first region I and a first electrode layer 104 located on the second region II, the second electrode structure comprises a second lead-out terminal 105 located on the third region III and a second electrode layer 106 located on the second region II, and each first electrode layer 104 on the second region II is located adjacent to the second electrode layer 106 between the first electrode layers 104 and the second electrode layers 106; a first dielectric layer 107 located between the adjacent first electrode layers 104 and the second electrode layers 106; a dummy electrode layer 108 located on the first region I on the plurality of first electrode structures; a second dielectric layer 109 located on the surfaces of the first electrode structures and the second electrode structures; a first upper metal layer 110 and a second upper metal layer 111 separated from each other and located on the second dielectric layer 109; a first conductive plug 112 located in the second dielectric layer 109, the first conductive plug 112 connecting the first lower metal layer 101, the first upper metal layer 110 and the first lead terminals 103; a second conductive plug 113 located in the second dielectric layer 109, the second conductive plug 113 connecting the second lower metal layer 102, the second upper metal layer 111 and the second lead terminals 105.

[0033] In the above-mentioned MIM capacitor device, each adjacent first electrode layer 104, second electrode layer 106 and the first dielectric layer 107 therebetween form a single capacitor, the first lead-out terminal 103 is used to electrically lead out the first electrode layer 104, and the second lead-out terminal 105 is used to electrically lead out the second electrode layer 106, thereby forming multiple parallel capacitors to obtain a larger equivalent capacitance density. However, since the first lead-out terminal 103 is located on the side wall of the adjacent second electrode layer 106, there is an approximately right angle corner A between the side wall and the top of the second electrode layer 106 adjacent to the first lead-out terminal 103, so that there is a locally large electric field region between the first electrode structure and the second electrode structure, thereby affecting the reliability of the capacitor. Similarly, the approximately right angle corner of the first electrode layer 104 adjacent to the second lead-out terminal 105 will also reduce the reliability of the capacitor.

[0034] In order to solve the above problems, the present invention provides a capacitor device and a method for forming the same, wherein each upper first electrode layer is located on the first side wall and a portion of the top surface of the second electrode layer of the lower layer, and a first angle is provided between the first side wall of the second electrode layer and the top surface of the second electrode layer, wherein the first angle is an obtuse angle and the first angle is relatively large, so that the sharpness of the corner of the second electrode layer adjacent to the first electrode layer is reduced, which is beneficial to reducing the electric field strength between the corner of the second electrode layer and the first electrode layer, thereby improving the reliability of the capacitor; similarly, the obtuse angle between the second side wall of the first electrode layer and the top surface of the first electrode layer is also beneficial to improving the reliability of the capacitor.

[0035] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0036] Figures 2 to 4 It is a schematic structural diagram corresponding to each step in the method for forming a capacitor device according to an embodiment of the present invention.

[0037] Please refer to Figure 4 , a substrate 200 is provided, the substrate 200 includes a first region I, a second region II and a third region III arranged along a first direction Y, and the second region II is located between the first region I and the third region III.

[0038] In this embodiment, the substrate 200 has a first lower metal layer 201 located in the first region I and a second lower metal layer 202 located in the third region III.

[0039] In this embodiment, the substrate 200 also includes a base (not shown in the figure), a device layer (not shown in the figure) located on the base, and a metal interconnection layer located on the device layer. The metal interconnection layer includes a third dielectric layer (not shown in the figure), a first lower metal layer 201 and a second lower metal layer 202 located in the third dielectric layer, and the metal interconnection layer and the device layer are electrically connected.

[0040] Please refer to Figure 3, a metal layer structure is formed on a substrate 200, the metal layer structure includes a plurality of stacked first electrode layers 203, a second electrode layer 204 located between two adjacent first electrode layers, and a first dielectric layer 205 between adjacent first electrode layers 203 and second electrode layers 204, each first electrode layer 203 is located on the second region II and also extends to the first region I, each second electrode layer 204 is located on the second region II and also extends to the third region III, each upper first electrode layer 203 is located on a first side wall 204a and a portion of a top surface of a second electrode layer 204 of a lower layer, a first angle α is formed between the first side wall 204a of the second electrode layer 204 and the top surface of the second electrode layer 204, and the first angle α is an obtuse angle, each upper second electrode layer 204 is located on a second side wall 203a and a portion of a top surface of the first electrode layer 203 of a lower layer, a second angle β is formed between the second side wall 203a of the first electrode layer 203 and the top surface of the first electrode layer 203, and the second angle β is an obtuse angle.

[0041] At this point, a first angle α is formed between the first side wall 204a of the second electrode layer 204 and the top surface of the second electrode layer 204, and the first angle α is an obtuse angle. The first angle α is large, so that the sharpness of the corner of the second electrode layer 204 adjacent to the first electrode layer 203 is reduced, which is beneficial to reducing the electric field strength between the corner of the second electrode layer 204 and the first electrode layer 203, thereby improving the reliability of the capacitor; similarly, the obtuse angle between the second side wall 203a of the first electrode layer 203 and the top surface of the first electrode layer 203 is also beneficial to improving the reliability of the capacitor.

[0042] In this embodiment, the first angle α ranges from 100 degrees to 130 degrees; the second angle β ranges from 100 degrees to 130 degrees.

[0043] In this embodiment, the method for forming adjacent first electrode layers 203 and second electrode layers 204 includes: forming a first electrode material layer (not shown in the figure) on the substrate 200, or forming a first dielectric layer 205 and a first electrode material layer located on the first dielectric layer 205 on the upper second electrode layer 204 (not shown in the figure); patterning the first electrode material layer to form the first electrode layer 203; forming a first dielectric layer and a second electrode material layer located on the first dielectric layer (not shown in the figure) on the first electrode layer 203; patterning the second electrode material layer to form the second electrode layer 204.

[0044] In this embodiment, the process of patterning the first electrode material layer includes a dry etching process.

[0045] In this embodiment, the process of patterning the second electrode material layer includes a dry etching process.

[0046] In this embodiment, the process for forming the first electrode material layer includes a physical vapor deposition process; and the process for forming the second electrode material layer includes a physical vapor deposition process.

[0047] In this embodiment, the material of the first electrode layer 203 includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni; the material of the second electrode layer 204 includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni.

[0048] In this embodiment, the material of the first dielectric layer 205 includes one or more of HfO, AlO, ZrO and LaO.

[0049] It should be noted that each first electrode layer 203 and the adjacent second electrode layer 204 and the first dielectric layer 205 therebetween form a single capacitor device. The metal layer structure includes multiple capacitor devices connected in parallel. The materials of the first dielectric layer 205 in each capacitor device can be the same or different.

[0050] In this embodiment, the thickness of the first electrode layer 203 is in a range of 300 angstroms to 800 angstroms; the thickness of the second electrode layer 204 is in a range of 300 angstroms to 800 angstroms.

[0051] In this embodiment, the metal layer structure has an odd number of layers and the first electrode layer 203 is located at the bottom. The method further includes: when forming the top first electrode layer 203, a dummy electrode layer 211 is formed on the top second electrode layer 204 on the third region III, and the dummy electrode layer 211 is separated from the first electrode layer 203. The dummy electrode layer 211 is used to balance the thickness of the metal layer structure on the first region I and the third region III when forming the first contact hole and the second contact hole, and reduce the etching difference between forming the first contact hole and the second contact hole.

[0052] In another embodiment, the metal layer structure has an odd number of layers and the second electrode layer is located at the bottom. The method also includes: when forming the top second electrode layer, a dummy electrode layer is also formed on the top first electrode layer on the first region, and the dummy electrode layer and the second electrode layer are separate from each other.

[0053] In other embodiments, the number of layers of the metal layer structure is an even number, that is, the thickness of the metal layer structure on the first region is the same as the thickness of the metal layer structure on the third region, and no dummy electrode layer is provided.

[0054] Please refer to Figure 4After forming the metal layer structure, a first conductive plug 206 connecting each first electrode layer 203 and a second conductive plug 207 connecting each second electrode layer 204 are formed. The first conductive plug 206 is located on the first region I, and the second conductive plug 207 is located on the third region III.

[0055] In this embodiment, the first conductive plug 206 is also connected to the first lower metal layer 201 ; the second conductive plug 207 is also connected to the second lower metal layer 202 .

[0056] In this embodiment, the method for forming the first conductive plug 206 and the second conductive plug 207 includes: forming a second dielectric layer 208 on the surface of the metal layer structure; forming a first contact hole (not shown in the figure) in the metal layer structure and the second dielectric layer 208 in the first region I and on the first region I, wherein the first lower metal layer 201 is exposed at the bottom of the first contact hole; forming a second contact hole (not shown in the figure) in the metal layer structure and the second dielectric layer 208 in the third region III and on the third region III, wherein the second lower metal layer 202 is exposed at the bottom of the second contact hole; forming the first conductive plug 206 in the first contact hole; and forming the second conductive plug 207 in the second contact hole.

[0057] In this embodiment, after forming the second dielectric layer 208 , a first upper metal layer 209 and a second upper metal layer 210 are formed separately from each other, the first conductive plug 206 is connected to the first upper metal layer 209 , and the second conductive plug 207 is connected to the second upper metal layer 210 .

[0058] In this embodiment, the method for forming the first conductive plug 206, the second conductive plug 207, the first upper metal layer 209 and the second upper metal layer 210 further includes: after forming the first contact hole and the second contact hole, forming a conductive material layer (not shown in the figure) on the surface of the second dielectric layer 208 and in the first contact hole and the second contact hole; etching the conductive material layer until the surface of the second dielectric layer 208 is exposed, forming the first conductive plug 206 and the first upper metal layer 209 located on the first conductive plug 206, and forming the second conductive plug 207 and the second upper metal layer 210 located on the second conductive plug 207.

[0059] Correspondingly, the embodiment of the present invention also provides a capacitor device formed by the above method, please continue to refer to Figure 4, comprising: a substrate 200, the substrate 200 comprising a first region I, a second region II and a third region III arranged along a first direction Y, the second region II being located between the first region I and the third region III; a metal layer structure located on the substrate 200, the metal layer structure comprising a plurality of first electrode layers 203 stacked, a second electrode layer 204 located between two adjacent first electrode layers 203, and a first dielectric layer 205 between adjacent first electrode layers 203 and second electrode layers 204, each first electrode layer 203 being located on the second region II and also extending to the first region I, each second electrode layer 204 being located on the second region II and also extending to the third region III, each upper first electrode layer 203 being located on the lower second electrode layer The first side wall 204a and a part of the top surface of 204, there is a first angle α between the first side wall 204a of the second electrode layer 204 and the top surface of the second electrode layer 204, the first angle α is an obtuse angle, each upper second electrode layer 204 is located on the second side wall 203a and a part of the top surface of the first electrode layer 203 of the lower layer, there is a second angle β between the second side wall 203a of the first electrode layer 203 and the top surface of the first electrode layer 203, the second angle β is an obtuse angle; the first conductive plug 206 is located on the first area I, the first conductive plug 206 is connected to each first electrode layer 203; the second conductive plug 207 is located on the third area III, the second conductive plug 207 is connected to each second electrode layer 204.

[0060] At this point, there is a first angle α between the first side wall 204a of the second electrode layer 204 and the top surface of the second electrode layer 204, and the first angle α is an obtuse angle. The first angle α is relatively large, so that the sharpness of the corner of the second electrode layer 204 adjacent to the first electrode layer 203 is reduced, which is beneficial to reducing the electric field strength between the corner of the second electrode layer 204 and the first electrode layer 203, thereby improving the reliability of the capacitor; similarly, the obtuse angle between the second side wall 203a of the first electrode layer 203 and the top surface of the first electrode layer 203 is also beneficial to improving the reliability of the capacitor.

[0061] In this embodiment, the first angle α ranges from 100 degrees to 130 degrees; the second angle β ranges from 100 degrees to 130 degrees.

[0062] In this embodiment, the capacitor device also includes: a first lower metal layer 201 located in the first area I and a second lower metal layer 202 located in the third area III in the substrate 200; a second dielectric layer 208 located on the surface of the metal layer structure; a first upper metal layer 209 and a second upper metal layer 210 separated from each other and located on the second dielectric layer 208; the first conductive plug 206 also connects the first lower metal layer 201 and the first upper metal layer 209; the second conductive plug 207 also connects the second lower metal layer 202 and the second upper metal layer 210.

[0063] In this embodiment, the metal layer structure has an odd number of layers, and the first electrode layer 203 is located at the bottom layer. The capacitor device also includes: a dummy electrode layer 211 located on the top second electrode layer 204 on the third region III, and the dummy electrode layer 211 and the first electrode layer 203 are separate from each other.

[0064] In another embodiment, the metal layer structure has an odd number of layers, and the second electrode layer is located at the bottom. The capacitor device further includes: a dummy electrode layer located on the topmost first electrode layer on the first region, and the dummy electrode layer is separate from the second electrode layer.

[0065] In other embodiments, the number of layers of the metal layer structure is an even number, that is, the thickness of the metal layer structure on the first region is the same as the thickness of the metal layer structure on the third region, and no dummy electrode layer is provided.

[0066] In this embodiment, the material of the first electrode layer 203 includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni; the material of the second electrode layer 204 includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni.

[0067] In this embodiment, the material of the first dielectric layer 205 includes one or more of HfO, AlO, ZrO and LaO.

[0068] In this embodiment, the thickness of the first electrode layer 203 is in a range of 300 angstroms to 800 angstroms; the thickness of the second electrode layer 204 is in a range of 300 angstroms to 800 angstroms.

[0069] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A capacitor device, characterized in that: include: A substrate, the substrate comprising a first region, a second region and a third region arranged along a first direction, wherein the second region is located between the first region and the third region; A metal layer structure located on the substrate, the metal layer structure comprising a plurality of first electrode layers stacked, a second electrode layer located between two adjacent first electrode layers, and a first dielectric layer located between the adjacent first electrode layer and the second electrode layer, each of the first electrode layers being located on the second region and also extending to the first region, each of the second electrode layers being located on the second region and also extending to the third region, each of the first electrode layers of the upper layers being located on a first side wall and a portion of a top surface of the second electrode layer of the lower layer, a first angle being formed between the first side wall of the second electrode layer and a top surface of the second electrode layer, the first angle being an obtuse angle, each of the second electrode layers of the upper layers being located on a second side wall and a portion of a top surface of the first electrode layer of the lower layer, a second angle being formed between the second side wall of the first electrode layer and a top surface of the first electrode layer, the second angle being an obtuse angle; A first conductive plug located on the first region, the first conductive plug connecting the first electrode layers; A second conductive plug is located on the third region, wherein the second conductive plug is connected to each of the second electrode layers.

2. The capacitive device according to claim 1, wherein: The first angle ranges from 100 degrees to 130 degrees; the second angle ranges from 100 degrees to 130 degrees.

3. The capacitor device according to claim 1, wherein: Also includes: The substrate comprises a first lower metal layer located in the first area and a second lower metal layer located in the third area; and a second dielectric layer located on the surface of the metal layer structure; A first upper metal layer and a second upper metal layer are located on the second dielectric layer and are separated from each other; the first conductive plug also connects the first lower metal layer and the first upper metal layer; and the second conductive plug also connects the second lower metal layer and the second upper metal layer.

4. The capacitive device according to claim 1, wherein: The number of layers of the metal layer structure is odd, and the first electrode layer is located at the bottom layer. The capacitor device also includes: a dummy electrode layer on the second electrode layer that is the top layer on the third region, and the dummy electrode layer and the first electrode layer are separate from each other; the number of layers of the metal layer structure is odd, and the second electrode layer is located at the bottom layer. The capacitor device also includes: a dummy electrode layer on the first electrode layer that is the top layer on the first region, and the dummy electrode layer and the second electrode layer are separate from each other.

5. The capacitor device according to claim 1, wherein: The material of the first electrode layer includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni; the material of the second electrode layer includes a combination of one or more of TiN, TaN, Ta, W, TiO, Ti, Pt and Ni.

6. The capacitive device according to claim 1, wherein: The material of the first dielectric layer includes one or more of HfO, AlO, ZrO and LaO.

7. The capacitive device according to claim 1, wherein: The thickness of the first electrode layer ranges from 300 angstroms to 800 angstroms; the thickness of the second electrode layer ranges from 300 angstroms to 800 angstroms.

8. A method for forming a capacitor device, characterized in that: include: Providing a substrate, the substrate comprising a first region, a second region and a third region arranged along a first direction, wherein the second region is located between the first region and the third region; A metal layer structure is formed on the substrate, the metal layer structure comprising a plurality of first electrode layers stacked, a second electrode layer located between two adjacent first electrode layers, and a first dielectric layer located between the adjacent first electrode layer and the second electrode layer, each of the first electrode layers is located on the second region and also extends to the first region, each of the second electrode layers is located on the second region and also extends to the third region, each of the first electrode layers on the upper layer is located on the first side wall and a portion of the top surface of the second electrode layer on the lower layer, a first angle is formed between the first side wall of the second electrode layer and the top surface of the second electrode layer, and the first angle is an obtuse angle, each of the second electrode layers on the upper layer is located on the second side wall and a portion of the top surface of the first electrode layer on the lower layer, a second angle is formed between the second side wall of the first electrode layer and the top surface of the first electrode layer, and the second angle is an obtuse angle; After forming the metal layer structure, a first conductive plug connecting each of the first electrode layers and a second conductive plug connecting each of the second electrode layers are formed, wherein the first conductive plug is located on the first region and the second conductive plug is located on the third region.

9. The method for forming a capacitive device according to claim 8, wherein: The method for forming adjacent first electrode layers and second electrode layers includes: forming a first electrode material layer on the substrate, or forming the first dielectric layer and the first electrode material layer located on the first dielectric layer on the upper second electrode layer; patterning the first electrode material layer to form the first electrode layer; forming the first dielectric layer and the second electrode material layer located on the first dielectric layer on the first electrode layer; patterning the second electrode material layer to form the second electrode layer.

10. The method for forming a capacitive device according to claim 9, wherein: The process of patterning the first electrode material layer includes a dry etching process.

11. The method for forming a capacitive device according to claim 9, wherein: The process of patterning the second electrode material layer includes a dry etching process.

12. The method for forming a capacitive device according to claim 9, wherein: The forming process of the first electrode material layer includes a physical vapor deposition process; the forming process of the second electrode material layer includes a physical vapor deposition process.

13. The method for forming a capacitive device according to claim 8, wherein: The substrate has a first lower metal layer located in the first area and a second lower metal layer located in the third area; the first conductive plug is also connected to the first lower metal layer; and the second conductive plug is also connected to the second lower metal layer.

14. The method for forming a capacitive device according to claim 13, wherein: The method for forming the first conductive plug and the second conductive plug comprises: forming a second dielectric layer on the surface of the metal layer structure; forming a first contact hole in the first area and in the metal layer structure and the second dielectric layer on the first area, wherein the first lower metal layer is exposed at the bottom of the first contact hole; forming a second contact hole in the third area and in the metal layer structure and the second dielectric layer on the third area, wherein the second lower metal layer is exposed at the bottom of the second contact hole; forming the first conductive plug in the first contact hole; and forming the second conductive plug in the second contact hole.

15. The method for forming a capacitive device according to claim 14, wherein: After forming the second dielectric layer, a first upper metal layer and a second upper metal layer separated from each other are formed, the first conductive plug is further connected to the first upper metal layer, and the second conductive plug is further connected to the second upper metal layer.

16. The method for forming a capacitive device according to claim 15, wherein: The method for forming the first conductive plug, the second conductive plug, the first upper metal layer and the second upper metal layer further includes: after forming the first contact hole and the second contact hole, forming a conductive material layer on the surface of the second dielectric layer and in the first contact hole and the second contact hole; etching the conductive material layer until the surface of the second dielectric layer is exposed, forming the first conductive plug and the first upper metal layer on the first conductive plug, and forming the second conductive plug and the second upper metal layer on the second conductive plug.

17. The method for forming a capacitive device according to claim 8, wherein: The number of layers of the metal layer structure is odd, and the first electrode layer is located at the bottom. The method also includes: when forming the top first electrode layer, a dummy electrode layer is also formed on the top second electrode layer on the third region, and the dummy electrode layer and the first electrode layer are separate from each other; the number of layers of the metal layer structure is odd, and the second electrode layer is located at the bottom. The method also includes: when forming the top second electrode layer, a dummy electrode layer is also formed on the top first electrode layer on the first region, and the dummy electrode layer and the second electrode layer are separate from each other.

18. The method for forming a capacitive device according to claim 8, wherein: The first angle ranges from 100 degrees to 130 degrees; the second angle ranges from 100 degrees to 130 degrees.

Images