Bionic synaptic transistor capable of being triggered by solar-blind ultraviolet light as well as preparation method and application of bionic synaptic transistor

Abstract

The invention discloses a bionic synaptic transistor capable of being triggered by solar-blind ultraviolet light as well as a preparation method and application of the bionic synaptic transistor. The device takes a silicon dioxide / Si material as a substrate, and a V2C MXene charge trapping layer, a self-assembly VO2 tunneling layer, a gallium oxide photosensitive channel layer and a source / drain electrode are arranged on the substrate. The charge trapping layer and the self-assembled tunneling layer are made of a VO2-V2C MXene core-shell structure material prepared by a solution spin-coating method. And the photosensitive channel layer is a gallium oxide semiconductor material prepared by a solution spin-coating method. And the source and drain electrodes are gold electrodes prepared by electron beam evaporation. Except the source / drain electrode, other functional layers can be prepared under a non-vacuum atmosphere condition, the temperature does not exceed 200 DEG C, the production cost is relatively low, and neuroplasticity response to optical signals can be realized under the stimulation of short-wavelength solar-blind ultraviolet light.

Description

Technical Field

[0001] The present invention particularly relates to a bionic synaptic transistor that can be triggered by solar-blind ultraviolet light and a preparation method and application thereof, and belongs to the technical field of microelectronic devices. Background Art

[0002] In recent years, the von Neumann architecture that traditional digital computing relies on has gradually shown its disadvantages in parallel data processing, and cannot meet the rapidly growing demand for big data processing, becoming a bottleneck restricting current computing application technology. Therefore, the development of high-speed parallel computing systems without von Neumann architecture is an inevitable development trend.

[0003] The nervous system in the brain of an organism is a very efficient information processing system. Its neural network based on neurons and synapses can be highly parallel with extremely low energy consumption, and adjacent neurons often rely on synapses for information transmission. Electrical signals of different strengths from presynaptic neurons are converted into chemical signals called neurotransmitters. After passing through the synaptic cleft, neurotransmitters will combine with postsynaptic neurons to regenerate bioelectric signals of response strength. At the same time, each neuron can choose the information to be transmitted according to the synaptic strength of the memory. Based on the working mechanism of synapses, researchers have proposed hardware neural network computing technology composed of a large number of artificial synaptic transistors. In hardware neural network computing technology, unlike conventional logic circuits, a synaptic transistor can be directly connected to a large number of other synaptic devices to form a highly interconnected network for information transmission and process data in a highly parallel mode. In recent years, synaptic transistors, as the most basic components in hardware neural network computing technology, have gradually become the research focus in the field of artificial intelligence.

[0004] MXene is a type of two-dimensional metal carbide whose basic structure consists of 2-5 layers of transition metal and carbon / nitrogen layers; they have excellent physical and chemical properties, such as metallic conductivity, water solubility, high optical transparency (>97% / nm). In recent years, MXene and its derivatives have received increasing research attention and have demonstrated excellent performance in various applications, such as energy storage, electronics, EMI shielding, sensors, water purification and desalination.

[0005] For example, the combination of hydrophilic functional groups (O, OH, and F) on the surface of V2C MXene and the conductive core makes MXene the first water-soluble two-dimensional conductive material that does not require the help of any surfactant. In the air, irreversible oxidation occurs at the edges and defects of V2C MXene nanosheets, which causes the MXene to gradually transform into metal oxides and amorphous carbon. Although this oxidation limits the life of MXene, moderate oxidation will form a MXene-VO2 core-shell structure material, in which the MXene core and VO2 shell can be used as charge trapping layers and tunneling layers, respectively, and are used in charge trapping-tunneling memory devices. The thin-film transistor formed by combining this storage functional device with a ferroelectric insulating material can realize pressure sensing and biomimetic neural synaptic functions under electrical pulses and mechanical pressure inputs.

[0006] CN112397392A discloses a bionic synaptic transistor and a preparation method thereof, comprising: S1, providing a substrate, forming a source electrode and a drain electrode on one surface of the substrate; S2, preparing a channel layer precursor aqueous solution, and spin coating the source electrode, the drain electrode and the substrate to form a channel layer; S3, preparing a charge trapping-tunneling layer precursor aqueous solution, and spin coating the channel layer to form a charge trapping-tunneling layer; S4, preparing a ferroelectric insulating layer precursor aqueous solution, and spin coating the charge trapping-tunneling layer to form a ferroelectric insulating layer; S5, forming a gate electrode on the upper surface of the ferroelectric insulating layer to obtain a bionic synaptic transistor. The entire preparation process can be carried out under non-vacuum atmospheric conditions, and the temperature does not exceed 300°C. It belongs to a low-temperature process, the process is simple, and traditional photolithography and vacuum coating are not required, which can greatly reduce the preparation time and has a low production cost. The obtained bionic synaptic transistor has important application potential in the fields of sensors, memory and artificial intelligence. Summary of the invention

[0007] The main purpose of the present invention is to provide a low-cost day-blind ultraviolet light-triggerable bionic synaptic transistor with day-blind ultraviolet light-triggerable characteristics and charge capture-tunneling memory principle, and a preparation method and application thereof. The bionic synaptic transistor can realize the memory function of photoelectric signals, imitate the long-term neural plasticity of biological synapses, has a simple preparation process and low cost, thereby overcoming the shortcomings of the prior art.

[0008] In order to achieve the above-mentioned invention object, the technical solution adopted by the present invention includes: A first aspect of an embodiment of the present invention provides a bionic synaptic transistor that can be triggered by day-blind ultraviolet light, including an epitaxial structure and a source and a drain matching the epitaxial structure, wherein the epitaxial structure includes a dielectric layer, a charge trapping-tunneling layer, and a photosensitive channel layer stacked in sequence, the source and the drain are arranged on the photosensitive channel layer and electrically connected via the photosensitive channel layer, wherein the photosensitive channel layer contains gallium oxide material, and the photosensitive channel layer can respond to short-wave ultraviolet light.

[0009] A second aspect of an embodiment of the present invention provides a method for preparing a bionic synaptic transistor that can be triggered by day-blind ultraviolet light, comprising making an epitaxial structure and making a source and a drain matching the epitaxial structure, wherein the method for making the epitaxial structure comprises: A charge trapping-tunneling layer and a photosensitive channel layer are stacked in sequence on the dielectric layer, the source electrode and the drain electrode are arranged on the photosensitive channel layer and are electrically connected through the photosensitive channel layer, wherein the photosensitive channel layer contains gallium oxide material, and the photosensitive channel layer can respond to short-wave ultraviolet light.

[0010] A third aspect of an embodiment of the present invention provides a photosensitive device, which includes the bionic synaptic transistor triggerable by day-blind ultraviolet light.

[0011] A fourth aspect of the embodiments of the present invention provides an image recognition device, which includes a plurality of bionic synaptic transistors that can be triggered by day-blind ultraviolet light, wherein the plurality of bionic synaptic transistors are distributed in an array.

[0012] A fifth aspect of an embodiment of the present invention provides an image recognition method, which includes: Providing the image recognition device; Each bionic synaptic transistor corresponds to a pixel, and the sum of the photoelectric response currents of multiple bionic synaptic transistors in each row is recorded as a feature. Through training through an artificial neural network algorithm, the recognition function of the input image is realized, imitating the visual recognition of images by organisms.

[0013] Compared with the prior art, the advantages of the present invention include: (1) The array of the present invention includes a plurality of transistor devices, each of which can represent a pixel of an image. The sum of the photoelectric response current of each row can be recorded as a feature, and the recognition function of the input image can be realized through training through a related artificial neural network algorithm, thereby simulating the visual recognition of an image by a living being; (2) The nonlinearity of the channel conductivity increase of the bionic synaptic transistor of the present invention is within 1.25, the nonlinearity of the channel conductivity decrease is within 2.05, the ratio of the maximum / minimum value of the channel conductivity is above 30, and the image recognition rate after training is above 51%; in the preferred technical solution, the nonlinearity of the channel conductivity increase of the bionic synaptic transistor of the present invention is within 0.5, the nonlinearity of the channel conductivity decrease is within 0.9, the ratio of the maximum / minimum value of the channel conductivity is above 70, and the image recognition rate after training is above 80%; (3) The highest temperature in the entire process of the present invention is 300°C, which belongs to a low-temperature process; (4) The patterning process and electrode growth process of the present invention are relatively simple and do not require conventional photolithography and vacuum coating, which can significantly reduce production time and economic costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic diagram of the structure of a bionic synaptic transistor that can be triggered by day-blind ultraviolet light provided in a typical implementation case of the present invention; Figure 2 It is a schematic diagram of the two-dimensional structure of MXene; Figure 3 This is the conductivity curve of the bionic synaptic transistor triggerable by solar-blinding ultraviolet light in Example 1 of the present invention under the stimulation of short-wave solar-blinding ultraviolet light. DETAILED DESCRIPTION

[0015] In view of the deficiencies in the prior art, the inventor of this case has proposed the technical solution of the present invention after long-term research and extensive practice. The technical solution, its implementation process and principle will be further explained as follows.

[0016] The device in the present invention is a neural synaptic device that can be used as a short-wave ultraviolet light detector. Due to the response of gallium oxide to short-wave ultraviolet light, the device can be regulated by controlling the parameters of the short-wave ultraviolet light. The regulation method includes pulse regulation, which continuously stimulates the device by regulating the pulse width, amplitude, and interval to obtain better linearity.

[0017] A first aspect of an embodiment of the present invention provides a bionic synaptic transistor that can be triggered by day-blind ultraviolet light, including an epitaxial structure and a source and a drain matching the epitaxial structure, wherein the epitaxial structure includes a dielectric layer, a charge trapping-tunneling layer, and a photosensitive channel layer stacked in sequence, the source and the drain are arranged on the photosensitive channel layer and electrically connected via the photosensitive channel layer, wherein the photosensitive channel layer contains gallium oxide material, and the photosensitive channel layer can respond to short-wave ultraviolet light.

[0018] Furthermore, the thickness of the photosensitive channel layer is 15nm-30nm, for example, 15nm, 18nm, 22nm, 26nm, 30nm. The thickness of the photosensitive channel layer should not be too thick, otherwise it will increase the power consumption of the device.

[0019] Furthermore, the wavelength of the short-wave ultraviolet light is 200nm-300nm.

[0020] Furthermore, the charge trapping-tunneling layer includes a charge trapping layer and a tunneling layer coated on the surface of the charge trapping layer.

[0021] Furthermore, the charge trapping-tunneling layer comprises a MXene-VO2 core-shell material, wherein the MXene core in the MXene-VO2 core-shell material serves as the charge trapping layer and the VO2 shell serves as the tunneling layer.

[0022] The present invention forms a charge trapping layer and a tunneling layer coated on the surface of the charge trapping layer through moderate oxidation of MXene, i.e., a MXene-VO2 material with a core-shell structure, wherein the MXene core and the VO2 shell can be used as a charge trapping layer and a tunneling layer, respectively, and are applied to a charge trapping-tunneling floating gate memory device. A thin film transistor formed by combining such a memory functional device with a photosensitive channel layer can realize detection and bionic neural synapse function under the input of short-wave day-blind ultraviolet light signals.

[0023] Specifically, the MXene core serves as the charge trapping layer as well as the floating gate layer. Its main function is to store the charges from the photosensitive channel layer, so the floating gate layer is also called the charge storage layer. The VO2 tunneling layer formed by MXene self-oxidation prevents leakage. Under the pulse stimulation simulating the biological synapse, the charge is repeatedly written and erased, and after writing, it is stored in the MXene floating gate layer. The VO2 tunneling layer can prevent the escape of electrons, thereby simulating the function of the neural synapse.

[0024] Furthermore, the charge trapping-tunneling layer has a thickness of 10 nm-20 nm, for example, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, etc.

[0025] Furthermore, the charge trapping layer has a thickness of 5 nm-10 nm, for example, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, etc.

[0026] Furthermore, the thickness of the tunneling layer is 5nm-10nm, such as 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, etc. The thickness of the tunneling layer in the present invention refers to the total thickness of the charge trapping layer.

[0027] Furthermore, the source electrode and the drain electrode in the present invention are arranged in the same layer.

[0028] Furthermore, the material of the dielectric layer includes silicon dioxide, but is not limited thereto.

[0029] Furthermore, the dielectric layer is stacked on the substrate.

[0030] Furthermore, the substrate includes a silicon substrate, but is not limited thereto.

[0031] Furthermore, when the photosensitive channel layer receives short-wave ultraviolet light, the channel conductivity of the bionic synaptic transistor triggered by the day-blind ultraviolet light changes gradually.

[0032] Furthermore, the nonlinearity of the channel conductivity increase of the bionic synaptic transistor triggerable by day-blind ultraviolet light is within 1.25, the nonlinearity of the channel conductivity decrease is within 2.05, and the ratio of the maximum / minimum channel conductivity is above 30.

[0033] Furthermore, the nonlinearity of the channel conductivity increase of the bionic synaptic transistor triggerable by day-blind ultraviolet light is within 0.5, the nonlinearity of the channel conductivity decrease is within 0.9, and the ratio of the maximum / minimum channel conductivity is above 70.

[0034] It should be noted that since day-blind ultraviolet light pulses are used for testing, this is different from most infrared, near-infrared, and visible light. This means that the bionic synaptic transistor provided by the present invention can generate a synaptic response to this specific light pulse, and after regulation, the linearity of the long-term plasticity is better. The linearity of the long-term plasticity directly affects the accuracy of neural network image recognition based on the MNIST database. The higher the linearity, the higher the recognition accuracy.

[0035] A second aspect of an embodiment of the present invention provides a method for preparing a bionic synaptic transistor that can be triggered by day-blind ultraviolet light, comprising making an epitaxial structure and making a source and a drain matching the epitaxial structure, wherein the method for making the epitaxial structure comprises: A charge trapping-tunneling layer and a photosensitive channel layer are stacked in sequence on the dielectric layer, the source electrode and the drain electrode are arranged on the photosensitive channel layer and are electrically connected through the photosensitive channel layer, wherein the photosensitive channel layer contains gallium oxide material, and the photosensitive channel layer can respond to short-wave ultraviolet light.

[0036] Furthermore, the method for manufacturing the epitaxial structure includes: Forming a charge trapping-tunneling layer precursor on the dielectric layer, and performing a first annealing treatment on the charge trapping-tunneling layer precursor to transform the charge trapping-tunneling layer precursor into a charge trapping-tunneling layer; A photosensitive channel layer precursor is formed on the charge trapping-tunneling layer, and a second annealing treatment is performed on the photosensitive channel layer precursor to transform the photosensitive channel layer precursor into a photosensitive channel layer.

[0037] In a more specific embodiment, the method for preparing the charge trapping-tunneling layer comprises: Forming a MXene dispersion from the MAX powder with aluminum removed, and using the MXene dispersion as a precursor of the charge trapping-tunneling layer; In an air environment, the MXene dispersion is spin-coated on the surface of the dielectric layer, and then the first annealing treatment is performed, so that the surface of the MXene material in the MXene dispersion is oxidized to form a VO2 thin shell, and the MXene material is oxidized to form a MXene-VO2 core-shell material, thereby forming the charge trapping-tunneling layer.

[0038] The "MAX powder" mentioned in the present invention refers to a machinable ceramic material, vanadium carbon aluminide, that is, V2AlC with a natural two-dimensional layered structure.

[0039] Furthermore, the MXene dispersion is spin-coated on the surface of the dielectric layer at a spin coating speed of 3000 rpm-5000 rpm (for example, 3000 rpm, 3200 rpm, 3400 rpm, 4000 rpm, 4200 rpm, 5000 rpm, etc.), and the spin coating duration is 20s-40s (for example, 20s, 22s, 26s, 30s, 34s, 40s, etc.).

[0040] Furthermore, the temperature of the first annealing treatment is 80°C-100°C (for example, 80°C, 82°C, 84°C, 86°C, 90°C, 100°C, etc.), and the time is 30s-60s (for example, 30s, 32s, 36s, 40s, 44s, 50s, 60s, etc.).

[0041] Furthermore, the charge trapping-tunneling layer includes a charge trapping layer and a tunneling layer coated on the surface of the charge trapping layer, wherein the MXene core in the MXene-VO2 core-shell material serves as the charge trapping layer and the VO2 shell serves as the tunneling layer.

[0042] Furthermore, the charge trapping-tunneling layer has a thickness of 10 nm-20 nm, for example, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, etc.

[0043] Furthermore, the charge trapping layer has a thickness of 5 nm-10 nm, for example, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, etc.

[0044] Furthermore, the thickness of the tunneling layer is 5nm-10nm, for example, 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, etc.

[0045] In a more specific embodiment, the method for preparing the photosensitive channel layer includes: preparing a gallium oxide solution, and using the gallium oxide solution as a channel layer precursor; The gallium oxide solution is spin-coated on the surface of the charge trapping-tunneling layer, and then the second annealing treatment is performed to process the gallium oxide solution to form the photosensitive channel layer.

[0046] Furthermore, the rotation speed of spin coating the gallium oxide solution is 3000rpm-5000rpm (for example, 3000rpm, 3200rpm, 3400rpm, 4000rpm, 4200rpm, 5000rpm, etc.), and the duration of spin coating is 30s-60s (for example, 30s, 32s, 36s, 40s, 44s, 50s, 60s, etc.).

[0047] Furthermore, the temperature of the second annealing treatment is 100°C-300°C (for example, 100°C, 120°C, 140°C, 200°C, 220°C, 300°C, etc.), and the time is 0.5h-1.5h (for example, 0.5h, 0.6h, 0.8h, 1.2h, 1.4h, 1.5h, etc.).

[0048] Further, the concentration of the gallium oxide solution is 1.0 M / L-3.0 M / L, for example, it can be 1.0 M / L, 1.2 M / L, 1.5 M / L, 1.8 M / L, 2.0 M / L, 2.3 M / L, 2.5 M / L, 3.0 M / L, etc. If the concentration of the gallium oxide solution is too low, the device finally formed will be broken down, and if the concentration of the gallium oxide solution is too high, the device finally formed will be insulated.

[0049] Furthermore, the thickness of the photosensitive channel layer is 15nm-30nm, for example, 15nm, 18nm, 22nm, 26nm, 30nm.

[0050] Furthermore, the material of the dielectric layer includes silicon dioxide, but is not limited thereto.

[0051] Furthermore, the dielectric layer is stacked on the substrate.

[0052] Furthermore, the substrate includes a silicon substrate, but is not limited thereto.

[0053] In a more specific embodiment, a method for preparing a bionic synaptic transistor that can be triggered by day-blind ultraviolet light comprises the following steps: (1) Preparing a charge trapping-tunneling layer precursor aqueous solution, coating it on the upper surface of the dielectric layer of the substrate, forming a charge trapping layer and a tunneling layer coated on the surface of the charge trapping layer, and obtaining a charge trapping-tunneling layer. Specifically, the process includes the following steps: (a1) Etching away the aluminum in the MAX powder, followed by ultrasonication and centrifugation to form a MXene dispersion as a charge trapping-tunneling layer precursor; (b1) stirring the MXene dispersion obtained in step (a1) in air, so that a portion of the MXene surface is oxidized to form a VO2 thin shell, thereby forming a MXene-VO2 core-shell structure dispersion; (c1) dropping the MXene-VO2 core-shell structure dispersion obtained in step (b1) onto the upper surface of the dielectric layer of the substrate, (d1) Spin coating in air at a speed of 3000-5000 rpm (e.g., 3200 rpm, 3400 rpm, 4000 rpm, 4200 rpm, etc.) for 20-40 s (e.g., 22 s, 26 s, 30 s, 34 s, etc.), and then annealing at 80-100 °C (e.g., 82 °C, 84 °C, 86 °C, 90 °C, etc.) for 30-60 s (e.g., 32 s, 36 s, 40 s, 44 s, etc.) to completely oxidize the surface material of the MXene material to form a VO2 thin shell, thereby forming a charge trapping-tunneling layer.

[0054] The "MAX powder" mentioned in the present invention refers to a machinable ceramic material, vanadium carbon aluminide, that is, V2AlC with a natural two-dimensional layered structure.

[0055] Specifically, the preparation method of the MXene dispersion comprises the following steps: (a1') Stir 2 g lithium fluoride and 40 mL 9 M hydrochloric acid in a polytetrafluoroethylene beaker (volume 100 mL) for 30 min (rotation speed is 400 rpm); (b1') Slowly add 2 g of MAX-V2AlC into the beaker in the previous step, adjust the reaction temperature to 35 °C, and continue stirring for 24 h; (c1') Centrifuge the reaction liquid obtained in step (b1') (3500 rpm, 10 min, 50 mL centrifuge tubes divided into 4), pour out the supernatant after centrifugation, add 40 mL of deionized water to the precipitate in each of the 4 centrifuge tubes, shake by hand to mix the precipitate and the deionized water evenly, put the four centrifuge tubes into a high-power ultrasonic machine (750 W) for 15 min, take them out and continue centrifugation (3500 rpm, 10 min), repeat several times until the pH value of the liquid poured out after centrifugation reaches 5; (d1') Add 40 mL of ethanol to the 4 centrifuge tubes in step (c1'), sonicate for 1.5 h, and centrifuge (10000 rpm, 10 min) to collect the lower precipitate; (e1') Collecting the lesser dispersion layer: add 20 mL of deionized water to the product precipitated by centrifugation in step (d1'), shake well, perform ultrasound (750 W, 20 min), centrifuge at 3500 rpm for 3 min, and collect the dark brown upper liquid as the lesser dispersion layer; (f1') Repeat step (e1') to obtain more thin layer dispersion.

[0056] (2) Prepare a channel layer precursor and apply it to the upper surface of the charge trapping-tunneling layer to form a photosensitive channel layer. Specifically, the steps include: (a2) preparing a gallium oxide solution as a channel layer precursor, wherein the concentration of the gallium oxide solution is 1.0 M / L-3.0 M / L, and dropping the gallium oxide solution onto the surface of the charge trapping-tunneling layer; (b2) Spin coating at a rate of 3000-5000 rpm (e.g., 3200 rpm, 3400 rpm, 4000 rpm, 4200 rpm, etc.) for 30-60 s (e.g., 32 s, 34 s, 40 s, 42 s, etc.), and then annealing at 100-300°C (e.g., 120°C, 140°C, 200°C, 220°C, etc.) for 0.5-1.5 h (e.g., 0.6 h, 0.8 h, 1.2 h, 1.4 h, etc.) to form a photosensitive channel layer.

[0057] Preferably, the channel layer precursor is prepared by dissolving gallium nitrate powder in deionized water and stirring for 10-15 minutes (eg, 11 minutes, 12 minutes, 13 minutes, 14 minutes, etc.).

[0058] (3) Forming a source electrode and a drain electrode on the upper surface of the photosensitive channel layer. Specifically including: (a3) placing a granular metal material in a crucible of an electron beam evaporation coating machine; (b3) covering the patterned source / drain electrode mask plate on the photosensitive channel layer obtained in step (2), with the mask plate placed downward on a suction plate in the chamber of an electron beam evaporation coating machine; (c3) The chamber is closed and electron beam evaporation is performed to form the source and drain electrodes.

[0059] Preferably, in the step (b3), the mask pattern is a pair of rectangular grooves, and the distance between the pairs of rectangular grooves is 50-100 μm (eg, 60 μm, 70 μm, 80 μm, 90 μm, etc.).

[0060] A third aspect of an embodiment of the present invention provides a photosensitive device, which includes the bionic synaptic transistor triggerable by day-blind ultraviolet light.

[0061] The bionic synaptic transistor of the present invention can realize a gradual change in conductivity under the input of a light signal to the photosensitive channel layer, can store conductivity information, has biomimetic visual characteristics, and can be used to sense optical signals.

[0062] A fourth aspect of the embodiments of the present invention provides an image recognition device, which includes a plurality of bionic synaptic transistors that can be triggered by day-blind ultraviolet light, wherein the plurality of bionic synaptic transistors are distributed in an array.

[0063] A fifth aspect of an embodiment of the present invention provides an image recognition method, which includes: Providing the image recognition device; Each bionic synaptic transistor corresponds to a pixel, and the sum of the photoelectric response currents of multiple bionic synaptic transistors in each row is recorded as a feature. Through training through relevant artificial neural network algorithms, the recognition function of the input image is realized, imitating the visual recognition of images by organisms.

[0064] Specifically, the image recognition method includes: The image recognition device is stimulated by light pulses to obtain long-term excitation and long-term inhibition neuromorphic plasticity, and then nonlinear fitting is performed on the excitation and inhibition curves to obtain nonlinear parameters, which are matched with the maximum and minimum values ​​in the entire long-term plasticity process and are all input into a three-layer neural network based on ANN. The neural network has an input layer (based on the MNIST database), a weight processing layer, and an output layer; the weights (i.e., the device response current values ​​under each layer of pulse stimulation) are iteratively calculated through the input data to obtain the recognition accuracy of the images in the MNIST database, thereby simulating the image recognition function.

[0065] The specific fitting parameters come from Figure 3 , through Figure 3The data in the Origin software is subjected to nonlinear fitting (nonlinear fitting is a function fitting function built into the software), and the specific values ​​of the nonlinear parameters of the long-term excitation curve (upward trend on the left half) and the long-term inhibition curve (downward trend on the right half) can be directly obtained. In addition, the maximum and minimum values ​​can be directly obtained from the figure. Substituting the above four parameters into the open source ANN neural network model, the image recognition accuracy data can be obtained.

[0066] It should be noted that in traditional TFTs, the fewer defects in the photosensitive channel layer, the smaller the hysteresis of the transfer characteristic curve of the device. Ideally, the transfer characteristic curve has no hysteresis after the scanning voltage ends. However, for synaptic transistors, the larger the hysteresis, the better, so that the device can exhibit memristive characteristics similar to neural synaptic characteristics when receiving pulse stimulation, which requires a large number of defects inside the channel. The silicon oxide channel layer prepared by the solution sol method in the present invention has more defects than the gallium oxide material grown by the traditional CVD method, which means that more carriers will be captured and decaptured, thereby improving the neural synaptic characteristics of the device and realizing high-precision recognition based on the MINIST handwriting database. In addition, another advantage of the present invention using gallium oxide material as the photosensitive channel layer is that it can respond to day-blind ultraviolet light (200nm-300nm), which can be used as a supplement to visible light devices and infrared light devices. It has broad application prospects in the fields of remote sensing, analytical imaging, information encryption and anti-counterfeiting. For example, compared with traditional optical communication systems, the propagation of ultraviolet light mainly relies on scattering, which can bypass obstacles and is very suitable for short-distance and anti-interference communications. When the solar ultraviolet radiation passes through the atmosphere, the ozone layer in the atmosphere has a strong absorption effect on the 200nm to 280nm ultraviolet radiation. This band of ultraviolet radiation is almost non-existent in the near-ground atmosphere, forming the so-called solar-blind zone. This feature makes solar-blind ultraviolet light communication highly confidential, highly environmentally adaptable, all-round and all-weather, and flexible, making it suitable for military operations, emergency rescue, disaster relief and other scenarios.

[0067] The technical solution, its implementation process and principle will be further explained below in conjunction with the accompanying drawings and specific implementation cases.

[0068] Example 1 See also Figure 1 A bionic synaptic transistor includes a silicon substrate 101, a silicon dioxide dielectric layer 102, a charge trapping layer 103 (V2C MXene core, thickness 10nm), a tunneling layer (VO2 shell, thickness 8nm) 104, a photosensitive channel layer 105 (thickness 25nm), a source electrode (i.e. the aforementioned source, the same below) 106 (thickness 80nm), and a drain electrode (i.e. the aforementioned drain, the same below) 107 (thickness 80nm).

[0069] The bionic synaptic transistor is a typical floating-gate memristor transistor. MXene is used as the floating gate layer for charge storage, self-grown VO2 is used as the tunneling layer to prevent leakage, and the gallium oxide photosensitive channel layer is used as the channel to realize carrier transport. Under the stimulation of positive voltage, the carriers or charges passing through the photosensitive channel layer will be stored in the floating gate layer to realize the write operation. Conversely, the charges will return to the photosensitive channel layer to realize the erase operation, simulating the characteristics of the bionic synapse.

[0070] The preparation of the bionic synaptic transistor includes the following steps: (1) Cleaning the silicon substrate with the silicon dioxide dielectric layer: The silicon substrate with the silicon dioxide dielectric layer is completely placed in acetone, ethanol, and deionized water in sequence and ultrasonicated for 20 minutes each, then rinsed with deionized water and dried with nitrogen gas; (2) Preparation of V2C MXene few-layer dispersion: 2 g of lithium fluoride and 40 mL of 9 M hydrochloric acid were stirred in a polytetrafluoroethylene beaker (volume 100 mL) for 30 min (rotation speed was 400 rpm, magnetic stirring was performed using IKA HS4); Slowly add 2g MAX-V2AlC to the above beaker, adjust the reaction temperature to 35°C, and continue stirring for 24h; centrifuge the reaction liquid obtained after stirring (3500rpm, 10min, 50mL centrifuge tubes are divided into 4), pour out the supernatant after centrifugation, add 40mL deionized water to the precipitates in the 4 centrifuge tubes respectively, shake to mix the precipitate and deionized water evenly, put the four centrifuge tubes into a high-power ultrasonic machine (750W) for 15min of ultrasonication, take out and continue centrifugation (3500rpm, 10min), repeat several times until the pH value of the liquid poured out after centrifugation reaches 5, add 40mL of ethanol to the 4 centrifuge tubes, ultrasonicate for 1.5h (with the effect of intercalation agent), centrifuge (10000rpm, 10min) to collect the lower precipitate; The centrifugal precipitation product was collected, 20 mL of deionized water was added, shaken, and ultrasonicated (750 W, 20 min). Then, the mixture was centrifuged at 3500 rpm for 3 min. The dark brown upper liquid was the MXene few-layer dispersion. The schematic diagram of the two-dimensional structure of MXene is shown in the figure. Figure 2 As shown; (3) Preparing a V2C MXene-VO2 core-shell structure dispersion: Stir the obtained dispersion in air for 1 h, and the surface of the V2C MXene is oxidized to form a self-assembled VO2 thin shell; (4) Dropping the V2C MXene-VO2 core-shell structure dispersion on the upper surface of the silicon dioxide dielectric layer, spin coating in air at a speed of 3500 rpm for 40 seconds, and annealing at 90°C for 40 seconds to form a charge trapping-tunneling layer including a tunneling layer and a charge trapping layer; (5) Prepare gallium oxide channel layer precursor solution: dissolve 5.4988 g of gallium nitrate powder in 10 mL of deionized water and stir in air for 15 min; (6) dropping a gallium oxide channel layer precursor solution onto the VO2 tunneling layer, spin coating in air at a speed of 3500 rpm for 40 seconds, and annealing at 200°C for 1 hour to form a gallium oxide channel layer; (7) Growth of source and drain electrodes: Add 10g of gold material particles to the crucible of the electron beam evaporation coating machine, cover the patterned electrode mask plate on the gallium oxide channel layer, place the mask plate downward on the suction plate in the electron beam evaporation coating machine chamber, close the chamber and perform electron beam evaporation coating operation to form the source electrode and drain electrode. The electrode pattern is a pair of rectangular grooves, 50μm apart, and the electrode thickness is 80nm.

[0071] The conductivity curve of the bionic synaptic transistor triggered by solar-blind ultraviolet light in Example 1 of the present invention under the stimulation of short-wave solar-blind ultraviolet light is as follows: Figure 3 As shown by Figure 3 It can be learned that continuous light pulse stimulation causes the device to generate current response, simulating the characteristics of neural synapses. Compared with most visible light, infrared light, and near-infrared light devices, the bionic synaptic transistor provided in the embodiment of the present invention has better linearity.

[0072] The applicant declares that the present invention illustrates the detailed method of the present invention through the above-mentioned embodiments, but the present invention is not limited to the above-mentioned detailed method, that is, it does not mean that the present invention must rely on the above-mentioned detailed method to be implemented. Those skilled in the art should understand that any improvement of the present invention, equivalent replacement of various raw materials of the product of the present invention, addition of auxiliary components, selection of specific methods, etc., all fall within the protection scope and disclosure scope of the present invention.

[0073] It should be understood that the above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with the technology to understand the content of the present invention and implement it accordingly, and they cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.

Claims

1. A bionic synaptic transistor triggerable by solar-blind ultraviolet light, comprising an epitaxial structure and a source and a drain matching the epitaxial structure, characterized in that: The epitaxial structure includes a dielectric layer, a charge trapping-tunneling layer and a photosensitive channel layer which are stacked in sequence, the source and the drain are arranged on the photosensitive channel layer and are electrically connected through the photosensitive channel layer, wherein the photosensitive channel layer contains gallium oxide material, and the photosensitive channel layer can respond to short-wave ultraviolet light.

2. The bionic synaptic transistor triggerable by solar-blind ultraviolet light according to claim 1, characterized in that: The thickness of the photosensitive channel layer is 15nm-30nm; And / or, the wavelength of the short-wave ultraviolet light is 200nm-300nm.

3. The bionic synaptic transistor triggerable by solar-blind ultraviolet light according to claim 1 or 2, characterized in that: The charge trapping-tunneling layer comprises a charge trapping layer and a tunneling layer coated on the surface of the charge trapping layer; Preferably, the charge trapping-tunneling layer comprises a MXene-VO2 core-shell material, wherein the MXene core in the MXene-VO2 core-shell material serves as the charge trapping layer and the VO2 shell serves as the tunneling layer; Preferably, the charge trapping-tunneling layer has a thickness of 10 nm to 20 nm; Preferably, the thickness of the charge trapping layer is 5nm-10nm; Preferably, the thickness of the tunneling layer is 5nm-10nm; Preferably, the material of the dielectric layer includes silicon dioxide; Preferably, the dielectric layer is stacked on the substrate; Preferably, the substrate comprises a silicon substrate.

4. The bionic synaptic transistor triggerable by solar-blind ultraviolet light according to claim 1, characterized in that: When the photosensitive channel layer receives short-wave ultraviolet light, the channel conductivity of the bionic synaptic transistor that can be triggered by the day-blind ultraviolet light changes gradually; Preferably, the bionic synaptic transistor triggerable by day-blind ultraviolet light has a channel conductivity increase nonlinearity within 1.25, a channel conductivity decrease nonlinearity within 2.05, and a channel conductivity maximum / minimum ratio above 30; Preferably, the bionic synaptic transistor triggerable by day-blind ultraviolet light has a channel conductivity increase nonlinearity within 0.5, a channel conductivity decrease nonlinearity within 0.9, and a channel conductivity maximum / minimum ratio above 70.

5. A method for preparing a bionic synaptic transistor that can be triggered by day-blind ultraviolet light, comprising making an epitaxial structure and making a source and a drain matching the epitaxial structure, characterized in that: The method for making the epitaxial structure comprises: A charge trapping-tunneling layer and a photosensitive channel layer are stacked in sequence on the dielectric layer, the source electrode and the drain electrode are arranged on the photosensitive channel layer and are electrically connected through the photosensitive channel layer, wherein the photosensitive channel layer contains gallium oxide material, and the photosensitive channel layer can respond to short-wave ultraviolet light.

6. The method for preparing the bionic synaptic transistor triggerable by solar-blind ultraviolet light according to claim 5, characterized in that: The method for making the epitaxial structure comprises: Forming a charge trapping-tunneling layer precursor on the dielectric layer, and performing a first annealing treatment on the charge trapping-tunneling layer precursor to transform the charge trapping-tunneling layer precursor into a charge trapping-tunneling layer; A photosensitive channel layer precursor is formed on the charge trapping-tunneling layer, and a second annealing treatment is performed on the photosensitive channel layer precursor to transform the photosensitive channel layer precursor into a photosensitive channel layer.

7. The method for preparing the bionic synaptic transistor triggerable by solar-blind ultraviolet light according to claim 6, characterized in that: The method for preparing the charge trapping-tunneling layer comprises: Forming a MXene dispersion from the MAX powder with aluminum removed, and using the MXene dispersion as a precursor of the charge trapping-tunneling layer; In an air environment, spin-coating the MXene dispersion on the surface of the dielectric layer, and then performing the first annealing treatment, so that the surface of the MXene material in the MXene dispersion is oxidized to form a VO2 thin shell, and the MXene material is oxidized to form a MXene-VO2 core-shell material, thereby forming the charge trapping-tunneling layer; Preferably, the MXene dispersion is spin-coated on the surface of the dielectric layer at a spin-coating speed of 3000 rpm-5000 rpm, and the spin-coating duration is 20 s-40 s; Preferably, the temperature of the first annealing treatment is 80°C-100°C, and the time is 30s-60s; Preferably, the charge trapping-tunneling layer comprises a charge trapping layer and a tunneling layer coated on the surface of the charge trapping layer, wherein the MXene core in the MXene-VO2 core-shell material serves as the charge trapping layer and the VO2 shell serves as the tunneling layer; Preferably, the charge trapping-tunneling layer has a thickness of 10 nm to 20 nm; Preferably, the thickness of the charge trapping layer is 5nm-10nm; Preferably, the thickness of the tunneling layer is 5nm-10nm; And / or, the method for preparing the photosensitive channel layer includes: preparing a gallium oxide solution, and using the gallium oxide solution as a channel layer precursor; Spin coating the gallium oxide solution on the surface of the charge trapping-tunneling layer; Then, the second annealing treatment is performed to process the gallium oxide solution to form the photosensitive channel layer; Preferably, the rotation speed of spin coating the gallium oxide solution is 3000rpm-5000rpm, and the duration of spin coating is 30s-60s; Preferably, the temperature of the second annealing treatment is 100°C-300°C, and the time is 0.5h-1.5h; Preferably, the concentration of the gallium oxide solution is 1.0 M / L-3.0 M / L; Preferably, the thickness of the photosensitive channel layer is 15nm-30nm; Preferably, the material of the dielectric layer includes silicon dioxide; Preferably, the dielectric layer is stacked on the substrate; Preferably, the substrate comprises a silicon substrate.

8. A photosensitive device, characterized in that: include: A bionic synaptic transistor triggerable by day-blind ultraviolet light as described in any one of claims 1 to 4.

9. An image recognition device, characterized in that: include: A plurality of bionic synaptic transistors triggerable by day-blind ultraviolet light as claimed in any one of claims 1 to 4, wherein the plurality of bionic synaptic transistors are distributed in an array.

10. An image recognition method, characterized in that: include: Providing the image recognition device according to claim 9; Each bionic synaptic transistor corresponds to a pixel, and the sum of the photoelectric response currents of multiple bionic synaptic transistors in each row is recorded as a feature. Through training through an artificial neural network algorithm, the recognition function of the input image is realized, imitating the visual recognition of images by organisms.

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