Light emitting diode chip and preparation method thereof

Abstract

The invention provides a light emitting diode chip and a preparation method thereof, and belongs to the technical field of semiconductors. The light-emitting diode chip comprises an epitaxial layer and a waterproof film; the waterproof film comprises a middle layer and a hydrophobic layer, the middle layer is an oxide layer of silicon and covers the epitaxial layer, the hydrophobic layer is a fluorine-containing silane layer, and the hydrophobic layer covers the surface, opposite to the epitaxial layer, of the middle layer. The waterproof capability of the light emitting diode chip can be effectively improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a light emitting diode chip and a method for preparing the same. Background Art

[0002] A light emitting diode (LED) is a semiconductor diode that can convert electrical energy into light energy.

[0003] In the related art, the LED chip is the main component of the LED, which is packaged on a bracket to form a LED. Since some LEDs are used outdoors, waterproof materials are usually applied to the bracket to prevent moisture from entering the LED.

[0004] However, since light-emitting diodes used outdoors are exposed to sunlight for a long time, the waterproof material coated on the bracket is prone to aging, resulting in poor air tightness and failure to achieve a waterproof effect. Summary of the invention

[0005] The embodiment of the present disclosure provides a light emitting diode chip and a method for manufacturing the same, which can effectively improve the waterproof capability of the light emitting diode chip. The technical solution is as follows:

[0006] In one aspect, an embodiment of the present disclosure provides a light-emitting diode chip, comprising an epitaxial layer and a waterproof film;

[0007] The waterproof film includes an intermediate layer and a hydrophobic layer. The intermediate layer is a silicon oxide layer covering the outside of the epitaxial layer. The hydrophobic layer is a fluorine-containing silane layer covering the side of the intermediate layer facing away from the epitaxial layer.

[0008] In one implementation of the present disclosure, the thickness of the intermediate layer is

[0009] The thickness of the hydrophobic layer is

[0010] In another implementation of the present disclosure, the epitaxial layer includes a first ohmic contact layer, a first semiconductor layer, an active layer, a second semiconductor layer, and a second ohmic contact layer stacked in sequence;

[0011] A groove is formed on a side surface of the epitaxial layer, and the groove extends from the first semiconductor layer to the second semiconductor layer;

[0012] The waterproof film covers a side of the first semiconductor layer facing away from the active layer and the inside of the groove.

[0013] In yet another implementation of the present disclosure, a surface of the first semiconductor layer facing away from the active layer has a roughened region;

[0014] The waterproof membrane at least partially covers the roughened area.

[0015] In yet another implementation of the present disclosure, the light emitting diode chip further includes a first electrode;

[0016] The first electrode is connected to one side of the epitaxial layer;

[0017] The waterproof film at least partially covers the junction between the first electrode and the epitaxial layer.

[0018] In yet another implementation of the present disclosure, the light emitting diode chip further includes a protective layer;

[0019] The protective layer covers the outside of the epitaxial layer;

[0020] The waterproof membrane covers the outside of the protective layer.

[0021] On the other hand, an embodiment of the present disclosure provides a method for preparing a light-emitting diode chip, which is applicable to the light-emitting diode chip described in the above aspect, and comprises:

[0022] preparing an epitaxial layer;

[0023] preparing an intermediate layer so that the intermediate layer covers the outside of the epitaxial layer, and the intermediate layer is a silicon oxide layer;

[0024] A hydrophobic layer is prepared so that the hydrophobic layer covers the outside of the intermediate layer, and the hydrophobic layer is a fluorine-containing silane layer.

[0025] In one implementation of the present disclosure, preparing an intermediate layer includes:

[0026] placing silicon dioxide particles in a vapor deposition chamber;

[0027] Heat the evaporation chamber to 200°C and evacuate the chamber to 1*10 -3 Pa, set the evaporation rate to

[0028] The thickness of the evaporation The intermediate layer.

[0029] In another implementation of the present disclosure, preparing a hydrophobic layer includes:

[0030] placing an organic fluoride material in a vapor deposition chamber;

[0031] Heat the evaporation chamber to 200°C and evacuate the chamber to 1*10-3 Pa, set the evaporation rate to

[0032] The thickness of the evaporation The hydrophobic layer;

[0033] The hydrophobic layer is allowed to stand at room temperature for at least 170 to 190 minutes.

[0034] In another implementation of the present disclosure, preparing an epitaxial layer includes:

[0035] Growing each sublayer of the epitaxial layer, each sublayer of the epitaxial layer comprising a first ohmic contact layer, a first semiconductor layer, an active layer, a second semiconductor layer and a second ohmic contact layer stacked in sequence;

[0036] A groove is formed on the side of the epitaxial layer, and the groove extends from the first semiconductor layer to the second semiconductor layer.

[0037] The technical solution provided by the embodiments of the present disclosure has the following beneficial effects:

[0038] The light-emitting diode chip provided by the embodiment of the present disclosure includes an epitaxial layer and a waterproof film covering the outside of the epitaxial layer. The waterproof film includes an intermediate layer and a hydrophobic layer, and the intermediate layer and the hydrophobic layer sequentially cover the outside of the epitaxial layer. Among them, the hydrophobic layer is a fluorine-containing silane layer. Under the hydrophobic properties of the fluorine-containing silane, the hydrophobic layer can well isolate the external water vapor and prevent the water vapor from penetrating into the epitaxial layer. The intermediate layer is a silicon oxide layer, and the silicon oxide layer can react with water vapor to generate Si-OH bonds, and the Si-OH bonds further react with the fluorine-containing silane layer, so that the fluorine-containing silane layer is tightly adhered to the silicon oxide layer, that is, the hydrophobic layer is tightly adhered to the outside of the epitaxial layer through the intermediate layer.

[0039] That is to say, by designing the intermediate layer as a silicon oxide layer and the hydrophobic layer as a fluorine-containing silane layer, the waterproof film can be closely adhered to the outside of the epitaxial layer and achieve a good waterproof effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0041] Figure 1 is a schematic structural diagram of a light-emitting diode chip provided by an embodiment of the present disclosure;

[0042] Figure 2is a schematic structural diagram of a light-emitting diode chip provided by an embodiment of the present disclosure;

[0043] Figure 3 is a flow chart of a method for preparing a light-emitting diode chip provided by an embodiment of the present disclosure;

[0044] Figure 4 is a flow chart of another method for preparing a light emitting diode chip provided by an embodiment of the present disclosure;

[0045] Figure 5 is a schematic diagram of a process for preparing a light-emitting diode chip provided by an embodiment of the present disclosure;

[0046] Figure 6 is a schematic diagram of a process for preparing a light-emitting diode chip provided by an embodiment of the present disclosure;

[0047] Figure 7 is a schematic diagram of a process for preparing a light-emitting diode chip provided by an embodiment of the present disclosure;

[0048] Figure 8 is a schematic diagram of a process for preparing a light-emitting diode chip provided by an embodiment of the present disclosure;

[0049] Fig. 9 is a schematic diagram of a process for preparing a light-emitting diode chip provided by an embodiment of the present disclosure;

[0050] Fig.10 is a schematic diagram of a process for preparing a light-emitting diode chip provided by an embodiment of the present disclosure;

[0051] Fig.11 is a schematic diagram of a process for preparing a light-emitting diode chip provided by an embodiment of the present disclosure;

[0052] Fig.12 It is a schematic diagram of the preparation process of the light-emitting diode chip provided in the embodiment of the present disclosure.

[0053] The symbols in the figure mean the following:

[0054] 1. Epitaxial layer;

[0055] 11. first ohmic contact layer; 12. first semiconductor layer; 121. roughened region; 13. active layer; 14. second semiconductor layer; 15. second ohmic contact layer; 16. groove; 17. cut-off layer; 18. dielectric layer; 19. mirror reflection layer; 110. bonding layer;

[0056] 2. Waterproof membrane;

[0057] 21. middle layer; 22. hydrophobic layer;

[0058] 3. a first electrode;

[0059] 4. Protective layer;

[0060] 5. Substrate;

[0061] 6. Substrate;

[0062] 7. Second electrode.

[0063] The above drawings show clear embodiments of the present disclosure, which will be described in more detail below. These drawings and text descriptions are not intended to limit the scope of the present disclosure in any way, but to illustrate the concepts of the present disclosure to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0064] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0065] The embodiment of the present disclosure provides a light emitting diode chip, Figure 1 A schematic diagram of the structure of a light emitting diode chip provided in an embodiment of the present disclosure is shown in FIG. Figure 1 The light emitting diode chip includes: an epitaxial layer 1 and a waterproof film 2.

[0066] The waterproof membrane 2 includes an intermediate layer 21 and a hydrophobic layer 22 . The intermediate layer 21 is a silicon oxide layer covering the outside of the epitaxial layer 1 . The hydrophobic layer 22 is a fluorine-containing silane layer covering the side of the intermediate layer 21 facing away from the epitaxial layer 1 .

[0067] The light-emitting diode chip provided by the embodiment of the present disclosure includes an epitaxial layer 1 and a waterproof film 2 covering the outside of the epitaxial layer 1. The waterproof film 2 includes an intermediate layer 21 and a hydrophobic layer 22, and the intermediate layer 21 and the hydrophobic layer 22 are sequentially covered on the outside of the epitaxial layer 1. Among them, the hydrophobic layer 22 is a fluorine-containing silane layer. Under the hydrophobic property of the fluorine-containing silane, the hydrophobic layer 22 can well isolate the external water vapor and prevent the water vapor from penetrating into the epitaxial layer 1. The intermediate layer 21 is a silicon oxide layer. The silicon oxide layer can react with water vapor to generate Si-OH bonds, and the Si-OH bonds further react with the fluorine-containing silane layer, so that the fluorine-containing silane layer is tightly adhered to the silicon oxide layer, that is, the hydrophobic layer 22 is tightly adhered to the outside of the epitaxial layer 1 through the intermediate layer 21.

[0068] That is, by designing the intermediate layer 21 as a silicon oxide layer and the hydrophobic layer 22 as a fluorine-containing silane layer, the waterproof film 2 can be closely adhered to the outside of the epitaxial layer 1 and achieve a good waterproof effect.

[0069] Exemplarily, the intermediate layer 21 is a silicon dioxide layer. Of course, the intermediate layer 21 can also be a silicon oxide layer in other forms, which is not limited in the present disclosure.

[0070] In this embodiment, the thickness of the intermediate layer 21 is

[0071] Exemplarily, the thickness of the middle layer 21 is The thickness of the intermediate layer 21 is designed to be the above value, which can ensure the functionality of the intermediate layer 21, that is, achieve adhesion to the hydrophobic layer 22, and avoid too low preparation efficiency of the intermediate layer 21.

[0072] In this embodiment, the thickness of the hydrophobic layer 22 is

[0073] Exemplarily, the thickness of the hydrophobic layer 22 is The thickness of the hydrophobic layer 22 is designed to be the above value, which can not only ensure the functionality of the hydrophobic layer 22, that is, achieve isolation from water vapor, but also avoid the preparation efficiency of the hydrophobic layer 22 being too low.

[0074] Figure 2 A schematic diagram of the structure of the light emitting diode chip provided in the embodiment of the present disclosure, combined with Figure 2 In this embodiment, the epitaxial layer 1 includes a first ohmic contact layer 11, a first semiconductor layer 12, an active layer 13, a second semiconductor layer 14, and a second ohmic contact layer 15 stacked in sequence. The side of the epitaxial layer 1 has a groove 16, and the groove 16 extends from the first semiconductor layer 12 to the second semiconductor layer 14. The waterproof film 2 covers the side of the first semiconductor layer 12 facing away from the active layer 13, and the groove 16.

[0075] In the above implementation, the first semiconductor layer 12 has a first conductivity type, and the second semiconductor layer 14 has a second conductivity type different from the first conductivity type. Energy transition occurs between the first semiconductor layer 12 and the second semiconductor layer 14, so that the active layer 13 emits light. The first ohmic contact layer 11 is located on the side of the first semiconductor layer 12 facing away from the active layer 13, and is used to achieve ohmic contact with the first semiconductor layer 12. The second ohmic contact layer 15 is located on the side of the second semiconductor layer 14 facing away from the active layer 13, and is used to achieve ohmic contact with the second semiconductor layer 14. Since the side of the epitaxial layer 1 has a groove 16, the groove 16 provides a housing space for the waterproof film 2, so that the waterproof film 2 can provide waterproof protection for the side of the epitaxial layer 1, especially for the first semiconductor layer 12, the active layer 13 and the second semiconductor layer 14.

[0076] Of course, in other embodiments, in order to provide waterproof protection to the side surfaces of more sub-layers of the epitaxial layer 1 , the groove 16 may also extend to the second ohmic contact layer 15 , and the present disclosure does not limit this.

[0077] Exemplarily, the first semiconductor layer 12 is an N-type aluminum indium phosphide layer, the active layer 13 is a quantum well layer, and the second semiconductor layer 14 is a P-type aluminum indium phosphide layer.

[0078] In this embodiment, a surface of the first semiconductor layer 12 facing away from the active layer 13 has a roughened area 121 , and the waterproof film 2 at least partially covers the roughened area 121 .

[0079] In the above implementation, the surface of the first semiconductor layer 12 facing away from the active layer 13 is roughened so that the active layer 13 can reduce the total reflection of light at the first semiconductor layer 12 after emitting light, thereby increasing the brightness of the LED chip.

[0080] Exemplarily, the first semiconductor layer 12 in the roughened region 121 has a regular or irregular uneven structure, thereby reducing the total reflection of light in the first semiconductor layer 12 .

[0081] In this embodiment, the light emitting diode chip further includes a first electrode 3 , which is connected to one side of the epitaxial layer 1 , and the waterproof film 2 at least partially covers the junction between the first electrode 3 and the epitaxial layer 1 .

[0082] In the above implementation, the waterproof film 2 covers the junction between the first electrode 3 and the epitaxial layer 1, which can effectively prevent moisture from penetrating into the epitaxial layer 1 from the junction between the first electrode 3 and the epitaxial layer 1, thereby further improving the waterproof performance of the light-emitting diode chip.

[0083] Exemplarily, the first electrode 3 completely covers and wraps the first ohmic contact layer 11 .

[0084] Therefore, on the one hand, the coverage area of ​​the waterproof film 2 is reduced, the difficulty of preparing the waterproof film 2 is effectively reduced, and the preparation efficiency of the light-emitting diode is improved. On the other hand, reliable ohmic contact between the first electrode 3 and the first ohmic contact layer 11 is ensured.

[0085] In this embodiment, the light emitting diode chip further includes a protective layer 4 , the protective layer 4 covers the outside of the epitaxial layer 1 , and the waterproof film 2 covers the outside of the protective layer 4 .

[0086] In the above implementation, a protective layer 4 is first covered on the epitaxial layer 1, and then a waterproof film 2 is covered on the protective layer 4. In this way, the epitaxial layer 1 can be protected by the protective layer 4, especially for insulation protection, and the epitaxial layer 1 can be waterproofed by the waterproof film 2. Through the combination of the protective layer 4 and the waterproof film 2, the epitaxial layer 1 can be protected more comprehensively.

[0087] Exemplarily, the protection layer 4 is a silicon nitride layer.

[0088] It is worth noting that the hydrophobic layer 22 is a fluorine-containing silane layer, and due to the material properties of the fluorine-containing silane layer and the silicon nitride layer, the hydrophobic layer 22 is not easy to directly adhere to the protective layer 4. Therefore, in this embodiment, an intermediate layer 21 is provided between the hydrophobic layer 22 and the protective layer 4, and the intermediate layer 21 is a silicon oxide layer, so that the intermediate layer 21 can adhere to the protective layer 4, so that the protective layer 4, the intermediate layer 21, and the hydrophobic layer 22 are closely adhered to each other.

[0089] Continue to see Figure 2 In this embodiment, the light emitting diode chip further includes a dielectric layer 18 , a mirror reflection layer 19 , a bonding layer 110 , a substrate 6 and a second electrode 7 .

[0090] The dielectric layer 18 is a silicon oxide layer, and is located on the side of the second ohmic contact layer 15 that is opposite to the second semiconductor layer 14. The mirror reflection layer 19 is a gold-zinc alloy layer, and is located on the side of the dielectric layer 18 that is opposite to the second ohmic layer. The bonding layer 110 is a gold layer, and is located on the side of the mirror reflection layer 19 that is opposite to the dielectric layer 18. The substrate 6 is a silicon wafer, and is located on the side of the bonding layer 110 that is opposite to the mirror reflection layer 19. The second electrode 7 is located on the side of the substrate 6 that is opposite to the bonding layer 110.

[0091] Exemplarily, a conductive hole pattern is provided on the dielectric layer 18 , and the mirror reflection layer 19 penetrates the conductive hole of the dielectric layer 18 and is electrically connected to the second ohmic contact layer 15 .

[0092] The light-emitting diode chip provided by the embodiment of the present disclosure was subjected to a steady-state damp heat test. In the test, the light-emitting diode chip without a waterproof film was used as a first control group, and the light-emitting diode chip with only a hydrophobic layer but no intermediate layer was used as a second control group, and the test data shown in Table 1 were obtained:

[0093]

[0094] Table 1

[0095] It can be seen that the LED chip provided by the embodiment of the present disclosure has a failure rate of 0 before 168 hours, that is, no failure. After 1000 hours, the failure rate is only 3%, which shows that its waterproof effect is the best. The reason why the waterproof effect of the second control group is not as good as that of the embodiment of the present disclosure is that only a hydrophobic layer is provided, which makes it difficult for the hydrophobic layer to adhere to the outside of the epitaxial layer and is prone to fall off, resulting in waterproof failure.

[0096] In addition, the light-emitting diode chip provided in the embodiment of the present disclosure, as well as the first control group and the second control group were respectively subjected to water drop angle tests. The water drop angle of the first control group was 25°, and the water drop angle of the light-emitting diode provided in the embodiment of the present disclosure was 103°, which effectively increased its resistance to water vapor erosion.

[0097] Figure 3 A flowchart of a method for preparing a light emitting diode chip provided in an embodiment of the present disclosure, combined with Figure 3 In this embodiment, the preparation method includes:

[0098] Step 301: Prepare an epitaxial layer 1.

[0099] Step 302: prepare an intermediate layer 21 so that the intermediate layer 21 covers the epitaxial layer 1, and the intermediate layer 21 is a silicon oxide layer.

[0100] Step 303: prepare a hydrophobic layer 22 so that the hydrophobic layer 22 covers the outside of the intermediate layer 21, and the hydrophobic layer 22 is a fluorine-containing silane layer.

[0101] When preparing a light-emitting diode chip by the preparation method provided by the embodiment of the present disclosure, an intermediate layer 21 and a hydrophobic layer 22 are sequentially prepared outside the epitaxial layer 1. Among them, the hydrophobic layer 22 is a fluorine-containing silane layer. Under the hydrophobic property of the fluorine-containing silane, the hydrophobic layer 22 can well isolate the external water vapor and prevent the water vapor from penetrating into the epitaxial layer 1. The intermediate layer 21 is a silicon oxide layer, and the silicon oxide layer can react with water vapor to generate Si-OH bonds, and the Si-OH bonds further react with the fluorine-containing silane layer, so that the fluorine-containing silane layer is tightly adhered to the silicon oxide layer, that is, the hydrophobic layer 22 is tightly adhered to the outside of the epitaxial layer 1 through the intermediate layer 21.

[0102] That is, by designing the intermediate layer 21 as a silicon oxide layer and the hydrophobic layer 22 as a fluorine-containing silane layer, the waterproof film 2 can be closely adhered to the outside of the epitaxial layer 1 and achieve a good waterproof effect.

[0103] Figure 4 A flowchart of another method for preparing a light emitting diode chip provided in an embodiment of the present disclosure, combined with Figure 4 In this embodiment, the preparation method includes:

[0104] Step 401: Provide a substrate 5.

[0105] Exemplarily, the substrate 5 is a gallium arsenide substrate 5 , and the substrate 5 provides a growth foundation for the subsequent growth of the epitaxial layer 1 .

[0106] Step 402 : growing an epitaxial layer 1 on one side of the substrate 5 .

[0107] Exemplarily, in step 402, a cut-off layer 17, a first ohmic contact layer 11, a first semiconductor layer 12, an active layer 13, a second semiconductor layer 14, a second ohmic contact layer 15 are sequentially grown on one side of the substrate 5 (see Figure 5 ).

[0108] Exemplarily, a metal-organic chemical vapor deposition (MOCVD) technique is used to sequentially grow a cutoff layer 17, a first ohmic contact layer 11, a first semiconductor layer 12, an active layer 13, a second semiconductor layer 14, and a second ohmic contact layer 15. The first semiconductor layer 12 has a first conductivity type, and the second semiconductor layer 14 has a second conductivity type different from the first conductivity type. Energy transition occurs between the first semiconductor layer 12 and the second semiconductor layer 14, and the active layer 13 emits light.

[0109] Exemplarily, the first semiconductor layer 12 is an N-type aluminum indium phosphide layer, the active layer 13 is a quantum well layer, and the second semiconductor layer 14 is a P-type aluminum indium phosphide layer.

[0110] Step 403: Deposit a dielectric layer 18 on the side of the second ohmic contact layer 15 facing away from the second semiconductor layer 14, and form a conductive hole pattern by photolithography (see Figure 6 ).

[0111] Exemplarily, a conductive hole pattern is formed on the dielectric layer 18 by using BOE (Buffered Oxide Etch) wet etching method.

[0112] Step 404: evaporate a mirror reflection layer 19 on the side of the dielectric layer 18 facing away from the second ohmic contact layer 15, and anneal.

[0113] Exemplarily, the mirror reflection layer 19 is a gold-zinc alloy layer. Through step 404 , ohmic contact can be achieved between the mirror reflection layer 19 and the second semiconductor layer 14 through the second ohmic contact layer 15 .

[0114] Step 405 : evaporating a bonding layer 110 on the side of the mirror reflection layer 19 facing away from the dielectric layer 18 .

[0115] Exemplarily, the bonding layer 110 is a gold layer, which is used for bonding with the substrate 6 in step 406 .

[0116] Step 406: Provide a substrate 6, bond the bonding layer 110 on the substrate 6 to the bonding layer 110 on the mirror reflection layer 19, and remove the substrate 5 and the cut-off layer 17, so that the first ohmic contact layer 11 is exposed (see Figure 7 ).

[0117] Exemplarily, the substrate 6 is a silicon wafer, and one side of the substrate 6 has a bonding layer 110 made of the same material as the bonding layer 110 on the mirror reflection layer 19 , thereby achieving bonding between the two bonding layers 110 .

[0118] Step 407: Etch the first ohmic contact layer 11 to expose the first semiconductor layer 12, and evaporate to form the first electrode 3, so that the first electrode 3 covers and wraps the first ohmic contact layer 11 (see Figure 8 ).

[0119] In the above implementation, the first electrode 3 covers and wraps the first ohmic contact layer 11 , thereby ensuring reliable ohmic contact between the first electrode 3 and the first ohmic contact layer 11 .

[0120] For example, after the first electrode 3 is formed by evaporation, the chamber temperature is 200° C., N 2 Annealing is performed in an atmosphere for 10 minutes, so that a reliable ohmic contact is formed between the first electrode 3 and the first ohmic contact layer 11 .

[0121] Step 408: A groove 16 is formed on the side of the epitaxial layer 1. The groove 16 extends from the first semiconductor layer 12 to the second semiconductor layer 14 (see Fig. 9 ).

[0122] Exemplarily, the epitaxial layer 1 is channel-cut by photolithography and ICP (Inductively Coupled Plasm) processes to form a plurality of relatively independent core particles, and the grooves 16 are located on the side surfaces of the epitaxial layer 1 of the relatively independent core particles.

[0123] Step 409: Roughen the surface of the first semiconductor layer 12 facing away from the active layer 13 to form a roughened region 121 (see Fig. 9 ).

[0124] Exemplarily, by roughening the surface of the first semiconductor layer 12 facing away from the active layer 13 through photolithography and wet etching processes, the total reflection of light at the first semiconductor layer 12 can be reduced, thereby increasing the brightness of the light emitting diode chip.

[0125] Step 410: Prepare a protective layer 4 (see Fig.10 ).

[0126] Exemplarily, the protective layer 4 is deposited on a side of the first semiconductor layer 12 facing away from the active layer 13 and in the groove 16 by a PECVD (Plasma Enhanced Chemical Vapor Deposition) process.

[0127] Exemplarily, the protection layer 4 is a silicon nitride layer.

[0128] Step 411: Prepare the intermediate layer 21 so that the intermediate layer 21 covers the epitaxial layer 1. The intermediate layer 21 is a silicon oxide layer (see Fig.11 ).

[0129] Exemplarily, the intermediate layer 21 covers the protective layer 4 .

[0130] In this embodiment, step 411 includes the following steps:

[0131] First, silicon dioxide particles are placed in a vapor deposition chamber.

[0132] Then, the evaporation chamber was heated to 200°C and evacuated to 1*10 -3 Pa, set the evaporation rate to

[0133] Finally, the evaporation thickness is The middle layer 21.

[0134] Step 412: Prepare a hydrophobic layer 22 so that the hydrophobic layer 22 covers the outside of the intermediate layer 21. The hydrophobic layer 22 is a fluorine-containing silane layer (see Fig.11 ).

[0135] In this embodiment, step 412 includes the following steps:

[0136] First, the organic fluoride material is placed in an evaporation chamber.

[0137] Then, the evaporation chamber was heated to 200°C and evacuated to 1*10 -3 Pa, set the evaporation rate to

[0138] Then, the thickness is obtained by evaporation. The hydrophobic layer 22 is provided.

[0139] Finally, the hydrophobic layer 22 is left to stand at room temperature for at least 170 to 190 minutes.

[0140] Through step 411 and step 412, a waterproof membrane 2 is prepared.

[0141] It is worth noting that the hydrophobic layer 22 is a fluorine-containing silane layer, and due to the material properties of the fluorine-containing silane layer and the silicon nitride layer, the hydrophobic layer 22 is not easy to directly adhere to the protective layer 4. Therefore, in this embodiment, an intermediate layer 21 is provided between the hydrophobic layer 22 and the protective layer 4, and the intermediate layer 21 is a silicon oxide layer, so that the intermediate layer 21 can adhere to the protective layer 4, so that the protective layer 4, the intermediate layer 21, and the hydrophobic layer 22 are closely adhered to each other.

[0142] Step 413: Form a second electrode 7 by evaporation on the side of the substrate 6 facing away from the bonding layer 110 (see Fig.12 ).

[0143] For example, after the second electrode 7 is formed by evaporation, the chamber temperature is 380°C, N 2 Annealing is performed in the atmosphere for 10 minutes, so that a reliable ohmic contact is formed between the second electrode 7 and the substrate 6 .

[0144] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons of ordinary skill in the field to which the present disclosure belongs. The words "first", "second", "third" and similar words used in the patent application specification and claims of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantity limitation, but indicate the existence of at least one. Words such as "include" or "comprise" and similar words mean that the elements or objects appearing before "include" or "comprise" include the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0145] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A light emitting diode chip, characterized in that: It comprises an epitaxial layer (1) and a waterproof film (2); The waterproof film (2) comprises an intermediate layer (21) and a hydrophobic layer (22); the intermediate layer (21) is a silicon oxide layer, the intermediate layer (21) covers the outside of the epitaxial layer (1), and the hydrophobic layer (22) is a fluorine-containing silane layer, the hydrophobic layer (22) covers the side of the intermediate layer (21) facing away from the epitaxial layer (1).

2. The light emitting diode chip according to claim 1, characterized in that: The thickness of the intermediate layer (21) is The thickness of the hydrophobic layer (22) is 3. The light emitting diode chip according to claim 1, characterized in that: The epitaxial layer (1) comprises a first ohmic contact layer (11), a first semiconductor layer (12), an active layer (13), a second semiconductor layer (14) and a second ohmic contact layer (15) which are stacked in sequence; The side surface of the epitaxial layer (1) is provided with a groove (16), and the groove (16) extends from the first semiconductor layer (12) to the second semiconductor layer (14); The waterproof film (2) covers the side of the first semiconductor layer (12) facing away from the active layer (13), as well as the inside of the groove (16).

4. The light emitting diode chip according to claim 3, characterized in that: The first semiconductor layer (12) has a roughened region (121) on a side facing away from the active layer (13); The waterproof membrane (2) at least partially covers the roughened area (121).

5. The light emitting diode chip according to claim 1, characterized in that: The light-emitting diode chip also includes a first electrode (3); The first electrode (3) is connected to one side of the epitaxial layer (1); The waterproof film (2) at least partially covers the junction between the first electrode (3) and the epitaxial layer (1).

6. The light emitting diode chip according to claim 1, characterized in that: The light-emitting diode chip further comprises a protective layer (4); The protective layer (4) covers the outside of the epitaxial layer (1); The waterproof membrane (2) covers the outside of the protective layer (4).

7. A method for preparing a light emitting diode chip, characterized in that: The preparation method is applicable to preparing the light-emitting diode chip according to claim 1, and the preparation method comprises: Preparing an epitaxial layer (1); Preparing an intermediate layer (21) so that the intermediate layer (21) covers the outside of the epitaxial layer (1), and the intermediate layer (21) is a silicon oxide layer; A hydrophobic layer (22) is prepared so that the hydrophobic layer (22) covers the outside of the intermediate layer (21), and the hydrophobic layer (22) is a fluorine-containing silane layer.

8. The preparation method according to claim 7, characterized in that: The intermediate layer (21) is prepared, comprising: placing silicon dioxide particles in a vapor deposition chamber; Heat the evaporation chamber to 200°C and evacuate the chamber to 1*10 -3 Pa, set the evaporation rate to The thickness of the evaporation The intermediate layer (21).

9. The preparation method according to claim 7, characterized in that: Preparing a hydrophobic layer (22) comprises: placing an organic fluoride material in a vapor deposition chamber; Heat the evaporation chamber to 200°C and evacuate the chamber to 1*10 -3 Pa, set the evaporation rate to The thickness of the evaporation The hydrophobic layer (22); The hydrophobic layer (22) is allowed to stand at room temperature for at least 170 to 190 minutes.

10. The preparation method according to claim 7, characterized in that: Preparing an epitaxial layer (1), comprising: Growing each sublayer of the epitaxial layer (1), each sublayer of the epitaxial layer (1) comprising a first ohmic contact layer (11), a first semiconductor layer (12), an active layer (13), a second semiconductor layer (14) and a second ohmic contact layer (15) stacked in sequence; A groove (16) is provided on the side surface of the epitaxial layer (1), and the groove (16) extends from the first semiconductor layer (12) to the second semiconductor layer (14).

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