A flip chip single particle test heat dissipation system and a heat dissipation method

Abstract

The application discloses a flip chip single particle test heat dissipation system and a heat dissipation method, and the system comprises a heat sink, a semiconductor refrigeration sheet, a graphene film and an insulating gasket, the heat sink adopts a hollow structure form, the hollow area of the heat sink can completely expose a die substrate, and the bottom of the heat sink is attached to the hot end of the semiconductor refrigeration sheet through heat-conducting glue; the semiconductor refrigeration sheet adopts a hollow structure form, the hollow area of the semiconductor refrigeration sheet can completely expose the die substrate; the surface of the graphene film can completely cover the surface of the semiconductor refrigeration sheet and is not hollow; one side of the graphene film is attached to the cold end of the semiconductor refrigeration sheet through heat-conducting glue, and the other side directly covers the die substrate of the flip chip and the insulating gasket. The method is implemented based on the system. The application has the advantages of simple and compact structure, simple operation, good heat dissipation effect, low cost and the like.

Description

Technical Field

[0001] This invention mainly relates to the field of single-event testing of integrated circuit chips, and specifically refers to a heat dissipation system and method for single-event testing of flip chips. Background Technology

[0002] To improve the heat dissipation and interface performance of integrated circuit chips, high-end integrated circuit chips such as microprocessors have adopted flip-chip packaging in large quantities, and heat sinks are installed on the chip surface for heat dissipation.

[0003] Currently, flip-chip heat dissipation structures such as Figure 1 As shown. The die 300 consists of a substrate 100 and an interconnect layer 200. Metal balls 400 (bumps) made of materials such as tin-lead or tin-silver connect the first surface 500 (pad) of the interconnect layer 200 of the die 300 to the second surface 700 (pad) on the substrate 600, thereby connecting the die 300 to the substrate 600. Solder balls 800 are connected to the bottom surface of the substrate 600. At this time, the interconnect layer 200 of the die 300 faces downwards and is connected to the packaging substrate 600, while the substrate 100 of the die 300 faces upwards. A heat sink 1 covers the substrate 100 of the die 300.

[0004] In single-event experiments, heavy-ion accelerators are typically used to generate high-energy heavy ions to irradiate silicon materials. Since the range of high-energy heavy ions generated by heavy-ion accelerators in silicon is only tens to hundreds of micrometers, to ensure that the high-energy heavy ions can reach the flip chip during single-event experiments, the heat sink 1 must be removed before performing single-event experiments on the flip chip, exposing the substrate 100 of the bare die 300. However, after removing the heat sink 1, the heat dissipation capacity of the flip chip decreases drastically, and it generally cannot function properly when the operating power exceeds 5 watts.

[0005] To address these issues, existing traditional methods involve reducing the operating frequency of the flip chip or disabling some internal modules and testing each module separately to lower the operating power of the flip chip to below 5 watts before conducting single-event experiments. However, this approach suffers from several drawbacks. Reducing the chip's operating frequency leads to an overestimation of the flip chip's single-event transient immunity, significantly increasing single-event experiment errors. Disabling some internal modules and testing each module separately increases accelerator time and costs. Furthermore, the coupling effect between modules results in a substantial error in synthesizing the overall single-event immunity of the chip from module-level single-event immunity test data. Summary of the Invention

[0006] The technical problems to be solved by the present application are: in view of the technical problems existing in the prior art, the present application provides a flip chip single particle test heat dissipation system and a heat dissipation method, which are simple and compact in structure, easy to operate, good in heat dissipation effect and low in cost.

[0007] To solve the above technical problems, the present application adopts the following technical solutions:

[0008] A flip chip single particle test heat dissipation system, comprising a heat sink, a semiconductor refrigeration sheet, a graphene film and an insulating gasket, wherein the heat sink adopts a hollow structure, the hollow area of which can completely expose the die substrate, the bottom of the heat sink is attached to the hot end of the semiconductor refrigeration sheet through thermal conductive glue; the semiconductor refrigeration sheet adopts a hollow structure, the hollow area of which can completely expose the die substrate; the surface of the graphene film can completely cover the surface of the semiconductor refrigeration sheet without being hollow; one side of the graphene film is attached to the cold end of the semiconductor refrigeration sheet through thermal conductive glue, and the other side directly covers the die substrate of the flip chip and the insulating gasket.

[0009] As a further improvement of the system of the present application: the insulating gasket adopts a hollow structure, and the hollow area can completely expose the die substrate.

[0010] As a further improvement of the system of the present application: the insulating gasket is placed on the substrate of the flip chip, and the hollow area exposes the die substrate of the flip chip; the other side of the insulating gasket contacts the graphene film.

[0011] As a further improvement of the system of the present application: the bottom surface of the heat sink can completely cover the surface of the semiconductor refrigeration sheet.

[0012] As a further improvement of the system of the present application: the hot end of the semiconductor refrigeration sheet is attached to the bottom of the heat sink through thermal conductive glue, and the cold end of the semiconductor refrigeration sheet is attached to the graphene film through thermal conductive glue.

[0013] As a further improvement of the system of the present application: the power port of the semiconductor refrigeration sheet is connected to the power supply through a wire; the power supply is used to power the semiconductor refrigeration sheet, so that the refrigeration power of the semiconductor refrigeration sheet is not less than the working power of the flip chip.

[0014] As a further improvement of the system of the present application: the graphene film is a multi-layer graphene material high-temperature pressed product, the thickness is 1-10 microns, and the thermal conductivity is not less than 1500 W / (m·K).

[0015] A heat dissipation method based on any one of the above flip chip single particle test heat dissipation systems, comprising:

[0016] Step S1: Apply thermal conductive glue to the hot end of the semiconductor refrigeration sheet and attach it to the bottom surface of the heat sink;

[0017] Step S2: The cold end of the semiconductor refrigeration piece is coated with a heat-conducting glue, and is attached to one side of the graphene film;

[0018] Step S3: The insulating gasket is placed on the substrate of the flip chip, and the hollowed-out area exposes the die substrate of the flip chip;

[0019] Step S4: The combination of the heat sink, the semiconductor refrigeration piece and the graphene film is placed on the combination of the flip chip and the insulating gasket and is fixed well, so that the other side of the graphene film is attached to the surface of the die substrate of the flip chip and also contacts the insulating gasket;

[0020] Step S5: The power supply port of the semiconductor refrigeration piece is connected to the power supply through a wire;

[0021] Step S6: The power supply supplies power to the semiconductor refrigeration piece;

[0022] Step S7: The flip chip is started to work, and the single-particle test is started.

[0023] As a further improvement of the method of the application: the combination of the flip chip and the insulating gasket is placed into a socket, and then the heat sink is fixed and locked with the socket, so that the combination of the heat sink, the semiconductor refrigeration piece and the graphene film is tightly attached to the surface of the die substrate of the flip chip.

[0024] As a further improvement of the method of the application: the flip chip is welded on a PCB board, and then the heat sink is fixed and locked with the PCB board, so that the combination of the heat sink, the semiconductor refrigeration piece and the graphene film is tightly attached to the surface of the die substrate of the flip chip.

[0025] Compared with the prior art, the application has the advantages that:

[0026] 1. The flip chip single-particle test heat dissipation system and heat dissipation method of the application realize the single-particle test of the flip chip under a large power of more than 20W for the first time. The graphene film with super-high thermal conductivity can effectively transfer the heat generated by the flip chip to the heat sink, so as to ensure the normal work of the flip chip with a power of more than 20W. At the same time, the heavy ions can penetrate the ultra-thin graphene film, so as to ensure the normal performance of the single-particle test.

[0027] 2. The flip chip single-particle test heat dissipation system and heat dissipation method of the application have large heat dissipation power, can ensure that the heavy ions reach the flip chip, and have simple structure and convenient operation. The application realizes the single-particle test of the flip chip under a large power, and is especially suitable for heat dissipation during the single-particle test of the large-power flip chip. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 is a schematic diagram of a flip chip heat dissipation structure.

[0029] Figure 2 is the overall structure schematic diagram of the heat dissipation system of the flip chip single particle test of the present application.

[0030] Figure 3 is the top view schematic diagram of the heat sink in the specific application example of the present application.

[0031] Figure 4 is the bottom view schematic diagram of the heat sink and semiconductor refrigeration sheet combination in the specific application example of the present application.

[0032] Figure 5 is the top view schematic diagram of the graphene film and semiconductor refrigeration sheet combination in the specific application example of the present application.

[0033] Figure 6 is the top view schematic diagram of the insulating gasket and flip chip combination in the specific application example of the present application.

[0034] Legend:

[0035] 1, heat sink; 2, semiconductor refrigeration sheet; 3, graphene film; 4, power supply; 5, wire; 6, heat-conducting glue; 7, insulating gasket; 100, substrate; 200, interconnection layer; 300, die; 400, metal ball; 500, first surface; 600, base plate; 700, second surface; 800, solder ball. DETAILED DESCRIPTION

[0036] The present application will be further described below in conjunction with the drawings and specific examples.

[0037] In the description of the present application, it should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0038] In addition, the terms "first", "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features referred to. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0039] In this invention, unless otherwise explicitly specified and limited, the terms "assembly," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0040] like Figures 2 to 6 As shown, a flip-chip single-event thermal management system of the present invention includes: a heat sink 1, a semiconductor cooling chip 2, a graphene film 3, and an insulating pad 7, wherein:

[0041] The heat sink 1 has a hollowed-out structure in the middle, and the hollowed-out area can completely expose the bare substrate 100. The bottom of the heat sink 1 is attached to the hot end of the semiconductor cooling chip 2 with thermally conductive adhesive 6.

[0042] The semiconductor cooling chip 2 adopts a structure with a hollow center, and its hollow area can completely expose the bare substrate 100. Its cooling power is not less than the working power of the flip chip.

[0043] The graphene film 3 has a surface that can completely cover the surface of the semiconductor cooling chip 2 without any perforations; one side of the graphene film 3 is attached to the cold end of the semiconductor cooling chip 2 by thermally conductive adhesive 6, and the other side is not coated with thermally conductive adhesive 6 and directly covers the bare die substrate 100 of the flip chip and the insulating pad 7.

[0044] The insulating pad 7 has a hollowed-out structure in the middle, and the hollowed-out area can completely expose the bare die substrate 100. The insulating pad 7 is placed on the flip chip substrate 600, and its hollowed-out area exposes the bare die substrate 100 of the flip chip. At the same time, the insulating pad 7 also contacts the other side of the graphene film 3.

[0045] In a specific application example, the bottom surface of the heat sink 1 can completely cover the surface of the semiconductor cooling chip 2.

[0046] In a specific application example, the hot end of the semiconductor cooling chip 2 is attached to the bottom of the heat sink 1 via thermally conductive adhesive 6, and the cold end of the semiconductor cooling chip 2 is attached to the graphene film 3 via thermally conductive adhesive.

[0047] In a specific application example, the power port of the thermoelectric cooler 2 is connected to the power supply 4 via a wire 5. The power supply 4 is used to supply power to the thermoelectric cooler 2, ensuring that the cooling power of the thermoelectric cooler 2 is not less than the operating power of the flip chip.

[0048] In a specific application example, the graphene film 3 is a multilayer graphene material high-temperature pressed, the thickness is 1-10 microns, preferably 3-5 microns; the thermal conductivity is not less than 1500 W / (m·K), preferably less than 1200 W / (m·K).

[0049] In a specific application example, the thickness of the insulating pad 7 is 65-90 microns, preferably 80 microns.

[0050] In a specific application example, the distance from the upper surface of the die substrate 100 to the upper surface of the substrate 600 is 140-160 microns, preferably 150 microns.

[0051] In a specific application example, the thickness of the insulating pad 7 is less than the distance from the upper surface of the die substrate 100 to the upper surface of the substrate 600.

[0052] In a specific application example, the material of the insulating pad 7 can be paper, plastic, silicone, rubber, etc. Insulating materials make the graphene film 3 and the substrate insulating.

[0053] The application further provides a heat dissipation method based on the above flip-chip single particle test heat dissipation system, which comprises the following steps:

[0054] Step S1: The hot end of the semiconductor cooling piece 2 is coated with a thermal conductive glue 6 and attached to the bottom surface of the heat sink 1;

[0055] Step S2: The cold end of the semiconductor cooling piece 2 is coated with a thermal conductive glue 6 and attached to one side of the graphene film 3;

[0056] Step S3: The insulating pad 7 is placed on the substrate 600 of the flip-chip, and the hollowed-out area exposes the die substrate 100 of the flip-chip;

[0057] Step S4: The combination of the heat sink 1, the semiconductor cooling piece 2 and the graphene film 3 is placed on the combination of the flip-chip and the insulating pad 7 and fixed well, so that the other side of the graphene film 3 is attached to the surface of the die substrate 100 of the flip-chip and also contacts the insulating pad 7.

[0058] Step S5: The power supply port of the semiconductor cooling piece 2 is connected to the power supply 4 through a wire 5;

[0059] Step S6: The power supply 4 supplies power to the semiconductor cooling piece 2;

[0060] Step S7: Start the flip-chip to work and begin the single particle test.

[0061] In a specific application example, according to actual needs, the application can use the following two methods to fix the two combinations:

[0062] Method 1: Put the combination of flip chip and insulating pad 7 into the socket, and then fix and lock the heat sink with the socket, so that the combination of heat sink 1, semiconductor refrigeration sheet 2 and graphene film 3 is closely attached to the surface of the die substrate 100 of the flip chip.

[0063] Method 2: Solder the flip chip on the PCB board, and then fix and lock the heat sink 1 with the PCB board, so that the combination of heat sink 1, semiconductor refrigeration sheet 2 and graphene film 3 is closely attached to the surface of the die substrate 100 of the flip chip.

[0064] The above is only the preferred embodiment of the present application, and the protection scope of the present application is not limited to the above-mentioned embodiments. Any technical solution falling within the concept of the present application shall fall within the protection scope of the present application. It should be noted that, for ordinary skilled in the art, some improvements and refinements without departing from the principles of the present application shall be considered as falling within the protection scope of the present application.

Claims

1. A flip-chip single event test heat dissipation system, comprising: The heat sink (1), the semiconductor refrigeration sheet (2), the graphene film (3) and the insulating gasket (7) are included, the heat sink (1) adopts the hollow structure form, the hollow area can completely expose the die substrate (100), the bottom of the heat sink (1) is pasted with the hot end of the semiconductor refrigeration sheet (2) through the heat-conducting glue (6); the semiconductor refrigeration sheet (2) adopts the hollow structure form, the hollow area can completely expose the die substrate (100); the surface of the graphene film (3) can completely cover the surface of the semiconductor refrigeration sheet (2) and is not hollow; one side of the graphene film (3) is pasted on the cold end of the semiconductor refrigeration sheet (2) through the heat-conducting glue (6), the other side is directly covered on the die substrate (100) of the flip chip and the insulating gasket (7); the insulating gasket (7) adopts the hollow structure form, the hollow area can completely expose the die substrate (100); the insulating gasket (7) is placed on the substrate (600) of the flip chip, the hollow area exposes the die substrate (100) of the flip chip; the other side of the insulating gasket (7) contacts the graphene film (3).

2. The flip-chip single particle testing heat dissipation system of claim 1, wherein, The bottom surface of the heat sink (1) can completely cover the surface of the semiconductor refrigeration sheet (2).

3. The flip-chip single particle testing heat dissipation system of claim 1, wherein, The hot end of the semiconductor refrigeration sheet (2) is pasted on the bottom of the heat sink (1) through the heat-conducting glue (6), and the cold end of the semiconductor refrigeration sheet (2) is pasted on the graphene film (3) through the heat-conducting glue (6).

4. The flip-chip single-event test heat dissipation system of claim 1, wherein, The power port of the semiconductor refrigeration sheet (2) is connected with the power supply (4) through the wire (5); the power supply (4) is used for supplying power for the semiconductor refrigeration sheet (2), so that the refrigeration power of the semiconductor refrigeration sheet (2) is not less than the working power of the flip chip.

5. The flip-chip single-event test heat dissipation system of claim 1, wherein, The graphene film (3) is a multi-layer graphene material high-temperature pressed product, the thickness is 1-10 microns, and the thermal conductivity is not less than 1500 W / (m·K).

6. A heat dissipation method based on the flip-chip single particle test heat dissipation system according to any one of claims 1-5, characterized in that, It includes: Step S1: the hot end of the semiconductor refrigeration sheet (2) is coated with the heat-conducting glue (6) and is pasted on the bottom surface of the heat sink (1); Step S2: the cold end of the semiconductor refrigeration sheet (2) is coated with the heat-conducting glue (6) and is pasted on one side of the graphene film (3); Step S3: the insulating gasket (7) is placed on the substrate (600) of the flip chip, and the hollow area exposes the die substrate (100) of the flip chip; Step S4: the combination of the heat sink (1), the semiconductor refrigeration sheet (2) and the graphene film (3) is placed on the combination of the flip chip and the insulating gasket (7) and is well fixed, so that the other side of the graphene film (3) is pasted on the surface of the die substrate (100) of the flip chip and contacts the insulating gasket (7); Step S5: the power port of the semiconductor refrigeration sheet (2) is connected with the power supply (4) through the wire (5); Step S6: the power supply (4) supplies power for the semiconductor refrigeration sheet (2); Step S7: the flip chip is started to work, and the single particle test is started.

7. The heat dissipation method according to claim 6, wherein Put the combination of flip chip and insulating pad (7) into the socket, and then fix and lock the heat sink (1) with the socket, so that the combination of heat sink (1), semiconductor refrigeration sheet (2) and graphene film (3) is tightly attached to the surface of the die substrate (100) of the flip chip.

8. The heat dissipation method according to claim 7, wherein, Put the combination of flip chip and insulating pad (7) into the socket, and then fix and lock the heat sink (1) with the socket, so that the combination of heat sink (1), semiconductor refrigeration sheet (2) and graphene film (3) is tightly attached to the surface of the die substrate (100) of the flip chip.

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