High-density self-rectifying device based on CMOS (complementary metal oxide semiconductor) process and preparation method thereof

Abstract

The invention belongs to the technical field of semiconductors, and relates to a high-density self-rectification device based on a CMOS (complementary metal oxide semiconductor) process and a preparation method thereof, and the method comprises the steps that a bottom electrode adopts high-work-function metal as a current input end; the middle active layer adopts two layers of tungsten oxides with different oxygen vacancy contents; the top electrode is made of low-work-function metal, and multiple layers of films are vertically stacked. The high-density self-rectifying device has the beneficial effects that the high-density self-rectifying device can realize forward conduction and reverse cut-off in a high-resistance state and a low-resistance state and is compatible with a current CMOS (Complementary Metal-Oxide-Semiconductor Transistor) process.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a high-density self-rectifying device based on CMOS technology and a preparation method thereof. Background Art

[0002] In the post-Moore era, the development of integrated circuits faces the von Neumann bottleneck problem, which limits the data transmission speed between processors and memory and reduces computing efficiency. To solve this problem, researchers have begun to focus on the potential of memristors as a new type of non-volatile memory device. Memristors have adjustable resistance states and can be used for information storage and computing. They are regarded as an important part of future memory and computing architectures due to their high density and low power consumption. However, when integrating memristors in large-scale passive arrays, self-rectifying devices are required to avoid current crosstalk between arrays. Existing self-rectifying devices often have difficulty maintaining compatibility with CMOS technology while achieving high switching ratios and self-rectification ratios, which limits their practical applications. In addition, although self-rectifying memristors have been developed, they still face the challenges of insufficient switching ratios and material compatibility. The reduction in the switching ratio directly affects the switching ratio measured in large-scale arrays, so it is crucial to optimize these parameters. To alleviate the array crosstalk problem, researchers have proposed a variety of integration architectures, such as 1T1R (1 transistor 1 memristor) and 1S1R (1 selector 1 memristor), but the implementation of these architectures increases the complexity of the manufacturing process.

[0003] Traditional memristor integrated architectures, such as 1T1R and 1S1R, can alleviate the array crosstalk problem, but their implementation increases the complexity of the manufacturing process and reduces production efficiency. Existing self-rectifying devices often have difficulty maintaining compatibility with CMOS technology while achieving high switching ratios and self-rectification ratios. The reduction in the switching ratio directly affects the switching ratio measured in large-scale arrays, resulting in reduced reading accuracy. Summary of the invention

[0004] Technical issues to be solved In view of the above-mentioned shortcomings and deficiencies of the prior art, the present invention provides a high-density self-rectifying device based on CMOS technology and a preparation method thereof, which solves the technical problem that the existing self-rectifying devices are often difficult to maintain compatibility with CMOS technology while achieving high switching ratio and self-rectification ratio, and the reduction of the switching ratio directly affects the switching ratio measured in a large-scale array, resulting in reduced reading accuracy.

[0005] Technical Solution In order to achieve the above object, the main technical solutions adopted by the present invention include: In a first aspect, the present invention provides a high-density self-rectifying device based on CMOS technology, comprising: The bottom electrode is made of high work function metal and serves as the current input terminal; The middle active layer uses two layers of tungsten oxide with different oxygen vacancy contents; The top electrode is made of low work function metal, and multiple layers of thin films are stacked vertically.

[0006] Optionally, the high work function metal includes Pt and p-type silicon.

[0007] Optionally, the low work function metal includes TiN.

[0008] Optionally, the bottom electrode has a thickness of 60 nm.

[0009] Optionally, the intermediate active layer includes WO3 and WO 3-x WO3 layer has a regular lattice structure, forming a high Schottky barrier to ensure the self-rectification characteristics; WO 3-x The layer is rich in oxygen defects, which can improve the switching characteristics by capturing and releasing electrons.

[0010] In a second aspect, the present invention provides a method for preparing a high-density self-rectifying device based on a CMOS process, comprising: Prepare a photoresist barrier layer with a device pattern by lift-off lithography technology; Depositing a high work function metal layer with a thickness of 50nm-60nm as the bottom electrode of the self-rectifying device; A silicon nitride isolation layer with a 3 μm diameter opening circular hole was prepared using a lift-off process; WO3 and WO were prepared by standard power and high power magnetron sputtering process. 3-x Functional layer, including WO 3-x It has abundant oxygen vacancies; A low work function metal film is deposited as the top electrode.

[0011] Optionally, the standard power is 100W and the high power is 200W.

[0012] Beneficial Effects The beneficial effects of the present invention are as follows: a high-density self-rectifying device based on CMOS technology is constructed by constructing a high-work function metal electrode (Pt, p-type silicon, etc.) / WO3 / WO 3-X / low work function metal electrode (TiN, etc.) device structure, high work function metal and WO3 layer form a high Schottky barrier to block the reverse transition of electrons, thereby effectively suppressing the current crosstalk problem that may occur when reading high resistance units in passive arrays. 3-XRich oxygen defects are prepared in the layer, and the energy level potential wells of different depths brought by oxygen vacancies capture electrons from low work function metals to change the device resistance. Compared with related technologies, the high-density self-rectifying device of the present application can achieve forward conduction and reverse cutoff in high resistance state and low resistance state and is compatible with current CMOS process. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 A schematic diagram of the structure of a self-rectifying memristor provided in an embodiment of the present invention; Figure 2 A schematic diagram of a DC current-voltage cycle at different maximum voltages of a self-rectifying memristor provided in an embodiment of the present invention; Figure 3 A schematic diagram of the long-term retention of high and low resistance states of a self-rectifying memristor provided in an embodiment of the present invention; Figure 4 A schematic diagram of the high and low resistance state cycle durability of a self-rectifying device provided by an embodiment of the present invention; Figure 5 A schematic diagram of the process of preparing a 3D vertical structure of a self-rectifying memristor provided in an embodiment of the present invention; Figure 6 Schematic diagram of a 3D core-shell stacked architecture of a self-rectifying memristor provided in an embodiment of the present invention.

[0014] Description of Reference Numerals 1: Low work function metal; 2: WO 3-X ; 3: WO3; 4: high work function metal; 5: SiO2; 6: self-rectifying memristor; 7: word line; 8: bit line; 9: metal interconnect. DETAILED DESCRIPTION

[0015] In order to better explain the present invention and facilitate understanding, the present invention is described in detail below through specific implementation modes in conjunction with the accompanying drawings.

[0016] The embodiment of the present invention proposes a new type of self-rectifying memristor (i.e., high-density self-rectifying device) to solve the challenges of existing self-rectifying devices in terms of high switching ratio and self-rectification ratio while maintaining compatibility with CMOS technology. Constructing high work function metal electrodes (Pt, p-type silicon, etc.) based on CMOS process compatible materials / WO3 / WO 3-X / device structures with low work function metal electrodes (TiN, etc.) to construct self-rectifying memristors, such as Figure 1 The self-rectifying memristor based on the above structure has shown a high current of up to 10 5 The self-rectification ratio is about 10 3 The switching ratio, such as Figure 2 And it shows excellent high and low resistance stability and cycle durability at a reading voltage of 1.2 V, as shown in Figure 3and Figure 4 As shown. The device of this embodiment achieves a good self-rectification effect by forming a high Schottky barrier between the high work function metal and the WO3 layer to block the reverse transition of electrons, thereby effectively suppressing the current crosstalk problem that may occur when reading high-resistance units in the passive array. 3-X Rich oxygen defects are prepared in the layer, and the energy level potential wells of different depths brought by oxygen vacancies capture electrons from low work function metals to change the device resistance. Compared with the existing self-rectifying memristor, it has better switching characteristics and improves the reading accuracy of the integrated array. In addition, the manufacturing process of the two-terminal device demonstrated by the present invention is simplified, and the number of masks required to prepare this device is significantly lower than that of traditional transistors. Different concentrations of oxygen vacancies in the tungsten oxide layer can be achieved by sputtering power of different intensities, which increases the oxygen vacancy concentration in the tungsten oxide without significantly affecting the material band characteristics. Device functional layer WO3 / WO 3-X It is directly compatible with the current CMOS process, which reduces production costs, improves the performance of core units, and lowers the threshold for industrialization. By building a passive array based on this self-rectifying memristor integration, neuromorphic computing can be realized on-chip, building a storage-computing integrated architecture, and reducing off-chip memory access. At the same time, the device can also be stacked in multiple layers in the vertical direction through 3D integration technology, such as Figure 5 As shown. Without affecting the performance of the device, the number of device unit areas can be further increased to achieve a 3D high-density stacked integrated structure, such as Figure 6 shown.

[0017] In order to better understand the above technical solution, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments described herein. On the contrary, these embodiments are provided to enable a clearer and more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.

[0018] In a first aspect, this embodiment provides a high-density self-rectifying device based on CMOS technology, including: a bottom electrode using a high-work-function metal as a current input terminal; The middle active layer uses two layers of tungsten oxide with different oxygen vacancy contents; The top electrode is made of low work function metal, and multiple layers of thin films are stacked vertically.

[0019] Optionally, the high work function metal includes Pt and p-type silicon.

[0020] Optionally, the low work function metal includes TiN.

[0021] Optionally, the bottom electrode has a thickness of 60 nm.

[0022] Optionally, the intermediate active layer includes WO3 and WO 3-x WO3 layer has a regular lattice structure, forming a high Schottky barrier with the high work function electrode to ensure the self-rectification characteristics; WO 3-x The layer is rich in oxygen defects, which can improve the switching characteristics by capturing and releasing electrons.

[0023] This embodiment provides a high-density self-rectifying device based on CMOS technology, which has the following main advantages: 1. High self-rectification characteristics: The structure of the self-rectifying memristor provided in this embodiment realizes 10 5 The rectification ratio is 10 3 The switching ratio is high, which effectively suppresses current crosstalk and significantly improves the reading accuracy of high-resistance devices in passive arrays.

[0024] 2. Excellent on / off ratio and stability: the device achieves about 10 3 switching ratio and up to 10 6 The device remained stable during the 10-second test, demonstrating good durability and reliability.

[0025] 3. CMOS compatibility: Using CMOS process compatible materials (tungsten metal), the double-end vertical stacking structure simplifies the manufacturing process and facilitates integration with existing semiconductor manufacturing processes. Through these technical advantages, production costs can be significantly reduced and production efficiency can be improved.

[0026] 4. Storage and computing applications: By using the self-rectifying memristor structure provided in this embodiment, storage and computing functions can be integrated into one array, reducing data transmission between the processor and the memory. This structure has the characteristics of high self-rectification ratio, high switching ratio and CMOS process compatibility, and is particularly suitable for the construction of industrial-grade large-scale storage and computing arrays.

[0027] 5. Neuromorphic computing applications: The device structure provided in this embodiment can be used in neuromorphic computing to imitate the behavior of biological neural networks. 3-X The potential wells of different depths in the layer capture charges and realize continuously adjustable conductance, which can be used to simulate synaptic weights in artificial neural networks. The high stability and good switching characteristics of this structure are suitable for building large-scale neuromorphic arrays and support the realization of pulse neural networks.

[0028] 6. High integration of passive arrays: The device structure provided in this embodiment has excellent self-rectification and switching performance, which can effectively avoid the current crosstalk problem in the cross array, reduce the power consumption of the entire circuit, alleviate the heat dissipation problem, and does not require transistors or selectors to act as selection devices, so that more components can be implemented on the same chip, greatly improving the integration of the chip.

[0029] 7. 3D stacking process: The simple two-terminal structure of this device can achieve a 3D integrated structure through vertical integration or core-shell structure. The multi-layer stacking process further improves the high-density integration of self-rectifying memristors.

[0030] In a second aspect, this embodiment provides a method for preparing a high-density self-rectifying device based on a CMOS process, comprising: Prepare a photoresist barrier layer with a device pattern by lift-off lithography technology; Depositing a high work function metal layer with a thickness of 50 nm to 60 nm as the bottom electrode of the self-rectifying device; A silicon nitride isolation layer with a 3 μm diameter opening circular hole was prepared using a lift-off process; WO3 and WO were prepared by standard power and high power magnetron sputtering process. 3-x Functional layer, including WO 3-x It has abundant oxygen vacancies; A low work function metal film is deposited as the top electrode.

[0031] Optionally, the standard power is 100 W and the high power is 200 W.

[0032] The self-rectifying device of the present application prepared by the above preparation method can be directly integrated into the CMOS back-end process and is compatible with the tungsten plug preparation process. Multiple stacking of isolation layers and metal electrodes is achieved through multiple masks, and through holes are etched through each layer of electrodes and isolation layers after flattening, and then the functional layers and metal electrodes of the device are filled, and metal interconnection is completed to realize 3D integration process and further realize high-density stacking. Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention should also include these modifications and variations.

[0033] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may alter, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A high-density self-rectifying device based on CMOS technology, characterized in that: include: The bottom electrode is made of high work function metal and serves as the current input terminal; The middle active layer uses two layers of tungsten oxide with different oxygen vacancy contents; The top electrode is made of low work function metal, and multiple layers of thin films are stacked vertically.

2. A high-density self-rectifying device based on CMOS technology according to claim 1, characterized in that: The high work function metal includes Pt and p-type silicon.

3. A high-density self-rectifying device based on CMOS technology according to claim 2, characterized in that: The low work function metal includes TiN.

4. A high-density self-rectifying device based on CMOS technology according to claim 3, characterized in that: The bottom electrode thickness is 60 nm.

5. A high-density self-rectifying device based on CMOS technology according to claim 4, characterized in that: The intermediate active layer includes WO3 and WO 3-x , where the WO3 layer has a regular lattice structure, forming a high Schottky barrier to ensure the self-rectification characteristics; WO 3-x The layer is rich in oxygen defects, which can improve the switching characteristics by capturing and releasing electrons.

6. A method for preparing a high-density self-rectifying device based on CMOS technology, characterized in that: include: Prepare a photoresist barrier layer with a device pattern by lift-off lithography technology; Depositing a high work function metal layer with a thickness of 50 nm to 60 nm as the bottom electrode of the self-rectifying device; A silicon nitride isolation layer with a 3 μm diameter opening circular hole was prepared using a lift-off process; WO3 and WO were prepared by standard power and high power magnetron sputtering process. 3-x Functional layer, where WO 3-x It has abundant oxygen vacancies; A low work function metal film is deposited as the top electrode.

7. The method for preparing a high-density self-rectifying device based on CMOS technology according to claim 6, characterized in that: The standard power is 100W, and the high power is 200W.

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