Manufacturing and temperature compensation method of Pirani vacuum gauge compatible with CMOS

Abstract

The invention discloses a manufacturing and temperature compensation method of a Pirani vacuum gauge compatible with a CMOS, and relates to the field of Pirani vacuum gauges, and the manufacturing method comprises the steps: sequentially depositing a first layer of silicon dioxide, a polycrystalline silicon sacrificial layer, a second layer of silicon dioxide, a polycrystalline silicon thermistor part, a third layer of silicon dioxide and an aluminum layer on a silicon substrate; the aluminum layer is used for forming a lead and a bonding pad; silicon dioxide is selectively removed through reactive ion etching, and the polycrystalline silicon sacrificial layer or the silicon substrate needing to be etched is exposed; etching the polycrystalline silicon sacrificial layer by adopting an isotropic etching technology to obtain a T-shaped device structure; or etching the silicon substrate by adopting a deep silicon etching technology and an isotropic etching technology to obtain an L-shaped device structure. According to the invention, two kinds of Pirani vacuum gauges compatible with CMOS can be manufactured; and meanwhile, through the temperature compensation method, the influence on the output performance can be specifically analyzed based on the environment temperature.

Description

Technical Field

[0001] The invention relates to the technical field of Pirani vacuum gauges, and in particular to a manufacturing method and a temperature compensation method for a CMOS-compatible Pirani vacuum gauge. Background Art

[0002] There are two important issues that need to be addressed in the Pirani vacuum gauge. One is to improve the sensitivity and output range, and the other is to enable the device to work stably in different environments (such as different temperatures and gas conditions). To date, there have been many studies on these two issues. Many studies have improved the performance by changing the thermosensitive material (commonly used heating resistors such as polycrystalline silicon, vanadium oxide, titanium, platinum, and nickel). Guo et al. used vanadium oxide (VO x ) film as a thermistor and utilize its high temperature coefficient of resistance (TCR) to improve output performance. The dynamic range of the device is 10 -1 Up to 10 4 Pa, with a sensitivity of 1.23V / lgPa. Some special materials are also used for harsh environments. Mo et al. used Poly SiC material in the temperature range of 25°C to 650°C. The pressure gauge has a repeatable response to pressure changes and a Q / Pa of 1.23 at 650°C. Zhang et al. proposed a Pirani device using nickel as a sensing material, which is vertically packaged with three silicon wafers by bonding. The structure can exhibit good sensing performance at pressures of 0.1-10kPa. However, many device manufacturing processes are incompatible with CMOS, hindering further miniaturization and integration with on-chip circuits. In addition, existing studies have not conducted a specific analysis based on the impact of ambient temperature on output performance. Summary of the invention

[0003] The purpose of the present invention is to provide a method for manufacturing and temperature compensation of a CMOS-compatible Pirani vacuum gauge, which can manufacture two CMOS-compatible Pirani vacuum gauges and can also perform a specific analysis based on the influence of ambient temperature on output performance.

[0004] To achieve the above object, the present invention provides the following solutions:

[0005] In a first aspect, the present invention provides a method for manufacturing a CMOS-compatible Pirani vacuum gauge, the method for manufacturing a CMOS-compatible Pirani vacuum gauge comprising:

[0006] A first silicon dioxide layer, a polysilicon sacrificial layer, a second silicon dioxide layer, a polysilicon thermistor portion, a third silicon dioxide layer and an aluminum layer are sequentially deposited on a silicon substrate; the aluminum layer is used to form leads and pads.

[0007] Reactive ion etching is used to selectively remove silicon dioxide, exposing the polysilicon sacrificial layer that needs to be etched.

[0008] The polysilicon sacrificial layer is etched by adopting isotropic etching technology to obtain a T-shaped device structure.

[0009] In a second aspect, the present invention provides a method for manufacturing a CMOS-compatible Pirani vacuum gauge, the method for manufacturing a CMOS-compatible Pirani vacuum gauge comprising:

[0010] A first layer of silicon dioxide, a polysilicon thermistor portion, a second layer of silicon dioxide and an aluminum layer are sequentially deposited on a silicon substrate; the aluminum layer is used to form leads and pads.

[0011] Reactive ion etching is used to selectively remove silicon dioxide to expose the silicon substrate that needs to be etched.

[0012] The silicon substrate is etched by using deep silicon etching technology and isotropic etching technology to obtain an L-shaped device structure.

[0013] In a third aspect, the present invention provides a temperature compensation method for a CMOS-compatible Pirani vacuum gauge, the temperature compensation method for a CMOS-compatible Pirani vacuum gauge comprising:

[0014] Test probe tests are performed on sensors with different structures to obtain several test results; the sensors with different structures include: a Pirani vacuum gauge with a T-type device structure and a Pirani vacuum gauge with an L-type device structure.

[0015] Based on a number of the test results, a semi-empirical theoretical model is established; the semi-empirical theoretical model is used to fit the ambient temperature curve to room temperature conditions.

[0016] The semi-empirical theoretical model is corrected to obtain a corrected model.

[0017] Temperature compensation is performed on the corrected model to obtain a temperature compensated model.

[0018] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0019] The present invention provides a method for manufacturing and temperature compensation of a CMOS-compatible Pirani vacuum gauge, the manufacturing method comprising: depositing a first layer of silicon dioxide, a polysilicon sacrificial layer, a second layer of silicon dioxide, a polysilicon thermistor portion, a third layer of silicon dioxide and an aluminum layer on a silicon substrate in sequence; wherein the second layer of silicon dioxide is used as a supporting layer, and the aluminum layer is used to form leads and pads; selectively removing silicon dioxide by reactive ion etching to expose the polysilicon sacrificial layer or silicon substrate to be etched; etching the polysilicon sacrificial layer by isotropic etching technology to obtain a T-type device structure; etching the silicon substrate by deep silicon etching technology and isotropic etching technology to obtain an L-type device structure; two CMOS-compatible Pirani vacuum gauges can be manufactured by the manufacturing method. At the same time, the temperature compensation method comprises: performing test probe tests on sensors of different structures respectively to obtain several test results; establishing a semi-empirical theoretical model based on several of the test results; correcting the semi-empirical theoretical model to obtain a corrected model; performing temperature compensation on the corrected model to obtain a temperature compensation model. The present invention can explain the influence of ambient temperature through a semi-empirical theoretical model, thereby realizing comparative analysis and predictive modeling with experimental data. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0021] Figure 1 A schematic diagram of simulation results provided by an embodiment of the present invention; wherein, Figure 1 (a) is a schematic diagram of the simulation results of T-type and L-type devices; Figure 1 (b) is a schematic diagram for comparing output performance at different operating temperatures; Figure 1 (c) Comparison of output performance under different ambient temperatures.

[0022] Figure 2 A schematic diagram of a preparation process provided by an embodiment of the present invention.

[0023] Figure 3 Schematic diagram of SEM images of T-type and L-type devices provided in one embodiment of the present invention.

[0024] Figure 4 An optical micrograph of a Pirani vacuum gauge provided in one embodiment of the present invention and a schematic diagram of the film surface morphology after the device is released.

[0025] Figure 5 A schematic diagram of a testing system provided in one embodiment of the present invention.

[0026] Figure 6 A schematic diagram of a test circuit provided according to an embodiment of the present invention.

[0027] Figure 7 FIG. 1 is a diagram of an application environment of a temperature compensation method for a CMOS-compatible Pirani vacuum gauge according to an embodiment of the present invention.

[0028] Figure 8 A schematic flow chart of a temperature compensation method for a CMOS-compatible Pirani vacuum gauge provided in one embodiment of the present invention.

[0029] Fig. 9 A schematic diagram of the TCR characteristics of a sensing material provided in one embodiment of the present invention.

[0030] Fig.10 Schematic diagram of test results and curve fitting of T-type and L-type devices provided in one embodiment of the present invention.

[0031] Fig.11 The test results and curve fitting diagram at different operating temperatures provided by an embodiment of the present invention.

[0032] Fig.12 A schematic diagram of test results and theoretical model predictions of output ranges under different ambient temperatures provided by an embodiment of the present invention.

[0033] Fig.13 A schematic diagram of test results at 298K and 333K and predictions of a theoretical model provided in one embodiment of the present invention.

[0034] Fig.14 A schematic diagram of a temperature compensation process provided by an embodiment of the present invention.

[0035] Fig.15 A schematic diagram of temperature compensation based on 298K ambient temperature provided by an embodiment of the present invention.

[0036] Fig.16 A schematic diagram of test results at different ambient temperatures in a constant temperature difference (CTD) operation mode provided by an embodiment of the present invention;

[0037] Fig.17 A schematic diagram of simulating surface expansion in a constant temperature difference (CTD) mode provided by an embodiment of the present invention.

[0038] Fig.18 A schematic diagram of the stability of a micro-Pirani vacuum gauge and a testing system provided in one embodiment of the present invention.

[0039] Fig.19 A schematic diagram of the noise spectral density and background noise within a 5 Hz bandwidth of a Pirani thickness gauge provided by an embodiment of the present invention.

[0040] Fig. 20 A function constructed by subtracting the minimum output voltage from the output voltage provided by an embodiment of the present invention and 2V rms Schematic representation of the detection limit of the Pirani test system measured as a function of the resolution.

[0041] Fig.21 A schematic diagram of the structure of a computer device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0042] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0043] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0044] The Pirani vacuum gauge generates an electrical output by converting changes in vacuum level into changes in thermistor resistance, which is caused by changes in heat dissipation. In steady state, the energy conservation equation for the micro Pirani vacuum gauge can be expressed as:

[0045] P h =(G s +G g +G r )ΔT (1);

[0046] Among them, P h Indicates the heating power of the resistor, G s , G g and G r They represent the solid thermal conductivity, gas thermal conductivity and radiation thermal conductivity respectively, and ΔT represents the temperature difference between the heating resistor temperature and the ambient temperature. These parameters can be specifically expressed by the following equations:

[0047]

[0048]

[0049] ΔT=T h -T a (6);

[0050] Among them, U h is the voltage across the heating resistor, R his the resistance of the heating resistor; i , W i , H i and L i are the thermal conductivity, width, height and length of the solid material respectively; λ g (p,T a ) is the pressure p and the ambient temperature T a The thermal conductivity of the gas at g is the gas thermal conductivity, S is the sensing area, d is the gap distance, T h is the heating resistor temperature, T a is the ambient temperature, ε is the emissivity, σ b is the Stefan-Boltzmann constant, S r is the radiating surface area.

[0051] In many studies, it has been mentioned that in the working mode of the micro Pirani vacuum gauge, the radiative thermal conductivity G r can be neglected, and the gas thermal conductivity G g It can be calculated as follows:

[0052]

[0053] Where k is the Boltzmann constant, λ0(T a ) is at an ambient temperature of T a The thermal conductivity of air under atmospheric pressure of , e is the energy adaptation coefficient of the molecule, σ is the radius of the air molecule, and l(p) is the mean free path of the gas molecule. It is worth noting that in many previous studies, the influence of ambient temperature on thermal conductivity was not calculated. Here, the present invention refers to the fitting formula for thermal conductivity of air in the work of Tsilingiris, which is supplemented. Table 1 lists the discrete values ​​of each parameter.

[0054] Table 1 Discrete values ​​of parameters

[0055] Parameter Quantity <![CDATA[λ0]]> <![CDATA[-2.276501×10 -3 ]]> <![CDATA[λ1]]> <![CDATA[1.2598485×10 -4 ]]> <![CDATA[λ2]]> <![CDATA[-1.4815235×10 -7 ]]> <![CDATA[λ3]]> <![CDATA[-1.73550646×10 -10 ]]> <![CDATA[λ4]]> <![CDATA[-1.066657×10 -13 ]]> <![CDATA[λ5]]> <![CDATA[2.47663035×10 -17 ]]> a 0.77 σ <![CDATA[4×10 -10 ]]>

[0056] The present invention establishes a model and imports it into the finite element analysis (FEA) simulation software, in which the physical field conditions are set to keep the heating resistor at a constant temperature, so as to calculate the corresponding voltage. The simulation results are as follows Figure 1 shown.

[0057] According to formula (4), a smaller gap will lead to an increase in the thermal conductivity of the air, thereby amplifying the change in heat dissipation under different air pressures. To explore this point, the present invention has developed two structural configurations: T-type and L-type. Figure 1(a) shows the two device structures used for simulation. Finite element simulation shows that under the same conditions, the T-type device exhibits a wider output range and dynamic range.

[0058] The relationship between the device's operating temperature and output voltage, as described in formula (1) and formula (2), has also been verified through simulation. In order to deeply analyze the impact of heater temperature on device performance, the present invention performs finite element simulations at different operating temperatures in constant temperature (CT) mode, as shown in FIG. Figure 1 (b) The heating section was set to an average temperature of 378K, 358K, and 338K. The results show that the output voltage increases with the increase in operating temperature, which reflects the increase in fixed resistance in CT mode. This in turn increases the operating temperature of the heating element, thereby enhancing the sensitivity and output performance.

[0059] In addition, formula (1) shows that the temperature difference has a significant effect on the output voltage, and this finding has been verified by simulations at different ambient temperatures. In order to fully understand the impact of ambient temperature on device performance, the present invention simulates the change of ambient temperature from 278K to 363K when the operating temperature is fixed at 378K. Figure 1 (c) It is worth noting that the output voltage drops significantly when the ambient temperature approaches the operating temperature. This sensitivity attenuation with increasing ambient temperature is attributed to the reduction of the overheat temperature (ΔT, the difference between the heater temperature and the ambient temperature) and the disturbance of the gas properties.

[0060] In terms of device manufacturing, the present invention adopts a CMOS-compatible process, which can be integrated with a CMOS-MEMS design with on-chip circuits.

[0061] In an exemplary embodiment, a method for manufacturing a CMOS-compatible Pirani vacuum gauge is provided, and the method for manufacturing a CMOS-compatible Pirani vacuum gauge includes:

[0062] A first silicon dioxide layer, a polysilicon sacrificial layer, a second silicon dioxide layer, a polysilicon thermistor portion, a third silicon dioxide layer and an aluminum layer are sequentially deposited on a silicon substrate; the aluminum layer is used to form leads and pads.

[0063] Reactive ion etching (RIE) is used to selectively remove silicon dioxide, exposing the polysilicon sacrificial layer that needs to be etched.

[0064] The polysilicon sacrificial layer is etched using an isotropic etching technique to obtain a T-shaped device structure.

[0065] In another exemplary embodiment, a method for manufacturing a CMOS-compatible Pirani vacuum gauge is provided, the method for manufacturing a CMOS-compatible Pirani vacuum gauge comprising:

[0066] A first layer of silicon dioxide, a polysilicon thermistor portion, a second layer of silicon dioxide and an aluminum layer are sequentially deposited on a silicon substrate; the aluminum layer is used to form leads and pads.

[0067] Reactive ion etching is used to selectively remove silicon dioxide to expose the silicon substrate that needs to be etched.

[0068] The silicon substrate is etched by using deep silicon etching technology and isotropic etching technology to obtain an L-shaped device structure.

[0069] The present invention uses polysilicon as the thermistor material and adopts surface sacrificial layer technology and deep silicon etching technology to manufacture two different device structures, such as Figure 2 shown.

[0070] First, a 0.5 micron layer of silicon dioxide ( Figure 2 Next, a 0.8 μm polysilicon sacrificial layer ( Figure 2 b). Then, a 1.5 μm layer of silicon dioxide was deposited as a support layer ( Figure 2 c) in the figure, followed by the deposition of a 0.8 μm polysilicon thermistor portion ( Figure 2 d in Figure 1). Afterwards, a 1-micron layer of silicon dioxide is deposited on top of the polysilicon structure as a protective layer ( Figure 2 Next, a 2-micron layer of aluminum is deposited to form the leads and pads ( Figure 2 f). Then, the silicon dioxide is selectively removed by reactive ion etching to expose the silicon layer to be etched ( Figure 2 Finally, the polysilicon sacrificial layer and part of the silicon substrate are etched using deep silicon etching (DRIE) and XeF2 to release the Pirani structure ( Figure 2 h), where Figure 2 Figure h shows two devices with different structures.

[0071] exist Figure 3 In Figure 1, SEM images of T-type and L-type devices are shown. The top view of the SEM shows the basic structure and size details of the Pirani vacuum gauge, while the image of the side interface provides information about the gap. The images show that during the manufacturing process, the distance of the gap is basically consistent with the design of the present invention (1 micron and 100 microns). Figure 4 Optical micrographs of the Pirani vacuum gauge and the film surface morphology after the device is released are shown. Due to the stress, some bumps appear on the device surface.

[0072] In addition, the present invention tests the performance of the Pirani device. Figure 5As shown in Figure 1, the Pirani test system is designed to evaluate Pirani devices in a sealed chamber by the probing method. The system includes a vacuum pump and pressure control system, as well as a heater and temperature control system capable of regulating both pressure and ambient temperature. A constant voltage source provides 15V to the operational amplifier LM358. Pressure calibration is achieved by using two commercial vacuum gauges: Pfeiffer-Vacuum PKR251 and HPM18V from Nanjing Hangjia Electronic Technology Co., Ltd. Control and measurement are performed through a constant temperature circuit, and data acquisition and processing are performed on a computer using the NI voltage acquisition card NI9202.

[0073] like Figure 6 As shown, the test circuit uses a bridge configuration and negative feedback to achieve constant temperature control. The present invention sets the ratio of R1 to R2 to 1:1. Due to the negative feedback, the resistance of the thermistor is maintained at R3, thereby ensuring a constant operating temperature. In the constant temperature (CT) mode, R3 is a fixed resistor. In the constant temperature difference (CTD) mode, R3 is a series combination of the thermistor and a fixed resistor.

[0074] The temperature compensation method of the CMOS-compatible Pirani vacuum gauge provided in the embodiment of the present invention can be applied to Figure 7 In the application environment shown. Among them, the terminal 102 communicates with the server 104 through the network. The data storage system can store the data that the server 104 needs to process. The data storage system can be set up separately, integrated on the server 104, or placed on the cloud or other servers. The terminal 102 can send several test results to the server 104. After the server 104 receives several test results, for several test results, the server 104 establishes a semi-empirical theoretical model based on several of the test results; the semi-empirical theoretical model is used to fit the ambient temperature curve to room temperature conditions; the semi-empirical theoretical model is corrected to obtain a corrected model; the corrected model is temperature compensated to obtain a temperature compensation model. The server 104 can feed back the obtained temperature compensation model to the terminal 102. In addition, in some embodiments, the temperature compensation method of the CMOS-compatible Pirani vacuum gauge can also be implemented separately by the server 104 or the terminal 102, such as the terminal 102 can directly perform temperature compensation for several test results, or the server 104 can obtain several test results from the data storage system and perform video tag processing for several test results.

[0075] The terminal 102 may be, but is not limited to, various desktop computers, laptop computers, smart phones, and tablet computers. The server 104 may be implemented as an independent server or a server cluster consisting of multiple servers, or may be a cloud server.

[0076] In an exemplary embodiment, Figure 8 As shown, a temperature compensation method for a CMOS-compatible Pirani vacuum gauge is provided. The method is executed by a computer device, and specifically can be executed by a computer device such as a terminal or a server alone, or can be executed by a terminal and a server together. In an embodiment of the present invention, the method is applied to Figure 1 The server 104 in the example is used for explanation, and the steps include the following steps S1 to S4.

[0077] in:

[0078] S1: Performing test probe tests on sensors with different structures respectively to obtain several test results; the sensors with different structures include: a Pirani vacuum gauge with a T-type device structure and a Pirani vacuum gauge with an L-type device structure.

[0079] S2: Based on the test results, a semi-empirical theoretical model is established; the semi-empirical theoretical model is used to fit the ambient temperature curve to room temperature conditions.

[0080] S3: Correcting the semi-empirical theoretical model to obtain a corrected model.

[0081] S4: performing temperature compensation on the corrected model to obtain a temperature compensated model.

[0082] By implementing the above steps S1 to S4, the present invention can explain the influence of the ambient temperature, thereby achieving comparative analysis and predictive modeling with experimental data. In addition, temperature compensation is performed using an improved model.

[0083] In another exemplary embodiment of the present invention, in step S2, the expression of the semi-empirical theoretical model is:

[0084]

[0085] b=λ0(T a )·b' (11);

[0086] c=T a ·c' (12);

[0087] Among them, U out is the output voltage, a is the first fitting parameter, b is the second fitting parameter, p is the pressure, c is the third fitting parameter, ΔT is the temperature difference between the heating resistor temperature and the ambient temperature, R h is the resistance of the heating resistor, R2 is the second resistor, λ0 is the thermal conductivity of air, λ0(T a ) is the ambient temperature T a Thermal conductivity of air at atmospheric pressure, T a is the ambient temperature.

[0088] Prior to conducting the vacuum test, the present invention first starts the process by checking the temperature coefficient of resistance (TCR) of both sensors. This is accomplished by connecting the Pirani gauge leads to the printed circuit board (PCB) and placing the sensors in a constant temperature and humidity chamber (Espec SH222) to accommodate temperature changes. The resistance data is recorded using a multimeter and the process is repeated three times for each device. The data is then fitted, as Fig. 9 At 24°C, the TCR values ​​of the two sensor structures were determined to be 1.54×10 -3 and 1.57×10 -3 .

[0089] First, the present invention conducted a test probe test on sensors with different structures while keeping the ambient temperature consistent and setting the operating temperature to 358K. Fig.10 As shown, the T-type sensor exhibits a better dynamic measurement range and higher sensitivity than other sensors. In order to accurately represent the experimental data of the two curves, the present invention adopts a semi-empirical fitting function (as shown in Formula 10).

[0090] This formula was derived based on theoretical considerations and was found to fit the data well. The experimental results mentioned earlier agree with the simulation predictions, thus confirming the superior output performance of the T-type device.

[0091] Then, the output performance of both devices was evaluated at different operating temperatures and curve fitting was performed, as shown in Fig.11 As shown. The results show that a higher operating temperature will lead to an increase in sensitivity. Therefore, within the acceptable temperature range, the present invention selects a higher temperature as the working condition.

[0092] The operating temperature was fixed at 378K, and the changes in ambient temperature were recorded, such as Fig.12 As shown. As the ambient temperature approaches the operating temperature, the sensitivity of the device decreases significantly due to reduced heat dissipation. The range of the output signal at 363K is reduced by 53.3% compared to 278K. The figure shows the effect of different ambient temperatures on the range of the output signal, where the black dots represent the data points of the four test curves and the curves in the inset show the predicted values. The ambient temperature curve is fitted to room temperature conditions using formula (10). The temperature-related parameters b and c are decomposed into their respective components (as shown in formulas 11 and 12).

[0093] By converting λ0(T a ) values ​​into formula 11, and the values ​​of b' and c' are obtained. The experimental data are input into the semi-empirical fitting function to obtain the corresponding parameter values ​​a, b and c.a The effect of ambient temperature change on output performance is predicted by the calculation of the fitting coefficient, which is 0.97, indicating that there is a strong consistency between the theoretical model of the present invention and the experimental data, especially the model takes T into account. a The impact on λ.

[0094] Finally, it was found that the semi-empirical theoretical model was relatively accurate in predicting the relative waveform of the output signal, but there was some deviation in the initial value (when the pressure was close to zero). The prediction function was corrected by using the known minimum detectable pressure and the output voltage at atmospheric pressure as a benchmark. Specifically, the function value at the minimum detectable pressure was subtracted from the prediction function, and then the actual test value at the minimum detectable pressure was added to obtain the corrected function. Finally, the two correction curves were averaged to obtain a more accurate waveform prediction at a given temperature, such as Fig.13 shown.

[0095] In another exemplary embodiment of the present invention, in step S3, the following steps are specifically included:

[0096] The semi-empirical theoretical model is calibrated by using the known minimum detectable pressure and the output voltage under atmospheric pressure to obtain a calibrated model.

[0097] In another exemplary embodiment of the present invention, in step S4, specifically including:

[0098] S41: Using the calibrated model to obtain data at other ambient temperatures and data at the standard ambient temperature.

[0099] S42: using a temperature compensation equation to compensate the data at the other ambient temperatures with the data at the standard ambient temperature to obtain a compensation temperature and a temperature compensation effect; the temperature compensation equation is an equation established based on pressure and ambient temperature.

[0100] S43: performing temperature compensation on the corrected model using the compensation temperature to obtain a temperature compensated model.

[0101]

[0102] Among them, U out(298,p) is the output voltage when the pressure is p and the ambient temperature is 298K, For the pressure p and the ambient temperature T a The output voltage at this time, Δu is the correction voltage, For the pressure p min The ambient temperature is T a The test point at For the pressure p minThe ambient temperature is T a The output voltage at For the pressure p max The ambient temperature is T a The test point at For the pressure p max The ambient temperature is T a The output voltage at this time, g is the compensation function, a (298) is the first fitting parameter when the ambient temperature is 298K, b (298) is the second fitting parameter when the ambient temperature is 298K, c (298) is the third fitting parameter when the ambient temperature is 298K, λ 0(298) is the thermal conductivity of air when the ambient temperature is 298K, The ambient temperature is T a Thermal conductivity of air.

[0103] Subsequently, based on a semi-empirical theoretical model, Fig.14 Temperature compensation was performed. First, the semi-empirical theoretical model shown in formula (10-12) was used for fitting, taking room temperature (298K) as the reference. The model assumes that the fitting parameter a (298) , b (298) and c (298) Next, by changing T a To obtain the equations at different ambient temperatures. It was observed that there was a deviation between the current fitting data and the test data, so the parameters were adjusted using equations (14-15) (correction of the semi-empirical theoretical model), as shown in Fig.14 After that, temperature compensation was performed, and other ambient temperatures (T a ) is aligned with the data at 298K (temperature compensation is performed on the corrected model). Fig.15 As shown, the compensation process aligns the waveforms, effectively illustrating the compensation method of the present invention.

[0104] In another exemplary embodiment of the present invention, the temperature compensation method of the CMOS-compatible Pirani vacuum gauge further includes:

[0105] S5: Using the actual gap value to correct the temperature compensation model; the calculation formula of the actual gap value is:

[0106]

[0107] Among them, d eff is the actual gap value, d is the gap distance, S is the sensing area, and u(x,y) is the contour deformation of point (x,y).

[0108] After thoroughly analyzing the effects of ambient temperature fluctuations, the present invention also employs a constant temperature difference (CTD) circuit to compensate for these variations. Since both thermistors are operating at the same ambient temperature, the actual operating temperature difference between them is maintained by the fixed resistor. The Pirani device is specifically set up to operate at a constant temperature difference of 80K above the ambient temperature. Under the same test conditions, it was observed Fig.16 The curve in the figure significantly reduces the impact of ambient temperature changes. Fig.16 As shown, there are slight differences in the output curves at different ambient temperatures. Compared with that at 278K, the output signal variation range at 363K is reduced by 2.5%.

[0109] However, the actual performance of the CTD mechanism did not fully meet the initial expectations of the present invention, because when the ambient temperature increased, the output data was lower than the expected value. We speculate that this difference may be caused by the surface profile effect, such as Figure 4 As shown in , thermal expansion of the film at high temperatures causes a slight increase in the gap, which results in a decrease in the output voltage. Fig.17 As shown, a simplified simulation of the surface expansion is performed in CTD mode. In this mode, the surface temperature of the film is always 80K higher than the ambient temperature. When the ambient temperature increases, a relatively significant expansion phenomenon occurs, which changes the gap distance and thus affects the performance. Referring to the method proposed by Garg et al., the actual gap value is calculated by averaging the deformation. The calculation is performed according to Equation 18.

[0110] like Fig.18 As shown, the present invention conducted a 33-minute stability test of the system under three different air pressure conditions. The partial enlarged view in the figure shows that at a specific 2-minute interval ( Fig.18 The system voltage changes by about 1mV.

[0111] The present invention uses a dynamic signal analyzer (Agilent 35670A dynamic signal analyzer) to evaluate the noise spectral density (NSD) of the system and the instrument itself. In order to characterize the noise problem, two specific bandwidths are selected: 1Hz and 5Hz. Under these bandwidths, the root mean square (RMS) noise V of the micro Pirani vacuum gauge is calculated. rms , using Fig.19 The integral formula shown in . Then, a function V(p)=V is defined out -V min , and draw a graph with pressure as the x-axis and V(p) as the y-axis. In order to determine the detection range of the micro Pirani vacuum gauge, the present invention uses 2V rms As the resolution of the system, a horizontal line is drawn on the y-axis. The intersection of this horizontal line and the test data curve represents the lower detection limit of the instrument. Fig. 20As shown, it can be concluded that the Pirani vacuum gauge can achieve a detection lower limit of 0.07Pa.

[0112] In summary, this paper proposes a CMOS-compatible Pirani vacuum gauge that achieves higher sensitivity, lower detection limit, and high temperature stability by implementing a surface micromachining approach combined with a temperature compensation strategy. To improve the performance, a T-type (micro-gap) device with a gap of 1 μm was fabricated, which has an average sensitivity of 1.10 V / lgPa, which is 2.89 times higher than the L-type device with a gap of 100 μm. In addition, to evaluate the effect of temperature on the performance, finite element analysis (FEA) simulations were performed to analyze the effect of heater temperature on sensitivity and the attenuation of sensitivity at different ambient temperatures. These simulations provide more accurate predictions and guide further experimental work.

[0113] The present invention also developed a semi-empirical theoretical model for temperature compensation, which is highly consistent with the experimental results and has a fitting accuracy of 0.97. This highlights the effectiveness of the model in compensating for sensitivity attenuation. The model not only verifies the design principle, but also provides a solid platform for future enhancements, enabling fine-tuning of the device output to ensure performance consistency under different conditions. On this basis, the present invention adopts two different operating modes: constant temperature (CT) mode and constant temperature difference (CTD) mode, characterizing the performance of the device at different ambient temperatures and effectively compensating (the temperature compensation error can be controlled within 2.5%). This comprehensive analysis highlights the potential of the device in practical applications, especially the importance of maintaining accuracy in different thermal environments.

[0114] Finally, the short-term stability, noise floor, and detection limit of the device were fully characterized to confirm its readiness for real-world applications. Short-term stability testing showed a voltage change of 1mV over a 2-minute interval, demonstrating the device’s reliability in maintaining output consistency. In addition, the noise floor was measured to be V rms = 384 μV, and the detection limit was determined to be 0.07 Pa at 1 Hz. With its excellent performance and integration capability with CMOS features, this device has a wider range of applications in future commercial applications.

[0115] The present invention also provides an application scenario, which applies the above-mentioned temperature compensation method of the CMOS-compatible Pirani vacuum gauge. Specifically: The temperature compensation method of the CMOS-compatible Pirani vacuum gauge provided in this embodiment can be applied in the Pirani vacuum gauge temperature compensation scenario. The Pirani vacuum gauge temperature compensation scenario includes: a test link, a semi-empirical theoretical model establishment link, and a correction and temperature compensation link; by performing a test probe test on the sensor, a number of test results are obtained, and based on the test results, the semi-empirical theoretical model establishment link is entered, and the temperature compensation model can be obtained by calibrating and temperature compensating the semi-empirical theoretical model.

[0116] In an exemplary embodiment, a computer device is provided. The computer device may be a server or a terminal. The internal structure diagram thereof may be as follows: Fig.21 As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store test results. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a temperature compensation method for a CMOS-compatible Pirani vacuum gauge is implemented.

[0117] Those skilled in the art will understand that Fig.21 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present invention, and does not constitute a limitation on the computer device to which the solution of the present invention is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0118] In an exemplary embodiment, a computer device is further provided, including a memory and a processor, wherein a computer program is stored in the memory, and the above-mentioned method embodiments are implemented when the processor executes the computer program.

[0119] In an exemplary embodiment, a computer-readable storage medium is provided, storing a computer program, and when the computer program is executed by a processor, the above-mentioned method embodiments are implemented.

[0120] In an exemplary embodiment, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the above-mentioned method embodiments are implemented.

[0121] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in the present invention are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0122] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided by the present invention can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM may be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0123] The database involved in each embodiment provided by the present invention may include at least one of a relational database and a non-relational database. The non-relational database may include a distributed database based on blockchain, etc., but is not limited thereto. The processor involved in each embodiment provided by the present invention may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but is not limited thereto.

[0124] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0125] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A method for manufacturing a CMOS-compatible Pirani vacuum gauge, characterized in that: The manufacturing method of the CMOS-compatible Pirani vacuum gauge comprises: Depositing a first layer of silicon dioxide, a polysilicon sacrificial layer, a second layer of silicon dioxide, a polysilicon thermistor portion, a third layer of silicon dioxide and an aluminum layer on a silicon substrate in sequence; the aluminum layer is used to form leads and pads; Reactive ion etching is used to selectively remove silicon dioxide, exposing the polysilicon sacrificial layer that needs to be etched; The polysilicon sacrificial layer is etched using an isotropic etching technique to obtain a T-shaped device structure.

2. A method for manufacturing a CMOS-compatible Pirani vacuum gauge, characterized in that: The manufacturing method of the CMOS-compatible Pirani vacuum gauge comprises: Depositing a first layer of silicon dioxide, a polysilicon thermistor portion, a second layer of silicon dioxide and an aluminum layer on a silicon substrate in sequence; the aluminum layer is used to form leads and pads; Reactive ion etching is used to selectively remove silicon dioxide to expose the silicon substrate that needs to be etched; The silicon substrate is etched by using deep silicon etching technology and isotropic etching technology to obtain an L-shaped device structure.

3. A temperature compensation method for a CMOS-compatible Pirani vacuum gauge, characterized in that: The temperature compensation method of the CMOS-compatible Pirani vacuum gauge comprises: Conducting test probe tests on sensors with different structures respectively to obtain several test results; the sensors with different structures include: a Pirani vacuum gauge with a T-type device structure and a Pirani vacuum gauge with an L-type device structure; Based on the test results, a semi-empirical theoretical model is established; the semi-empirical theoretical model is used to fit the ambient temperature curve to the room temperature condition; Correcting the semi-empirical theoretical model to obtain a corrected model; Temperature compensation is performed on the corrected model to obtain a temperature compensated model.

4. The temperature compensation method of a CMOS-compatible Pirani vacuum gauge according to claim 3, characterized in that: The expression of the semi-empirical theoretical model is: Among them, U out is the output voltage, a is the first fitting parameter, b is the second fitting parameter, p is the pressure, c is the third fitting parameter, ΔT is the temperature difference between the heating resistor temperature and the ambient temperature, R h is the resistance of the heating resistor, R2 is the second resistor, λ0 is the thermal conductivity of air, λ0(T a ) is the ambient temperature T a Thermal conductivity of air at atmospheric pressure, T a is the ambient temperature.

5. The temperature compensation method of a CMOS-compatible Pirani vacuum gauge according to claim 3, characterized in that: Correcting the semi-empirical theoretical model to obtain a corrected model specifically includes: The semi-empirical theoretical model is calibrated by using the known minimum detectable pressure and the output voltage under atmospheric pressure to obtain a calibrated model.

6. The temperature compensation method of a CMOS-compatible Pirani vacuum gauge according to claim 5, characterized in that: The expression for correcting the semi-empirical theoretical model by using the known minimum detectable pressure and the output voltage under atmospheric pressure is: Among them, U out(298,p) is the output voltage when the pressure is p and the ambient temperature is 298K, For the pressure p and the ambient temperature T a The output voltage at this time, Δu is the correction voltage, For the pressure p min The ambient temperature is T a The test point at For the pressure p min The ambient temperature is T a The output voltage at For the pressure p max The ambient temperature is T a The test point at For the pressure p max The ambient temperature is T a The output voltage at .

7. The temperature compensation method of a CMOS-compatible Pirani vacuum gauge according to claim 3, characterized in that: Performing temperature compensation on the corrected model to obtain a temperature compensation model specifically includes: The calibrated model is used to obtain data at other ambient temperatures and data at the standard ambient temperature respectively; The data at the other ambient temperatures are compensated with the data at the standard ambient temperature by using a temperature compensation equation to obtain a compensation temperature and a temperature compensation effect; the temperature compensation equation is an equation established based on pressure and ambient temperature; The compensated temperature is used to perform temperature compensation on the corrected model to obtain a temperature compensated model.

8. The temperature compensation method of a CMOS-compatible Pirani vacuum gauge according to claim 7, characterized in that: The expression of the temperature compensation equation is: Among them, U out(298,p) is the output voltage when the pressure is p and the ambient temperature is 298K, g is the compensation function, For the pressure p and the ambient temperature T a The output voltage when R h is the resistance of the heating resistor, R2 is the second resistor, a (298) is the first fitting parameter when the ambient temperature is 298K, b (298) is the second fitting parameter when the ambient temperature is 298K, λ 0(298) is the thermal conductivity of air at an ambient temperature of 298K, T a is the ambient temperature, Δu is the correction voltage, The ambient temperature is T a Thermal conductivity of air.

9. The temperature compensation method of a CMOS-compatible Pirani vacuum gauge according to claim 3, characterized in that: The temperature compensation method of the CMOS-compatible Pirani vacuum gauge further includes: The temperature compensation model is modified using the actual gap value.

10. The temperature compensation method of a CMOS-compatible Pirani vacuum gauge according to claim 9, characterized in that: The calculation formula of the actual gap value is: Among them, d eff is the actual gap value, d is the gap distance, S is the sensing area, and u(x,y) is the contour deformation of the point (x,y).

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