Training data acquisition method and device, computer equipment and program product

Abstract

The invention provides a training data acquisition method. After a plurality of wafer defect images are obtained, defects and backgrounds in the wafer defect images are cut to obtain a plurality of images of defect areas and a plurality of images of background areas. And carrying out random cross fusion on the image of the defect area and the image of the background area to obtain a training data set comprising a plurality of new wafer defect images. Through the method, the background of the wafer defect image of each defect type can be more diversified, the training diversity is increased, the influence of background change on wafer defect classification is effectively eliminated, and the classification accuracy is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and more particularly to a method, apparatus, computer device and program product for acquiring training data. Background Art

[0002] Wafers are the basic raw materials for manufacturing semiconductor products and play an extremely important role in the semiconductor manufacturing process. Defects on wafers can lead to the failure of finished chips. The classification of wafer defects helps to promptly detect problems in the wafer production process and is an important link in the wafer production process.

[0003] In the prior art, the classification of wafer defects generally relies on a neural network model for wafer defect classification, but the training data for training the neural network model is not diverse enough, resulting in low classification accuracy. Summary of the invention

[0004] In order to overcome the problem that the training data in the related art is not diverse enough, this specification provides a training data acquisition method, apparatus, computer device and program product.

[0005] According to a first aspect of an embodiment of this specification, a method for obtaining training data is provided, the method comprising:

[0006] Acquire multiple wafer defect images;

[0007] Recognize and cut defective areas of multiple wafer defect images respectively to obtain multiple defective area images and multiple background area images;

[0008] A plurality of defect area images and a plurality of background area images are combined to obtain a training data set; the training data set includes a plurality of new wafer defect images, and any new wafer defect image is obtained by fusion of an image of a defect area and an image of a background area.

[0009] According to a second aspect of an embodiment of this specification, a training data acquisition device is provided, the device comprising:

[0010] An acquisition module, used for acquiring multiple wafer defect images;

[0011] A cutting module is used to identify and cut defective areas of multiple wafer defect images respectively, so as to obtain multiple defective area images and multiple background area images;

[0012] The combination module is used to combine multiple defect area images and multiple background area images to obtain a training data set; the training data set includes multiple new wafer defect images, and any new wafer defect image is obtained by fusion of an image of a defect area and an image of a background area.

[0013] According to a third aspect of the embodiments of this specification, a computer-readable storage medium is provided, on which a computer program is stored. When the program is executed by a processor, the training data acquisition method as described in the first aspect of the embodiments of this specification is implemented.

[0014] According to a fourth aspect of an embodiment of this specification, a computer device is provided, the computer device comprising:

[0015] processor;

[0016] Memory for storing computer programs;

[0017] When the computer program is executed by the processor, the processor implements the training data acquisition method as described in the first aspect of the embodiment of this specification.

[0018] According to a fifth aspect of an embodiment of this specification, a computer program product is provided, comprising a computer program or instructions, which, when executed by a processor, implements the training data acquisition method as described in the first aspect of an embodiment of this specification.

[0019] In one or more embodiments of the present specification, a training data acquisition method is proposed. After acquiring multiple wafer defect images, the defects and backgrounds in the wafer defect images are cut to obtain multiple images of defect areas and multiple images of background areas. The images of the defect areas and the images of the background areas are randomly cross-fused to obtain a training data set including multiple new wafer defect images.

[0020] Through the above method, the background of the wafer defect image of each defect type can be made more diverse, the diversity of training can be increased, the influence of background changes on wafer defect classification can be effectively eliminated, and the classification accuracy can be improved.

[0021] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the specification and, together with the description, serve to explain the principles of the specification.

[0023] Figure 1 It is a flowchart of a method for obtaining training data according to an exemplary embodiment of the present specification.

[0024] Figure 2 It is a schematic diagram of a wafer defect according to an exemplary embodiment of this specification.

[0025] Figure 3 is a schematic diagram of another wafer defect according to an exemplary embodiment of the present specification.

[0026] Figure 4 is a schematic diagram of another wafer defect according to an exemplary embodiment of the present specification.

[0027] Figure 5 It is a block diagram of a training data acquisition device shown in this specification according to an exemplary embodiment.

[0028] Figure 6 It is a hardware structure diagram of a computer device shown in this specification according to an exemplary embodiment. DETAILED DESCRIPTION

[0029] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with this specification. Instead, they are merely examples of devices and methods consistent with some aspects of this specification as detailed in the appended claims.

[0030] The terms used in this specification are for the purpose of describing specific embodiments only and are not intended to limit this specification. The singular forms "a", "the" and "the" used in this specification and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0031] It should be understood that although the terms first, second, third, etc. may be used in this specification to describe various information, this information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of this specification, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0032] Defects on the wafer may cause chip performance degradation or even failure, so in order to ensure chip performance, wafer defects need to be reduced. Since different types of wafer defects often have different causes, it is necessary to classify wafer defects to determine the problems in the current production process and adaptively solve the corresponding problems to improve the wafer yield. It can be seen that in the semiconductor manufacturing process, classifying wafer defects is an important link, and accurate detection and classification of wafer defects is of great significance to improving product quality and production efficiency.

[0033] In the related art, wafer defect classification is generally achieved through a neural network model trained for wafer defect classification. However, in actual applications, it is found that the wafer defect classification in the related art has the problem of inaccurate classification. Specifically, it is found that the neural network model performs poorly when the background of the wafer defect image changes. The background changes mainly include lighting conditions, microstructure changes on the wafer surface, etc.

[0034] For example, when the lighting conditions change when the wafer defect image is taken, the wafer defect image corresponding to a certain type of defect in the training data is darker overall, while the wafer defect image of the type to be identified is brighter overall, which will cause the model to be unable to accurately identify this type of defect. For another example, in the wafer defect image corresponding to a certain type of defect in the training data, except for the defect area, the rest of the image is similar, while the background of the wafer defect image of the type to be identified has changed, making it impossible to accurately identify this type of image.

[0035] The reason for the above problem is that, through analysis of the training data, it can be seen that since a certain type of wafer defect corresponds to the same cause, the background of a certain type of wafer defect image acquired in a short period of time is similar, resulting in the training of the neural network model mainly relying on wafer defect images under a single background. As a result, during the training process, the neural network model may regard the background as part of a specific type of defect. As a result, during the application process, when the background of the wafer defect image changes, the neural network model cannot accurately identify the defect of this type.

[0036] Based on this, this specification proposes a training data acquisition method. After acquiring multiple wafer defect images, the defects and backgrounds in the wafer defect images are cut to obtain multiple images of defect areas and multiple images of background areas. The images of the defect areas and the images of the background areas are randomly cross-fused to obtain a training data set including multiple new wafer defect images.

[0037] Through the above method, the background of the wafer defect image of each defect type can be made more diverse, the diversity of training can be increased, the influence of background changes on wafer defect classification can be effectively eliminated, and the classification accuracy can be improved.

[0038] Next, the embodiments of this specification are described in detail.

[0039] like Figure 1 As shown, Figure 1 This is a flowchart of a method for obtaining training data according to an exemplary embodiment of the present specification, comprising the following steps:

[0040] Step 101, acquiring multiple wafer defect images.

[0041] The wafer defect image may be a wafer image obtained by a scanning electron microscope (SEM). The scanning electron microscope can take pictures and scan the wafer, but it can only identify the existence of defects and the location of the defects, and cannot specifically determine the type of defects. The wafer defect image may be a partial image of the wafer, such as an image that only includes the location where the wafer defects exist. Of course, the wafer defect image may also be obtained by taking pictures with other equipment that can identify wafer defects, such as a high-resolution camera, etc., and this specification does not limit this. An example of a wafer defect image is as follows: Figure 2 shown.

[0042] After obtaining the wafer defect images, optionally, the plurality of wafer defect images may be preprocessed separately. The preprocessing may include denoising, contrast enhancement, etc., which may improve the accuracy of subsequent processing and reduce the influence of image noise on image cutting, etc.

[0043] Step 103 , respectively identifying and cutting defective areas of the plurality of wafer defect images to obtain a plurality of defective area images and a plurality of background area images.

[0044] Specifically, the defect area is identified from the wafer defect image through an image cutting algorithm, and the defect area of ​​the wafer defect image is cut to obtain an image of the defect area and an image of the background area.

[0045] As for the specific form of the image of the defective region, the image of the defective region may be a portion cut out from the wafer defect image according to the shape of the defective region.

[0046] for example Figure 2 In the image shown, the irregular circular hole on the raised part is the defect area. The defect area can be cut out from the wafer defect image according to the shape of the defect area to obtain an image of the defect area.

[0047] For example, Figure 3In the image shown, the square in the middle has an etching problem, and a small part is overetched. For this image, the square with the etching problem and the overetched part in the image can be taken as defect areas and cut out from the wafer defect image according to the shape.

[0048] The image of the defective area may also be an image including the defective area and the area surrounding it.

[0049] For example, Figure 4 As shown, Figure 4 There is a problem with the shape of the less etched part. If only the less etched part is used as the defect area, the training data may be inaccurate. Therefore, in order to enable the neural network model to learn the characteristics of a certain type of defect through training data, the less etched part and the normal etched part next to it can be cut out from the image as the defect area to serve as the image of the defect area.

[0050] In addition, the image of the defective region may have the same label as the wafer defect image to which the image of the defective region belongs.

[0051] As for the specific form of the image of the background area, the part of the wafer defect image minus the defect area can be directly used as the image of the background area.

[0052] In another optional implementation, the image of the background area may also be: the portion of the wafer defect image without the defect area is taken as the first image, and the missing portion in the first image is completed to obtain the image of the background area. In other words, step 103 may include: identifying and cutting the defect area of ​​multiple wafer defect images respectively to obtain multiple images of the defect area and multiple first images; the first image is an image of other areas in the wafer defect image except the defect area; and completing the missing areas of multiple first images respectively to obtain multiple images of the background area.

[0053] In this way, when combining images in step 105, there is no need to consider whether the image of the defect area can completely cover the vacant range of the image of the background area. The image of the defect area and the image of the background area can be combined arbitrarily, thereby improving the diversity of data.

[0054] As for the specific completion method, it can be to copy the pixel values ​​around the vacant area and use the pixel values ​​as the pixel values ​​of the vacant area for completion. It can also be to automatically complete the vacant area in the first image through the image generation model to obtain the image of the background area. This specification does not limit this.

[0055] In addition, for the image cutting algorithm, an image cutting algorithm based on deep learning can be used. For example, U-Net or Mask Region-based Convolutional Neural Network (Mask R-CNN) can be selected. The above neural network can accurately extract the defective part from the complex background, providing high-quality input for subsequent cross fusion.

[0056] In an optional embodiment, step 103 may include: segmenting any wafer defect image through a U-net neural network. Next, a brief introduction to U-Net will be given. U-Net is a fully convolutional network (FCN), which is an algorithm proposed for medical image segmentation. Training the network can enable it to have the function of segmenting wafer defect images.

[0057] The implementation details of U-Net are as follows:

[0058] 1. Network structure: The network structure of U-Net consists of a contraction path (encoder) and an expansion path (decoder). The encoder gradually extracts the features of the image through a series of convolution and pooling layers, while reducing the spatial dimension. The decoder maps these features back to the original image size through upsampling and skip connections, while restoring the detail information.

[0059] 2. Convolutional layers: In the encoder and decoder, multiple convolutional layers are used to extract and restore image features. Each convolutional layer is usually followed by an activation function (such as ReLU) and a batch normalization layer to enhance the nonlinear expression ability and stability of the model.

[0060] 3. Pooling layer: The pooling layer (usually max pooling) in the encoder is used to reduce the size of the feature map, thereby extracting higher-level features and reducing the amount of computation.

[0061] 4. Upsampling: The upsampling layer in the decoder increases the size of the feature map through deconvolution (or transposed convolution) so that it can be concatenated with the feature map of the corresponding layer in the encoder.

[0062] 5. Skip Connection: A key feature of U-Net is the skip connection, which concatenates low-level features in the encoder with high-level features in the decoder, thereby helping the model to better recover the details of the image.

[0063] 6. Loss function: U-Net usually uses cross entropy loss function or Dice coefficient loss function to optimize the model. These loss functions can effectively measure the difference between the predicted segmentation map and the true label.

[0064] Step 105 , combining multiple defect area images and multiple background area images to obtain a training data set.

[0065] The training data set includes a plurality of new wafer defect images, and any new wafer defect image is obtained by fusing an image of a defect area and an image of a background area.

[0066] Specifically, through step 105, the defect areas and background areas in different wafer defect images can be cross-fused to generate new training data. Thus, more diverse training data can be generated. By simulating the variability of the background in the real production environment, the model can learn more comprehensive defect features, so that the model will not learn the defect background as part of the defect, thereby improving the generalization ability of the model.

[0067] The training data set includes multiple new wafer defect images, which are obtained by randomly combining multiple defect area images and multiple background area images. When combining, an image of a defect area can be used multiple times. In other words, there can be at least two new wafer defect images with the same defect area, and there can be at least two new wafer defect images with the same background.

[0068] The specific implementation method of step 105 may be: executing the target operation in a loop until a preset amount of training data is obtained, wherein the target operation includes: randomly selecting an image of the defect area from multiple images of the defect area, and randomly selecting an image of the background area from multiple images of the background area; fusing the image of the defect area at a first position of the image of the background area to obtain a training data; the first position is randomly selected.

[0069] Specifically, the number of new wafer defect images required can be preset. When each new wafer defect image is generated, an image of a defect area and an image of a background area can be randomly selected. A position is randomly selected in the image of the selected background area, and the image of the defect area is fused at the position.

[0070] By randomly selecting two images and randomly selecting positions in the image of the background area, in addition to simulating the situation where wafer defects appear on different backgrounds, it is also possible to simulate the situation where wafer defects appear at different positions in the image, which can make the fused image more diverse.

[0071] In addition, after randomly selecting the image of the defect area and the image of the background area in the above process, the size of the image of the defect area and the image of the background area can be matched. That is, the resolution of the two is matched. If the resolution of the two is inconsistent, it can be adjusted by cropping or scaling. This can make the fusion effect better and make the clarity of the background area and the defect area in the fused image consistent.

[0072] In addition, during the fusion process, fusing the image of the defect area at the first position of the image of the background area may include: performing weighted fusion of pixel values ​​of the image of the defect area and the image of the background area at the first position according to a preset weighting weight.

[0073] Specifically, the transparency of the defective area can be adjusted, and the pixel values ​​of the defective area and the pixel values ​​of the corresponding positions in the background area can be weighted averaged. This can make the fusion more natural to avoid the problem that the wafer defect is too abrupt in the new wafer defect image. For example, if the brightness of the image of the randomly selected defective area and the image of the background area is very different, then by adjusting the transparency of the defective area, the generated new wafer defect image can be made more realistic and natural.

[0074] In addition, after the fusion is completed, the above target operation may also include: performing edge smoothing processing on the boundary of the image of the defect area in the training data in the image of the background area.

[0075] Specifically, the edge of the defect area in the new wafer defect image is smoothed to make the fusion of the two more natural and avoid the problem of obvious boundary between the defect and the background in the new wafer defect image. The specific edge smoothing technology can be Gaussian blur or the like.

[0076] In addition, after step 105, data enhancement processing may be performed on the new wafer defect image, such as rotation, scaling, brightness adjustment, etc. This may further increase the diversity of the data and enhance the robustness of the data trained by the training data set.

[0077] After obtaining the training data set, it is also possible to: use the training data set and the plurality of wafer defect images to train a neural network model for classifying wafer defects; the label of a new wafer defect image in the training data is the same as the label of an image of its corresponding defect area.

[0078] In the above example, the training data set and the multiple wafer defect images obtained in step 101 are used as training data to train the model. In another optional embodiment, only the training data set above can be used as training data to train the model. Among them, for the specific form of the neural network, a convolutional neural network (CNN) can be used as a classifier. Through a large amount of training data, the model can learn more comprehensive defect features and obtain a more accurate neural network model for classifying wafer defects.

[0079] In addition, the trained neural network model can also be evaluated and optimized. For example, the verification set and test set can be generated by continuing the method of step 105, or the wafer defect images of the actual production process can be further obtained as the verification set and test set. The performance of the trained model, such as accuracy, recall rate, etc., can be evaluated by the verification set and the test set. The model can also be optimized according to the evaluation results to achieve the best detection effect.

[0080] Through the above method, the impact of background changes on wafer defect detection can be effectively eliminated, the accuracy of defect classification can be improved, and an efficient and accurate defect detection solution can be provided for the semiconductor manufacturing industry.

[0081] Corresponding to the embodiments of the aforementioned method, this specification also provides embodiments of an apparatus and a computer device to which it is applied.

[0082] like Figure 5 As shown, Figure 5 is a block diagram of a training data acquisition device according to an exemplary embodiment of the present specification, the device comprising:

[0083] An acquisition module 510 is used to acquire multiple wafer defect images;

[0084] A cutting module 520 is used to identify and cut defective areas of the plurality of wafer defect images respectively, to obtain a plurality of defective area images and a plurality of background area images;

[0085] The combination module 530 is used to combine multiple defect area images and multiple background area images to obtain a training data set; the training data set includes multiple new wafer defect images, and any new wafer defect image is obtained by fusion of an image of a defect area and an image of a background area.

[0086] In an optional embodiment, the cutting module 520 is specifically used to: identify and cut defective areas of multiple wafer defect images respectively to obtain multiple images of defective areas and multiple first images; the first image is an image of other areas in the wafer defect image excluding the defective area; and complete the missing areas of the multiple first images respectively to obtain multiple images of the background area.

[0087] In an optional embodiment, the combination module 530 is specifically used to: loop through the target operation until a preset amount of training data is obtained, wherein the target operation includes: randomly selecting an image of a defect area from multiple images of defect areas, and randomly selecting an image of a background area from multiple images of background areas; fusing the image of the defect area at a first position of the image of the background area to obtain a training data; the first position is randomly selected.

[0088] In an optional implementation manner, the combination module 530 is specifically used to: perform weighted fusion of pixel values ​​at the position of the image of the defect area and the image of the background area according to a preset weighted weight.

[0089] In an optional implementation manner, the combining module 530 is further configured to: perform edge smoothing processing on a boundary of the image of the defect area in the training data in the image of the background area.

[0090] In an optional implementation, it is characterized in that the cutting module 520 is specifically used to: cut any wafer defect image through a U-net neural network.

[0091] In an optional embodiment, it also includes: a training module 540 (not shown in the figure), which is used to train a neural network model for classifying wafer defects using the training data set and the multiple wafer defect images; the label of the new wafer defect image in the training data is the same as the label of the image of the corresponding defect area.

[0092] The implementation process of the functions and effects of each module in the above-mentioned device is specifically described in the implementation process of the corresponding steps in the above-mentioned method, which will not be repeated here.

[0093] For the device embodiment, since it basically corresponds to the method embodiment, the relevant parts can refer to the partial description of the method embodiment. The device embodiment described above is only schematic, wherein the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, that is, they may be located in one place, or they may be distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this specification. A person of ordinary skill in the art can understand and implement it without paying creative labor.

[0094] like Figure 6 As shown, Figure 6 A hardware structure diagram of a computer device is shown, and the device may include: a processor 1010, a memory 1020, an input / output interface 1030, a communication interface 1040, and a bus 1050. The processor 1010, the memory 1020, the input / output interface 1030, and the communication interface 1040 are connected to each other through the bus 1050 in the device.

[0095] The processor 1010 can be implemented by a general-purpose CPU (Central Processing Unit), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this specification.

[0096] The memory 1020 may be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 1020 may store an operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented by software or firmware, the relevant program codes are stored in the memory 1020 and are called and executed by the processor 1010.

[0097] The input / output interface 1030 is used to connect the input / output module to realize information input and output. The input / output module can be configured in the device as a component (not shown in the figure), or it can be externally connected to the device to provide corresponding functions. The input device may include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output device may include a display, a speaker, a vibrator, an indicator light, etc.

[0098] The communication interface 1040 is used to connect a communication module (not shown) to realize communication interaction between the device and other devices. The communication module can realize communication through a wired mode (such as USB, network cable, etc.) or a wireless mode (such as mobile network, WIFI, Bluetooth, etc.).

[0099] The bus 1050 includes a path that transmits information between the various components of the device (eg, the processor 1010, the memory 1020, the input / output interface 1030, and the communication interface 1040).

[0100] It should be noted that, although the above device only shows the processor 1010, the memory 1020, the input / output interface 1030, the communication interface 1040 and the bus 1050, in the specific implementation process, the device may also include other components necessary for normal operation. In addition, it can be understood by those skilled in the art that the above device may also only include the components necessary for implementing the embodiments of the present specification, and does not necessarily include all the components shown in the figure.

[0101] The embodiments of the present specification also provide a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the above-mentioned training data acquisition method is implemented.

[0102] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0103] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0104] The present specification provides a computer program product, including a computer program or instructions, which, when executed by a processor, implements the training data acquisition method as described in the first aspect of the embodiments of the present specification.

[0105] Those skilled in the art will readily appreciate other embodiments of the specification after considering the specification and practicing the invention claimed herein. The specification is intended to cover any variations, uses or adaptations of the specification that follow the general principles of the specification and include common knowledge or customary techniques in the art that are not claimed in the specification. The specification and examples are to be considered exemplary only, and the true scope and spirit of the specification are indicated by the following claims.

[0106] It should be understood that the present description is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present description is limited only by the appended claims.

[0107] The above description is only a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of this specification should be included in the scope of protection of this specification.

Claims

1. A method for obtaining training data, characterized in that: The method comprises: Acquire multiple wafer defect images; Recognize and cut defective areas of multiple wafer defect images respectively to obtain multiple defective area images and multiple background area images; A plurality of defect area images and a plurality of background area images are combined to obtain a training data set; the training data set includes a plurality of new wafer defect images, and any new wafer defect image is obtained by fusion of an image of a defect area and an image of a background area.

2. The method according to claim 1, characterized in that The method of identifying and cutting defective areas of a plurality of wafer defect images respectively to obtain a plurality of defective area images and a plurality of background area images includes: Recognize and cut defective areas of a plurality of wafer defect images respectively, and obtain a plurality of images of defective areas and a plurality of first images; the first image is an image of other areas in the wafer defect image except the defective area; The missing regions of the plurality of first images are respectively completed to obtain a plurality of images of the background region.

3. The method according to claim 1, characterized in that The combining of the multiple defect area images and the multiple background area images to obtain a training data set includes: The target operation is executed repeatedly until a preset amount of training data is obtained, wherein the target operation includes: Randomly select an image of the defect area from the multiple images of the defect area, and randomly select an image of the background area from the multiple images of the background area; The image of the defect area is fused at a first position of the image of the background area to obtain a training data; the first position is randomly selected.

4. The method according to claim 3, characterized in that The step of fusing the image of the defect area at a first position of the image of the background area comprises: According to the preset weighting weights, weighted fusion of pixel values ​​is performed on the image of the defect area and the image of the background area at the position.

5. The method according to claim 3, characterized in that: The target operation also includes: An edge smoothing process is performed on the boundary of the image of the defect area in the training data in the image of the background area.

6. The method according to claim 1, characterized in that Identify and cut defective areas of multiple wafer defect images separately, including: Any wafer defect image is cut through the U-net neural network.

7. The method according to claim 1, characterized in that The method further comprises: The training data set and the plurality of wafer defect images are used to train a neural network model for classifying wafer defects; the label of a new wafer defect image in the training data is the same as the label of an image of a corresponding defective area.

8. A training data acquisition device, characterized in that: The device comprises: An acquisition module, used for acquiring multiple wafer defect images; A cutting module is used to identify and cut defective areas of multiple wafer defect images respectively, so as to obtain multiple defective area images and multiple background area images; The combination module is used to combine multiple defect area images and multiple background area images to obtain a training data set; the training data set includes multiple new wafer defect images, and any new wafer defect image is obtained by fusion of an image of a defect area and an image of a background area.

9. A computer device, characterized in that: The computer device comprises: processor; Memory for storing computer programs; When the computer program is executed by the processor, the processor implements the training data acquisition method according to any one of claims 1 to 7.

10. A computer program product, characterized in that It comprises a computer program or an instruction, which, when executed by a processor, implements the training data acquisition method according to any one of claims 1 to 7.

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