System-in-package method
By using pre-prepared spherical conductive dielectric and printed solder paste curing technology in system-level packaging, combined with plastic sealing and grinding steps, the existing copper plating process is solved, achieving lower cost and shorter Time-of-the-box packaging process and protects the conductive dielectric against damage through protective layers.
Patent Information
- Application Number
- CN202411709769.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-27
- Publication Date
- 2024-12-27
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
In the existing system-level packaging method, the method of electroplating copper columns on the substrate takes a long time and is costly.
Using a pre-designed substrate and a pre-prepared spherical conductive dielectric, the conductive dielectric is fixed in the storage tank by printing solder paste, and a firm electrical connection is formed by high temperature curing. The chip and the conductive dielectric are then plastically sealed and sealed in plastic. A conductive dielectric portion is exposed on the layer for connection with the passive component.
Reduces the cost of system-level packaging, shortens process time, the spherical design of the conductive dielectric prevents position shifting, and protects the conductive dielectric from oxidation and wear with nickel and tin protective layers.
Smart Images

Figure CN119208155A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of packaging technology, and more particularly to a system-level packaging method. Background Art
[0002] System-level packaging is an advanced packaging technology that is used to integrate multiple bare chips with different functions and processes as well as passive components into a single standard package to form a system or subsystem.
[0003] In the existing system-level packaging method, after the chip is soldered on the substrate, copper pillars are electroplated on the substrate, and then passive components are soldered to the electroplated copper pillars to achieve conductivity.
[0004] However, the existing method of electroplating copper pillars on substrates is time-consuming and costly. Summary of the invention
[0005] The object of the present invention is to provide a system-level packaging method to reduce costs.
[0006] Based on the above object, the present invention provides a system-level packaging method, which comprises the following steps: S100: providing a pre-designed substrate, wherein the substrate is provided with at least one receiving groove; S200: fixing at least one pre-prepared conductive medium in the containing groove; S300: mounting a chip on the substrate; S400: plastic-sealing the chip and the conductive medium to form a plastic-sealing layer encapsulating the chip and the conductive medium; S500: grinding the plastic sealing layer outside the conductive medium to expose at least a portion of the conductive medium; S600: attaching a passive component to the plastic packaging layer, and connecting the passive component to the exposed portion of the conductive medium.
[0007] Furthermore, step S200 specifically includes the following steps: S210: Printing solder paste in the receiving groove; S220: placing the conductive medium into the receiving groove, so as to bond the conductive medium into the receiving groove by using the solder paste; S230: heating and melting the solder paste, and gradually solidifying the solder paste after cooling to form a firm electrical connection.
[0008] Furthermore, in step S210, solder paste is printed by screen printing.
[0009] Furthermore, in step S230, the substrate is placed in an oven or a heating device to heat and melt the solder paste.
[0010] Furthermore, the conductive medium is spherical.
[0011] Furthermore, the chip is pre-packaged by a planar grid array packaging method.
[0012] Furthermore, in step S300, a flip chip substrate grid array packaging method is used to mount the chip on the substrate.
[0013] Furthermore, in step S300, the chip is fixed on the substrate by solder paste.
[0014] Furthermore, the conductive medium includes a copper core, the outer side of the copper core is covered with a nickel protective layer, and the outer side of the nickel protective layer is covered with a tin protective layer.
[0015] Furthermore, one of the conductive media is fixed in each of the accommodating grooves, and the shape of the accommodating groove matches the shape of the conductive medium to accommodate at least a portion of the conductive medium.
[0016] In the system-level packaging method of the present invention, the conductive medium is prepared in advance and then fixed on the substrate. Compared with the existing copper electroplating method, it is time-saving and low-cost; the conductive medium is spherical, which can prevent the position of the conductive medium on the substrate from shifting; a nickel protective layer and a tin protective layer are sequentially provided outside the copper core of the conductive medium, the nickel protective layer can protect the copper core from being oxidized, and the tin protective layer can protect the nickel protective layer from being worn away during the grinding process. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 is a flow chart of a system-level packaging method according to an embodiment of the present invention; Figure 2 A cross-sectional view of a product obtained by using the system-level packaging method according to an embodiment of the present invention; Figure 3 is a cross-sectional view of a conductive medium according to an embodiment of the present invention. DETAILED DESCRIPTION
[0018] The preferred embodiments of the present invention are given below in conjunction with the accompanying drawings and described in detail.
[0019] like Figure 1 As shown, an embodiment of the present invention provides a system-level packaging method, which includes the following steps: S100: providing a pre-designed substrate, wherein at least one receiving groove is provided on the substrate.
[0020] The substrate is used to carry chips and passive components, which are electrically connected and transmit signals through the substrate. The substrate can connect various functional modules together through specific connection technologies (such as solder balls, pins, micro solder joints, etc.) to form a complete system or subsystem. The substrate is usually made of PCB (printed circuit board) or other high-density interconnect materials. These materials have good electrical conductivity, thermal conductivity and mechanical strength, and can meet the high requirements of system-level packaging for substrates.
[0021] S200: Fixing at least one pre-prepared conductive medium in the receiving groove.
[0022] Conductive media are used to connect to passive components, thereby achieving electrical connection and signal transmission between passive components and chips.
[0023] The shape of the receiving slot matches the shape of the conductive medium to receive at least part of the conductive medium. The number of the conductive medium is the same as the number of the receiving slots and corresponds to the receiving slots one by one, and each receiving slot is used to receive one conductive medium.
[0024] In some embodiments, step S200 specifically includes: S210: printing solder paste in the receiving tank; S220: placing the conductive medium into the corresponding receiving groove, so as to bond the conductive medium into the receiving groove by solder paste; S230: Heat and melt the solder paste, and allow the solder paste to gradually solidify after cooling to form a firm electrical connection.
[0025] In step S210, the solder paste may be printed by screen printing, that is, a screen is first placed on a substrate by a special machine (such as a solder paste printer), and then the solder paste is printed on the substrate; the screen can cover the position where the solder paste does not need to be printed, so that the solder paste can only be printed on the specified position of the substrate.
[0026] In step S220, the conductive medium can be mounted in the receiving groove of the substrate by a dedicated mounting machine. Since there is solder paste in the receiving groove, the conductive medium will be temporarily fixed on the substrate by the viscosity of the solder paste. At this time, a firm electrical connection has not yet been formed between the conductive medium and the substrate.
[0027] In step S230, the substrate with the conductive medium mounted thereon can be placed in an oven or heating device and heated to about 260°C (or the temperature can be adjusted according to the melting point of the solder paste) to melt the solder paste. During the melting process, the solder paste will fill the tiny gap between the conductive medium and the substrate and form a metal connection. After the solder paste melts, it will gradually solidify as the temperature decreases, forming a strong electrical connection, thereby allowing the conductive medium to be firmly fixed to the substrate by the tin. During the high-temperature curing process, the heating temperature and heating time need to be strictly controlled to avoid problems such as excessive melting of the solder paste or damage to the substrate.
[0028] During actual packaging, appropriate solder paste can be selected according to the material, size and substrate requirements of the conductive medium. Different solder pastes have different melting points, fluidity and conductive properties.
[0029] The non-spherical conductive medium may be displaced during the solder paste curing process. To avoid this problem, the conductive medium can be formed into a spherical shape.
[0030] In the present invention, the conductive medium is prepared in advance and then fixed on the substrate. Compared with the existing electroplating copper process, the cost is lower (the cost can be reduced to one-fifth of the electroplating copper) and the time consumption is shorter.
[0031] S300: Mounting the chip on the substrate.
[0032] In some embodiments, the chip may be pre-packaged using a planar grid array packaging technology, and a series of metal solder joints may be provided at the bottom thereof, through which the chip may be soldered to the substrate.
[0033] In some cases, the chip can also be ground as needed to thin it to a preset thickness.
[0034] In some embodiments, the chip may be mounted on the substrate using flip chip substrate grid array packaging technology.
[0035] In some embodiments, the chip can also be fixed on the substrate by solder paste. When fixing, the solder paste needs to be printed on the installation position of the chip first, and then high-temperature curing is performed to achieve a firm electrical connection between the metal solder joints of the chip and the substrate. Since the fixing of the conductive medium and the chip both require a high-temperature curing process, the two high-temperature curing processes can be combined into one, and the above step S230 can be omitted. Instead, high-temperature curing is uniformly performed during the chip installation process, thereby simplifying the process and saving time.
[0036] S400: Plastic-encapsulating the chip and the conductive medium to form a plastic-encapsulating layer encapsulating the chip and the conductive medium.
[0037] The plastic sealing layer can completely wrap the chip and the conductive medium, thereby providing protection against moisture, dust, oxidation and corrosion.
[0038] The plastic encapsulation layer can be formed by heat molding, cold molding or other suitable methods. The material of the plastic encapsulation layer can be selected as required.
[0039] S500: grinding the plastic packaging layer outside the conductive medium to expose at least a portion of the conductive medium.
[0040] Since the conductive medium is wrapped by the plastic sealing layer, it will be isolated from the outside world. In order to enable the passive components to be connected to the conductive medium, the plastic sealing layer on the outside of the conductive medium can be worn off to expose at least part of the conductive medium. The exposed part of the conductive medium can be used as a connection point with the passive components, thereby realizing the electrical connection between the passive components and the conductive medium.
[0041] S600: Paste the passive components on the plastic packaging layer, and connect the passive components to the exposed part of the conductive medium.
[0042] Passive components can be attached to the plastic packaging layer by a dedicated placement machine, and solder paste can be used to achieve welding between the passive components and the exposed parts of the conductive medium.
[0043] In some embodiments, after step S600, a mark may be printed on the passive component, and then the component may be cut into individual pieces to obtain a plurality of independent products.
[0044] like Figure 2 As shown, in an exemplary embodiment, a product obtained by the system-level packaging method of an embodiment of the present invention includes a substrate 10 and two conductive media 20 and a chip 30 arranged on the substrate 10, the conductive medium 20 and the chip 30 are wrapped by a plastic layer 40, the plastic layer 40 at the top of the conductive medium 20 is worn off, so that the top of the conductive medium 20 is exposed, and the passive component 50 is located on the plastic layer 40 and is electrically connected to the top of the two conductive media 20.
[0045] like Figure 3 As shown, in some embodiments, the conductive medium 20 includes a copper core 21, and the outer side of the copper core 21 is covered with a nickel protective layer 22, and the nickel protective layer 22 can play a role in preventing oxidation; a tin protective layer 23 can also be provided outside the nickel protective layer 22, and the tin protective layer 23 is used to prevent the nickel protective layer 22 from being worn away when the plastic encapsulation layer 40 is ground in step S500. When grinding the plastic encapsulation layer 40, since the conductive medium 20 needs to be exposed, some of the conductive medium 20 will inevitably be worn away at the same time. If there is no tin protective layer 23, the nickel protective layer 22 is the outermost layer of the conductive medium, which may be worn away during the grinding step, so that the copper core 21 loses the protection of the nickel protective layer 22; after the tin protective layer 23 is provided, even if some of the tin protective layer 23 is worn away during the grinding process, the nickel protective layer 22 will not be worn away, and the nickel protective layer 22 can continue to protect the copper core 21.
[0046] In the system-level packaging method of the embodiment of the present invention, the conductive medium 20 is prepared in advance and then fixed on the substrate 10. Compared with the existing copper electroplating method, it is time-saving and low-cost; the conductive medium 20 is spherical, which can prevent the position of the conductive medium 20 on the substrate 10 from shifting; the copper core 21 of the conductive medium 20 is provided with a nickel protective layer 22 and a tin protective layer 23 in sequence, the nickel protective layer 22 can protect the copper core 21 from being oxidized, and the tin protective layer 23 can protect the nickel protective layer 22 from being worn away during the grinding process.
[0047] The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. The above embodiment of the present invention can also be modified in various ways. That is, all simple, equivalent changes and modifications made according to the claims and the description of the present invention fall within the scope of protection of the claims of the present invention. The contents not described in detail in the present invention are all conventional technical contents.
Claims
1. A system-level packaging method, characterized in that: The following steps are involved: S100: providing a pre-designed substrate, wherein the substrate is provided with at least one receiving groove; S200: fixing at least one pre-prepared conductive medium in the containing groove; S300: mounting a chip on the substrate; S400: plastic-sealing the chip and the conductive medium to form a plastic-sealing layer encapsulating the chip and the conductive medium; S500: grinding the plastic sealing layer outside the conductive medium to expose at least a portion of the conductive medium; S600: attaching a passive component to the plastic packaging layer, and connecting the passive component to the exposed portion of the conductive medium.
2. The system-level packaging method according to claim 1, characterized in that: Step S200 specifically includes the following steps: S210: Printing solder paste in the receiving groove; S220: placing the conductive medium into the receiving groove, so as to bond the conductive medium into the receiving groove by using the solder paste; S230: heating and melting the solder paste, and gradually solidifying the solder paste after cooling to form a firm electrical connection.
3. The system-level packaging method according to claim 2, characterized in that: In step S210, solder paste is printed by screen printing.
4. The system-level packaging method according to claim 2, characterized in that: In step S230, the substrate is placed in an oven or a heating device to heat and melt the solder paste.
5. The system-level packaging method according to claim 1, characterized in that: The conductive medium is spherical.
6. The system-level packaging method according to claim 1, characterized in that: The chip is packaged in advance by a planar grid array packaging method.
7. The system-level packaging method according to claim 1, characterized in that: In step S300, a chip is mounted on a substrate using a flip chip substrate grid array packaging method.
8. The system-level packaging method according to claim 1, characterized in that: In step S300, the chip is fixed on the substrate by solder paste.
9. The system-level packaging method according to claim 1, characterized in that: The conductive medium comprises a copper core, an outer side of the copper core is covered with a nickel protective layer, and an outer side of the nickel protective layer is covered with a tin protective layer.
10. The system-level packaging method according to claim 1, characterized in that: One of the conductive media is fixed in each of the accommodating grooves, and the shape of the accommodating groove matches the shape of the conductive media to accommodate at least a portion of the conductive medium.
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