Direct-current power supply arc control device, direct-current power supply and semiconductor process equipment

Abstract

The embodiment of the invention provides a direct-current power supply arc control device, a direct-current power supply and semiconductor process equipment. The direct-current power supply arc control device comprises an acquisition module for acquiring analog output signals of the direct-current power supply; the detection module compares the analog output signal with a preset arc state parameter and outputs a digital quantity arc state signal; the preset arc state parameters comprise an analog quantity voltage threshold value, an analog quantity current threshold value and an analog quantity maximum current threshold value; the control module is connected with the detection module and controls output of the direct-current power supply based on the digital quantity arc state signal and preset digital quantity arc management parameters, and the preset digital quantity arc management parameters comprise an arc duration threshold value and an arc counting threshold value. When the duration time of the arc state reaches the arc duration time threshold value or when the occurrence frequency of the arc state reaches the arc counting threshold value, the direct current power supply stops outputting. According to the embodiment of the invention, the arc of the direct-current power supply can be controlled in the sputtering process of the plasma system, and the quality of a sputtered film is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, in particular to a DC power supply arc control device, a DC power supply and semiconductor process equipment. Background Art

[0002] In a plasma system, the output of a DC sputtering power supply is connected between the cathode and anode of the plasma system to generate plasma. The generated plasma continuously bombards the target material, sputtering metal atoms from the target material, which migrate to the substrate and eventually deposit on the substrate to produce a thin film. In the entire process of depositing thin films, arc discharge is inevitable, which will lead to the generation of larger particles, making the entire surface uneven, affecting the quality of the substrate, and in severe cases causing product defects. In view of the above reasons, how to quickly detect and manage arcs is particularly important. Summary of the invention

[0003] In view of the above problems, embodiments of the present invention are proposed to provide a DC power supply arc control device, a DC power supply and a semiconductor process equipment that overcome the above problems or at least partially solve the above problems.

[0004] In a first aspect of the present invention, an embodiment of the present invention discloses a DC power supply arc control device, comprising:

[0005] An acquisition module, used for acquiring an analog output signal of a DC power supply;

[0006] A detection module, connected to the acquisition module, for comparing the analog output signal with preset arc state parameters and outputting a digital arc state signal; the preset arc state parameters include an analog voltage threshold, an analog current threshold and an analog maximum current threshold, and the digital arc state signal is used to characterize the duration and number of occurrences of the arc state;

[0007] A control module is connected to the detection module and is used to control the output of the DC power supply based on the digital arc state signal and preset digital arc management parameters, wherein the preset digital arc management parameters include an arc duration threshold and an arc count threshold, and when the duration of the arc state reaches the arc duration threshold or when the number of occurrences of the arc state reaches the arc count threshold, the DC power supply stops outputting.

[0008] Optionally, the acquisition module includes:

[0009] A voltage acquisition submodule, used to acquire the analog voltage value corresponding to the analog output signal;

[0010] The current acquisition submodule is used to acquire the analog current value corresponding to the analog output signal.

[0011] Optionally, the digital arc state signal includes a digital arc first state signal, a digital arc second state signal and a digital arc third state signal, and the detection module includes:

[0012] a voltage comparison submodule, connected to the voltage acquisition submodule, for comparing the analog voltage value with the analog voltage threshold, outputting a second level when the analog voltage value is less than the analog voltage threshold, and outputting a first level when the analog voltage value is greater than or equal to the analog voltage threshold, so as to generate the digital arc first state signal; in the digital arc first state signal, the time period between the moment when the first level jumps to the second level and the moment when the first level jumps to the next second level is the duration of an arc state;

[0013] a current comparison submodule, connected to the current acquisition submodule, for comparing the analog current value with the analog current threshold, outputting a first level when the analog current value is greater than or equal to the analog current threshold, and outputting a second level when the analog current value is less than the analog current threshold, so as to generate the digital arc second state signal; in the digital arc second state signal, the time period between the moment when the second level jumps to the first level and the moment when the next second level jumps to the next first level is the duration of an arc state;

[0014] The maximum current comparison submodule is connected to the current acquisition submodule, and is used to compare the analog current value with the analog maximum current threshold, and output a first level when the analog current value is greater than or equal to the analog maximum current threshold, and output a second level when the analog current value is less than the analog maximum current threshold, so as to generate the digital arc third state signal; in the digital arc third state signal, the time period between the moment when the second level jumps to the first level and the moment when the second level jumps to the next first level is the duration of an arc state.

[0015] Optionally, the voltage comparison submodule, the current comparison submodule and the maximum current comparison submodule are all analog comparators.

[0016] Optionally, the detection module further includes:

[0017] A voltage setting submodule, connected to the voltage comparison submodule and the control module, for converting the digital voltage threshold sent by the control module into the analog voltage threshold, and sending the analog voltage threshold to the voltage comparison submodule;

[0018] The current setting submodule is connected to the current comparison submodule and the control module, and is used to convert the digital current threshold sent by the control module into the analog current threshold, and send the analog current threshold to the current comparison submodule.

[0019] Optionally, the control module includes:

[0020] The processor submodule is connected to the voltage comparison submodule, the current comparison submodule, and the maximum current comparison submodule, and is used to receive one of the digital arc first state signal, the digital arc second state signal, and the digital arc third state signal; compare the digital arc first state signal, the digital arc second state signal, or the digital arc third state signal with the preset arc management parameters, and output the arc management signal.

[0021] Optionally, the control module further includes:

[0022] A communication submodule, connected to the processor submodule, and used to receive a setting instruction sent by a host computer, wherein the setting instruction includes the digital quantity voltage threshold and the digital quantity current threshold;

[0023] The processor submodule is connected to the voltage setting submodule and the current setting submodule, and is further used to send the digital voltage threshold to the voltage setting submodule and send the digital current threshold to the current setting submodule.

[0024] Optionally, the processor submodule includes:

[0025] A voltage capture submodule is connected to the voltage comparison submodule, and is used to receive the digital arc first state signal, continuously monitor the waveform of the digital arc first state signal, and generate time voltage state information; the time voltage state information is used to characterize the duration count value of multiple arc states in the digital arc first state signal;

[0026] A current capture submodule is connected to the current comparison submodule, and is used to receive the digital arc second state signal, continuously monitor the waveform of the digital arc second state signal, and generate time current state information; the time current state information is used to characterize the duration count value of multiple arc states in the digital arc second state signal;

[0027] a maximum current capture submodule, connected to the maximum current comparison submodule, for receiving the digital arc third state signal, continuously monitoring the waveform of the digital arc third state signal, and generating maximum time current state information; the maximum time current state information is used to characterize the duration count value of multiple arc states in the digital arc third state signal;

[0028] A time comparison submodule, connected to the voltage capture submodule, the current capture submodule, and the maximum current capture submodule, for determining an arc management signal based on the time voltage state information or the time current state information or the maximum time current state information compared with the preset arc management parameters; the arc management signal includes an arc holding time;

[0029] A power control submodule is connected to the time comparison submodule and is used to control the output of the DC power supply according to the arc holding time.

[0030] Optionally, the arc management signal further includes: arc off time;

[0031] The power control module is further used to control the restart of the DC power supply according to the arc off time.

[0032] Optionally, the preset arc management parameters include an arc count threshold; when the digital arc first state signal is triggered first and the time voltage state information includes a jump from the first level to the second level, the time comparison submodule is used to count the jump from the second level to the first level in the time voltage state information, generate a first count value, compare the first count value with the arc count threshold, and determine the arc holding time.

[0033] Optionally, the preset arc management parameters include an arc count threshold;

[0034] When the digital arc second state signal is triggered first and the time current state information includes a jump from the second level to the first level, the time comparison submodule is used to count the jump from the first level to the second level in the time current state information, generate a second count value, compare the second count value with the arc count threshold, and determine the arc holding time.

[0035] Optionally, the preset arc management parameters include an arc count threshold;

[0036] When the arc third state signal is triggered first and the maximum time current state information includes the transition from the second level to the first level, the time comparison submodule is used to count the transition from the first level to the second level in the maximum time current state information, generate a third timing value, compare the third timing value with the arc counting threshold, and determine the arc holding time.

[0037] Optionally, the control module is used to perform the following steps:

[0038] Receive one of the digital arc first state signal, the digital arc second state signal and the digital arc third state signal output by the detection module;

[0039] When the digital arc first state signal is triggered first, the waveform of the digital arc first state signal is continuously monitored, and when the duration of the second level reaches the arc duration threshold, the DC power supply is stopped from outputting; or each time the duration of the second level is less than the arc duration threshold, the transition from the second level to the first level is counted to obtain a first count value, and when the first count value reaches the arc count threshold, the DC power supply is stopped from outputting; or

[0040] When the digital arc second state signal is triggered first, the waveform of the digital arc second state signal is continuously monitored, and when the duration of the first level reaches the arc duration threshold, the DC power supply is stopped from outputting; or each time the duration of the first level is less than the arc duration threshold, the transition from the first level to the second level is counted to obtain a second count value, and when the second count value reaches the arc count threshold, the DC power supply is stopped from outputting; or

[0041] When the digital arc third state signal is triggered preferentially, the waveform of the digital arc third state signal is continuously monitored, and when the duration of the first level reaches the arc duration threshold, the DC power supply stops outputting; or each time the duration of the first level is less than the arc duration threshold, the transition from the first level to the second level is counted to obtain a third count value, and when the third count value reaches the arc count threshold, the DC power supply stops outputting.

[0042] In a second aspect of the present invention, an embodiment of the present invention discloses a DC power supply arc control device, comprising:

[0043] An acquisition circuit, used for acquiring an analog output signal of a DC power supply;

[0044] a detection circuit connected to the acquisition circuit, used to compare the analog output signal with preset arc state parameters and output a digital arc state signal; the preset arc state parameters include an analog voltage threshold, an analog current threshold and an analog maximum current threshold, and the digital arc state signal is used to characterize the duration and number of occurrences of the arc state; and

[0045] A processor and a memory, wherein a computer program is stored in the memory, and the processor executes the computer program to output a control signal based on the digital arc state signal and preset digital arc management parameters, wherein the control signal is used to control the output of the DC power supply, and the preset digital arc management parameters include an arc duration threshold and an arc count threshold, and when the duration of the arc state reaches the arc duration threshold or when the number of occurrences of the arc state reaches the arc count threshold, the DC power supply stops outputting.

[0046] Optionally, the analog output signal includes an analog voltage value and an analog current value;

[0047] The digital arc state signal includes a digital arc first state signal, a digital arc second state signal and a digital arc third state signal, and the detection module includes:

[0048] a first analog comparator, configured to compare the analog voltage value with the analog voltage threshold, and output a second level when the analog voltage value is less than the analog voltage threshold, and output a first level when the analog voltage value is greater than or equal to the analog voltage threshold, so as to generate the digital arc first state signal; in the digital arc first state signal, a time period between a moment when the first level jumps to the second level and a moment when the first level jumps to the next second level is a duration of an arc state;

[0049] a second analog comparator, for comparing the analog current value with the analog current threshold, outputting a first level when the analog current value is greater than or equal to the analog current threshold, and outputting a second level when the analog current value is less than the analog current threshold, so as to generate the digital arc second state signal; in the digital arc second state signal, a time period between a moment when the second level jumps to the first level and a moment when the next second level jumps to the next first level is the duration of an arc state;

[0050] A third analog comparator is used to compare the analog current value with the analog maximum current threshold, and output a first level when the analog current value is greater than or equal to the analog maximum current threshold, and output a second level when the analog current value is less than the analog maximum current threshold, so as to generate the digital arc third state signal; in the digital arc third state signal, the time period between the moment when the second level jumps to the first level and the moment when the next second level jumps to the next first level is the duration of an arc state.

[0051] Optionally, the processor is further configured to perform the following steps:

[0052] Receive one of the digital arc first state signal, the digital arc second state signal and the digital arc third state signal output by the detection module;

[0053] When the digital arc first state signal is triggered first, the waveform of the digital arc first state signal is continuously monitored, and when the duration of the second level reaches the arc duration threshold, the DC power supply is stopped from outputting; or each time the duration of the second level is less than the arc duration threshold, the transition from the second level to the first level is counted to obtain a first count value, and when the first count value reaches the arc count threshold, the DC power supply is stopped from outputting; or

[0054] When the digital arc second state signal is triggered first, the waveform of the digital arc second state signal is continuously monitored, and when the duration of the first level reaches the arc duration threshold, the DC power supply is stopped from outputting; or each time the duration of the first level is less than the arc duration threshold, the transition from the first level to the second level is counted to obtain a second count value, and when the second count value reaches the arc count threshold, the DC power supply is stopped from outputting; or

[0055] When the digital arc third state signal is triggered preferentially, the waveform of the digital arc third state signal is continuously monitored, and when the duration of the first level reaches the arc duration threshold, the DC power supply stops outputting; or each time the duration of the first level is less than the arc duration threshold, the transition from the first level to the second level is counted to obtain a third count value, and when the third count value reaches the arc count threshold, the DC power supply stops outputting.

[0056] Optionally, the processor is further configured to perform the following steps:

[0057] After the DC power source stops outputting for a predetermined period of time, the DC power source is restarted.

[0058] In a third aspect of the present invention, an embodiment of the present invention discloses a DC power supply, which includes the DC power supply arc control device as described above.

[0059] In the fourth aspect of the present invention, an embodiment of the present invention discloses a semiconductor process equipment, which includes the above-mentioned DC power supply, a process chamber, and an anode and a cathode located in the process chamber, wherein the DC power supply is used to load radio frequency power to the anode and the cathode in the process chamber to generate plasma, so that the generated plasma bombards a target material, thereby depositing a thin film on the surface of a wafer to be processed.

[0060] The embodiments of the present invention include the following advantages:

[0061] The embodiment of the present invention collects the analog output signal of the DC power supply through the acquisition module; the detection module is connected to the acquisition module, compares the analog output signal with the preset arc state parameters, and outputs a digital arc state signal; the preset arc state parameters include an analog voltage threshold, an analog current threshold and an analog maximum current threshold, and the digital arc state signal is used to characterize the duration and number of occurrences of the arc state; the control module is connected to the detection module, and controls the output of the DC power supply based on the digital arc state signal and preset digital arc management parameters, and the preset digital arc management parameters include an arc duration threshold and an arc count threshold. When the arc state lasts for a long time, the control module controls the output of the DC power supply based on the digital arc state signal and preset digital arc management parameters. When the arc duration threshold is reached or the number of occurrences of the arc state reaches the arc count threshold, the DC power supply is stopped from outputting; an analog output signal is generated by sampling the output voltage and current of the DC power supply, the sampled analog output signal is compared with a preset arc management parameter to generate a digital arc state signal, and the DC power supply is further digitally controlled by the digital arc state signal and the preset digital arc management parameter, so as to realize rapid detection of the arc of the DC power supply during the sputtering process of the plasma system; and refined management is performed; the arc of the DC power supply during the sputtering process of the plasma system is controllable, so as to ensure its long-term stable operation and improve the quality of the sputtered film. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] Figure 1 It is a structural block diagram of an embodiment of a DC power supply arc control device of the present invention;

[0063] Figure 2 It is a waveform diagram corresponding to a digital arc first state signal of an embodiment of a DC power supply arc control device of the present invention;

[0064] Figure 3 It is a waveform diagram corresponding to a digital arc second state signal of an embodiment of a DC power supply arc control device of the present invention;

[0065] Figure 4 It is a waveform diagram corresponding to a digital arc third state signal of an embodiment of a DC power supply arc control device of the present invention;

[0066] Figure 5 It is a structural block diagram of a semiconductor process equipment embodiment of the present invention. DETAILED DESCRIPTION

[0067] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0068] Reference Figure 1 , shows a structural block diagram of an embodiment of a DC power supply arc control device of the present invention, and the DC power supply arc control device may specifically include the following modules:

[0069] Acquisition module 1, used for acquiring analog output signals of a DC power supply;

[0070] The detection module 2 is connected to the acquisition module 1 and is used to compare the analog output signal with preset arc state parameters and output a digital arc state signal; the preset arc state parameters include an analog voltage threshold, an analog current threshold and an analog maximum current threshold, and the digital arc state signal is used to characterize the duration and number of occurrences of the arc state;

[0071] The control module 3 is connected to the detection module 2, and is used to control the output of the DC power supply based on the digital arc state signal and preset digital arc management parameters, wherein the preset digital arc management parameters include an arc duration threshold and an arc count threshold, and when the duration of the arc state reaches the arc duration threshold or when the number of occurrences of the arc state reaches the arc count threshold, the DC power supply stops outputting.

[0072] In the embodiment of the present invention, the acquisition module 1 and the detection module 2 can be implemented by hardware circuits, that is, the acquisition circuit is composed of electronic components, and the detection circuit is composed of electronic components. The control module 3 can be implemented by a processor such as a DSP (Digital Signal Processing) chip and a memory.

[0073] In an embodiment of the present invention, a DC power supply arc control module includes an acquisition module 1, a detection module 2, and a control module 3. The acquisition module 1 is connected to the output end of the DC power supply to acquire analog output signals such as the output current and output voltage of the DC power supply, and after acquisition, the acquired analog output signals can be filtered to remove noise. The input end of the detection module 2 is connected to the output end of the acquisition module 1, and the analog output signals such as the voltage and current data filtered by the acquisition module 1 are compared with the preset arc state parameters and a digital arc state signal is output, and the duration and number of occurrences of the arc state are characterized by the digital arc state signal, that is, the digital arc state signal is characterized as the current arc state. Among them, the preset arc state parameters include an analog voltage threshold, an analog current threshold, and an analog maximum current threshold. The input end of the control module 3 is connected to the output end of the detection module 2. The control module 3 compares the feedback digital arc state signal (including time and quantity) with the preset digital arc management parameters such as the arc holding time threshold, arc counting threshold, and arc off time threshold set by the host computer. When the duration of the arc state reaches the arc duration threshold, or when the number of occurrences of the arc state reaches the arc counting threshold, the DC power supply stops outputting. By controlling the output of the DC power supply, the control of the arc size and time is achieved, which is arc management. The DC power supply can be a DC sputtering power supply.

[0074] Specifically, the acquisition module 1 includes a voltage acquisition submodule 11 and a current acquisition submodule 12; the voltage acquisition submodule 11 is connected to the voltage comparison submodule 22 of the detection module 2, and the current acquisition submodule 12 is respectively connected to the current comparison submodule 23 and the maximum current comparison submodule 25. Among them, the voltage acquisition submodule 11 and the current acquisition submodule 12 can be implemented by acquisition circuits respectively. The voltage comparison submodule 22, the current comparison submodule 23 and the maximum current comparison submodule 25 of the detection module 2 are respectively connected to the voltage capture submodule 321, the current capture submodule 322 and the maximum current capture submodule 323 of the control module 3. The DSP submodule 32 of the control module 3 is connected to the voltage setting submodule (DAC) 21 and the current setting submodule (DAC) 23 of the detection module 2, and the power submodule 325 of the processor submodule 32 of the control module 3 is connected to the output control. Among them, the voltage comparison submodule 22, the current comparison submodule 23 and the maximum current comparison submodule 25 can be implemented by analog comparators respectively; the voltage setting submodule 21 and the current setting submodule 23 can be implemented by digital-to-analog converters respectively; the processor submodule can be composed of a processor such as FPGA (field programmable gate array), CPU (central processing unit), DSP, etc. combined with a memory, such as Figure 1As shown, in this embodiment, a DSP chip is used as a processor, that is, the processor submodule 32 is the DSP submodule 32. The DSP submodule 32 is composed of a processor and a memory. The input end of the voltage acquisition submodule 11 of the acquisition module 1 is connected to the voltage feedback in the analog output signal of the DC power supply, and the voltage signal in the collected analog output signal is filtered and then connected to the voltage comparison submodule 22 of the detection module 2 as the positive terminal given of the voltage comparator submodule 22 for comparison. The input end of the current acquisition submodule 12 is connected to the current feedback of the analog output signal of the DC power supply, and the current signal in the collected simulated output signal is filtered and then connected to the current comparison submodule 23 of the detection module 2 and the maximum current comparison submodule 25 of the detection module 2 as the positive terminal given of the current comparator submodule 23 and the positive terminal given of the maximum current comparison submodule 25, so as to compare the current. The voltage setting submodule (DAC) 21 of the detection module 2 receives the voltage threshold digital signal from the processor submodule 32 in the control module 3, converts it into an analog quantity and uses it as the negative terminal setting of the voltage comparison submodule 22 of the detection module 2. The current setting submodule (DAC) 23 receives the current threshold digital signal from the DSP submodule 32 in the control module 3, converts it into an analog quantity and uses it as the negative terminal setting of the current comparison submodule 23 of the detection module 2. The negative terminal setting of the maximum current comparison submodule 25 is given by a fixed voltage reference, and its voltage reference corresponds to the maximum current of the DC power supply. The voltage comparison submodule 22, current comparison submodule 23 and maximum current comparison submodule 25 (the maximum current can be set to 1.1 times the rated current, and when the output current of the power supply is greater than the maximum current setting value, it serves as one of the conditions for the arc state) of the detection module 2 compare the set analog voltage threshold, analog current threshold and analog maximum current threshold with the voltage and current output by the detected DC power supply, and output a digital arc state signal to indicate the current state of the arc, i.e., the duration and number of occurrences of the arc state; the input end of the communication submodule 31 of the control module 3 is connected to the host computer, and its output end is connected to the DSP submodule 32 of the control module 3 through a communication line, which is used for setting voltage, current and time thresholds. The input end of the voltage capture submodule 321 of the control module 3 is the output of the voltage comparison submodule 22 of the detection module 2, the input end of the current capture submodule 322 is the output of the current comparison submodule 23 of the detection module 2, and the input end of the maximum current capture submodule 323 is the output of the maximum current comparison submodule 25 of the detection module 2. The function of the three-way capture submodule is to capture the current time state of the arc; wherein, the current time state of the arc refers to the result generated by the comparison of the three comparison submodules of the detection module 2 with the corresponding threshold values, which is the current state of the arc, and the arc state includes the duration of the arc and the accumulated number of arc times.Specifically, the voltage capture submodule is used to receive the digital arc first state signal, continuously monitor the waveform of the digital arc first state signal, and generate time voltage state information; the time voltage state information is used to characterize the duration count value of multiple arc states in the digital arc first state signal; the current capture submodule is used to receive the digital arc second state signal, continuously monitor the waveform of the digital arc second state signal, and generate time current state information; the time current state information is used to characterize the duration count value of multiple arc states in the digital arc second state signal; the maximum current capture submodule is used to receive the digital arc third state signal, continuously monitor the waveform of the digital arc third state signal, and generate maximum time current state information; the maximum time current state information is used to characterize the duration count value of multiple arc states in the digital arc third state signal. The outputs of the voltage comparison submodule 22, the current comparison submodule 23, and the maximum current comparison submodule 25 are respectively connected to the time comparison submodule 324, which is used to determine the arc management signal based on the time voltage state information or the time current state information or the maximum time current state information, compared with the preset arc management parameters, and realize the judgment of the arc holding and shutdown time through the arc management signal. The output is connected to the input of the power submodule 325, and the output of the power submodule 325 is connected to the output control terminal, which is used to control the power output of the DC power supply and realize the control of arc holding and shutdown.

[0075] For the rapid detection of DC power arc, after the communication submodule 31 of the control module 3 receives the voltage and current threshold settings sent by the host computer, the data is transmitted to the processor submodule 32 for storage to generate digital voltage and current thresholds, and the digital voltage and current thresholds are sent to the voltage setting submodule (DAC) 21 and the current setting submodule (DAC) 24 of the detection module 2 respectively. The two setting submodules convert the sent digital signals into analog signals, and the converted analog voltage threshold is used as the negative terminal reference of the voltage comparison submodule 22, and the converted analog current threshold is used as the negative terminal reference of the current comparison submodule 23. The voltage acquisition submodule 11 of the acquisition module 1 is a resistor voltage division mode, which has a high bandwidth and can respond to the change of the output voltage in real time. The analog voltage signal sampled by it is sent to the positive end of the voltage comparison submodule 22 after signal filtering. When the positive end voltage of the voltage comparison submodule 22 is less than the negative end voltage threshold, the voltage comparison submodule 22 outputs a low level. When the positive end voltage of the voltage comparison submodule 22 is greater than the negative end voltage threshold, the voltage comparison submodule 22 outputs a high level. Because the negative end reference of the voltage comparison submodule 22 is the set voltage threshold, that is, when the output voltage is lower than this voltage threshold, it indicates that the output The voltage has dropped, indicating that an arc has occurred. At this time, the output of the voltage comparison submodule 22 compares the analog voltage value with the analog voltage threshold. When the analog voltage value is less than the analog voltage threshold, the second level is output. When the analog voltage value is greater than or equal to the analog voltage threshold, the first level is output to generate the digital arc first state signal; in the digital arc first state signal, the time period between the moment when the first level jumps to the second level and the moment when the first level jumps to the next second level is the duration of an arc state. The current acquisition submodule 12 of the acquisition module 1 is a high-bandwidth current sensor sampling, which can respond to the changes in the output current in real time. The sampled analog current signal is sent to the positive end of the current comparison submodule 23 after signal filtering. Since the negative end reference of the current comparison submodule 23 is the set current threshold, that is, when the output current is higher than this current threshold, it means that the output current has risen to a higher level, indicating that an arc has occurred. At this time, the output of the current comparison submodule 23 compares the analog current value with the analog current threshold. When the analog current value is greater than or equal to the analog current threshold, a first level is output, and when the analog current value is less than the analog current threshold, a second level is output to generate the digital arc second state signal; in the digital arc second state signal, the time period between the moment when the second level jumps to the first level and the moment when the next second level jumps to the next first level is the duration of an arc state.The current acquisition submodule 12 of the acquisition module 1 also sends the analog current signal it samples to the positive end of the maximum current comparison submodule 25, because the negative end reference of the maximum current comparison submodule 25 is a fixed maximum current threshold, that is, when the output current is higher than this current threshold, it means that the output current is greater than the maximum current value, indicating that an arc has occurred. At this time, the output of the maximum current comparison submodule 25 compares the analog current value with the analog maximum current threshold, and outputs a first level when the analog current value is greater than or equal to the analog maximum current threshold, and outputs a second level when the analog current value is less than the analog maximum current threshold, so as to generate the digital arc third state signal; in the digital arc third state signal, the time period between the moment when the second level jumps to the first level and the moment when the second level jumps to the next first level is the duration of an arc state. In one example of the present invention, the first level can be a high level, and the second level is a low level. Among the three digital arc states obtained by the above-mentioned rapid detection, each state can be divided into three stages. The first stage is the arc detection stage (i.e., the first rising edge or falling edge of the mutation), the second stage is the arc continuation stage (i.e., the level holding stage), and the third stage is the arc disappearance stage (i.e., the first falling edge or rising edge of the mutation), such as. Figure 2 1 is a waveform diagram corresponding to a digital arc first state signal of an embodiment of a DC power supply arc control device of the present invention; Figure 2 It can be seen that there are three different stages of the first state signal of the digital arc. Figure 3 1 is a waveform diagram corresponding to the digital arc second state signal of an embodiment of a DC power supply arc control device of the present invention; Figure 3 It can be seen that there are three different stages in the second state of the digital arc. Figure 4 1 is a waveform diagram corresponding to the third state signal of the digital arc in an embodiment of a DC power supply arc control device of the present invention; Figure 4 It can be seen that there are three different stages of the third state of the arc. By analog sampling of the DC power supply output voltage and current and comparing them with the corresponding analog threshold, the arc state is quickly detected, thereby reducing the output energy of the arc, reducing the damage of the arc to the target material, and improving the sputtering quality.

[0076] After knowing the three digital arc states, the arc can be managed. After the communication submodule 31 of the control module 3 receives the setting instructions including the arc holding time threshold, arc counting threshold, arc shut-off time threshold, etc. from the upper computer and sets them, these data are transmitted to the processor submodule 32 for storage, and at the same time transmitted to the time comparison submodule 324 as a comparison basis for time and count.

[0077] One of the digital arc first state signal, the digital arc second state signal and the digital arc first state signal may be received to execute the following control processes corresponding to the triggering of different signals.

[0078] When the digital arc first state signal output by the voltage comparison submodule 22 is triggered first and participates in arc management, that is, the digital arc first state signal is triggered first, and the time voltage state information includes the jump from the first level to the second level, when the voltage capture submodule 321 of the processor submodule 32 detects the output falling edge of the voltage comparison submodule 22 of the detection module 2, the voltage capture submodule 321 enters an interrupt, the timer of the time comparison submodule 324 starts timing, and the voltage capture submodule 321 is set to a rising edge interrupt; if the rising edge of the voltage comparison submodule 22 does not appear, but the timer of the time comparison submodule 324 is equal to the corresponding arc holding time threshold, the time comparison submodule 324 outputs a power stop signal to the power control submodule 325, and the power supply stops outputting; if the rising edge of the voltage comparison submodule 22 appears, but the timer of the time comparison submodule 324 is less than the corresponding arc holding time threshold, the corresponding detection count is increased by 1, and if the detection count is equal to the arc count threshold, the time comparison submodule 324 also outputs a power stop signal to the power control submodule 325, and the power supply stops outputting, otherwise the power supply works normally. When the power supply stops outputting because the arc condition is met, the timer of the time comparison submodule 324 restarts timing, and after timing reaches the arc cutoff threshold, the power supply restarts outputting.

[0079] When the digital second arc state output by the current comparison submodule 23 is triggered first and participates in arc management, that is, the digital arc second state signal is triggered first, and the time current state information includes the jump from the second level to the first level, when the current capture submodule 322 of the DSP submodule 32 detects the output rising edge of the current comparison submodule 23 of the detection module 2, the current capture submodule 322 enters an interrupt, the timer of the time comparison submodule 324 starts timing, and the current capture submodule 322 is set to a falling edge interrupt; if the falling edge of the current comparison submodule 23 does not appear, but the timer of the time comparison submodule 324 is equal to the corresponding When the arc holding time threshold is reached, the time comparison submodule 324 outputs a power stop signal to the power control submodule 325, and the power stops outputting; if a falling edge appears in the current comparison submodule 23, but the timer of the time comparison submodule 324 is less than the corresponding arc holding time threshold, the corresponding detection count is increased by 1. If the detection count is equal to the arc count threshold, the time comparison submodule 324 also outputs a power stop signal to the power control submodule 325, and the power stops outputting, otherwise the power works normally; when the power stops outputting because the arc condition is met, the timer of the time comparison submodule 324 restarts the timing, and after the timing reaches the arc shut-off threshold, the power restarts the outputting.

[0080] When the digital third arc state output by the maximum current comparison submodule 25 is triggered first and participates in arc management, that is, when the arc third state signal is triggered first and the maximum time current state information includes the jump from the second level to the first level, when the maximum current capture submodule 323 of the DSP submodule 32 detects the output rising edge of the maximum current comparison submodule 25 of the detection module 2, the maximum current capture submodule 323 enters an interrupt, the timer of the time comparison submodule 324 starts timing, and the maximum current capture submodule 323 is set to a falling edge interrupt; if the falling edge of the maximum current comparison submodule 25 does not appear, but the timing of the time comparison submodule 324 When the maximum current comparison submodule 25 falls, but the timer of the time comparison submodule 324 is less than the corresponding arc holding time threshold, the corresponding detection count is increased by 1. If the detection count is equal to the arc count threshold, the time comparison submodule 324 also outputs a power stop signal to the power control submodule 325, and the power stops outputting. Otherwise, the power works normally. When the power stops outputting because the arc condition is met, the timer of the time comparison submodule 324 restarts the timing. After the timing reaches the arc cut-off threshold, the power restarts the outputting.

[0081] The above three types of trigger control can be combined arbitrarily, that is, at least one of the digital arc first state signal trigger, the digital arc second state signal trigger and the digital arc third state signal trigger can be selected to manage the arc.

[0082] In practical applications, by setting a lower voltage threshold, the arc state when the DC sputtering power supply outputs a lower voltage due to the arc generation can be detected. The maximum current threshold can be used to detect the arc state when the DC sputtering power supply outputs a higher current due to the arc generation. By setting a current threshold higher than the rated current and lower than the maximum current, the arc state when the DC sputtering power supply outputs a voltage higher than the low power threshold and lower than the rated voltage after the arc generation can be detected.

[0083] In order to further achieve early detection and refined management of the arc, the three arc states can also use a combination of timings, such as setting a lower current threshold. This current threshold does not work during normal operation. It only works in the next restart cycle after the arc state due to voltage or maximum current is triggered and the arc management process of the power supply stopping output is completed. When the restart cycle comes, the extremely low output voltage, if the lower current threshold is triggered, directly enters the arc management program, shuts down the power supply output, realizes early prediction of the arc, improves the arc detection speed, reduces the arc energy during the sputtering process, and reduces the damage of the arc to the target material. Finally, when the timing reaches the corresponding arc shutdown threshold, restart the power supply and repeat the current threshold judgment until the output is normal.

[0084] The embodiment of the present invention collects the output signal of a DC sputtering power supply through an acquisition module; a detection module connected to the acquisition module compares the output signal with a preset arc state parameter and outputs an arc state; a control module connected to the detection module compares the arc state with a preset arc management parameter and outputs an arc management signal, wherein the arc management signal is used to control the output of the DC power supply; by sampling the output voltage and current of the DC sputtering power supply, the sampled data are compared with the preset arc management parameters to achieve rapid detection of the arc of the DC power supply during the sputtering process of the plasma system; and refined management is performed; the arc of the DC power supply during the sputtering process of the plasma system is controllable, thereby ensuring its long-term stable operation and improving the quality of the sputtered film.

[0085] The embodiment of the present invention further discloses a DC power supply arc control device, comprising:

[0086] An acquisition circuit, used for acquiring an analog output signal of a DC power supply;

[0087] a detection circuit connected to the acquisition circuit, used to compare the analog output signal with preset arc state parameters and output a digital arc state signal; the preset arc state parameters include an analog voltage threshold, an analog current threshold and an analog maximum current threshold, and the digital arc state signal is used to characterize the duration and number of occurrences of the arc state; and

[0088] A processor and a memory, wherein a computer program is stored in the memory, and the processor executes the computer program to output a control signal based on the digital arc state signal and preset digital arc management parameters, wherein the control signal is used to control the output of the DC power supply, and the preset digital arc management parameters include an arc duration threshold and an arc count threshold, and when the duration of the arc state reaches the arc duration threshold or when the number of occurrences of the arc state reaches the arc count threshold, the DC power supply stops outputting.

[0089] In an optional embodiment of the present invention, the analog output signal includes an analog voltage value and an analog current value;

[0090] The digital arc state signal includes a digital arc first state signal, a digital arc second state signal and a digital arc third state signal, and the detection module includes:

[0091] a first analog comparator, configured to compare the analog voltage value with the analog voltage threshold, and output a second level when the analog voltage value is less than the analog voltage threshold, and output a first level when the analog voltage value is greater than or equal to the analog voltage threshold, so as to generate the digital arc first state signal; in the digital arc first state signal, a time period between a moment when the first level jumps to the second level and a moment when the first level jumps to the next second level is a duration of an arc state;

[0092] a second analog comparator, for comparing the analog current value with the analog current threshold, outputting a first level when the analog current value is greater than or equal to the analog current threshold, and outputting a second level when the analog current value is less than the analog current threshold, so as to generate the digital arc second state signal; in the digital arc second state signal, a time period between a moment when the second level jumps to the first level and a moment when the next second level jumps to the next first level is the duration of an arc state;

[0093] A third analog comparator is used to compare the analog current value with the analog maximum current threshold, and output a first level when the analog current value is greater than or equal to the analog maximum current threshold, and output a second level when the analog current value is less than the analog maximum current threshold, so as to generate the digital arc third state signal; in the digital arc third state signal, the time period between the moment when the second level jumps to the first level and the moment when the next second level jumps to the next first level is the duration of an arc state.

[0094] In an optional embodiment of the present invention, the processor is further configured to perform the following steps:

[0095] Receive one of the digital arc first state signal, the digital arc second state signal and the digital arc third state signal output by the detection module;

[0096] When the digital arc first state signal is triggered first, the waveform of the digital arc first state signal is continuously monitored, and when the duration of the second level reaches the arc duration threshold, the DC power supply is stopped from outputting; or each time the duration of the second level is less than the arc duration threshold, the transition from the second level to the first level is counted to obtain a first count value, and when the first count value reaches the arc count threshold, the DC power supply is stopped from outputting; or

[0097] When the digital arc second state signal is triggered first, the waveform of the digital arc second state signal is continuously monitored, and when the duration of the first level reaches the arc duration threshold, the DC power supply is stopped from outputting; or each time the duration of the first level is less than the arc duration threshold, the transition from the first level to the second level is counted to obtain a second count value, and when the second count value reaches the arc count threshold, the DC power supply is stopped from outputting; or

[0098] When the digital arc third state signal is triggered preferentially, the waveform of the digital arc third state signal is continuously monitored, and when the duration of the first level reaches the arc duration threshold, the DC power supply stops outputting; or each time the duration of the first level is less than the arc duration threshold, the transition from the first level to the second level is counted to obtain a third count value, and when the third count value reaches the arc count threshold, the DC power supply stops outputting.

[0099] In an optional embodiment of the present invention, the processor is further configured to perform the following steps:

[0100] After the DC power source stops outputting for a predetermined period of time, the DC power source is restarted.

[0101] The arc control process can refer to the above embodiment, and the embodiment of the present invention will not be described in detail. The embodiment of the present invention uses a physical circuit, that is, electronic components, to execute the arc control process.

[0102] The embodiment of the present invention further discloses a DC power supply, which includes the DC power supply arc control device as described above.

[0103] Reference Figure 5The embodiment of the present invention further discloses a semiconductor process equipment, which includes a DC power supply 501, a process chamber 502, and an anode 5021 and a cathode 5022 located in the process chamber 502. The DC power supply 501 is used to load radio frequency power to the anode 5021 and the cathode 5022 in the process chamber 502 to generate plasma, so that the generated plasma bombards a target material, thereby depositing a thin film on the surface of a wafer to be processed.

[0104] It should be noted that for the sake of simplicity, they are all described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, some steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0105] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0106] It will be appreciated by those skilled in the art that the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0107] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0108] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0109] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0110] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0111] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0112] The DC power supply arc control device, DC power supply and semiconductor process equipment provided by the present invention are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for general technicians in this field, according to the ideas of the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A DC power supply arc control device, characterized in that: include: An acquisition module, used for acquiring an analog output signal of a DC power supply; A detection module, connected to the acquisition module, for comparing the analog output signal with preset arc state parameters and outputting a digital arc state signal; the preset arc state parameters include an analog voltage threshold, an analog current threshold and an analog maximum current threshold, and the digital arc state signal is used to characterize the duration and number of occurrences of the arc state; A control module is connected to the detection module and is used to control the output of the DC power supply based on the digital arc state signal and preset digital arc management parameters, wherein the preset digital arc management parameters include an arc duration threshold and an arc count threshold, and when the duration of the arc state reaches the arc duration threshold or when the number of occurrences of the arc state reaches the arc count threshold, the DC power supply stops outputting.

2. The DC power supply arc control device according to claim 1, characterized in that: The acquisition module comprises: A voltage acquisition submodule, used to acquire the analog voltage value corresponding to the analog output signal; The current acquisition submodule is used to acquire the analog current value corresponding to the analog output signal.

3. The DC power supply arc control device according to claim 2, characterized in that: The digital arc state signal includes a digital arc first state signal, a digital arc second state signal and a digital arc third state signal, and the detection module includes: a voltage comparison submodule, connected to the voltage acquisition submodule, for comparing the analog voltage value with the analog voltage threshold, outputting a second level when the analog voltage value is less than the analog voltage threshold, and outputting a first level when the analog voltage value is greater than or equal to the analog voltage threshold, so as to generate the digital arc first state signal; in the digital arc first state signal, the time period between the moment when the first level jumps to the second level and the moment when the first level jumps to the next second level is the duration of an arc state; a current comparison submodule, connected to the current acquisition submodule, for comparing the analog current value with the analog current threshold, outputting a first level when the analog current value is greater than or equal to the analog current threshold, and outputting a second level when the analog current value is less than the analog current threshold, so as to generate the digital arc second state signal; in the digital arc second state signal, the time period between the moment when the second level jumps to the first level and the moment when the next second level jumps to the next first level is the duration of an arc state; The maximum current comparison submodule is connected to the current acquisition submodule, and is used to compare the analog current value with the analog maximum current threshold, and output a first level when the analog current value is greater than or equal to the analog maximum current threshold, and output a second level when the analog current value is less than the analog maximum current threshold, so as to generate the digital arc third state signal; in the digital arc third state signal, the time period between the moment when the second level jumps to the first level and the moment when the second level jumps to the next first level is the duration of an arc state.

4. The DC power supply arc control device according to claim 3, characterized in that: The voltage comparison submodule, the current comparison submodule and the maximum current comparison submodule are all analog comparators.

5. The DC power supply arc control device according to claim 3, characterized in that: The detection module also includes: A voltage setting submodule, connected to the voltage comparison submodule and the control module, for converting the digital voltage threshold sent by the control module into the analog voltage threshold, and sending the analog voltage threshold to the voltage comparison submodule; The current setting submodule is connected to the current comparison submodule and the control module, and is used to convert the digital current threshold sent by the control module into the analog current threshold, and send the analog current threshold to the current comparison submodule.

6. The DC power supply arc control device according to claim 5, characterized in that: The control module comprises: The processor submodule is connected to the voltage comparison submodule, the current comparison submodule, and the maximum current comparison submodule, and is used to receive one of the digital arc first state signal, the digital arc second state signal, and the digital arc third state signal; compare the digital arc first state signal, the digital arc second state signal, or the digital arc third state signal with the preset arc management parameters, and output the arc management signal.

7. The DC power supply arc control device according to claim 6, characterized in that: The control module also includes: A communication submodule, connected to the processor submodule, and used to receive a setting instruction sent by a host computer, wherein the setting instruction includes the digital quantity voltage threshold and the digital quantity current threshold; The processor submodule is connected to the voltage setting submodule and the current setting submodule, and is further used to send the digital voltage threshold to the voltage setting submodule and send the digital current threshold to the current setting submodule.

8. The DC power supply arc control device according to claim 6, characterized in that: The processor submodule comprises: A voltage capture submodule is connected to the voltage comparison submodule, and is used to receive the digital arc first state signal, continuously monitor the waveform of the digital arc first state signal, and generate time voltage state information; the time voltage state information is used to characterize the duration count value of multiple arc states in the digital arc first state signal; A current capture submodule is connected to the current comparison submodule, and is used to receive the digital arc second state signal, continuously monitor the waveform of the digital arc second state signal, and generate time current state information; the time current state information is used to characterize the duration count value of multiple arc states in the digital arc second state signal; a maximum current capture submodule, connected to the maximum current comparison submodule, for receiving the digital arc third state signal, continuously monitoring the waveform of the digital arc third state signal, and generating maximum time current state information; the maximum time current state information is used to characterize the duration count value of multiple arc states in the digital arc third state signal; A time comparison submodule, connected to the voltage capture submodule, the current capture submodule, and the maximum current capture submodule, for determining an arc management signal based on the time voltage state information or the time current state information or the maximum time current state information compared with the preset arc management parameters; the arc management signal includes an arc holding time; A power control submodule is connected to the time comparison submodule and is used to control the output of the DC power supply according to the arc holding time.

9. The DC power supply arc control device according to claim 8, characterized in that: The arc management signal also includes: arc off time; The power control module is further used to control the restart of the DC power supply according to the arc off time.

10. The DC power supply arc control device according to claim 8, characterized in that: The preset arc management parameters include an arc counting threshold; when the digital arc first state signal is triggered first and the time voltage state information contains a jump from the first level to the second level, the time comparison submodule is used to count the jump from the second level to the first level in the time voltage state information, generate a first count value, compare the first count value with the arc counting threshold, and determine the arc holding time.

11. The DC power supply arc control device according to claim 8, characterized in that: The preset arc management parameters include an arc count threshold; When the digital arc second state signal is triggered first and the time current state information includes a jump from the second level to the first level, the time comparison submodule is used to count the jump from the first level to the second level in the time current state information, generate a second count value, compare the second count value with the arc count threshold, and determine the arc holding time.

12. The DC power supply arc control device according to claim 8, characterized in that: The preset arc management parameters include an arc count threshold; When the arc third state signal is triggered first and the maximum time current state information includes the transition from the second level to the first level, the time comparison submodule is used to count the transition from the first level to the second level in the maximum time current state information, generate a third timing value, compare the third timing value with the arc counting threshold, and determine the arc holding time.

13. The DC power supply arc control device according to claim 5, characterized in that: The control module is used to perform the following steps: Receive one of the digital arc first state signal, the digital arc second state signal and the digital arc third state signal output by the detection module; When the digital arc first state signal is triggered first, the waveform of the digital arc first state signal is continuously monitored, and when the duration of the second level reaches the arc duration threshold, the DC power supply is stopped from outputting; or each time the duration of the second level is less than the arc duration threshold, the transition from the second level to the first level is counted to obtain a first count value, and when the first count value reaches the arc count threshold, the DC power supply is stopped from outputting; or When the digital arc second state signal is triggered first, the waveform of the digital arc second state signal is continuously monitored, and when the duration of the first level reaches the arc duration threshold, the DC power supply is stopped from outputting; or each time the duration of the first level is less than the arc duration threshold, the transition from the first level to the second level is counted to obtain a second count value, and when the second count value reaches the arc count threshold, the DC power supply is stopped from outputting; or When the digital arc third state signal is triggered preferentially, the waveform of the digital arc third state signal is continuously monitored, and when the duration of the first level reaches the arc duration threshold, the DC power supply stops outputting; or each time the duration of the first level is less than the arc duration threshold, the transition from the first level to the second level is counted to obtain a third count value, and when the third count value reaches the arc count threshold, the DC power supply stops outputting.

14. A DC power supply arc control device, characterized in that: include: An acquisition circuit, used for acquiring an analog output signal of a DC power supply; A detection circuit connected to the acquisition circuit, used to compare the analog output signal with preset arc state parameters and output a digital arc state signal; the preset arc state parameters include an analog voltage threshold, an analog current threshold and an analog maximum current threshold, and the digital arc state signal is used to characterize the duration and number of occurrences of the arc state; as well as A processor and a memory, wherein a computer program is stored in the memory, and the processor executes the computer program to output a control signal based on the digital arc state signal and preset digital arc management parameters, wherein the control signal is used to control the output of the DC power supply, and the preset digital arc management parameters include an arc duration threshold and an arc count threshold, and when the duration of the arc state reaches the arc duration threshold or when the number of occurrences of the arc state reaches the arc count threshold, the DC power supply stops outputting.

15. The DC power supply arc control device according to claim 14, characterized in that: The analog output signal includes an analog voltage value and an analog current value; The digital arc state signal includes a digital arc first state signal, a digital arc second state signal and a digital arc third state signal, and the detection module includes: a first analog comparator, configured to compare the analog voltage value with the analog voltage threshold, and output a second level when the analog voltage value is less than the analog voltage threshold, and output a first level when the analog voltage value is greater than or equal to the analog voltage threshold, so as to generate the digital arc first state signal; in the digital arc first state signal, a time period between a moment when the first level jumps to the second level and a moment when the first level jumps to the next second level is a duration of an arc state; a second analog comparator, for comparing the analog current value with the analog current threshold, outputting a first level when the analog current value is greater than or equal to the analog current threshold, and outputting a second level when the analog current value is less than the analog current threshold, so as to generate the digital arc second state signal; in the digital arc second state signal, a time period between a moment when the second level jumps to the first level and a moment when the next second level jumps to the next first level is the duration of an arc state; A third analog comparator is used to compare the analog current value with the analog maximum current threshold, and output a first level when the analog current value is greater than or equal to the analog maximum current threshold, and output a second level when the analog current value is less than the analog maximum current threshold, so as to generate the digital arc third state signal; in the digital arc third state signal, the time period between the moment when the second level jumps to the first level and the moment when the next second level jumps to the next first level is the duration of an arc state.

16. The DC power supply arc control device according to claim 15, characterized in that: The processor is also used to perform the following steps: Receive one of the digital arc first state signal, the digital arc second state signal and the digital arc third state signal output by the detection module; When the digital arc first state signal is triggered first, the waveform of the digital arc first state signal is continuously monitored, and when the duration of the second level reaches the arc duration threshold, the DC power supply is stopped from outputting; or each time the duration of the second level is less than the arc duration threshold, the transition from the second level to the first level is counted to obtain a first count value, and when the first count value reaches the arc count threshold, the DC power supply is stopped from outputting; or When the digital arc second state signal is triggered first, the waveform of the digital arc second state signal is continuously monitored, and when the duration of the first level reaches the arc duration threshold, the DC power supply is stopped from outputting; or each time the duration of the first level is less than the arc duration threshold, the transition from the first level to the second level is counted to obtain a second count value, and when the second count value reaches the arc count threshold, the DC power supply is stopped from outputting; or When the digital arc third state signal is triggered preferentially, the waveform of the digital arc third state signal is continuously monitored, and when the duration of the first level reaches the arc duration threshold, the DC power supply stops outputting; or each time the duration of the first level is less than the arc duration threshold, the transition from the first level to the second level is counted to obtain a third count value, and when the third count value reaches the arc count threshold, the DC power supply stops outputting.

17. The DC power supply arc control device according to claim 14, characterized in that: The processor is also used to perform the following steps: After the DC power source stops outputting for a predetermined period of time, the DC power source is restarted.

18. A DC power supply, characterized in that: The DC power supply comprises a DC power supply arc control device as claimed in any one of claims 1 to 17.

19. A semiconductor process equipment, characterized in that: The semiconductor process equipment includes the DC power supply as described in claim 18, a process chamber, and an anode and a cathode located in the process chamber, wherein the DC power supply is used to load radio frequency power to the anode and the cathode in the process chamber to generate plasma, so that the generated plasma bombards the target material, thereby depositing a thin film on the surface of the wafer to be processed.

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