Plasma etching method and apparatus

Abstract

The embodiment of the invention relates to a plasma etching method and equipment. A method of plasma etching a semiconductor substrate includes positioning a semiconductor substrate on a substrate support within a chamber such that an upper surface of the semiconductor substrate can be exposed to the plasma etching and a lower surface of the semiconductor substrate is supported by the substrate support, wherein the substrate support comprises a bipolar electrostatic chuck "ESC" and a cooling gas system for supplying a cooling gas to the lower surface at an associated pressure, and wherein the ESC comprises at least a first electrode and a second electrode; performing plasma etching on the semiconductor substrate; and removing the semiconductor substrate from the substrate support after the plasma etching step is completed.

Description

Technical Field

[0001] The present invention relates to a method for plasma etching a semiconductor substrate and also relates to an associated device for plasma etching a semiconductor substrate. Background Art

[0002] In vacuum-based plasma etching and deposition tools in the semiconductor manufacturing industry, it is challenging to avoid wafer movement and remove heat generated by plasma or exothermic processes from the wafer or substrate due to the pressure below atmospheric pressure in the processing chamber. Due to poor thermal convection and direct conduction from the substrate to the substrate support, reducing pressure limits heat transfer. In order to achieve optimal control of substrate temperature, an electrostatic chuck or "ESC" is used to control the temperature of the substrate in a vacuum system. The electrostatic attraction between the ESC and the substrate allows the cavity or channel between the substrate and the ESC surface to be pressurized with an inert gas (such as He) at a sufficiently high pressure to promote good thermal conduction between the substrate and the thermally controlled ESC. This process is called back pressurization. Even if the processing chamber is operated at a pressure much lower than the pressure between the ESC and the substrate, the electrostatic clamping of the substrate can be maintained and Coulomb maintains strict temperature control.

[0003] There are two different types of ESCs commonly used to hold substrates in vacuum systems, namely, bipolar ("Coulomb") and unipolar ("Johnsen-Rahbek") ESCs. In both types, a metal electrode or electrodes are encapsulated in a dielectric structure which is then attached to a metal substrate support, such as a Figure 1 . The substrate support 2, which is typically made of aluminum or stainless steel, is connected to an RF power source 4 and an electrostatic chuck ESC 6 is attached to the upper surface of the substrate support 2. The ESC 6 has metal electrodes sandwiched between two layers of dielectric material. The electrodes are attached to a high voltage DC power source 8, which can supply up to + / -9 kV for relatively thick ceramic layers with a thickness greater than 0.5 mm. For thinner polymer layers (such as polyimide), the layer thickness can be less than 0.1 mm, and the DC power supply is typically supplied at less than + / -2 kV. A backside gas inlet for a refrigerant gas (typically He or Ar) is provided by a conduit 20 in the substrate support 2 and allows the gas to be injected between the substrate 12 and the surface of the ESC 6. The coolant channel 10 enables the refrigerant flow to remove heat from the substrate support 2, while a resistive heater (not shown) can facilitate high temperature operation. Loading and unloading of the substrate 12 and the coating 14 is achieved using a lifting assembly 18. A shield ring 16 , typically formed of ceramic, protects the substrate support 2 from the plasma and aids in plasma formation near the substrate 12 .

[0004] In a bipolar ESC, there are at least two electrodes of opposite polarity that generate an electrostatic field at the back side of the substrate. This requires the substrate to support charge movement, i.e., the substrate must be formed of a semiconductor or metallic material. Since most substrates processed in the semiconductor and optoelectronic industries are themselves semiconductors, bipolar ESCs are widely used.

[0005] A unipolar ESC has one or several electrodes maintained at a single potential and relies on an external electron source to generate an electrostatic field. Generating a plasma with a plasma chamber typically provides a current path to ground and thereby enables a unipolar ESC to clamp a substrate to a substrate support. To support this type of operation, a very small amount of leakage current is generated through the insulating ceramic layers used in the ESC.

[0006] However, when the etching process is completed, clamping with an ESC can cause problems due to the electrostatic charge left in the substrate and wafer support. The accumulated charge requires a considerable amount of time to dissipate (possibly several minutes) and thus increases the residence time in the process module because the substrate is effectively attached to the ESC surface. For productivity reasons, this is highly undesirable because it reduces the throughput of the tool. The time between the end of the plasma etching process and the point at which the substrate can be lifted from the substrate is called the release time. There is a need to improve established methods to reduce the release time. Summary of the invention

[0007] The present invention, in at least some of its embodiments, seeks to address at least some of the above problems and needs.

[0008] According to a first aspect of the present invention, there is provided a method for plasma etching a semiconductor substrate, comprising the following steps:

[0009] positioning a semiconductor substrate on a substrate support within a chamber such that an upper surface of the semiconductor substrate is exposed to the plasma etch and a lower surface of the semiconductor substrate is supported by the substrate support, wherein the substrate support comprises a bipolar electrostatic chuck ("ESC") and a cooling gas system for supplying a cooling gas at an associated pressure to the lower surface, and wherein the ESC comprises at least a first electrode and a second electrode;

[0010] plasma etching the semiconductor substrate; and

[0011] removing the semiconductor substrate from the substrate support after the plasma etching step is completed;

[0012] wherein during the plasma etching step: a cooling gas is supplied to the lower surface of the semiconductor substrate at an associated pressure; the ESC switches between a first bipolar operating mode in which a positive voltage is applied to the first electrode and a negative voltage is applied to the second electrode and a second bipolar operating mode in which a negative voltage is applied to the first electrode and a positive voltage is applied to the second electrode; and when the ESC switches between the first and second bipolar operating modes, the pressure of the cooling gas is reduced relative to the pressure at other times during the plasma etching step, so that the semiconductor substrate remains positioned on the substrate support.

[0013] The pressure of the cooling gas may drop to a pressure of less than 1 Torr when the ESC switches between the first and second bipolar operating modes. The pressure of the cooling gas may drop to a pressure of less than 0.1 Torr when the ESC switches between the first and second bipolar operating modes. Lower pressures may still be employed and in practice the gas line supplying the cooling gas to the lower surface of the ESC may be conveniently evacuated. The objective is for the ESC to prevent the cooling gas from lifting the semiconductor substrate when switching between the first and second bipolar operating modes, since at these times the clamping provided by the ESC is significantly reduced.

[0014] During the plasma etching step, the ESC may switch between the first and second bipolar operating modes a number of times. During the plasma etching step, the ESC may switch between the first and second bipolar operating modes at least three times. In principle, in order to provide advantageous results in any given practical application, the ESC may switch between the first and second bipolar operating modes any number of times at any desired switching frequency. The ESC may switch an even or odd number of times. The ESC may switch after operating in the first or second bipolar mode for 30 seconds or more (optionally 60 seconds or more, optionally 180 seconds or less).

[0015] During the plasma etching step, the semiconductor substrate may reach a temperature of at least 140° C. During the plasma etching step, the semiconductor substrate may reach a temperature of at least 150° C. During the plasma etching step, the semiconductor substrate may reach a temperature of 300° C. or less, optionally 250° C. or less. Surprisingly, the inventors have found that a significant reduction in release time can be achieved by implementing the present invention in applications in which the semiconductor substrate is plasma etched at relatively high temperatures.

[0016] The step of plasma etching the semiconductor substrate may be performed using a plasma generating device such as an inductively coupled plasma (ICP) device. The present invention is not limited by the type of plasma etching performed, and non-ICP plasma etching techniques may be used.

[0017] During and / or after the step of plasma etching the semiconductor substrate, an RF bias signal may be applied to the substrate support.

[0018] The method may include the further step of exposing the semiconductor substrate to a plasma formed in an inert gas or inert gas mixture, wherein the further step is performed between the steps of plasma etching the semiconductor substrate and removing the semiconductor substrate from the substrate support. This plasma is inert, typically low energy, and can help "release" the semiconductor substrate by providing a current path to ground. In this way, any residual charge can be removed from the semiconductor substrate and ESC surfaces. The inert gas or inert gas mixture may include He and / or Ar. The plasma generation device and / or the RF bias signal applied to the substrate support can be used to form the plasma in the inert gas or inert gas mixture.

[0019] The conditions used during the method may be such that the semiconductor substrate will be moved by the cooling gas if the ESC is switched between the first and second bipolar operating modes without reducing the pressure of the cooling gas.

[0020] The semiconductor substrate may be an InP semiconductor substrate. Plasma etching of InP semiconductor substrates is typically performed at relatively high temperatures to remove volatile species. However, the present invention is not limited to any particular semiconductor substrate. It is expected that the present invention will be particularly suitable for the plasma etching of other semiconductor substrates that require relatively high processing temperatures.

[0021] The ESC may include a dielectric material. The resistivity of the dielectric material may be between 10 12 to 10 13 ohm-cm range.

[0022] According to a second aspect of the present invention, there is provided an apparatus for plasma etching a semiconductor substrate, comprising:

[0023] Chamber;

[0024] a substrate support disposed within the chamber, wherein the substrate support comprises a bipolar electrostatic chuck ("ESC") and a cooling gas system for supplying a cooling gas to a lower surface at an associated pressure, and wherein the ESC comprises at least a first electrode and a second electrode;

[0025] a plasma generating device for maintaining plasma in the chamber for etching the semiconductor substrate;

[0026] a mechanism for removing the semiconductor substrate from the substrate support; and

[0027] A controller configured to control the apparatus to perform a step of plasma etching the semiconductor substrate, wherein the ESC switches between a first bipolar operating mode in which a positive voltage is applied to the first electrode and a negative voltage is applied to the second electrode and a second bipolar operating mode in which a negative voltage is applied to the first electrode and a positive voltage is applied to the second electrode; and when the ESC switches between the first and second bipolar operating modes, the pressure of the cooling gas is reduced relative to the pressure at other times during the plasma etching step, so that the semiconductor substrate remains positioned on the substrate support.

[0028] The apparatus uses the method according to the first aspect of the present invention to plasma etch the semiconductor substrate.

[0029] The plasma generating device may be an inductively coupled plasma (ICP) device. Other types of plasma generating devices may be used.

[0030] The apparatus may further include a bypass valve in fluid communication with the cooling gas system and the air pump, wherein the controller is configured to open and close the bypass valve such that when the ESC switches between the first and second bipolar operating modes, the pressure of the cooling gas is reduced by opening the bypass valve to exhaust cooling gas through the air pump.

[0031] The electrodes of the ESC may be non-interdigitated. For example, the electrodes may be semicircular electrodes.

[0032] The ESC may include Al2O3.

[0033] The mechanism for removing the semiconductor substrate from the substrate support may be any suitable mechanism, which may employ elements such as lift pins or another substrate lifting arrangement and a robotic arm. Such mechanisms are well known to the skilled reader.

[0034] For the avoidance of doubt, whenever reference is made herein to “comprises” or “comprising” and similar terms, the present invention is also to be construed as encompassing more restrictive terms such as “consisting of” and “consisting essentially of.”

[0035] Although the present invention has been described above, it extends to any inventive combination of the features set out in the above or following description, drawings or claims. For example, any feature disclosed with respect to the first aspect of the present invention may be combined with any feature disclosed with respect to the second aspect of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0037] Figure 1 is a schematic diagram of a known substrate support;

[0038] Figure 2 is a semi-schematic cross-sectional view of an inductively coupled plasma apparatus;

[0039] Figure 3 Demonstrating a process sequence according to the present invention; and

[0040] Figure 4 It is a schematic diagram of the ESC and cooling gas system. DETAILED DESCRIPTION

[0041] Figure 2 2 is a semi-schematic diagram of an apparatus 20 suitable for plasma etching a semiconductor substrate according to the present invention. An apparatus suitable for performing the method of the present invention includes an SPTS Omega (RTM) ICP etching system, which is available from SPTS Technology Ltd. located in Newport, New South Wales, UK. All exemplary embodiments and comparative examples described below are performed using this apparatus.

[0042] The apparatus 20 includes a chamber 21 and a plasma generating device for maintaining a plasma in the chamber. The chamber 21 includes a dielectric cylindrical wall portion 22, a gas inlet 23 through which a suitable gas can be introduced into the chamber 21, and a gas outlet 24 through which a gas can be removed from the chamber using a suitable pump. The plasma generating device includes a coil 25, which can be electrically driven by an RF power supply 26 via an impedance matching network 27. The coil 25 is arranged around the dielectric wall 22. The RF power supply 26 typically provides RF power to the coil 25 at a frequency of 2 to 20 MHz, but a lower frequency (e.g., 380 kHz) can be used. The apparatus 20 further includes a substrate support 28 on which a semiconductor substrate 29 can be positioned for processing. The substrate support 28 includes an electrostatic chuck (ESC) that uses a back pressure of a cooling gas during etching. The substrate support 28 is connected to an RF power supply 30 via a ceramic breaker 31 and an impedance matching network 32. The power supply 30 provides an RF electrical bias to the substrate support 28. The RF power source 30 typically provides RF power at a frequency of 2 to 20 MHz (optionally 13.56 MHz), but lower frequencies (e.g., 375 kHz) may be employed. A controller (not shown) is configured to control the apparatus, including the operation of the ESC and the supply of cooling gas. The ESC is a bipolar ESC with two semicircular metal electrodes separated by a small gap of about 2 mm embedded in an Al2O3 ceramic layer. Alternative ceramics such as AlN or thin film polymer dielectric films may also be used.

[0043] The present invention utilizes switching of the polarity of the voltage applied to the bipolar electrodes of the ESC. Specifically, the ESC switches between a first bipolar operating mode in which a positive voltage is applied to a first electrode and a negative voltage is applied to a second electrode and a second bipolar operating mode in which a negative voltage is applied to the first electrode and a positive voltage is applied to the second electrode. When the polarity switching occurs, the back pressure of the cooling gas is reduced to prevent the semiconductor substrate from lifting off the substrate support. If the back pressure is not reduced, then wafer movement will occur. Then, when the ESC is in the first or second bipolar operating mode, the back pressure is increased to a "steady state" back pressure. In this way, a significant reduction in release time can be achieved, especially for relatively high temperature plasma etching processes.

[0044] exist Figure 3, presents a process sequence according to the present invention. The SPTS Omega (RTM) system is a cluster tool and maintains the processing modules under vacuum during normal operation. In step 300, a robot picks up a wafer from a cassette or FOUP and places it on the lift pins on the ESC in the ICP etching chamber. The wafer is lowered onto the surface of the ESC and the wafer is electrostatically clamped at 302 by applying a high voltage (equal and opposite) to two bipolar electrodes embedded in the ceramic layer of the ESC. At 304, a back pressure of a suitable cooling gas (e.g., He) is applied to the back side of the wafer and the plasma etching process begins to supply process gas to the chamber and generate plasma. The back pressure is typically 3 to 30 Torr, but this will depend on the specific application. During this plasma etching step (306), the polarity switching of the bipolar electrodes and the cycle of the cooling gas pressure begin. Once the plasma etching process is completed (e.g., as determined by time or endpoint), the final polarity / cooling gas cycle step will be completed at step 308 and the process gas is replaced by an inert gas (e.g., Ar). A discharge plasma is then generated (310) which lasts for a fixed period of time, typically 10 to 60 seconds. After the discharge plasma step is completed, the wafer is lifted from the ESC by lift pins to be picked up by a robot and removed from the chamber (312).

[0045] Figure 4 is a schematic diagram of an ESC and cooling gas system that was modified into a commercial Omega (RTM) system to provide an Omega (RTM) system suitable for the experiments described herein. Figure 4 An ESC 41 , a vacuum chamber 42 , an RF matching box 43 , a nitrogen purge line 44 , a He valve 45 , a back pressure unit 46 , a He bypass valve 47 and a pump 48 are shown. Figure 4 The arrangement shown in is convenient because it enables rapid gas switching. In particular, the presence of the He bypass valve 47 enables the line to the back of the ESC 41 to be pumped directly when the He bypass valve 47 and the He valve 45 are open. This enables rapid (a few seconds) control of the He pressure behind the semiconductor substrate. In this way, the back pressure of He can be quickly reduced and then quickly raised back to the normal steady-state He back pressure. This rapid switching of He pressure can be easily synchronized with the polarity switching event.

[0046] Comparative Examples

[0047] Experiments were performed on 150 mm Si wafers in a SPTS Omega ICP etch tool using a bipolar ESC operating at high and low temperatures. Conventional etch and release processes were followed. The ICP source was operated at 13.56 MHz and the ESC was RF biased at 13.

[0048] Temperature(℃) ESC voltage (+ / -kV) Release time (seconds) 30 5 10 180 5 900 180 2 300

[0049] Table 1 - Release time according to ESC temperature and voltage

[0050] As can be seen in Table 1, under low temperature operating conditions with a clamp voltage of + / -5 kV, release can occur in about 10 seconds. When the temperature of the ESC is increased using the same clamp voltage, the release time increases dramatically to about 900 seconds. Table 1 shows that the release time can be reduced to 300 seconds by reducing the clamp voltage to + / -2 kV. However, the 300 second release step is still not a viable solution. During the release step, an inert plasma formed in Ar or He is used to help remove charge from the substrate.

[0051] Without wishing to be bound by any particular theory or conjecture, it can be speculated that at high temperatures, the resistance of the Al2O3 ceramic layer covering the conductive electrode decreases from about ρ10 15 Ohm-cm drops to about ρ10 12 to 10 13 ohm-cm. This is believed to result in a Johansen-Rabec (JR) contribution to the clamping electrostatic force. Typically, when ρ>10 13 ohm-cm, the Coulomb force will be stronger than the JR force, and when ρ<10 10 ohm-cm, the JR force will dominate. This additional charging of the ceramic is believed to result in a longer release time. These comparative examples show that conventional etching and release techniques result in excessively long release times, even if the release plasma is used to help remove charge from the substrate.

[0052] Examples

[0053] A series of experiments were conducted at an ESC temperature of 180° C. according to the present invention. In the experiments, the polarity of the high voltage applied to the ESC electrode was alternated for a period of time during the etching step while controlling the He back pressure. When the relevant JR clamping force was reduced, the back pressure of the He cooling gas was reduced a few seconds before each voltage switch to avoid wafer movement. By reducing the He flow during each switch of the polarity of the applied ESC voltage, plasma etching can be maintained and only minimal charging of the substrate is generated, thereby achieving a relatively fast release cycle. After the etching step, an inert release plasma is generated. Table 2 describes the release plasma conditions used. Typically, about 500W RF power is applied to the ICP coil at 13.56MHz, at a chamber pressure of about 5 mTorr, and at an Ar flow rate of about 100 sccm. The duration of the experiment was fixed at 30 seconds. The plasma etching step uses conventional process conditions (except for the switching of the ESC and the cooling gas back pressure) and therefore there is no need to provide detailed process details for this step.

[0054] Time (seconds) 30 RF Power (Watts) 500 Pressure (mTorr) 5 Ar flow rate (sccm) 100

[0055] Table 2. Release plasma conditions

[0056] Table 3 describes three examples using various combinations of He back pressure, He off time, interval time between each polarity switch, and release time. In each case, a default 30 second release of the plasma was used before the wafer was successfully lifted from the ESC and processed out of the processing chamber. These examples show that commercially feasible release times of 30 seconds or less are easily achievable. Acceptable substrate retention and cooling were maintained.

[0057]

[0058]

[0059] Table 3. Cyclic polarity conditions to reduce release time

[0060] Although the tests were conducted at 180°C using an Al2O3 bipolar ESC, the same principles will apply to a wide range of temperatures where bipolar Coulomb clamping is used in the absence of plasma and where the JR force is significant when a plasma or alternative charge source is introduced into the processing chamber. For Al2O3, this is expected to be the case at least in the temperature range of 140 to 300°C. With respect to other ESC materials, the temperature range over which a significant reduction in the release time may be observed may be different. The present invention is not limited to any particular operating temperature. The present invention is also not limited to any one plasma etching technique. The parameters and operating conditions described herein may vary to suit any given application. For example, the number of times the ESC switches between the first and second bipolar operating modes, the period of time spent in each operating mode before switching, and the timing and duration of the reduction in the back pressure of the cooling gas may be determined by a skilled reader using the principles described herein.

Claims

1. A method for plasma etching a semiconductor substrate, comprising the following steps: positioning a semiconductor substrate on a substrate support within a chamber such that an upper surface of the semiconductor substrate is exposed to the plasma etch and a lower surface of the semiconductor substrate is supported by the substrate support, wherein the substrate support comprises a bipolar electrostatic chuck (ESC) and a cooling gas system for supplying cooling gas at an associated pressure to the lower surface, and wherein the ESC comprises at least a first electrode and a second electrode; plasma etching the semiconductor substrate; and removing the semiconductor substrate from the substrate support after the plasma etching step is completed; wherein during the plasma etching step: a cooling gas is supplied to the lower surface of the semiconductor substrate at an associated pressure; the ESC switches between a first bipolar operating mode in which a positive voltage is applied to the first electrode and a negative voltage is applied to the second electrode and a second bipolar operating mode in which a negative voltage is applied to the first electrode and a positive voltage is applied to the second electrode; and when the ESC switches between the first and second bipolar operating modes, the pressure of the cooling gas is reduced relative to the pressure at other times during the plasma etching step, so that the semiconductor substrate remains positioned on the substrate support. 2 . The method of claim 1 , wherein the pressure of the cooling gas drops to a pressure of less than 1 Torr when the ESC switches between the first and second bipolar operating modes.

3. A method according to claim 1 or claim 2, wherein during the plasma etching step, the ESC switches between the first and second bipolar operating modes a plurality of times.

4. The method of claim 3, wherein during the plasma etching step, the ESC switches between the first and second bipolar operating modes at least three times.

5. The method of any one of claims 1 to 4, wherein during the plasma etching step, the semiconductor substrate reaches a temperature of at least 140°C.

6. The method according to any one of claims 1 to 5, comprising the further step of exposing the semiconductor substrate to a plasma formed in an inert gas or an inert gas mixture, wherein the further step is performed between the steps of plasma etching the semiconductor substrate and removing the semiconductor substrate from the substrate support.

7. The method according to claim 6, wherein the inert gas or inert gas mixture comprises He and / or Ar.

8. The method of any of the preceding claims, wherein the semiconductor substrate will be moved by the cooling gas if the ESC switches between the first and second bipolar operating modes without reducing the pressure of the cooling gas.

9. The method according to any of the preceding claims, wherein the semiconductor substrate is an InP semiconductor substrate.

10. The method of any one of the preceding claims, wherein the ESC comprises a dielectric material and the resistivity of the dielectric material is within a range of 10 12 to 10 13 ohm-cm range.

11. An apparatus for plasma etching a semiconductor substrate using a method according to any one of the preceding claims, the apparatus comprising: Chamber; a substrate support disposed within the chamber, wherein the substrate support comprises a bipolar electrostatic chuck (ESC) and a cooling gas system for supplying cooling gas to the lower surface at an associated pressure, and wherein the ESC comprises at least a first electrode and a second electrode; a plasma generating device for maintaining plasma in the chamber for etching the semiconductor substrate; a mechanism for removing the semiconductor substrate from the substrate support; and A controller configured to control the apparatus to perform a step of plasma etching the semiconductor substrate, wherein the ESC switches between a first bipolar operating mode in which a positive voltage is applied to the first electrode and a negative voltage is applied to the second electrode and a second bipolar operating mode in which a negative voltage is applied to the first electrode and a positive voltage is applied to the second electrode; and when the ESC switches between the first and second bipolar operating modes, the pressure of the cooling gas is reduced relative to the pressure at other times during the plasma etching step, so that the semiconductor substrate remains positioned on the substrate support.

12. The apparatus of claim 11, wherein the plasma generating device is an inductively coupled plasma (ICP) device.

13. The apparatus of claim 11 or claim 12, further comprising a bypass valve in fluid communication with the cooling gas system and an air pump, wherein the controller is configured to open and close the bypass valve so that when the ESC switches between the first and second bipolar operating modes, the pressure of the cooling gas is reduced by opening the bypass valve to discharge cooling gas through the air pump.

14. The apparatus of any one of claims 11 to 13, wherein the electrodes of the ESC are non-interdigitated.

15. The apparatus of any one of claims 11 to 14, wherein the ESC comprises Al2O3.

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