Method for improving electric leakage of FDSOI device

Abstract

The invention provides a method for improving electric leakage of an FDSOI device. A semiconductor structure comprises a silicon substrate, and a buried oxide layer, an SOI layer, a first oxide layer and a silicon nitride layer which are sequentially formed on the silicon substrate from bottom to top; defining a bulk silicon region on the semiconductor structure, etching to remove the silicon nitride layer, the first oxide layer, the SOI layer and the buried oxide layer in the bulk silicon region, and etching to stay on the silicon substrate; filling monocrystalline silicon on the silicon substrate of the bulk silicon region until the monocrystalline silicon is consistent with the height of the SOI layer on one side of the bulk silicon region; after the monocrystalline silicon is filled, the silicon nitride layer and the first oxide layer of the non-bulk silicon region on one side of the bulk silicon region are removed; forming an STI region and performing ion implantation on the bulk silicon region; the STI region is distributed in the non-bulk silicon region and the boundary between the bulk silicon region and the non-bulk silicon region; and forming a device structure in the bulk silicon region. By selecting the doping condition of the bulk silicon region, the requirements of the device are met, and the problem of electric leakage of the device is solved.

Description

Technical Field

[0001] The invention relates to the field of semiconductor technology, and in particular to a method for improving leakage of FDSOI devices. Background Art

[0002] Bulk CMOS has reached its limit at 20nm, and it is impossible to obtain the performance, cost and power consumption advantages of proportional reduction. FDSOI and FinFET are two ways to continue to expand the technology node downward. FDSOI has the following advantages: improving short channel effects such as barrier reduction, improving the subthreshold characteristics of the device, and reducing static power consumption; since no channel doping is required, random doping fluctuations (RDF) and other effects are avoided, a lower threshold voltage Vt change is obtained, and a wider dynamic range of performance can be obtained by flexibly adjusting the back gate voltage; the manufacturing process is compatible with bulk silicon, and the process complexity and number of steps are lower than bulk silicon and FinFET. In order to better integrate with the production line, the post-metal gate technology is adopted, thereby introducing a silicon deposition solution to solve the height difference of the bulk silicon area, but under the existing process, the LDMOS and other devices in the bulk silicon area (silicon backfill area) have abnormal off-state current Ioff. Summary of the invention

[0003] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for improving leakage of FDSOI devices, so as to solve the problem in the prior art that silicon backfilling in the bulk silicon region causes abnormal off-state current of the device.

[0004] To achieve the above-mentioned object and other related objects, the present invention provides a method for improving leakage of FDSOI devices, which at least comprises:

[0005] Step 1, providing a semiconductor structure, wherein the semiconductor structure comprises: a silicon substrate, a buried oxide layer, an SOI layer, a first oxide layer, and a silicon nitride layer formed sequentially from bottom to top on the silicon substrate;

[0006] Step 2, defining a bulk silicon region on the semiconductor structure, etching and removing the silicon nitride layer, the first oxide layer, the SOI layer and the buried oxide layer in the bulk silicon region, and etching stops at the silicon substrate;

[0007] Step 3, filling single crystal silicon on the silicon substrate in the bulk silicon region until the height is consistent with the SOI layer on one side of the bulk silicon region; after filling the single crystal silicon, the silicon nitride layer and the first oxide layer in the non-bulk silicon region on one side of the bulk silicon region are removed;

[0008] Step 4: forming an STI region and performing ion implantation on the bulk silicon region; the STI region is distributed in the non-bulk silicon region and at the boundary between the bulk silicon region and the non-bulk silicon region;

[0009] Step 5: forming a device structure in the bulk silicon region.

[0010] Preferably, in step 2, photolithography is used to define a bulk silicon region on the semiconductor structure.

[0011] Preferably, the method for defining the bulk silicon region in step 2 is: spin-coating a layer of photoresist on the semiconductor structure, and then performing exposure and development, wherein the photoresist on the upper surface of the semiconductor structure defined as the bulk silicon region is removed, and the photoresist on the upper surface of the semiconductor structure that is not the bulk silicon region is retained.

[0012] Preferably, the method for etching and removing the silicon nitride layer, the first oxide layer, the SOI layer and the buried oxide layer in the body silicon region in step 2 is: etching the silicon nitride layer, the first oxide layer, the SOI layer and the buried oxide layer downward in sequence along the upper surface of the semiconductor structure not covered by photoresist.

[0013] Preferably, in step three, the single crystal silicon is filled by backfilling with selective non-doped intrinsic silicon.

[0014] Preferably, the method for forming the STI region in step four is: first, a groove is etched in the non-bulk silicon region and at the boundary between the bulk silicon region and the non-bulk silicon region; then, a second oxide layer is formed on the surface of the groove and the SOI layer of the non-bulk silicon region and the single crystal silicon of the bulk silicon region, and then silicon oxide is filled in the groove to form the STI region.

[0015] Preferably, in step 4, the dosage of ion implantation in the bulk silicon region is 5E11-5E13, and the implantation energy is 5KEV-30KEV.

[0016] Preferably, in step 4, the STI region is first formed, and then ion implantation is performed on the bulk silicon region.

[0017] Preferably, in step 4, ion implantation is first performed on the bulk silicon region, and then the STI region is formed.

[0018] Preferably, the device formed in the bulk silicon region in step five includes one or more of an LDMOS, a diode, a resistor, a capacitor and a substrate lead-out structure.

[0019] As described above, the method for improving the leakage of FDSOI devices of the present invention has the following beneficial effects: the present invention meets the requirements of the device and solves the problem of device leakage by selecting the doping conditions of the body silicon region. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figures 1 to 5 A schematic diagram showing the device structure formed by each link of the method for improving leakage of FDSOI device of the present invention;

[0021] Figure 6 The diagram shows the change of LDMOS leakage current from 1 to 25 wafers;

[0022] Figure 7 Shown is a flow chart of the method for improving leakage of FDSOI devices according to the present invention. DETAILED DESCRIPTION

[0023] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0024] See also Figures 1 to 7 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0025] The present invention provides a method for improving leakage of FDSOI devices. Figure 7 The flowchart of the method for improving leakage of FDSOI device according to the present invention at least includes:

[0026] Step 1: providing a semiconductor structure, wherein the semiconductor structure comprises: a silicon substrate, a buried oxide layer, an SOI layer, a first oxide layer, and a silicon nitride layer formed sequentially from bottom to top on the silicon substrate; Figure 1 As shown, the semiconductor structure in step 1 includes: a silicon substrate 01, a buried oxide layer 02, an SOI layer 03, a first oxide layer 04, and a silicon nitride layer 05 formed sequentially from bottom to top on the silicon substrate 01.

[0027] Step 2: defining a bulk silicon region on the semiconductor structure, etching and removing the silicon nitride layer, the first oxide layer, the SOI layer and the buried oxide layer in the bulk silicon region, and etching until the silicon substrate is reached; Figure 1 As shown, in step 2, a bulk silicon region is defined on the semiconductor structure, and the silicon nitride layer 05, the first oxide layer 04, the SOI layer 03 and the buried oxide layer 02 in the bulk silicon region are etched away, and the etching stops at the silicon substrate 01. The etching stop layer can be the upper surface of the silicon substrate 01, or the etching can stop after a certain thickness of the silicon substrate is etched.

[0028] According to the present invention, in step 2 of this embodiment, photolithography is used to define a bulk silicon region on the semiconductor structure.

[0029] The present invention further, as Figure 1 As shown, the method for defining the body silicon region in step 2 of this embodiment is: spin-coating a layer of photoresist 06 on the semiconductor structure, and then performing exposure and development, wherein the photoresist on the upper surface of the semiconductor structure defined as the body silicon region is removed, and the photoresist on the upper surface of the semiconductor structure that is not the body silicon region is retained.

[0030] The present invention further provides that the method for etching and removing the silicon nitride layer, the first oxide layer, the SOI layer and the buried oxide layer in the body silicon region in step 2 of this embodiment is: etching the silicon nitride layer, the first oxide layer, the SOI layer and the buried oxide layer downward in sequence along the upper surface of the semiconductor structure not covered by photoresist to form an etched body silicon region 07.

[0031] Step 3, filling single crystal silicon on the silicon substrate in the bulk silicon region until the height is consistent with the SOI layer on one side of the bulk silicon region; after filling the single crystal silicon, the silicon nitride and the first oxide layer in the non-bulk silicon region on one side of the bulk silicon region are removed; Figure 2 As shown, in step three, on the silicon substrate of the bulk silicon region ( Figure 1 The body silicon region 07 after etching is filled with single crystal silicon 08 until the height is consistent with the SOI layer 03 on one side of the body silicon region (the SOI layer 03 in the non-body silicon region); after the single crystal silicon is filled, the silicon nitride layer 05 and the first oxide layer 04 in the non-body silicon region on the body silicon region side are removed, forming a Figure 3 The structure shown.

[0032] The present invention further adopts the step three of this embodiment to fill the single crystal silicon by backfilling with selective non-doped intrinsic silicon.

[0033] Step 4: forming an STI region and performing ion implantation on the bulk silicon region; the STI region is distributed in the non-bulk silicon region and at the boundary between the bulk silicon region and the non-bulk silicon region; the present invention further comprises forming the STI region first in step 4 of this embodiment, and then performing ion implantation on the bulk silicon region. Figure 4 As shown, Figure 4 It is a schematic diagram showing the structure of forming the STI region in the present invention, Figure 5 It is a schematic diagram of the structure of ion implantation into the bulk silicon region in the present invention. In other embodiments, in step 4, ion implantation may be performed into the bulk silicon region first, and then the STI region is formed.

[0034] The present invention further, as Figure 4As shown, the method for forming the STI region in step four of this embodiment is: first, a groove is etched in the non-bulk silicon region and at the boundary between the bulk silicon region and the non-bulk silicon region; then, a second oxide layer 09 is formed on the surface of the groove and the SOI layer of the non-bulk silicon region and the single crystal silicon of the bulk silicon region; then, silicon oxide is filled in the groove to form the STI region, wherein the STI region 10 is formed in the non-bulk silicon region, and the STI region 11 is formed at the boundary between the bulk silicon region and the non-bulk silicon region.

[0035] According to the present invention, in step 4 of this embodiment, the dosage of ion implantation in the bulk silicon region is 5E11-5E13, and the implantation energy is 5KEV-30KEV. Figure 5 As shown, the method for ion implantation into the body silicon region is: firstly forming a photoresist layer 13 to cover the body silicon region and the non-body silicon region, then exposing the body silicon region by photolithography, and then implanting ions into the exposed body silicon region to form a body silicon region 14 after ion implantation.

[0036] Step 5: forming a device structure in the bulk silicon region. That is, forming a device structure in the bulk silicon region 14 after ion implantation.

[0037] Furthermore, in the present invention, the device formed in the bulk silicon region in step five of this embodiment includes one or more of an LDMOS, a diode, a resistor, a capacitor, and a substrate lead-out structure.

[0038] The failure mechanism of the device in the traditional process is that the silicon backfill technology currently used is intrinsic silicon. The ion implantation of N-well and P-well diffuses in the subsequent process, causing the intrinsic silicon to fail and form uncontrollable doped silicon, causing well failure and thus leakage. The present invention can solve this problem more flexibly. Figure 6 The figure shows the change of LDMOS leakage current from 1 to 25 wafers. It is found through experiments that the method of the present invention can reduce the leakage current by 5 orders of magnitude.

[0039] In summary, the present invention meets the requirements of the device and solves the problem of device leakage by selecting the doping conditions of the bulk silicon region. Therefore, the present invention effectively overcomes various shortcomings of the prior art and has high industrial utilization value.

[0040] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for improving leakage of FDSOI devices, characterized in that: At least: Step 1, providing a semiconductor structure, wherein the semiconductor structure comprises: a silicon substrate, a buried oxide layer, an SOI layer, a first oxide layer, and a silicon nitride layer formed sequentially from bottom to top on the silicon substrate; Step 2, defining a bulk silicon region on the semiconductor structure, etching and removing the silicon nitride layer, the first oxide layer, the SOI layer and the buried oxide layer in the bulk silicon region, and etching stops at the silicon substrate; Step 3, filling single crystal silicon on the silicon substrate in the bulk silicon region until the height is consistent with the SOI layer on one side of the bulk silicon region; after filling the single crystal silicon, the silicon nitride layer and the first oxide layer in the non-bulk silicon region on one side of the bulk silicon region are removed; Step 4: forming an STI region and performing ion implantation on the bulk silicon region; the STI region is distributed in the non-bulk silicon region and at the boundary between the bulk silicon region and the non-bulk silicon region; Step 5: forming a device structure in the bulk silicon region.

2. The method for improving leakage of FDSOI device according to claim 1, characterized in that: In step 2, photolithography is used to define a bulk silicon region on the semiconductor structure.

3. The method for improving leakage of FDSOI device according to claim 2, characterized in that: The method for defining the bulk silicon region in step 2 is: spin-coating a layer of photoresist on the semiconductor structure, and then performing exposure and development, wherein the photoresist on the upper surface of the semiconductor structure defined as the bulk silicon region is removed, and the photoresist on the upper surface of the semiconductor structure that is not the bulk silicon region is retained.

4. The method for improving leakage of FDSOI device according to claim 3, characterized in that: The method for etching and removing the silicon nitride layer, the first oxide layer, the SOI layer and the buried oxide layer in the body silicon region in step 2 is: etching the silicon nitride layer, the first oxide layer, the SOI layer and the buried oxide layer in sequence downward along the upper surface of the semiconductor structure not covered by photoresist.

5. The method for improving leakage of FDSOI device according to claim 3, characterized in that: In step three, the single crystal silicon is filled by backfilling with selective non-doped intrinsic silicon.

6. The method for improving leakage of FDSOI device according to claim 1, characterized in that: The method for forming the STI region in step 4 is: first, a groove is etched in the non-bulk silicon region and at the boundary between the bulk silicon region and the non-bulk silicon region; then, a second oxide layer is formed on the surface of the groove and the SOI layer of the non-bulk silicon region and the single crystal silicon of the bulk silicon region; then, silicon oxide is filled in the groove to form the STI region.

7. The method for improving leakage of FDSOI device according to claim 1, characterized in that: In step 4, the dosage of ion implantation in the bulk silicon region is 5E11-5E13, and the implantation energy is 5KEV-30KEV.

8. The method for improving leakage of FDSOI device according to claim 1, characterized in that: In step 4, the STI region is first formed, and then ion implantation is performed on the bulk silicon region.

9. The method for improving leakage of FDSOI device according to claim 1, characterized in that: In step 4, ion implantation is first performed on the bulk silicon region, and then the STI region is formed.

10. The method for improving leakage of FDSOI device according to claim 1, characterized in that: The device formed in the bulk silicon region in step five includes one or more of an LDMOS, a diode, a resistor, a capacitor, and a substrate lead-out structure.

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