Tunneling oxide layer passivation contact structure, solar cell, photovoltaic module and photovoltaic system

Abstract

The invention discloses a tunneling oxide layer passivation contact structure, a solar cell, a photovoltaic module and a photovoltaic system. The tunneling oxide layer passivation contact structure comprises a silicon oxide layer; the doped polycrystalline silicon layer is arranged on one side of the silicon oxide layer; and the transparent conductive layer is arranged on one side, far away from the silicon oxide layer, of the doped polycrystalline silicon layer. The transparent conductive layer in the tunneling oxide layer passivation contact structure can reduce parasitic absorption, so that the current density is improved, and the transmittance, the current density, the carrier concentration and the photoelectric conversion efficiency of the solar cell are improved.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a tunneling oxide layer passivation contact structure, a solar cell, a photovoltaic module and a photovoltaic system. Background Art

[0002] TOPCon cells (also called tunneling oxide passivation cells or i-TOPCon cells) are a type of solar cell based on the carrier principle. It adds an ultra-thin layer of silicon oxide on the surface of the cell, allowing the cell to pass electrons while blocking holes, thereby significantly improving the cell's open circuit voltage and fill factor. However, current solar TOPCon cells still have many deficiencies in actual production and application, which need to be further improved. Summary of the invention

[0003] In the first aspect of the present application, the present application proposes a tunneling oxide layer passivation contact structure. According to an embodiment of the present application, the tunneling oxide layer passivation contact structure includes: a silicon oxide layer; a doped polysilicon layer, the doped polysilicon layer is arranged on one side of the silicon oxide layer; and a transparent conductive layer, the transparent conductive layer is arranged on the side of the doped polysilicon layer away from the silicon oxide layer. As a result, the transparent conductive layer in the tunneling oxide layer passivation contact structure can reduce parasitic absorption, thereby increasing current density, and further improving the transmittance, current density, carrier concentration and photoelectric conversion efficiency of the solar cell.

[0004] According to an embodiment of the present application, the tunnel oxide layer passivation contact structure may further include at least one of the following additional technologies:

[0005] In some embodiments, the material of the transparent conductive layer is selected from at least one of tin dioxide and zinc dioxide.

[0006] In some embodiments, the thickness of the transparent conductive layer is 50nm to 200nm. According to the tunneling oxide layer passivation contact structure of the embodiment of the present application, the thickness of the transparent conductive layer is moderate, and compared with the aforementioned doped polysilicon layer, it has better transmittance and can be burned through by the low-temperature silver paste, so that the low-temperature silver paste forms an ohmic contact with the doped polysilicon layer. Thus, the transmittance of the tunneling oxide layer passivation contact structure can be further improved.

[0007] In some embodiments, the thickness of the doped polysilicon layer is no greater than 10 nm.

[0008] In some embodiments, the silicon oxide layer has a thickness of 1 to 2 nm. According to the embodiments of the present application, the moderate thickness of the silicon oxide layer can provide a tunneling oxide layer passivation contact structure with good interface passivation performance and reduce the surface recombination rate of the structure.

[0009] In the second aspect of the present application, the present application proposes a method for preparing the aforementioned tunneling oxide layer passivation contact structure. According to an embodiment of the present application, the method includes: performing a silicon oxide deposition process to form a silicon oxide layer; performing a doped polysilicon deposition process on one side of the silicon oxide layer to form a doped polysilicon layer; and performing a transparent conductive layer deposition process on the side of the doped polysilicon layer away from the silicon oxide layer to form a transparent conductive layer. According to the method of the embodiment of the present application, a tunneling oxide layer passivation contact structure that improves the mobility, carrier concentration, transmittance and photoelectric conversion efficiency of a solar cell can be prepared.

[0010] In some embodiments, the material of the transparent conductive layer is selected from tin dioxide, and the tin dioxide is provided in the form of a tetrakis(dimethylamino)tin source.

[0011] In some embodiments, the transparent conductive layer deposition process is carried out at a temperature of 70 to 150°C, a tetrakis(dimethylamino)tin source flow rate of 90 to 110 slm and a cycle number of not less than 500 times. The transparent conductive layer deposition process is carried out at a tetrakis(dimethylamino)tin source flow rate of 90 to 110 slm.

[0012] In some embodiments, the silicon oxide deposition process is performed at a temperature of 530-570° C., an oxygen flow rate of 8-12 slm, and a time of 8-12 min.

[0013] In some embodiments, the doped polysilicon deposition process is performed at a temperature of 550-590° C., a SiH 4 flow rate of 90-110 slm, and a time of 10-30 min.

[0014] In the third aspect of the present application, the present application proposes a solar cell, comprising the tunneling oxide layer passivation contact structure described in the first aspect of the present application. The mobility, carrier concentration, transmittance and photoelectric conversion efficiency of the solar cell according to the embodiment of the present application are improved.

[0015] In some embodiments, the solar cell is a TOPCon cell. The mobility, carrier concentration, transmittance and photoelectric conversion efficiency of the solar cell according to the embodiments of the present application are improved.

[0016] In a fourth aspect of the present application, the present application provides a photovoltaic module, comprising at least one cell string, wherein the cell string comprises at least two aforementioned solar cells.

[0017] In a fifth aspect of the present application, the present application proposes a photovoltaic system, comprising the aforementioned photovoltaic component. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0019] Figure 1 A schematic diagram of the structure of a tunnel oxide layer passivation contact structure according to an embodiment of the present application.

[0020] Figure 2 Schematic diagram of a process for preparing a tunnel oxide layer passivation contact structure in one embodiment of the present application.

[0021] Figure 3 This is a schematic diagram of the structure of a TOPCon battery according to an embodiment of the present application.

[0022] Description of reference numerals:

[0023] TOPCon cell 100; tunnel oxide passivation contact structure 102;

[0024] Silicon oxide layer 2; doped polysilicon layer 3; electrode 4; transparent conductive layer 5. DETAILED DESCRIPTION

[0025] The embodiments of the present application are described in detail below. Examples of the embodiments are shown in the drawings, but unnecessary detailed descriptions may be omitted. For example, detailed descriptions of well-known matters and repeated descriptions of actually identical structures may be omitted. This is to avoid the following description from becoming unnecessarily lengthy and to facilitate understanding by those skilled in the art. In addition, the drawings and the following description are provided for those skilled in the art to fully understand the present application and are not intended to limit the subject matter described in the claims.

[0026] Unless otherwise defined, all technical and scientific terms used in this application have the same meanings as those commonly understood by technicians in the technical field to which this application belongs; the terms used in this application are only for the purpose of describing specific embodiments and are not intended to limit this application; unless otherwise specified, the numerical values ​​of the parameters mentioned in this application can be measured using various measurement methods commonly used in the art (for example, they can be tested according to the methods given in the embodiments of this application).

[0027] The terms "including" and "having" in the specification and claims of the present application and any modifications thereof are open expressions, that is, including the contents specified in the present application but not excluding other contents.

[0028] In the description of the present application, it should be understood that the terms "width", "thickness", etc. indicate orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0029] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. "First feature" and "second feature" may include one or more of the features.

[0030] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0031] In the description of the present application, unless otherwise clearly specified and limited, a first feature being “above” or “below” a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being “above”, “above”, and “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, and “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0032] In the description of the present application, “plurality” means two or more.

[0033] In the description of the present application, "A and / or B" may include the case of A alone, the case of B alone, or any of the cases of A and B, where A and B are only used for examples and may be any technical feature connected by "and / or" in the present application.

[0034] In the description of this application, "parasitic absorption" means that in a solar cell, due to the characteristics of the material, a portion of the light is absorbed and not effectively converted into electrical energy. This phenomenon reduces the photoelectric conversion efficiency of the cell.

[0035] In the description of this application, the meaning of "ohmic contact" refers to the contact between two different materials, whose resistance is very small and current can pass smoothly. In solar cells, good ohmic contact helps to reduce the contact resistance of the battery and improve the performance of the battery.

[0036] Unless otherwise specified, all embodiments and optional embodiments of the present application can be combined with each other to form a new technical solution.

[0037] TOPCon (Tunneling Oxide Passivated Contact) cells are a new type of solar cell technology with high efficiency and excellent performance. However, for TOPCon cells, their back-side tunneling oxide passivated contact structure has the problem of high parasitic absorption.

[0038] In order to overcome this problem, in the present application, a silicon oxide layer, a doped polysilicon layer and a transparent conductive layer are sequentially deposited on the silicon substrate of the solar cell to prepare a tunneling oxide layer passivation contact structure of silicon oxide layer / doped polysilicon layer / transparent conductive layer, thereby reducing parasitic absorption, thereby increasing the current density and further improving the performance of the solar cell.

[0039] Based on this, in the first aspect of the present application, the present application proposes a tunnel oxide layer passivation contact structure. According to the embodiments of the present application, see Figure 1 , the tunnel oxide layer passivation contact structure 102 comprises: a silicon oxide layer 2; a doped polysilicon layer 3, the doped polysilicon layer 3 being arranged on one side of the silicon oxide layer 2; and a transparent conductive layer 5, the transparent conductive layer 5 being arranged on the side of the doped polysilicon layer 3 away from the silicon oxide layer 2. Therefore, the transparent conductive layer in the tunnel oxide layer passivation contact structure can reduce parasitic absorption due to its high transparency, allowing more light to penetrate the cell and be absorbed by the active area and providing an effective current collection path, thereby increasing the current density, and further improving the transmittance, current density, carrier concentration and photoelectric conversion efficiency of the solar cell.

[0040] In some embodiments, the material of the transparent conductive layer is selected from at least one of tin dioxide and zinc dioxide. According to the tunneling oxide layer passivation contact structure of the embodiment of the present application, tin dioxide and zinc dioxide can not only form a transparent conductive layer but also be burned through by low-temperature silver paste, so that the low-temperature silver paste forms an ohmic contact with the aforementioned doped polysilicon layer. As a result, the tunneling oxide layer passivation contact structure can improve the transmittance, current density, carrier concentration and photoelectric conversion efficiency of the solar cell.

[0041] In some embodiments, the thickness of the transparent conductive layer is 50nm to 200nm, for example, 50nm, 51nm, 55nm, 56nm, 57nm, 58nm, 59nm, 60nm, 61nm, 62nm, 63nm, 64nm, 65nm, 70nm, 80nm, 90nm, 100nm, 120nm, 140nm, 160nm, 180nm, 190nm, 193nm, 195nm, 196nm, 197nm, 198nm, 199nm, 200nm and the range value between any two point values ​​thereof, such as 50nm to 199nm, 50nm to 198nm, 50nm to 197nm, 50nm to 196nm. According to the tunneling oxide layer passivation contact structure of the embodiment of the present application, the thickness of the transparent conductive layer is moderate, the parasitic absorption is reduced, more light is allowed to penetrate the cell and be absorbed by the active area, and an effective current collection path is provided. Compared with the aforementioned doped polysilicon layer, the low-temperature silver paste can be burned through, so that the low-temperature silver paste forms an ohmic contact with the doped polysilicon layer. Therefore, the tunneling oxide layer passivation contact structure can improve the transmittance, current density, carrier concentration and photoelectric conversion efficiency of the solar cell.

[0042] In some embodiments, the thickness of the doped polysilicon layer is not greater than 10nm, for example, 1nm, 2nm, 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, 9nm, 10nm or a range of 1-9nm, 1-8nm and 1-7nm therebetween. Within this range, according to the tunneling oxide layer passivation contact structure of the embodiment of the present application, if the thickness of the doped polysilicon layer is too thick, it will increase the absorption of light, thereby reducing the amount of light reaching the active area of ​​the battery, and cause the resistance of the current to increase during the transmission process, affecting the photoelectric conversion efficiency of the battery; if the thickness of the doped polysilicon layer is too thin, it will not provide sufficient electrical contact, affecting the collection efficiency of holes, and if the doped polysilicon layer is too thin, it will lead to insufficient surface passivation, increase the surface state density, and thus increase the surface recombination of carriers. Therefore, a doped polysilicon layer with a moderate thickness can improve the transmittance, current density, carrier concentration and photoelectric conversion efficiency of solar cells.

[0043] In some embodiments, the doped polysilicon layer is a p-type doped polysilicon layer for collecting and transporting holes.

[0044] In some embodiments, the thickness of the silicon oxide layer is 1 to 2 nm or a range value therebetween. Within this range, according to the embodiments of the present application, a silicon oxide layer that is too thick will increase the difficulty of hole tunneling, reduce tunneling efficiency, reduce hole collection, and increase the resistance of the back contact, affecting the series resistance and overall performance of the battery, as well as affecting the battery's absorption of light; a silicon oxide layer that is too thin cannot provide sufficient surface passivation, increase the surface state density, thereby increasing the surface recombination of carriers and failing to effectively protect the silicon substrate from environmental factors (such as moisture and oxygen), affecting the long-term stability of the battery. As a result, a silicon oxide layer with a moderate thickness can provide a good interface passivation performance for the tunneling oxide layer passivation contact structure, reduce the surface recombination rate of the structure, and improve the transmittance, current density, carrier concentration, and photoelectric conversion efficiency of the solar cell.

[0045] In the second aspect of the present application, the present application proposes a method for preparing the aforementioned tunneling oxide layer passivation contact structure. According to an embodiment of the present application, the method includes: performing a silicon oxide deposition process to form a silicon oxide layer; performing a doped polysilicon deposition process on one side of the silicon oxide layer to form a doped polysilicon layer; and performing a transparent conductive layer deposition process on the side of the doped polysilicon layer away from the silicon oxide layer to form a transparent conductive layer. According to the method of the embodiment of the present application, a tunneling oxide layer passivation contact structure that improves the mobility, carrier concentration, transmittance and photoelectric conversion efficiency of a solar cell can be prepared.

[0046] According to an optional embodiment of the present application, the specific preparation method can be found in Figure 2 , Figure 2 The method comprises the following steps: step S100, preparing and forming a silicon oxide layer; step S200, preparing and forming a doped polysilicon layer on the silicon oxide layer; step S300, depositing a transparent conductive layer on the doped polysilicon layer.

[0047] In some embodiments, after the transparent conductive layer is deposited, the method further includes performing an annealing process on the transparent conductive layer.

[0048] In some embodiments, the annealing process is performed at a temperature of 150-250°C.

[0049] In some embodiments, the annealing treatment is performed under the condition that the treatment time is 10 to 30 minutes.

[0050] In some embodiments, the material of the transparent conductive layer is selected from tin dioxide, and the tin dioxide is provided in the form of a tetrakis(dimethylamino)tin source.

[0051] In some embodiments, the transparent conductive layer deposition process is performed at a temperature of 70-150° C., a tetrakis(dimethylamino)tin source flow rate of 90-110 slm, and a cycle number of not less than 500 times.

[0052] In some embodiments, the preparation method of the transparent conductive layer is at least one of a chemical vapor deposition method or a physical vapor deposition method. For example, tin dioxide is deposited on the surface of the silicon wafer by a chemical reaction. For example, tin dioxide is deposited on the surface of the silicon wafer by a physical process (such as thermal evaporation or sputtering) or a chemical process (such as atomic layer deposition (ALD)) to form a tin dioxide layer.

[0053] In some embodiments, the silicon oxide deposition process is performed at a temperature of 530-570° C., an oxygen flow rate of 8-12 slm, and a time of 8-12 min.

[0054] In some embodiments, the silicon oxide layer is prepared by at least one of thermal oxidation, plasma oxidation, plasma enhanced chemical vapor deposition and low pressure vapor deposition. For example, the silicon oxide layer is formed on the surface of the silicon oxide wafer by high temperature. For example, the silicon oxide layer is deposited in a plasma environment. For example, the silicon oxide layer is deposited on the surface of the silicon wafer by chemical reaction. For example, the silicon oxide layer is deposited in a low pressure environment.

[0055] In some embodiments, the doped polysilicon deposition process is performed at a temperature of 550-590° C., a SiH 4 flow rate of 90-110 slm, and a time of 10-30 min.

[0056] In some embodiments, the preparation method of the doped polysilicon layer is at least one of chemical vapor deposition or physical vapor deposition. For example, the doped polysilicon is deposited on the surface of the silicon wafer by chemical reaction. For example, the doped polysilicon is deposited on the surface of the silicon wafer by a physical process (such as thermal evaporation or sputtering) or a chemical process (such as low pressure chemical vapor deposition (LPCVD)).

[0057] In the third aspect of the present application, the present application proposes a solar cell, comprising the tunneling oxide layer passivation contact structure described in the first aspect of the present application. The mobility, carrier concentration, transmittance and photoelectric conversion efficiency of the solar cell according to the embodiment of the present application are improved.

[0058] In some embodiments, the solar cell is a TOPCon cell. The mobility, carrier concentration, transmittance and photoelectric conversion efficiency of the TOPCon cell according to the embodiments of the present application are improved.

[0059] In some embodiments, the solar cell is an n-type TOPCon cell.

[0060] In some embodiments, the TOPCon cell of the present application may adopt a structure known in the art on the light-receiving surface.

[0061] According to an optional embodiment of the present application, reference Figure 3 , the structure of the TOPCon battery 100 of the present application includes:

[0062] A crystalline silicon substrate 1, an emitter layer 12, a front passivation layer 13, a front anti-reflection layer 14 and a front electrode 15 are sequentially stacked on the light-receiving surface of the crystalline silicon substrate 1, and a silicon oxide layer 2, a doped polysilicon layer 3, a transparent conductive layer 5, a back anti-reflection layer 18, and an electrode 4 are sequentially stacked on the backlight surface of the crystalline silicon substrate 11, wherein the electrode 4 penetrates the back anti-reflection layer 18 and the transparent conductive layer 5 and contacts with the doped polysilicon layer 3, and the front electrode 15 penetrates the front anti-reflection layer 14 and the front passivation layer 13 and contacts with the emitter layer 12.

[0063] The emitter layer 12 , the front passivation layer 13 , the front anti-reflection layer 14 and the front electrode 15 may all be provided by using materials or thicknesses known in the prior art.

[0064] In some embodiments, the silicon substrate layer in the TOPCon cell includes n-type crystalline silicon. Among them, the electron mobility in n-type crystalline silicon is higher, which helps to improve the mobility of electrons in the material; the resistivity of n-type crystalline silicon is lower, which helps to reduce the loss of current; n-type crystalline silicon is sensitive to light, so it is also widely used in optoelectronic devices, such as solar cells. The silicon substrate can be but is not limited to a single crystal silicon wafer. The doping type of the silicon substrate can be N-type doping, such as phosphorus (P) doping; it can also be P-type doping, such as boron (B) doping. In one example, the silicon substrate is N-type doped.

[0065] The crystalline silicon substrate 1 may be N-type single crystal silicon or textured N-type single crystal silicon. Those skilled in the art may understand that when the crystalline silicon substrate has a textured structure, the other layers on the solar cell are also textured.

[0066] In a fourth aspect of the present application, the present application provides a photovoltaic module, comprising at least one cell string, wherein the cell string comprises at least two aforementioned solar cells.

[0067] In some embodiments, the solar cells may be connected together by serial welding, so that the electric energy generated by the individual solar cells can be collected for subsequent transmission.

[0068] In some embodiments, the solar cells may be arranged at intervals or stacked together in a shingled form.

[0069] For example, the photovoltaic module further includes an encapsulation layer and a cover plate, wherein the encapsulation layer is used to cover the surface of the battery string, and the cover plate is used to cover the surface of the encapsulation layer away from the battery string.

[0070] In a fifth aspect of the present application, the present application proposes a photovoltaic system, comprising the aforementioned photovoltaic component.

[0071] Photovoltaic systems can be used in photovoltaic power stations, such as ground power stations, rooftop power stations, water power stations, etc., and can also be used in equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars, solar buildings, etc. Of course, it is understandable that the application scenarios of photovoltaic systems are not limited to this, that is to say, photovoltaic systems can be used in all fields that require solar energy to generate electricity. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array may be an array combination of multiple photovoltaic components. For example, multiple photovoltaic components can form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter and is converted into the alternating current required by the mains power grid, and then connected to the mains network to realize solar power supply.

[0072] The scheme of the present application is described below by specific examples. It should be noted that the following examples are only used to illustrate the present application and should not be considered as limiting the scope of the present application. If no specific technology or conditions are specified in the examples, the technology or conditions described in the literature in this area or the product instructions are used. The reagents or instruments used are not specified by the manufacturer, and are all conventional products that can be obtained commercially.

[0073] Example 1

[0074] This example shows the preparation process of a TOPCon cell in which the transparent conductive layer is a tin dioxide layer. The preparation process is as follows:

[0075] Back side preparation steps:

[0076] (1) Alkali etching: n-type single crystal silicon is etched with alkaline by wet method to remove surface residues and contaminants and make the surface of the silicon wafer flat.

[0077] (2) RCA cleaning: Use the standard RCA (Radio Corporation of America) cleaning process to further remove surface residues and contaminants to obtain a clean and flat silicon substrate.

[0078] (3) Thermal oxidation: A 1.5 nm thick silicon oxide layer was formed on a silicon substrate by thermal oxidation at 550° C., high-purity oxygen 10 slm, and a process time of 10 minutes.

[0079] (4) Deposition of doped polysilicon layer: A doped polysilicon layer with a thickness of 10 nm is deposited on the silicon oxide layer at 570° C., with a SiH 4 flow rate of 100 sccm and a deposition time of 20 minutes.

[0080] (5) Screen printing: Silver paste is printed on the doped polysilicon layer through screen printing to form a metal gate electrode.

[0081] (6) Fluorine-containing gas etching: Use fluorine-containing gas to etch the doped polysilicon layer in the non-metallic area, remove the doped polysilicon layer in the non-metallic area or retain 1 to 20 nm.

[0082] (7) Deposition of transparent conductive layer: A tin dioxide layer was deposited on the doped polysilicon layer by ALD (atomic layer deposition) method at 100°C for 500 cycles to prepare a 60nm thick tin dioxide transparent conductive layer, which was then annealed at 200°C for 20 minutes.

[0083] Front preparation steps:

[0084] (8) Surface polishing: Mechanically polish the surface of the silicon wafer to ensure that it is damage-free and flat.

[0085] (9) Chemical cleaning: remove cutting fluid residue and surface dirt on the silicon wafer surface.

[0086] (10) Texturing treatment: alkaline texturing is performed.

[0087] (11) Surface oxidation: A thin silicon oxide layer is formed as a passivation layer on the front side.

[0088] (12) Nitridation treatment: A silicon nitride layer is formed on the silicon oxide layer as a passivation layer on the front side.

[0089] (13) Front electrode formation: Define the front electrode area using photolithography and etching techniques.

[0090] (14) Metallization: Deposit a metal layer in the front electrode area to form a metal gate electrode.

[0091] (15) Sintering treatment: Sinter the metal grid electrode to improve adhesion and conductivity.

[0092] (16) Anti-reflection layer: A silicon nitride anti-reflection layer is deposited on the front side.

[0093] Through the above steps, a TOPCon cell with excellent performance is prepared, which has a tunneling oxide layer passivation contact structure on the back and an optimized electrode and passivation layer on the front, thereby achieving high-efficiency photoelectric conversion.

[0094] Example 2

[0095] The experimental process of Example 2 is basically the same as that of Example 1, except that the thickness of the doped polysilicon layer is 5 nm, and the other preparation processes are the same as those of Example 1.

[0096] Example 3

[0097] The experimental process of Example 3 is basically the same as that of Example 1, except that tetrakis(dimethylamino)tin is used as a precursor chemical substance instead of diethylzinc precursor chemical substance, and the prepared tin dioxide layer is changed into a zinc dioxide layer. The other preparation processes are the same as those of Example 1.

[0098] Example 4

[0099] The experimental process of Example 4 is basically the same as that of Example 1, except that the thickness of the doped polysilicon layer is 20 nm, and the other preparation processes are the same as those of Example 1.

[0100] Example 5

[0101] The experimental process of Example 5 is basically the same as that of Example 1, except that the thickness of the doped polysilicon layer is 50 nm, and the other preparation processes are the same as those of Example 1.

[0102] Example 6

[0103] The experimental process of Example 6 is basically the same as that of Example 1, except that the thickness of the doped polysilicon layer is 100 nm, and the other preparation processes are the same as those of Example 1.

[0104] Example 7

[0105] The experimental process of Example 7 is basically the same as that of Example 1, except that the thickness of the transparent conductive layer is 50 nm, and the other preparation processes are the same as those of Example 1.

[0106] Example 8

[0107] The experimental process of Example 8 is basically the same as that of Example 1, except that the thickness of the transparent conductive layer is 200 nm, and the other preparation processes are the same as those of Example 1.

[0108] Comparative Example 1

[0109] The experimental process of Comparative Example 1 is basically the same as that of Example 1, except that the thickness of the doped polysilicon layer is 200 nm, the tin dioxide transparent conductive layer is not deposited, and the other preparation processes are the same as those of Example 1.

[0110] In accordance with the IEC 61730 standard, the solar cells prepared in Examples 1 to 8 and Comparative Example 1 were tested for transmittance, current density, carrier concentration, and photoelectric conversion efficiency. The transmittance was tested using a UV-visible spectrophotometer, the current density and carrier concentration were tested using a Hall effect tester, and the photoelectric conversion efficiency was tested using a Sinton FCT-650. The test results are shown in Table 1.

[0111] Table 1

[0112]

[0113]

[0114] Compared with Example 3, in Example 1, tetrakis(dimethylamino)tin is used as a precursor chemical substance instead of diethylzinc precursor chemical substance, and the prepared tin dioxide layer is changed into a zinc dioxide layer. The transmittance, current density, carrier concentration and photoelectric conversion efficiency of the two solar cells are higher.

[0115] Compared with Examples 4 to 6, in Examples 1 and 2, as the thickness of the doped polysilicon layer increases, the transmittance has a significant decreasing trend, which also leads to a decrease in current density; this is mainly because the parasitic absorption becomes more serious as the doped polysilicon layer becomes thicker, affecting the silicon substrate from capturing photons, thereby affecting the battery current and electrical performance. This shows that a doped polysilicon layer thickness of no more than 10 nm is more conducive to improving the transmittance, current density, carrier concentration and photoelectric conversion efficiency of solar cells.

[0116] Compared with Example 1, Example 7 and Example 8, when the thickness of the transparent conductive layer is 50 nm to 200 nm, the transmittance, current density, carrier concentration and photoelectric conversion efficiency of the solar cell are higher.

[0117] Compared with Comparative Example 1, Example 1 shows that the transmittance, current density, carrier concentration and photoelectric conversion efficiency of the solar cell prepared by depositing tin dioxide on the doped polycrystalline silicon layer are higher than those prepared without depositing tin dioxide. This indicates that depositing a transparent conductive layer on the doped polycrystalline silicon layer can reduce parasitic absorption and thus improve the performance of the solar cell.

[0118] The photovoltaic module provided in one embodiment of the present application includes the passivated contact solar cell provided by the above embodiment. Since the photovoltaic module includes the passivated contact solar cell provided by the above embodiment, it has the same beneficial effects, which will not be described in detail here.

[0119] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0120] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A tunneling oxide layer passivation contact structure, characterized in that: include: Silicon oxide layer; A doped polysilicon layer, wherein the doped polysilicon layer is disposed on one side of the silicon oxide layer; as well as A transparent conductive layer is disposed on a side of the doped polysilicon layer away from the silicon oxide layer.

2. The passivation contact structure according to claim 1, characterized in that: The material of the transparent conductive layer is selected from at least one of tin dioxide and zinc dioxide; And / or, the transparent conductive layer has a thickness of 50 nm to 200 nm; And / or, the thickness of the doped polysilicon layer is not greater than 10 nm; And / or, the silicon oxide layer has a thickness of 1 to 2 nm.

3. A method for preparing the tunneling oxide layer passivation contact structure according to claim 1 or 2, characterized in that: include: performing a silicon oxide deposition process to form a silicon oxide layer; Performing a doped polysilicon deposition process on one side of the silicon oxide layer to form a doped polysilicon layer; as well as A transparent conductive layer deposition process is performed on a side of the doped polysilicon layer away from the silicon oxide layer to form a transparent conductive layer.

4. The method according to claim 3, characterized in that The material of the transparent conductive layer is selected from tin dioxide, and the tin dioxide is provided in the form of tetrakis(dimethylamino)tin source.

5. The method according to claim 4, characterized in that The transparent conductive layer deposition process is carried out under the conditions of a temperature of 70 to 150° C., a tetrakis(dimethylamino)tin source flow rate of 90 to 110 slm, and a cycle number of not less than 500 times; And / or, the silicon oxide deposition process is carried out at a temperature of 530-570° C., an oxygen flow rate of 8-12 slm and a time of 8-12 min; And / or, the doped polysilicon deposition process is performed at a temperature of 550-590° C., a SiH 4 flow rate of 90-110 slm and a time of 10-30 min.

6. A solar cell, characterized in that: It comprises the tunneling oxide layer passivation contact structure as claimed in claim 1 or 2.

7. The solar cell according to claim 6, characterized in that: The solar cell is a TOPCon cell.

8. A photovoltaic module, characterized in that: The method comprises at least one battery string, wherein the battery string comprises at least two solar cells according to claim 6 or 7.

9. A photovoltaic system, characterized in that: Comprising the photovoltaic module described in claim 8.

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