Via hole structure, impedance adjusting method of signal via hole and printed circuit board

Abstract

The invention discloses a via hole structure, an impedance adjusting method of a signal via hole and a printed circuit board, and belongs to the technical field of communication, and the via hole structure comprises at least one signal via hole; and at least one terminal, and one of the terminals is electrically connected with one of the signal via holes.

Description

Technical Field

[0001] The present application belongs to the field of communication technology, and specifically relates to a via structure, an impedance adjustment method of a signal via, and a printed circuit board. Background Art

[0002] With the advent of the big data era, the single-channel signal rate of digital chips continues to increase to meet the needs of large data communication interactions. However, the higher the signal rate, the larger the channel bandwidth required for transmission. The signal bandwidth can be understood as the difference between the highest frequency and the lowest frequency of the signal in the signal spectrum diagram. In other words, the signal bandwidth is the frequency range of the signal.

[0003] Vias are an indispensable component in current communication products. To increase the signal rate, the current mainstream solution is to adjust the distance between differential vias, the distance between the ground hole and the differential via, and the size of the anti-pad of the differential via, thereby reducing the via impedance.

[0004] However, due to the Conductive Anodic Filament (CAF) effect, the distance between vias of different networks cannot be less than a certain value. The current process requires the hole wall spacing to be greater than 0.5mm. Therefore, adjusting the distance between vias to adjust the impedance is limited.

[0005] On the other hand, the size of the anti-pad cannot be small enough due to the limitation of processing capability. Therefore, adjusting the impedance by the anti-pad size of the differential via will also be subject to certain limitations. It can be seen that in the related art, when the impedance of the differential via is high, the conventional technology has limited ability to adjust the via impedance, which affects the signal rate. Summary of the invention

[0006] The purpose of the embodiments of the present application is to provide a via structure, an impedance adjustment method for a signal via, and a printed circuit board, which can solve the problem of high impedance of PCB vias in high-speed digital products.

[0007] In a first aspect, an embodiment of the present application provides a via structure, which includes: at least one signal via; and at least one terminal, wherein one of the terminals is electrically connected to one of the signal vias.

[0008] In an implementation manner of the first aspect, only one of the signal vias is electrically connected to the at least one terminal.

[0009] In an implementation manner of the first aspect, a plurality of the signal vias are electrically connected to the at least one terminal, and one of the terminals is electrically connected to one of the signal vias.

[0010] In an implementation manner of the first aspect, the one signal via is electrically connected to the plurality of terminals.

[0011] In an implementation manner of the first aspect, the plurality of terminals are isolated from each other.

[0012] In an implementation manner of the first aspect, a plurality of the terminals are electrically connected together.

[0013] In an implementation of the first aspect, the terminal is a loop-shaped structure.

[0014] In an implementation manner of the first aspect, the terminal is fixedly connected to an outer wall of the signal via.

[0015] In a second aspect, an embodiment of the present application provides an impedance adjustment method for a signal via, which is applied to a via structure as described in the first aspect, the method comprising: determining a target size of a terminal in the via structure based on a target impedance value; adjusting the size of the terminal in the via structure to the target size according to the target size, so that the impedance value of the via structure reaches the target impedance value.

[0016] In an implementation of the second aspect, after adjusting the size of the terminal in the via structure to the target size, the method further includes: after adjusting the size of the terminal in the via structure to the target size, if the impedance value of the via structure does not reach the target impedance value, adjusting at least one of the first distance between two signal differential holes in the via structure, the second distance between the ground hole and the signal via in the via structure, and the anti-pad size in the via structure, so that the impedance value of the via structure reaches the target impedance value.

[0017] In a third aspect, an embodiment of the present application provides a printed circuit board, comprising the via structure as described in the first aspect.

[0018] In a fourth aspect, an embodiment of the present application provides a communication device, comprising a printed circuit board as described in the third aspect.

[0019] In an embodiment of the present application, a via structure is provided, which includes: at least one signal via; and at least one terminal, wherein one of the terminals is electrically connected to one of the signal vias. By adjusting the size, number, etc. of the terminals, the impedance of the signal via can be adjusted, and there is no need to adjust the size of the anti-pad of the differential via, thereby solving the problem of limited ability to adjust the via impedance when the impedance of the differential hole is high. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1a It is a structural schematic diagram of a via structure in the related art;

[0021] Figure 1bis a schematic structural diagram of another via structure in the related art;

[0022] Figure 2 A schematic structural diagram of a via structure provided in an embodiment of the present application;

[0023] Figure 3a is a schematic structural diagram of another via structure provided in an embodiment of the present application;

[0024] Figure 3b is a structural schematic diagram of another via structure provided in an embodiment of the present application;

[0025] Figure 4a is a structural schematic diagram of another via structure provided in an embodiment of the present application;

[0026] Figure 4b is a structural schematic diagram of another via structure provided in an embodiment of the present application;

[0027] Figure 5 It is a flow chart of a method for adjusting the impedance of a signal via provided in an embodiment of the present application;

[0028] Figure 6 It is a comparison curve diagram of the impedance after simulation of the via structure provided in the embodiment of the present application and the via structure provided in the prior art. DETAILED DESCRIPTION

[0029] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0030] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0031] In the related art, the impedance adjustment of the differential via hole is not only the distance between the two differential holes, such as Figure 1a In addition to the above, the distance between the ground hole and the differential hole can also be adjusted as shown in Figure 1b As shown, and the anti-pad size of the differential hole. With the continuous improvement of signal rate, the dielectric constant of the plate used in high-speed products is getting smaller and smaller, so the impedance of the signal hole is getting higher and higher. If you want to reduce the impedance of the via, you need to shorten the distance between the signal hole and the signal hole and the ground hole, and reduce the anti-pad of the signal hole. However, due to the CAF effect, the distance between the vias of different networks cannot be less than a certain value. The current process requires that the hole wall spacing is greater than 0.5mm. Therefore, the impedance is limited by adjusting the distance between the vias. On the other hand, the size of the anti-pad cannot be small enough due to the limitation of processing capabilities. Therefore, when the impedance of the differential hole is high, the conventional technology has limited ability to adjust the impedance of the via. In response to this problem, an embodiment of the present application provides an improved via structure. In addition to the signal via, a terminal is added to the signal via, and the terminal is capacitive, so the impedance of the via can be reduced. In addition, the capacitive terminal can break through the CAF limitation, so that the equivalent distance between the two signal holes becomes smaller, reducing the impedance of the via.

[0032] In conjunction with the accompanying drawings, a via structure, an impedance adjustment method for a signal via, a printed circuit board, and a communication device provided in the embodiments of the present application are described below through specific embodiments and their application scenarios.

[0033] Figure 2 This is a schematic diagram of a via structure provided in an embodiment of the present application.

[0034] like Figure 2 As shown, an embodiment of the present application provides a via structure, which includes: at least one signal via 201; at least one terminal 101, wherein one of the terminals 101 is electrically connected to one of the signal vias 201.

[0035] The terminal 101 in the via structure is capacitive, so the impedance of the signal via 201 can be reduced. Specifically, the impedance of the entire signal via 201 can be adjusted by adjusting the size of the terminal 101, without adjusting the size of the anti-pad of the signal via. In addition, the terminal 101 can break through the CAF limitation, and the equivalent distance between the two signal vias 201 can be reduced, thereby reducing the impedance of the signal via 201.

[0036] It should be noted that the shape of the terminal 101 in the embodiment of the present application is not limited.

[0037] In the embodiments of the present application, Figure 2 As shown, the via structure may further include a conductive layer 301 and a transmission line 401 .

[0038] In the embodiment of the present application, a via structure is provided, which includes: at least one signal via 201; at least one terminal 101, wherein one terminal 101 is electrically connected to one signal via 201. Thus, the impedance of the entire signal via 201 can be adjusted by adjusting the size of the terminal 101. In addition, the terminal 101 can break through the CAF limitation, so that the equivalent distance between the two signal vias 201 can be reduced, thereby reducing the impedance of the signal via 201.

[0039] Figure 3a It is a structural schematic diagram of another via structure provided in an embodiment of the present application.

[0040] like Figure 3a As shown, an embodiment of the present application provides a via structure, in which only one signal via 201 is electrically connected to the at least one terminal 101 .

[0041] In the embodiment of the present application, it can be seen that in the via structure, only one signal via 201 is electrically connected to at least one terminal 101 , and the other signal vias 201 are not electrically connected to the terminal 101 .

[0042] In one implementation of this embodiment, Figure 3a As shown, specifically, only one signal via 201 is electrically connected to one terminal 101 , and the other signal via 201 is not electrically connected to the terminal 101 .

[0043] In another implementation of this embodiment, only one signal via 201 may be electrically connected to two or more terminals 101 , and another signal via 201 may not be electrically connected to the terminal 101 .

[0044] Figure 3b It is a structural schematic diagram of another via structure provided in an embodiment of the present application.

[0045] like Figure 3b As shown, an embodiment of the present application provides a via structure, in which a plurality of signal vias 201 are electrically connected to the at least one terminal 101 , and one terminal 101 is electrically connected to one signal via 201 .

[0046] In the embodiments of the present application, Figure 3b As shown, in the via structure, multiple signal vias 201 are electrically connected to at least one terminal 101, and one terminal 101 is electrically connected to one signal via 201, that is, one terminal 101 can only be electrically connected to one signal via 201, while one signal via 201 can be electrically connected to at least one terminal 101, and multiple signal vias 201 can be electrically connected to the terminal 101.

[0047] In one implementation of this embodiment, Figure 3b As shown, the via structure may also be composed of two signal vias 201 and three terminals 101 . Specifically, one signal via 201 is electrically connected to two terminals 101 , and another signal via 201 is electrically connected to one signal via 201 .

[0048] In another implementation of this embodiment, Figure 2 As shown, the via structure may also be composed of two signal vias 201 and two terminals 101 . Specifically, one signal via 201 is electrically connected to one terminal 101 , and another signal via 201 is electrically connected to one signal via 201 .

[0049] It is worth noting that in the embodiment of the present application, in addition to ensuring that one terminal 101 is electrically connected to one signal via 201, other signal vias 201 are electrically connected to at least one terminal 101, which can be like Figure 2 As shown, it is electrically connected to a terminal 101, and can also be like Figure 3b As shown, the signal via 201 is electrically connected to two terminals 101 . Similarly, the signal via 201 may also be electrically connected to three, four, or more terminals 101 , which is not specifically limited in the embodiments of the present application.

[0050] In the embodiment of the present application, one signal via 201 is electrically connected to a plurality of terminals 101 .

[0051] In one implementation of the embodiment of the present application, Figure 3b As shown, the signal via 201 on the right is electrically connected to the two terminals 101. Alternatively, Figure 4a As shown, the two signal vias 201 are electrically connected to the two terminals 101 .

[0052] In the embodiments of the present application, Figure 4a As shown, the direction of the terminal 101 on the signal via 201 can be set arbitrarily.

[0053] In the embodiment of the present application, optionally, when a signal via 201 is electrically connected to a plurality of terminals 101, the plurality of terminals 101 are isolated from each other, such as Figure 3b and Figure 4a shown.

[0054] Alternatively, optionally, in the case where a signal via 201 is electrically connected to a plurality of terminals 101, the plurality of terminals 101 may also be electrically connected together, such as Figure 4b shown.

[0055] In the embodiment of the present application, the terminal 101 may be a circular structure, and optionally, the terminal 101 is fixedly connected to the outer wall of the signal via 201. Figures 2 to 4b In the embodiment, a terminal 101 may adopt a structure similar to a Chinese character “U”, and each terminal 101 may be fixedly connected to the outer wall of the signal via hole 201 by electroplating.

[0056] In the embodiment of the present application, the impedance of the entire signal via 201 can be adjusted by adjusting the size of the terminal 101. In addition, the terminal 101 can break through the CAF limitation, so the equivalent distance between the two signal vias 201 can be reduced, thereby reducing the impedance of the signal via 201 and improving the signal quality.

[0057] Figure 5 It is a flow chart of a signal via impedance adjustment method provided in an embodiment of the present application.

[0058] The method is applicable to any of the via structures described above, such as Figure 5 As shown, the method mainly includes the following steps:

[0059] S510, determining a target size of a terminal in the via structure based on a target impedance value.

[0060] In an embodiment of the present application, a signal via impedance adjustment method is provided. To adjust the impedance of the signal via, a target impedance value should be determined first, and then a target size of a terminal in the via structure is determined based on the obtained target impedance value.

[0061] Because the terminal is capacitive, it can reduce the impedance of the signal via. When the impedance is relatively large, that is, the target impedance value is relatively large, the target size of the terminal in the via structure set at this time will also be relatively large; when the impedance is relatively small, that is, the target impedance value is relatively small, the target size of the terminal in the via structure set at this time will also be relatively small.

[0062] In specific applications, the size of the terminal corresponding to each impedance value can be obtained through three-dimensional modeling simulation, and the corresponding relationship between the impedance value and the terminal size can be established. In specific use, the target size of the terminal in the via structure can be obtained according to the target impedance value.

[0063] S520, adjusting the size of the terminal in the via structure to the target size according to the target size, so that the impedance value of the via structure reaches the target impedance value.

[0064] In an embodiment of the present application, a method for adjusting the impedance of a signal via is provided. Since the terminal is capacitive, the impedance of the signal via can be reduced, so a terminal electrically connected to the signal via is arranged around the signal via to adjust the impedance in the signal via.

[0065] In addition, the set terminals can also break through the CAF limitation, making the equivalent distance between two signal vias smaller, thereby reducing the impedance of the signal vias.

[0066] In an embodiment of the present application, after adjusting the size of the terminal in the via structure to the target size, the method further includes: after adjusting the size of the terminal in the via structure to the target size, if the impedance value of the via structure does not reach the target impedance value, adjusting at least one of the first distance between two signal differential holes in the via structure, the second distance between the ground hole and the signal via in the via structure, and the anti-pad size in the via structure, so that the impedance value of the via structure reaches the target impedance value.

[0067] In an embodiment of the present application, a signal via impedance adjustment method is provided, which can solve the problem of high PCB via impedance in high-speed digital products, reduce the via impedance, and improve signal quality.

[0068] In addition, please refer to Figure 6 , which is a comparison curve of the impedance after simulation of the via structure set in the embodiment of the present application and the via structure set in the prior art, in which the horizontal axis represents the signal transmission time in ns and the vertical axis represents the impedance value in ohm. Figure 6 It can be seen that the impedance of the via structure after simulation (curve 2) set in the embodiment of the present application is better in continuity than the impedance of the via structure after simulation (curve 1) set in the prior art. The impedance of the prior art is too high, and the technology of the embodiment of the present application can reduce the impedance.

[0069] In addition, from Figure 6 It can be seen that the impedance adjustment range simulated in the embodiment of the present application is larger, which means that in addition to the conductor layer, the impedance of the via hole at the dielectric layer can also be adjusted.

[0070] An embodiment of the present application further provides a printed circuit board, which includes any of the above-mentioned via structures.

[0071] An embodiment of the present application further provides a communication device, which includes the above-mentioned printed circuit board 700.

[0072] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0073] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above embodiment methods can be implemented by means of software plus a necessary general hardware platform, or by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product.

[0074] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the claims.

[0075] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A via structure, characterized in that: include: at least one signal via; At least one terminal, wherein one of the terminals is electrically connected to one of the signal vias.

2. The via structure according to claim 1, characterized in that: Only one of the signal vias is electrically connected to the at least one terminal.

3. The via structure according to claim 1, characterized in that: A plurality of the signal vias are electrically connected to the at least one terminal, and one terminal is electrically connected to one signal via.

4. The via structure according to any one of claims 1 to 3, characterized in that: The one signal via is electrically connected to the plurality of terminals.

5. The via structure according to claim 4, characterized in that: The plurality of terminals are isolated from each other.

6. The via structure according to claim 4, characterized in that: The plurality of terminals are electrically connected together.

7. The via structure according to any one of claims 1 to 3, characterized in that: The terminal is a loop-shaped structure.

8. The via structure according to any one of claims 1 to 3, characterized in that: The terminal is fixedly connected to the outer wall of the signal via.

9. A signal via impedance adjustment method, applied to the via structure according to any one of claims 1 to 8, characterized in that: The method comprises: Determining a target size of a terminal in the via structure based on a target impedance value; According to the target size, the size of the terminal in the via structure is adjusted to the target size, so that the impedance value of the via structure reaches the target impedance value.

10. The method according to claim 9, characterized in that After adjusting the size of the terminal in the via structure to the target size, the method further includes: After adjusting the size of the terminal in the via structure to the target size, if the impedance value of the via structure does not reach the target impedance value, adjust at least one of the first distance between the two signal differential holes in the via structure, the second distance between the ground hole and the signal via in the via structure, and the anti-pad size in the via structure so that the impedance value of the via structure reaches the target impedance value.

11. A printed circuit board, characterized in that: The via structure comprises the via structure as claimed in any one of claims 1 to 8.

12. A communication device, characterized in that: A printed circuit board comprising the method of claim 11.

Images