PCB surface defect detection method based on improved YOLOv8
By introducing RFCBAMConv, ScConv and VoVGSCSPC modules in the YOLOv8 model, the problems of complex background interference, high error detection rate and low computing efficiency are solved, and the accuracy and efficiency of PCB defect detection are improved, which is suitable for industrial production.
Patent Information
- Application Number
- CN202411401630.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-09
- Publication Date
- 2025-01-03
AI Technical Summary
Existing deep learning models face complex background interference, high error detection rate, insufficient sensitivity and accuracy of small object detection, and low computing efficiency in PCB defect detection, making it difficult to meet the high quality and high efficiency needs of industrial production.
The YOLOv8 model is improved by introducing the RFCBAMConv module, ScConv module and VoVGSCSPC module, which enhances the model's detailed feature extraction capability in complex contexts, improves the accuracy of small object detection, and optimizes the computing efficiency to adapt to resource-constrained environments.
It reduces the error detection rate in complex backgrounds, improves the accuracy of small target detection, and optimizes the model calculation efficiency, making YOLOv8 more accurate and efficient in PCB defect detection, and is suitable for industrial applications.
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Figure CN119251199A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of deep learning and quality inspection, and in particular to a PCB surface defect detection method based on improved YOLOv8. Background Art
[0002] In the field of electronic manufacturing, the quality of printed circuit boards (PCBs) plays a decisive role in the performance and reliability of the entire electronic equipment. As the core of electronic components, any defects in PCBs may cause abnormal functions or even complete failure of electronic equipment. These defects include but are not limited to leaks, rat bites, open circuits, short circuits, burrs, and false copper, which may be caused by a variety of reasons such as material defects, mechanical damage during the production process, or improper chemical treatment. If defective products enter the market, it will affect consumer trust and the brand reputation of manufacturers. Therefore, efficient and accurate PCB defect detection technology is of great significance to reducing production costs, improving product quality, and accelerating product launch time.
[0003] Traditional PCB defect detection methods include manual visual inspection and traditional machine learning. Manual inspection is inefficient, costly, and susceptible to subjective factors. Traditional machine learning methods rely on manual feature extraction and rule-based classification algorithms, which perform well in specific detection tasks, but their performance significantly decreases when faced with small targets, multi-scale defects, and complex backgrounds, making it difficult to meet the high-precision and high-efficiency requirements of modern PCB production. Therefore, the industry urgently needs more efficient and intelligent solutions.
[0004] Unlike traditional methods that rely on complex preprocessing and feature engineering, deep learning achieves end-to-end automated PCB defect detection without human intervention. With its powerful feature extraction capabilities, convolutional neural networks (CNNs) can automatically identify and classify complex defects on PCBs, greatly improving the accuracy and efficiency of detection. In addition, deep learning models continue to learn and adapt to new defect types, further enhancing the overall performance of the system. With the development of deep learning technology, models such as YOLO have become the mainstream choice in the field of industrial inspection due to their high efficiency.
[0005] Although deep learning models such as the YOLO series have performed well in many fields, they still face challenges in PCB defect detection. First, the complex background on the PCB board may interfere with the model's accurate identification of defects, especially when the conductive path is extensive. It is difficult for the model to distinguish between normal features and defects, resulting in a high false detection rate. Secondly, small target defects are difficult to detect. For small-sized defects such as burrs and short circuits, the detection sensitivity and accuracy of existing models still need to be improved. In addition, industrial defect detection requires high computational efficiency, and deep learning models with complex network structures may be difficult to perform efficient detection in resource-constrained environments (such as embedded systems). These problems highlight the limitations of existing methods and prompt the search for more accurate and adaptable solutions to meet the high quality and efficiency requirements in industrial production. Summary of the invention
[0006] In order to solve the above technical problems, the present invention proposes a PCB surface defect detection method based on improved YOLOv8 to solve the problems existing in the above-mentioned prior art.
[0007] To achieve the above object, the present invention provides a PCB surface defect detection method based on improved YOLOv8, comprising:
[0008] Build an improved YOLOv8 model based on the RFCBAMConv module, ScConv module, and VoVGSCSPC module;
[0009] The PCB is input into the improved YOLOv8 model to obtain the PCB surface defect detection result.
[0010] Optionally, the process of constructing the improved YOLOv8 model includes introducing the RFCBAMConv module into the backbone network of the YOLOv8 model;
[0011] Among them, the backbone network of the improved YOLOv8 model includes: a Conv module layer, several RFCBAMConv module layers, several C2f module layers and an SPPF module layer.
[0012] Optionally, the process of performing image processing based on the backbone network of the improved YOLOv8 model includes:
[0013] A PCB defect image with a spatial resolution of H×W and a channel number of 3 is input into the Conv module layer to obtain a first feature map;
[0014] Input the first feature map into the first group of RFCBAMConv module layers and C2f module layers in sequence to obtain a second feature map;
[0015] Input the second feature map into the second group of RFCBAMConv module layers and C2f module layers in sequence to obtain a third feature map;
[0016] The third feature map is sequentially input into the third group of RFCBAMConv module layers and C2f module layers to obtain a fourth feature map;
[0017] Input the fourth feature map into the fourth group of RFCBAMConv module layers and C2f module layers in sequence to obtain a fifth feature map;
[0018] The fifth feature map is input into the SPPF module layer to obtain the sixth feature map.
[0019] Optionally, the process of processing the feature map by the RFCBAMConv module layer includes:
[0020] The receptive field attention weight is calculated based on the spatial position of the feature map of the input RFCBAMConv module layer to obtain the receptive field attention output, and the channel attention mechanism is performed on the feature map of the input RFCBAMConv module layer to obtain the channel attention map;
[0021] Weighting the receptive field attention output to obtain a weighted receptive field attention feature map;
[0022] Performing channel weighting on the channel attention map to obtain a weighted channel attention feature map;
[0023] Performing a spatial attention mechanism calculation on the weighted channel attention feature map to obtain a spatial attention map;
[0024] The RFCBAMConv module layer output is obtained based on the spatial attention map, the channel attention map and the weighted receptive field attention feature map.
[0025] Optionally, the process of constructing the improved YOLOv8 model includes introducing the ScConv module and the VoVGSCSPC module into the neck network of the YOLOv8 model;
[0026] Wherein, the neck network of the improved YOLOv8 model includes: a first submodule, a second submodule, a third submodule and a fourth submodule;
[0027] The first submodule includes an Upsample module layer, a Concat module layer and a VoVGSCSPC module layer;
[0028] The second submodule includes: an Upsample module layer, a Concat module layer, a VoVGSCSPC module layer and a ScConv module layer;
[0029] The third submodule includes: a Conv module layer, a Concat module layer, a VoVGSCSPC module layer and a ScConv module layer;
[0030] The fourth submodule includes: a Conv module layer, a Concat module layer, a VoVGSCSPC module layer and a ScConv module layer.
[0031] Optionally, the process in which the neck network of the improved YOLOv8 model receives the output of the backbone network for image processing includes:
[0032] Inputting the sixth feature map into the Upsample module layer of the first submodule to obtain a seventh feature map;
[0033] Input the seventh feature map and the fourth feature map into the Concat module layer of the first submodule, and obtain an eighth feature map through the VoVGSCSPC module layer;
[0034] The eighth feature map and the third feature map are processed by the second submodule to obtain a ninth feature map;
[0035] The ninth feature map and the eighth feature map are processed by a third submodule to obtain a tenth feature map;
[0036] The tenth feature map and the sixth feature map are coupled to obtain an eleventh feature map through a fourth submodule.
[0037] Optionally, the process of the ScConv module layer processing the input feature map includes:
[0038] The feature map of the input ScConv module layer is subjected to spatial reconstruction unit calculation to obtain a spatially reconstructed feature map;
[0039] The feature map of the input ScConv module layer is calculated by the channel reconstruction unit to obtain a channel reconstruction feature map;
[0040] The output of the ScConv module layer is obtained based on the spatial reconstruction feature map and the channel reconstruction feature map.
[0041] Optionally, the process of the VoVGSCSPC module layer processing the input feature map includes:
[0042] The feature map of the input VoVGSCSPC module layer is divided into a direct transfer feature map and a feature extraction feature map;
[0043] Performing stacking processing of multiple layers of GSConv and GS bottleneck modules on the feature extraction feature map to obtain a feature map processed by the GS bottleneck module;
[0044] The feature map processed by the GS bottleneck module and the direct transfer feature map are feature fused to obtain the output of the VoVGSCSPC module layer.
[0045] Compared with the prior art, the present invention has the following advantages and technical effects:
[0046] Reduced false positive rate in complex backgrounds: By introducing the RFCBAMConv module to replace the standard convolution module in the YOLOv8 backbone network, YOLOv8 can more accurately extract the detailed features of PCB defects. Especially when dealing with complex backgrounds, the model can better focus on the defect area and avoid being disturbed by the background. The RFCBAMConv module effectively reduces the false positive rate in complex backgrounds and improves the robustness of the model by combining the receptive field attention and multi-dimensional attention mechanism.
[0047] Improved small target detection accuracy: Adding the ScConv module at the end of the YOLOv8 neck network, before the three detection heads, makes YOLOv8 more accurate in processing small defects (such as burrs and short circuits). The model can better separate and reconstruct features, reduce redundant information, and focus on useful defect features. The ScConv module effectively enhances the model's ability to detect small defects, especially capturing tiny defects in complex backgrounds, by reconstructing spatial and channel information and reducing feature redundancy.
[0048] Optimize the computational efficiency of the model: Replace the C2f module in the YOLOv8 neck network with the VoVGSCSPC module. The VoVGSCSPC module reduces the number of network model parameters and the amount of computation while ensuring the accuracy and stability of the model when processing PCB defects, ensuring that the model can be efficiently detected in resource-constrained environments. The lightweight design of the VoVGSCSPC module reduces the number of model parameters and the amount of computation, allowing the model to run efficiently in resource-constrained environments such as embedded devices. BRIEF DESCRIPTION OF THE DRAWINGS
[0049] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0050] Figure 1 RFCBAMConv module structure diagram of an embodiment of the present invention, wherein Figure (a) shows the CBAM module structure diagram, and Figure (b) shows the detailed structure of RFCBAMConv;
[0051] Figure 2ScConv module structure diagram of an embodiment of the present invention, wherein (a) shows the architecture of ScConv integrated with the spatial reconstruction unit (SRU) and the channel reconstruction unit (CRU), (b) shows the architecture of the spatial reconstruction unit, and (c) shows the architecture of the channel reconstruction unit;
[0052] Figure 3 1 is a structural diagram of the VoVGSCSPC module according to an embodiment of the present invention, wherein (a) shows the structure of the GSConv module, (b) shows the structure of the GS bottleneck, and (c) shows the structure of the VoVGSCSPC module;
[0053] Figure 4 This is an overall architecture diagram of a PCB defect detection model according to an embodiment of the present invention. DETAILED DESCRIPTION
[0054] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0055] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0056] Embodiment 1
[0057] Aiming at the shortcomings of existing PCB defect detection technology, the present invention improves the YOLOv8 model by designing and introducing three innovative modules, and inputs the PCB into the improved YOLOv8 model to obtain the PCB surface defect detection results. The above problems faced in PCB defect detection are solved, the detection accuracy of the model in complex scenarios is improved, the false detection rate is reduced, and the calculation efficiency is optimized, making it more suitable for application in actual industrial scenarios.
[0058] like Figure 4 As shown in the figure, the PCB surface defect detection model based on improved YOLOv8 includes a backbone network, a neck network and a detection head network.
[0059] Backbone network: The process of building the improved YOLOv8 model includes introducing the RFCBAMConv module into the backbone network of the YOLOv8 model; wherein, the backbone network of the improved YOLOv8 model includes: a Conv module layer, several RFCBAMConv module layers, several C2f module layers and an SPPF module layer.
[0060] Layer 0: Build a Conv module layer, accept a PCB defect image with a spatial resolution of H×W and 3 channels as input, and obtain a PCB defect feature map with a spatial resolution of H / 2×W / 2 and C channels, that is, the first feature map.
[0061] Layer 1: Build an RFCBAMConv module layer, accept the output of layer 0 as input, and obtain a PCB defect feature map with a spatial resolution of H / 4×W / 4 and a channel number of 2C.
[0062] Layer 2: Build a C2f module layer, accept the output of layer 1 as input, and obtain a PCB defect feature map with a spatial resolution of H / 4×W / 4 and a channel number of 2C, that is, the second feature map.
[0063] Layer 3: Build an RFCBAMConv module layer, accept the output of the second layer as input, and obtain a PCB defect feature map with a spatial resolution of H / 8×W / 8 and a channel number of 4C.
[0064] Layer 4: Build a C2f module layer, accept the output of layer 3 as input, and obtain a PCB defect feature map with a spatial resolution of H / 8×W / 8 and a channel number of 4C, that is, the third feature map.
[0065] Layer 5: Build an RFCBAMConv module layer, accept the output of layer 4 as input, and obtain a PCB defect feature map with a spatial resolution of H / 16×W / 16 and 8C channels.
[0066] Layer 6: Build a C2f module layer, accept the output of layer 5 as input, and obtain a PCB defect feature map with a spatial resolution of H / 16×W / 16 and 8C channels, that is, the fourth feature map.
[0067] Layer 7: Build an RFCBAMConv module layer, accept the output of layer 6 as input, and obtain a PCB defect feature map with a spatial resolution of H / 32×W / 32 and 16C channels.
[0068] Layer 8: Build a C2f module layer, accept the output of layer 7 as input, and obtain a PCB defect feature map with a spatial resolution of H / 32×W / 32 and a channel number of 16C, that is, the fifth feature map.
[0069] Layer 9: Build an SPPF module layer, accept the output of layer 8 as input, and obtain a PCB defect feature map with a spatial resolution of H / 32×W / 32 and a channel number of 16C, that is, the sixth feature map.
[0070] Neck network: The neck network of the improved YOLOv8 model includes: a first submodule, a second submodule, a third submodule and a fourth submodule; the first submodule includes an Upsample module layer, a Concat module layer and a VoVGSCSPC module layer; the second submodule includes: an Upsample module layer, a Concat module layer, a VoVGSCSPC module layer and a ScConv module layer; the third submodule includes: a Conv module layer, a Concat module layer, a VoVGSCSPC module layer and a ScConv module layer; the fourth submodule includes: a Conv module layer, a Concat module layer, a VoVGSCSPC module layer and a ScConv module layer.
[0071] Layer 10: Build an Upsample module layer, accept the output of layer 9 as input, and obtain a PCB defect feature map with a spatial resolution of H / 16×W / 16 and 8C channels, that is, the seventh feature map.
[0072] Layer 11: Build a Concat module layer, accept the output of layers 10 and 6 as input, and obtain a PCB defect feature map with a spatial resolution of H / 16×W / 16 and 8C channels.
[0073] Layer 12: Build a VoVGSCSPC module layer, accept the output of layer 11 as input, and obtain a PCB defect feature map with a spatial resolution of H / 16×W / 16 and 8C channels, that is, the eighth feature map.
[0074] Layer 13: Build an Upsample module layer, accept the output of layer 12 as input, and obtain a PCB defect feature map with a spatial resolution of H / 8×W / 8 and a channel number of 4C.
[0075] Layer 14: Build a Concat module layer, accept the output of layer 13 and layer 4 as input, and obtain a PCB defect feature map with a spatial resolution of H / 8×W / 8 and a channel number of 4C.
[0076] Layer 15: Build a VoVGSCSPC module layer, accept the output of layer 14 as input, and obtain a PCB defect feature map with a spatial resolution of H / 8×W / 8 and a channel number of 4C.
[0077] Layer 16: Build a ScConv module layer, accept the output of layer 15 as input, and obtain a PCB defect feature map with a spatial resolution of H / 8×W / 8 and a channel number of 4C, that is, the ninth feature map.
[0078] Layer 17: Build a Conv module layer, accept the output of layer 16 as input, and obtain a PCB defect feature map with a spatial resolution of H / 16×W / 16 and 8C channels.
[0079] Layer 18: Build a Concat module layer, accept the output of layers 17 and 12 as input, and obtain a PCB defect feature map with a spatial resolution of H / 16×W / 16 and 8C channels.
[0080] Layer 19: Build a VoVGSCSPC module layer, accept the output of layer 18 as input, and obtain a PCB defect feature map with a spatial resolution of H / 16×W / 16 and 8C channels.
[0081] Layer 20: Build a ScConv module layer, accept the output of layer 19 as input, and obtain a PCB defect feature map with a spatial resolution of H / 16×W / 16 and 8C channels, that is, the tenth feature map.
[0082] Layer 21: Build a Conv module layer, accept the output of layer 20 as input, and obtain a PCB defect feature map with a spatial resolution of H / 32×W / 32 and 16C channels.
[0083] Layer 22: Build a Concat module layer, accept the output of layers 21 and 9 as input, and obtain a PCB defect feature map with a spatial resolution of H / 32×W / 32 and 16C channels.
[0084] Layer 23: Build a VoVGSCSPC module layer, accept the output of layer 22 as input, and obtain a PCB defect feature map with a spatial resolution of H / 32×W / 32 and 16C channels.
[0085] Layer 24: Build a ScConv module layer, accept the output of layer 23 as input, and obtain a PCB defect feature map with a spatial resolution of H / 32×W / 32 and 16C channels, that is, the eleventh feature map.
[0086] Detection head network:
[0087] Layer 25: Build a Detect module layer, accept the outputs of layers 24, 20, and 16 as input, and finally obtain a PCB defect detection result image with a spatial resolution of H×W and 3 channels.
[0088] This embodiment provides a PCB surface defect detection method based on improved YOLOv8. This embodiment improves the YOLOv8 model and proposes the following three modules:
[0089] 1. RFCBAMConv module:
[0090] Design purpose: In order to improve the detection accuracy and robustness of the YOLOv8 model in complex backgrounds, this paper introduces the RFCBAMConv module into the backbone network of YOLOv8. This module combines RFAConv and the improved CBAM attention mechanism. By focusing on the spatial characteristics of the receptive field, the parameters of each convolution operation are independent in different receptive fields, avoiding the problem of parameter sharing in traditional convolution operations. This design ensures that the model can more effectively handle scenes with complex backgrounds and changing features, thereby improving the accuracy of detection.
[0091] like Figure 1 As shown, the process of processing feature maps by the RFCBAMConv module layer includes: calculating the receptive field attention weight based on the spatial position of the feature map of the input RFCBAMConv module layer to obtain the receptive field attention output, and at the same time performing the channel attention mechanism on the feature map of the input RFCBAMConv module layer to obtain the channel attention map; weighting the receptive field attention output to obtain a weighted receptive field attention feature map; performing channel weighting on the channel attention map to obtain a weighted channel attention feature map; performing spatial attention mechanism calculation on the weighted channel attention feature map to obtain the spatial attention map; and obtaining the RFCBAMConv module layer output based on the spatial attention map, the channel attention map and the weighted receptive field attention feature map.
[0092] Implementation:
[0093] 1. Receptive Field Attention (RFA): By dynamically adjusting the receptive field of the convolution kernel, the network can adaptively adjust the receptive field according to the size of the target and the complexity of the background, thereby increasing the attention to the target area. The specific formula is as follows:
[0094] 1.1 Calculation of Receptive Field Attention (RFA)
[0095] Step 1: Calculate the receptive field attention weight
[0096] First, according to the spatial position of the input feature map X, the receptive field attention weight is dynamically calculated
[0097]
[0098] Where: R i,j is the receptive field attention output at position (i, j). i+m,j+n is the pixel value of the input feature map X at position (i+m,j+n). is the receptive field attention weight, which is dynamically adjusted according to the spatial position of the input feature.
[0099] Step 2: Receptive Field Attention Weighting
[0100] Apply the receptive field attention to the input feature map X and obtain the weighted feature map R(X).
[0101]
[0102] 2. Convolutional Block Attention Module (CBAM): CBAM combines channel attention and spatial attention to enhance the saliency of feature maps in two dimensions. First, the channel weights are calculated through global average pooling and global maximum pooling, and then the spatial attention is calculated through convolution operations in the spatial dimension. The specific formula is as follows:
[0103] 2.1 Calculation of channel attention mechanism
[0104] Step 3: Global average pooling and maximum pooling
[0105] Global average pooling (GAP) and global maximum pooling (GMP) are performed on the input feature map X to obtain two channel-level global description vectors.
[0106]
[0107] Where: H and W are the height and width of the feature map. k is the channel index.
[0108] Step 4: Channel attention weight calculation
[0109] The pooled feature vectors are passed through the fully connected layer for dimensionality reduction, ReLU activation, dimensionality increase, and added.
[0110] M c (X)=σ(W2·ReLU(W1·GAP(X))+W4·ReLU(W3·GMP(X)))
[0111] Step 5: Channel Weighting
[0112] Use the calculated channel attention map M c (X) Weight the input feature map X.
[0113]
[0114] 2.2 Calculation of Spatial Attention Mechanism
[0115] Step 6: Spatial pooling operation
[0116] The weighted feature map X' is subjected to average pooling and maximum pooling in the spatial dimension to obtain two spatial feature maps.
[0117]
[0118] Where: C is the number of channels of the feature map.
[0119] Step 7: Spatial attention weight calculation
[0120] The spatial pooled feature maps are concatenated and a 7×7 convolutional layer is used to generate a spatial attention map M. s (X').
[0121] M s (X')=σ(f 7×7 ([AvgPool(X');MaxPool(X')]))
[0122] Step 8: Spatial Weighting
[0123] Use the calculated spatial attention map M s (X') Spatial weighting of feature map X'.
[0124]
[0125] 3. Final output of the RFCBAMConv module
[0126] Step 9: Combining Receptive Field Attention and CBAM Attention
[0127] Combine the receptive field attention and CBAM (including channel attention and spatial attention) to obtain the final output feature map Y of the RFCBAMConv module.
[0128]
[0129] Integration location: This module replaces the standard convolution module (Conv) in the YOLOv8 backbone network, improving the performance of the model in complex backgrounds.
[0130] 2. ScConv module:
[0131] Design purpose: In order to improve the detection ability of the YOLOv8 model for small-sized defects, the present invention introduces the ScConv module into the neck network of YOLOv8 and processes the feature map before it enters the detection head. The ScConv module consists of two parts: the spatial reconstruction unit (SRU) and the channel reconstruction unit (CRU). The spatial reconstruction unit SRU reduces spatial redundancy to ensure that important information of the feature map in the spatial dimension is not submerged. The channel reconstruction unit CRU reduces channel redundancy so that important features in the channel dimension are better expressed. The combination of the two effectively reduces feature redundancy in the spatial and channel dimensions and enhances the ability to capture small target features.
[0132] like Figure 2 As shown, the process of the ScConv module layer processing the input feature map includes: performing spatial reconstruction unit calculation on the feature map of the input ScConv module layer to obtain a spatial reconstructed feature map; performing spatial reconstruction unit calculation on the feature map of the input ScConv module layer to obtain a channel reconstructed feature map; and obtaining the output of the ScConv module layer based on the spatial reconstructed feature map and the channel reconstructed feature map.
[0133] Implementation:
[0134] 1. Calculation of Space Reconstruction Unit (SRU)
[0135] The spatial reconstruction unit (SRU) optimizes the spatial expression of the feature map through separation and reconstruction operations, allowing the model to focus more on important information areas.
[0136] Step 1: Feature Separation
[0137] Separate the input feature map X into informative features X rich and redundant features X red , by the scaling factor W of group normalization (GN) γ to achieve separation.
[0138] X rich =X·W γ
[0139] X red =XX rich
[0140] Where: X rich is an informative feature. X red is a redundant feature. γ It is the scaling factor calculated by group normalization (GN).
[0141] Step 2: Feature reconstruction
[0142] Reconstruct the separated information-rich features and redundant features to generate a new feature map X w .
[0143] X w =Concat(X rich , X red )
[0144] Where: X w It is a reconstructed feature map, which combines informative features and redundant features, and enhances the expressiveness of the feature map through splicing operations.
[0145] 2. Calculation of Channel Reconstruction Unit (CRU)
[0146] The channel reconstruction unit (CRU) reduces feature redundancy in the channel dimension and extracts high-level features through separation, transformation and fusion operations.
[0147] Step 3: Channel separation
[0148] The input feature map is separated into two parts in the channel dimension, namely the upper half X up and the lower part X low .
[0149] X up , X low =Split(X)
[0150] Where: X up and X low They are the two parts of the input feature map after separation in the channel dimension.
[0151] Step 4: Channel Reconstruction
[0152] The separated upper and lower features are convolved to extract high-level features.
[0153] Y1=M G ·X up +M P1 ·X up
[0154] Y2=M G X low +M P2 X low
[0155] Where: M G is the weight matrix of the group convolution. P1 and M P2It is the weight matrix of pointwise convolution, and Y1 and Y2 are the output features after convolution.
[0156] Step 5: Channel fusion
[0157] Through global average pooling (GAP) and channel attention mechanism, the convolutional features are fused and the importance of each channel is adaptively adjusted.
[0158] β1=σ(GAP(Y1)·W β1 ), β2=σ(GAP(Y2)·W β2 )
[0159] The final output features are:
[0160] Y=β1·Y1+β2·Y2
[0161] Among them: β1 and β2 are channel attention weights, which are obtained by global average pooling of feature maps Y1 and Y2 through the weight matrix W β1 and W β2 Calculated. σ is the Sigmoid activation function, which is used to generate normalized channel weights.
[0162] 3. Final output of the ScConv module
[0163] The final output of the ScConv module after combining SRU and CRU is expressed as:
[0164] Z = CRU(SRU(X))
[0165] Where: Z is the final output feature map of the SCConv module. SRU(X) is the feature map processed by the spatial reconstruction unit (SRU). CRU(SRU(X)) is the final output after processing by the channel reconstruction unit (CRU).
[0166] Integration location: The ScConv module is added at the end of the YOLOv8 neck network, before the three detection heads, to enhance feature expression capabilities.
[0167] 3. VoVGSCSPC module
[0168] Design purpose: to improve the accuracy of multi-scale target detection while maintaining lightweight. The C2f module in the original YOLOv8 neck is limited by the simple partial feature processing mechanism when processing multi-scale feature fusion, and may not be able to fully capture the multi-scale information with rich details, resulting in poor results in PCB defect detection. Therefore, the present invention replaces the C2f module in the YOLOv8 neck network with the VoVGSCSPC module. The VoVGSCSPC module is a cross-stage partial network designed by combining the GSConv, GS bottleneck modules and CSPNet architecture, aiming to optimize the feature extraction and fusion capabilities of the YOLOv8 model, and optimize the computational efficiency of the YOLOv8 model through lightweight design and multi-scale feature processing, especially reducing the number of parameters and computational complexity to adapt to resource-constrained environments (such as embedded systems).
[0169] like Figure 3 As shown in the figure, the process of processing the input feature map of the VoVGSCSPC module layer includes: dividing the feature map of the input VoVGSCSPC module layer into a direct transfer feature map and a feature extraction feature map; stacking the feature extraction feature map with multiple layers of GSConv and GS bottleneck modules to obtain the feature map processed by the GS bottleneck module; and performing feature fusion on the feature map processed by the GS bottleneck module and the direct transfer feature map to obtain the output of the VoVGSCSPC module layer.
[0170] Implementation:
[0171] 1. Calculation formula of GSConv
[0172] The GSConv module achieves efficient feature extraction by combining standard convolution (SC) and depthwise separable convolution (DSC) and performing feature interaction (shuffle) between channels.
[0173] Step 1: Standard convolution
[0174] First, a standard convolution operation is performed on the input feature map X to capture local features.
[0175] Y SC =W SC *X
[0176] Where: Y SC is the output feature map of the standard convolution. SC is the weight matrix of the standard convolution, and * represents the convolution operation.
[0177] Step 2: Depthwise Separable Convolution
[0178] Next, a depth-wise separable convolution operation is performed on the input feature map X to improve the computational efficiency of the convolution.
[0179] Y DSC =W DSC *X
[0180] Where: Y DSC is the output feature map of the depthwise separable convolution. W DSC is the weight matrix of the depthwise separable convolution.
[0181] Step 3: Shuffle
[0182] Then, the output feature map Y of the standard convolution and depth-wise separable convolution is SC and Y DSC Channel mixing is performed to enhance the feature interaction between channels.
[0183]
[0184] Where: Y GSConv It is the final output feature map of GSConv. Represents the channel concatenation operation of the feature map. Shuffle represents the channel mixing operation, which realizes the interaction of features by randomly disrupting the channel order.
[0185] 2. Calculation formula of GS Bottleneck module (GSBottle)
[0186] The GS bottleneck module further optimizes the feature extraction and fusion process based on GSConv and improves the nonlinear expression ability of the model.
[0187] Step 4: Bottleneck Convolution
[0188] First, a bottleneck convolution operation is performed on the output feature map of GSConv to reduce the amount of computation and extract high-level features.
[0189] Y bottle =W bottle *Y GSConv
[0190] Where: Y bottle is the output feature map of the bottleneck convolution. bottle is the weight matrix of the bottleneck convolution.
[0191] Step 5: Activation and Normalization
[0192] Then, ReLU activation and Batch Normalization (BN) are performed on the feature map after bottleneck convolution to enhance the nonlinear expression ability.
[0193] Yact =BN(ReLU(Y bottle ))
[0194] Where: Y act It is the feature map after activation and normalization.
[0195] 3. Calculation formula of VoVGSCSPC structure
[0196] The VoVGSCSPC structure further integrates multi-level feature information through the cross-stage partial design of CSPNet to achieve efficient feature reuse.
[0197] Step 6: Feature Separation
[0198] The input feature map X is divided into two parts: one part is directly passed to the subsequent layer, and the other part is used for feature extraction
[0199] X1, X2 = Split(X)
[0200] Among them: X1 is the feature map directly transferred for subsequent feature fusion. X2 is the feature map that needs to be extracted.
[0201] Step 7: Multi-layer feature extraction
[0202] X2 is processed by stacking multiple layers of GSConv and GS bottleneck modules to extract and enhance features layer by layer.
[0203] Y GSConv1 =GSConv(X2)
[0204] Y GSConv2 =GSConv(Y GSConv1 )
[0205] Y GSBottle =GSBottle(Y GSConv2 )
[0206] Where: Y GSConv1 and Y GSConv2 It is the feature map after two GSConv processes. GSBottle It is the feature map after being processed by the GS bottleneck module.
[0207] Step 8: Feature Fusion
[0208] The feature map after multi-layer feature extraction is fused with the directly transmitted feature map X1 to achieve feature reuse and aggregation.
[0209] Y CSP =Concat(X1,Y GSBottle )
[0210] Where: YCSP It is the output feature map of the fused VoVGSCSP module. Concat represents the concatenation operation of the feature map.
[0211] Integration location: This module replaces the C2F module of the YOLOv8 neck network to improve the efficiency and performance of the model.
[0212] The improved YOLOv8 model has achieved significant advantages in PCB defect detection: the number of parameters of the detection model has decreased by 6%, the FPS value has increased from 70 to 83.3, and the average accuracy of the model has increased by 3.4% at the mAP0.5:0.95 value. These improvements give the present invention a significant advantage in PCB surface defect detection and can better meet the needs of the industrial field for high-precision and high-efficiency detection.
[0213] As a specific implementation of this embodiment, the specific embodiments are as follows:
[0214] 1. Dataset and Experimental Design
[0215] Dataset: The PCB defect dataset used in this paper comes from the Intelligent Robotics Open Laboratory of Peking University. The dataset contains 693 images, covering 6 common defect types: leaks, rat bites, open circuits, short circuits, burrs, and fake copper. In order to enhance the generalization ability of the model, data enhancement techniques such as image flipping, mirroring, translation, and blur operations are used to expand the dataset to 10,688 images.
[0216] Dataset division: The dataset is divided into training set, validation set and test set in a ratio of 8:1:1.
[0217] The experimental environment is shown in Table 1:
[0218] Table 1
[0219]
[0220] The experimental environment for training and testing is as follows:
[0221] Based on the Windows 10 operating system, the experimental hardware conditions are: i5-10400F CPU, NVIDIA GeForceRTX 306012G GPU. The experiment was completed using the PyTorch deep learning framework. The PyTorch version is 1.13.0 and the CUDA version is 11.7.1.
[0222] 2. Type training and optimization
[0223] Based on the YOLOv8 network architecture, the model is trained by combining ScConv, RFCBAMConv and VoVGSCSPC modules.
[0224] Hyperparameter setting: Based on the YOLOv8 network architecture, the model is trained in combination with ScConv, RFCBAMConv and VoVGSCSPC modules. The input image size is 640*640, the SGD optimizer is used, the batch size is 16, the number of working threads is 8, the number of training iterations is 300, the learning rate is 0.01, the momentum is 0.8, and the weight decay is 0.0005.
[0225] 3 Evaluation Metrics
[0226] In order to comprehensively evaluate the accuracy of the model, this paper uses the most commonly used indicators including precision, recall, average precision (AP) and average precision (mAP), and uses mAP as the primary evaluation indicator. The above indicators are defined as:
[0227]
[0228] Among them, TP is the positive sample judged as a positive sample by the model; FP means that the negative sample is judged as a positive sample; FN means that the positive sample is judged as a negative sample; p(r) represents the precision as a function of the recall rate, n is the number of a certain category; APi is the detection accuracy of category i.
[0229] 4. Experimental results and analysis
[0230] The results of the ablation experiments are shown in Table 2.
[0231] Table 2
[0232]
[0233] The detection accuracy of each improvement for different defect types is mAP0.5:0.95, as shown in Tables 3 and 4.
[0234] Table 3
[0235]
[0236] Table 4
[0237]
[0238] Model comparison experiment:
[0239] The improved YOLOv8 network successfully passed the test. Experimental results show that this method has better speed and accuracy in PCB defect detection than traditional mainstream target detection models. This model replaces the standard convolution module in the backbone network of YOLOv8 by introducing the RFCBAMConv module. This enables YOLOv8 to extract detailed features of PCB defects more accurately. Especially when dealing with complex backgrounds, the model can better focus on the defect area and avoid being disturbed by the background. At the same time, adding the ScConv module before the detection head makes YOLOv8 more accurate when dealing with small-sized defects (such as burrs and short circuits). The model can better separate and reconstruct features, reduce redundant information, and focus on useful defect features. Finally, the C2f module in the neck network of YOLOv8 is replaced by the VoVGSCSPC module. The VoVGSCSPC module reduces the number of network model parameters and the amount of calculation while ensuring the accuracy and stability of the model when dealing with PCB defects, ensuring that the model can be efficiently detected in a resource-constrained environment. Combining these three modules, the improved YOLOv8 model has achieved significant advantages in PCB defect detection: the number of parameters of the detection model has decreased by 6%, the FPS value has increased from 70 to 83.3, and the average accuracy of the model has increased by 3.4% at the mAP0.5:0.95 value. This study provides a new model for faster and more accurate PCB defect detection.
[0240] The above are only preferred specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
Claims
1. A PCB surface defect detection method based on improved YOLOv8, characterized in that: The following steps are involved: Build an improved YOLOv8 model based on the RFCBAMConv module, ScConv module, and VoVGSCSPC module; The PCB is input into the improved YOLOv8 model to obtain the PCB surface defect detection result.
2. The PCB surface defect detection method based on improved YOLOv8 according to claim 1, characterized in that: The process of constructing the improved YOLOv8 model includes introducing the RFCBAMConv module into the backbone network of the YOLOv8 model; Among them, the backbone network of the improved YOLOv8 model includes: a Conv module layer, several RFCBAMConv module layers, several C2f module layers and an SPPF module layer.
3. The PCB surface defect detection method based on improved YOLOv8 according to claim 2, characterized in that: The process of image processing based on the backbone network of the improved YOLOv8 model includes: A PCB defect image with a spatial resolution of H×W and a channel number of 3 is input into the Conv module layer to obtain a first feature map; Input the first feature map into the first group of RFCBAMConv module layers and C2f module layers in sequence to obtain a second feature map; Input the second feature map into the second group of RFCBAMConv module layers and C2f module layers in sequence to obtain a third feature map; The third feature map is sequentially input into the third group of RFCBAMConv module layers and C2f module layers to obtain a fourth feature map; Input the fourth feature map into the fourth group of RFCBAMConv module layers and C2f module layers in sequence to obtain a fifth feature map; The fifth feature map is input into the SPPF module layer to obtain the sixth feature map.
4. The PCB surface defect detection method based on improved YOLOv8 according to claim 3 is characterized in that: The process of processing the feature map by the RFCBAMConv module layer includes: The receptive field attention weight is calculated based on the spatial position of the feature map of the input RFCBAMConv module layer to obtain the receptive field attention output, and the channel attention mechanism is performed on the feature map of the input RFCBAMConv module layer to obtain the channel attention map; Weighting the receptive field attention output to obtain a weighted receptive field attention feature map; Performing channel weighting on the channel attention map to obtain a weighted channel attention feature map; Performing a spatial attention mechanism calculation on the weighted channel attention feature map to obtain a spatial attention map; The RFCBAMConv module layer output is obtained based on the spatial attention map, the channel attention map and the weighted receptive field attention feature map.
5. The PCB surface defect detection method based on improved YOLOv8 according to claim 3, characterized in that: The process of constructing the improved YOLOv8 model includes introducing the ScConv module and the VoVGSCSPC module into the neck network of the YOLOv8 model; Wherein, the neck network of the improved YOLOv8 model includes: a first submodule, a second submodule, a third submodule and a fourth submodule; The first submodule includes an Upsample module layer, a Concat module layer and a VoVGSCSPC module layer; The second submodule includes: an Upsample module layer, a Concat module layer, a VoVGSCSPC module layer and a ScConv module layer; The third submodule includes: a Conv module layer, a Concat module layer, a VoVGSCSPC module layer and a ScConv module layer; The fourth submodule includes: a Conv module layer, a Concat module layer, a VoVGSCSPC module layer and a ScConv module layer.
6. The PCB surface defect detection method based on improved YOLOv8 according to claim 5, characterized in that: The process of the neck network of the improved YOLOv8 model receiving the output of the backbone network to perform image processing includes: Inputting the sixth feature map into the Upsample module layer of the first submodule to obtain a seventh feature map; Input the seventh feature map and the fourth feature map into the Concat module layer of the first submodule, and obtain an eighth feature map through the VoVGSCSPC module layer; The eighth feature map and the third feature map are processed by the second submodule to obtain a ninth feature map; The ninth feature map and the eighth feature map are processed by a third submodule to obtain a tenth feature map; The tenth feature map and the sixth feature map are coupled to obtain an eleventh feature map through a fourth submodule.
7. The PCB surface defect detection method based on improved YOLOv8 according to claim 6, characterized in that: The process of the ScConv module layer processing the input feature map includes: The feature map of the input ScConv module layer is subjected to spatial reconstruction unit calculation to obtain a spatially reconstructed feature map; The feature map of the input ScConv module layer is calculated by the channel reconstruction unit to obtain a channel reconstruction feature map; The output of the ScConv module layer is obtained based on the spatial reconstruction feature map and the channel reconstruction feature map.
8. The PCB surface defect detection method based on improved YOLOv8 according to claim 7, characterized in that: The process of the VoVGSCSPC module layer processing the input feature map includes: The feature map of the input VoVGSCSPC module layer is divided into a direct transfer feature map and a feature extraction feature map; Performing stacking processing of multiple layers of GSConv and GS bottleneck modules on the feature extraction feature map to obtain a feature map processed by the GS bottleneck module; The feature map processed by the GS bottleneck module and the direct transfer feature map are feature fused to obtain the output of the VoVGSCSPC module layer.
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