Automatic integrated circuit testing system and method based on TTL protocol

Abstract

The invention relates to an integrated circuit automatic testing system and method based on a TTL protocol, and relates to the technical field of integrated circuit testing. The system comprises an interface module, a power supply module, a to-be-tested chip connection module, a test selection module and a display module, the interface module is used for being connected to computer equipment based on a TTL protocol; the power module is used for supplying power; the to-be-tested chip connection module is used for configuring a to-be-tested chip; the test selection module is used for selecting a temperature test mode; the display module is used for displaying test results. Through connection between the interface module and the computer equipment, configuration of test requirements and setting of the corresponding to-be-tested chip connection module, the test selection module and the display module, the flexibility of the integrated circuit test is improved, and the test requirements of various integrated circuits are met.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit testing, and in particular to an integrated circuit automatic testing system and method based on a TTL protocol. Background Art

[0002] In FT (Final Test, finished product test), the common automated test equipment (ATE) test system usually has built-in communication with the sorting machine. During the test, you only need to develop the test program and run the test software to achieve communication with the sorting machine and perform automatic testing.

[0003] As the complexity of chips continues to increase, when performing some system-level tests, such as testing high-precision ADC chips or high-speed interface chips, it is necessary to build a test environment. At this time, the test board not only needs to control the chip, but also needs to communicate with the sorting machine for continuous automatic testing.

[0004] However, in the related art, the ATE test system cannot meet the demand, so the integrated circuit automated testing method and the system-level testing system method need to be further improved. Summary of the invention

[0005] The present invention relates to an integrated circuit automatic test system based on the TTL protocol, which can meet the needs of various integrated circuit tests. The technical solution is as follows:

[0006] On the one hand, an integrated circuit automatic test system based on the TTL protocol is provided, the system comprising an interface module, a power supply module, a chip connection module to be tested, a test selection module and a display module;

[0007] The chip connection module to be tested, the test selection module and the display module are connected to the interface module;

[0008] The power module is connected to the interface module, the chip to be tested connection module, the test selection module and the display module;

[0009] The interface module is used to connect to the computer device;

[0010] The power module is used for power supply;

[0011] The chip under test connection module is used to configure the chip under test;

[0012] The test selection module is used to select the temperature test mode;

[0013] The display module is used to display the test results.

[0014] In an alternative embodiment, the computer device is implemented as a sorting machine.

[0015] In an optional embodiment, the power supply module is implemented as a 12V DC power supply.

[0016] In an optional embodiment, the chip to be tested connection module is implemented as a TF card socket, and the chip to be tested is adapted to the TF card socket.

[0017] In an optional embodiment, the test selection module includes a selection dial module and a test button module;

[0018] The selection dial module is used to select the test environment of the chip to be tested;

[0019] The test button module is used to control the test process of the chip under test.

[0020] In an optional embodiment, the selection dial module is implemented as a dial assembly;

[0021] The test button module is implemented as a button array.

[0022] In an optional embodiment, the display module includes a status indication module and a result display module;

[0023] The status indication module is implemented as a signal light group;

[0024] The result display module is implemented as a liquid crystal display screen.

[0025] On the other hand, a TTL protocol-based integrated circuit automated testing method is provided, the method being applied to any of the TTL protocol-based integrated circuit automated testing systems shown above, the method comprising:

[0026] In response to the communication connection being established, sending a test instruction to the computer device through the interface module;

[0027] Receive the test results fed back by the computer equipment through the interface module;

[0028] The test results are displayed through the display module.

[0029] In an optional embodiment, the test selection module includes a selection dial module and a test button module;

[0030] The selection dial module is used to select the test environment of the chip to be tested;

[0031] The test button module is used to control the test process of the chip to be tested;

[0032] In response to the communication connection being established, sending a test instruction to the computer device through the interface module includes:

[0033] In response to the establishment of the communication connection, a test instruction is generated based on the selection dial module and the test button module;

[0034] Send test instructions to computer equipment.

[0035] In an optional embodiment, the display module includes a status indication module and a result display module;

[0036] The test results are displayed through the display module, including:

[0037] The test status is displayed through the status indication module, and the test result is displayed through the result display module.

[0038] The technical effects of various embodiments of the present invention include at least:

[0039] By connecting the interface module to the computer equipment and configuring the test requirements, the corresponding chip connection module to be tested, the test selection module and the display module are set, which improves the flexibility of integrated circuit testing and meets the needs of various integrated circuit testing. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0041] Figure 1 A schematic structural diagram of an integrated circuit automatic testing system based on the TTL protocol provided by an exemplary embodiment of the present invention is shown.

[0042] Figure 2 A schematic structural diagram of another integrated circuit automatic testing system based on the TTL protocol provided by an exemplary embodiment of the present invention is shown.

[0043] Figure 3 A schematic structural diagram of an implementation method based on a TTL communication interface provided by an exemplary embodiment of the present invention is shown.

[0044] Figure 4 A working timing diagram provided by an exemplary embodiment of the present invention is shown.

[0045] Figure 5 A schematic structural diagram of an integrated circuit automatic testing method based on the TTL protocol provided by an exemplary embodiment of the present invention is shown. DETAILED DESCRIPTION

[0046] To make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0047] Figure 1 FIG. 1 shows a schematic diagram of a structure of an integrated circuit automatic test system based on a TTL protocol provided by an exemplary embodiment of the present invention. Please refer to FIG. Figure 1 The system includes an interface module 110 , a power module 120 , a chip-to-be-tested connection module 130 , a test selection module 140 and a display module 150 .

[0048] The chip connection module to be tested, the test selection module and the display module are connected to the interface module, and the power module supplies power to the system.

[0049] In an embodiment of the present invention, the interface module is used to connect the system to a computer device. Optionally, in an embodiment of the present invention, the computer device is used for data processing and result generation functions during the test. In one example, the computer device is implemented as a sorting machine. The present invention does not limit the specific type of the sorting machine. In one example, the model of the sorting machine is JHT6040.

[0050] In the embodiment of the present invention, the power supply module is implemented as a module that provides power supply function to the system. Optionally, the power supply part of the power supply module is a 12V DC power supply.

[0051] In an embodiment of the present invention, the chip to be tested connection module is used to connect the chip to be tested, and the chip to be tested is an integrated circuit chip that needs to be tested. The present invention does not limit the specific implementation form of the chip to be tested. In an optional embodiment, the chip to be tested connection module is implemented as a TF card holder, and the chip to be tested is adapted to the TF card holder.

[0052] Next, please refer to Figure 2 In the embodiment of the present invention, the test selection module 140 includes a selection dial module 141 and a test button module 142; wherein the selection dial module is used to select the test environment of the chip to be tested; and the test button module is used to control the test process of the chip to be tested. In one example, the selection dial module is implemented as a dial component; and the test button module is implemented as a button array.

[0053] like Figure 2 As shown, in the embodiment of the present invention, the display module 150 includes a state indication module 151 and a result display module 152; optionally, the state indication module is implemented as a signal light group, and the result display module is implemented as a liquid crystal display screen.

[0054] It should be noted that, in the embodiment of the present invention, the interface module is connected to the computer device based on the TTL protocol, that is, connected to the sorting machine. Figure 3 A schematic structural diagram of an implementation method based on a TTL communication interface provided by an exemplary embodiment of the present invention is shown. Figure 4 A working timing diagram provided by an exemplary embodiment of the present invention is shown. Figure 3 to Figure 4 The combination shows the communication mode between the interface module and the computer device based on the TTL protocol in the embodiment of the present invention. In the embodiment of the present invention, the communication protocol of the TTL line includes the IEE-488 protocol.

[0055] In addition, in an embodiment of the present invention, a DIO pin definition table under a TTL communication protocol is also provided.

[0056] Table 1: DIO pin definition table

[0057]

[0058]

[0059] Figure 5 A schematic diagram of a TTL protocol-based integrated circuit automated testing method provided by an exemplary embodiment of the present invention is shown. The method is applied to Figure 1 or Figure 2 Taking the system shown in FIG. 1 as an example, the method includes:

[0060] Step 501, in response to the chip-to-be-tested connection module being connected to the chip-to-be-tested, a communication request is sent to a computer device through an interface module, where the communication request is used to establish a communication connection.

[0061] This process is the pre-communication connection process between the system and the computer device.

[0062] Step 502: In response to the communication connection being established, a test instruction is sent to the computer device through the interface module.

[0063] In an embodiment of the present invention, when the computer device is implemented as a sorting machine, after sending a test instruction, the sorting machine can take out the chip to be tested from the feed tray and place it into the chip to be tested connection module.

[0064] After the connection, the computer device feeds back the IP of the chip to be tested and a signal indicating that the test can start to the interface module. Optionally, the ID of the test chip includes ChipID.

[0065] Step 503: Receive the test result fed back by the computer device through the interface module.

[0066] Step 504: Display the test result via the display module.

[0067] In an embodiment of the present invention, when the computer device is implemented as a sorting machine, the sorting machine puts the chips into different unloading trays according to the results fed back by the test system, thereby completing the screening of good and bad chips.

[0068] In a specific example of the embodiment of the present invention, the testing step includes:

[0069] (1) Establishing a TTL communication connection with the sorting machine: In the embodiment of the present invention, a command may be sent to the sorting machine to achieve a communication connection with the sorting machine. Specifically, the sorting machine may be a Jinhaitong JHT6040 sorting machine.

[0070] (2) The tester sends a test information reading instruction to the sorter; specifically, sends an ID information reading instruction of the chip to be tested and a test start instruction to the sorter. The instruction sent by the test system to the sorter is as follows:

[0071] "FR?" is used to query the running status of the sorting machine. If the sorting machine responds with "FR1", it means that the machine is in running status; if it responds with "FR0", it means that the machine is in stopping status. "FULLSITES?" is used to query the status of the chip to be tested. "BINON: xxxxxxx, xxxxxxxx, xxxxxxxx, xxxxxxxx;" is the test system sending the test result in response to the test request of the test sorting machine. "x" stores the test result of each test bit, and the valid data is "1"-"F". Each test bit corresponds to a character. If there is no chip to be tested, the data of this bit is "0". "ECHOOK" / "ECHONG" is to respond to the test result fed back by the sorting machine. If the test result fed back is consistent with the test result sent by the test system, the test system sends the "ECHOOK" command to the sorting machine for confirmation, otherwise it sends "ECHONG" and then re-issues the "BINON:" result command.

[0072] (3) The test machine receives the test information fed back by the sorting machine and sends the test information to the test board, and the test board is used to test the chip to be tested according to the test information and obtain the test result. The instruction sent by the sorting machine to the test system is as follows:

[0073] "Fullsites xxxxxxxx" is the information of the chip to be tested. Among them, "xxxxxxxx" is an 8-digit hexadecimal number. A 1 on the bit indicates that the corresponding test position of the bit has a chip to be tested, and a 0 on the bit indicates that the corresponding test station has no device. If there are devices on all 4 test positions, the sorter sends "Fullsites0000000F"; if there are devices on test stations 2 and 3, "Fullsites 00000006" is sent. "ECHO:xxxxxxxx,xxxxxxxx,xxxxxxxx,xxxxxxxx,xxxxxxxx;" is the Binning instruction fed back by the sorter. Among them, the sorter receives the test result "BINON:" sent by the test system, and then sends the data response after the received "BINON:" back to the test system for confirmation. For example: the sorting machine receives “BINON:00000000,00000000,00000000,000000012;”, if the test result of test station 1 is Bin2, and the test result of test station 2 is Bin1, the sorting machine will feedback “ECHO:000000000,00000000,00000000,00000012;”.

[0074] (4) The test machine receives the test result fed back by the sorting machine, and sends the test result to the sorting machine, and the sorting machine can classify the bin number according to the test result. It should be noted that in the embodiment of the present invention, the bin number is used to distinguish whether the test result of the chip to be tested is qualified or failed, and whether the test is qualified or good.

[0075] To sum up, the system and method provided by the embodiments of the present invention are connected to the computer device through the interface module, and configure the test requirements, set the corresponding chip connection module to be tested, the test selection module and the display module, thereby improving the flexibility of integrated circuit testing and meeting the needs of various integrated circuit testing.

[0076] The above are only optional embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. An integrated circuit automatic test system based on TTL protocol, characterized in that: The system includes an interface module, a power module, a chip-to-be-tested connection module, a test selection module, and a display module; The chip-to-be-tested connection module, the test selection module, and the display module are connected to the interface module; The power supply module is connected to the interface module, the chip under test connection module, the test selection module and the display module; The interface module is used to connect to the computer device based on the TTL protocol; The power module is used for supplying power; The chip-to-be-tested connection module is used to configure the chip to be tested; The test selection module is used to select a temperature test mode; The display module is used to display the test results.

2. The TTL protocol-based integrated circuit automatic test system according to claim 1, characterized in that: The computer device is implemented as a sorting machine.

3. The TTL protocol-based integrated circuit automatic test system according to claim 1, characterized in that: The power supply module is implemented as a 12V DC power supply.

4. The TTL protocol-based integrated circuit automatic test system according to claim 1, characterized in that: The chip to be tested connection module is implemented as a TF card socket, and the chip to be tested is adapted to the TF card socket.

5. The TTL protocol-based integrated circuit automatic test system according to claim 1. Its characteristic is that: The test selection module includes a selection dial module and a test button module; The selection dial module is used to select the test environment of the chip to be tested; The test button module is used to control the test process of the chip to be tested.

6. The TTL protocol-based integrated circuit automatic test system according to claim 5, characterized in that: The type selection dial module is implemented as a dial assembly; The test button module is implemented as a button array.

7. The TTL protocol-based integrated circuit automatic test system according to claim 1, characterized in that: The display module includes a status indication module and a result display module; The state indication module is implemented as a signal light group; The result display module is implemented as a liquid crystal display screen.

8. An integrated circuit automatic testing method based on TTL protocol, characterized in that: The method is applied to the system according to any one of claims 1 to 7, and the method comprises: In response to the chip-to-be-tested connection module being connected to the chip-to-be-tested, sending a communication request to the computer device through the interface module, wherein the communication request is used to establish a communication connection; In response to the communication connection being established, sending a test instruction to the computer device through the interface module; Receive the test result fed back by the computer device through the interface module; The test result is displayed by the display module.

9. The TTL protocol-based integrated circuit automated testing method according to claim 8, characterized in that: The test selection module includes a selection dial module and a test button module; The selection dial module is used to select the test environment of the chip to be tested; The test button module is used to control the test process of the chip to be tested; In response to the communication connection being established, sending a test instruction to the computer device through the interface module comprises: In response to the establishment of the communication connection, generating the test instruction based on the selection dial module and the test button module; The test instruction is sent to the computer device.

10. The TTL protocol-based integrated circuit automated testing method according to claim 8, characterized in that: The display module includes a status indication module and a result display module; The displaying of the test result by the display module includes: The test status is displayed by the status indication module, and the test result is displayed by the result display module.

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