Low-power-consumption reference circuit

Abstract

The invention relates to a low-power-consumption reference circuit which is characterized in that a band-gap reference circuit and a sampling holding circuit are periodically controlled, the band-gap reference circuit is firstly controlled to quit a working state, connection between the sampling holding circuit and the band-gap reference circuit is cut off, and the sampling holding circuit is kept working; the band-gap reference circuit is connected with the sampling holding circuit, then the working state of the band-gap reference circuit and the connection between the sampling holding circuit and the band-gap reference circuit are recovered after the first time length is reached, the second time length is maintained, then the control of the next period is carried out, and the band-gap reference circuit only works for a period of time in one period, so that the overall power consumption of the circuit is greatly reduced; and the first duration and the second duration are reasonably set, so that the continuous output of the sampling holding circuit to the reference voltage can be ensured, and the requirements of low circuit power consumption and normal reference voltage supply in the standby mode are met.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a low power consumption reference circuit. Background Art

[0002] Bandgap reference circuits basically use transistor devices. In order to make the transistor devices work in the best electrical parameter characteristic range, the transistor needs to be maintained in a certain current operating range, which limits the lower limit of the power consumption of the bandgap reference circuit.

[0003] With the development of integrated circuits, the power consumption is required to be lower and lower, and even the power consumption of the entire system is required to be less than 1 microampere in standby mode. If the bandgap reference voltage is required to be provided normally in standby mode, the original bandgap reference circuit can hardly meet the design requirements. Summary of the invention

[0004] The present application provides a low-power bandgap reference circuit, which can normally provide a bandgap reference voltage even in a standby mode.

[0005] A low power consumption reference circuit, comprising:

[0006] A bandgap reference circuit, used for generating a reference voltage in an operating state;

[0007] A sampling and holding circuit, connected to the bandgap reference circuit, for receiving the reference voltage and holding and outputting the reference voltage;

[0008] A control circuit is connected to the bandgap reference circuit and the sample-and-hold circuit respectively, and is used for output control in each cycle:

[0009] Controlling the bandgap reference circuit to exit the working state, and disconnecting the connection between the sampling and holding circuit and the bandgap reference circuit;

[0010] When the duration of the bandgap reference circuit exiting the working state reaches a first duration, controlling the bandgap reference circuit to resume the working state, and when the bandgap reference circuit completes generating the reference voltage, restoring the connection between the sampling and holding circuit and the bandgap reference circuit;

[0011] The bandgap reference circuit is maintained in the working state, and after the bandgap reference circuit and the sample-and-hold circuit remain connected for a second time period, the output control of the next cycle is entered.

[0012] In one embodiment, the low power consumption reference circuit further includes a delay circuit, the delay circuit includes a first delay unit, and the control circuit is further connected to the first delay unit; the control circuit is further used for:

[0013] After controlling the bandgap reference circuit to exit the working state, starting the first delay unit, and controlling the first delay unit to output a first delay arrival signal after delaying for the first time length;

[0014] When the first delayed arrival signal is received, the bandgap reference circuit is controlled to restore the working state.

[0015] In one embodiment, the control circuit is further configured to turn off the first delay unit after receiving the first delay arrival signal.

[0016] In one embodiment, the delay circuit further includes a second delay unit; and the control circuit is further configured to:

[0017] When the bandgap reference circuit is in the working state and the sampling and holding circuit is in a connected state with the bandgap reference circuit, the second delay unit is started, and the second delay unit is controlled to output a second delay arrival signal after delaying for the second time length;

[0018] When the second delayed arrival signal is received, the output control of the next cycle is entered.

[0019] In one embodiment, the control circuit is further configured to turn off the second delay unit after receiving the second delay arrival signal.

[0020] In one embodiment, the low power consumption reference circuit further includes:

[0021] A buffer is connected to the sample-and-hold circuit and is used for buffering and outputting the reference voltage.

[0022] In one embodiment, the low power consumption reference circuit further includes:

[0023] A detection circuit, connected to the buffer and the control circuit respectively, for detecting the output reference voltage to obtain a detection result;

[0024] The control circuit is further configured to determine whether the reference voltage has reached a stable state according to the detection result, and start executing the output control of each cycle if it is determined that the reference voltage has reached the stable state.

[0025] In one embodiment, if the detection result is that the reference voltage reaches the target voltage, it is determined that the output reference voltage reaches the stable state.

[0026] In one embodiment, the control circuit is further configured to start the bandgap reference circuit, the sample-and-hold circuit, the buffer and the detection circuit according to a standby working signal.

[0027] In one embodiment, the bandgap reference circuit is further configured to output a reference establishment completion signal when the generation of the reference voltage is completed;

[0028] The control circuit is further configured to restore the connection between the bandgap reference circuit and the sample-and-hold circuit upon receiving the reference establishment completion signal.

[0029] In the above, by periodically controlling the bandgap reference circuit and the sampling and holding circuit, the bandgap reference circuit is first controlled to exit the working state, and the connection between the sampling and holding circuit and the bandgap reference circuit is disconnected, the sampling and holding circuit is kept working, and then the working state of the bandgap reference circuit and the connection between the sampling and holding circuit and the bandgap reference circuit are restored after the first time length is reached, and the second time length is maintained before the next cycle of control is performed. Since the bandgap reference circuit only works for a period of time in a cycle, the overall power consumption of the circuit is greatly reduced, and by reasonably setting the first time length and the second time length, the continuous output of the reference voltage by the sampling and holding circuit can be guaranteed, thereby meeting the requirements of low circuit power consumption in standby mode and being able to provide the reference voltage normally. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A structural block diagram of a low power consumption reference circuit according to an embodiment of the present application;

[0031] Figure 2 A structural block diagram of a low power consumption reference circuit according to another embodiment of the present application;

[0032] Figure 3 A structural block diagram of a low power consumption reference circuit according to another embodiment of the present application;

[0033] Figure 4 A structural block diagram of a low power consumption reference circuit according to another embodiment of the present application;

[0034] Figure 5 This is a structural block diagram of a low power consumption reference circuit according to another embodiment of the present application. DETAILED DESCRIPTION

[0035] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0036] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0037] It should be noted that all directional indications in the embodiments of the present application (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly. The connection can be a direct connection or an indirect connection.

[0038] In addition, in this application, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in this field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0039] The embodiment of the present invention provides a low power consumption reference circuit, such as Figure 1 As shown, the low power consumption reference circuit includes a bandgap reference circuit 110, a sampling and holding circuit 120 and a control circuit 130; wherein the bandgap reference circuit 110 is used to generate a reference voltage in a working state; the sampling and holding circuit 120 is connected to the bandgap reference circuit 110, and is used to receive the reference voltage and hold and output the reference voltage; the control circuit 130 is connected to the bandgap reference circuit 110 and the sampling and holding circuit 120 respectively, and is used in the output control of each cycle: controlling the bandgap reference circuit 110 to exit the working state and disconnecting the connection between the sampling and holding circuit 120 and the bandgap reference circuit 110; when the duration of the bandgap reference circuit 110 exiting the working state reaches a first duration, controlling the bandgap reference circuit 110 to resume the working state, and when the bandgap reference circuit 110 completes generating the reference voltage, restoring the connection between the sampling and holding circuit 120 and the bandgap reference circuit 110; maintaining the bandgap reference circuit 110 in a working state, and after the bandgap reference circuit 110 and the sampling and holding circuit 120 remain connected for a second duration, entering the output control of the next cycle.

[0040] It can be understood that the bandgap reference circuit 110 and the sample-and-hold circuit 120 can be started or stopped by the control circuit 130. Initially, under the control of the control circuit 130, the bandgap reference circuit 110 and the sample-and-hold circuit 120 both enter the working state, so that the bandgap reference circuit 110 generates a reference voltage and outputs it to the sample-and-hold circuit 120, so that the sample-and-hold circuit 120 samples and holds the output.

[0041] Furthermore, the controller performs periodic output control. In the first round of control, the control circuit 130 first controls the bandgap reference circuit 110 to exit the working state, and disconnects the connection between the sampling and holding circuit 120 and the bandgap reference circuit 110, so that the sampling and holding circuit 120 will not be affected by the output of the bandgap reference circuit 110. Since the sampling and holding circuit 120 has the ability to maintain the output for a period of time after stopping receiving the input signal, the sampling and holding circuit 120 can still maintain the normal output reference voltage at this time, thereby ensuring the normal output of the reference circuit; then, when the bandgap reference circuit 110 exits the working state for a period of time, the sampling and holding circuit 120 is disconnected from the working state. When the duration reaches the first duration, the bandgap reference circuit 110 is controlled to resume working. Since it takes a certain amount of time to generate the required reference voltage when the bandgap reference circuit 110 just resumes working, when the bandgap reference circuit 110 completes generating the reference voltage, the connection between the sampling and holding circuit 120 and the bandgap reference circuit 110 is restored, so that the sampling and holding circuit 120 continues to sample the reference voltage and maintain the output. The first duration may not exceed the longest duration for which the sampling and holding circuit 120 maintains the normal output reference voltage after being disconnected from the bandgap reference circuit 110, thereby ensuring uninterrupted output of the reference circuit.

[0042] Subsequently, the bandgap reference circuit 110 is restored to the working state, and the bandgap reference circuit 110 and the sampling and holding circuit 120 remain connected. After maintaining this state for a second time period, the control of this cycle is completed, and then the control of the next cycle begins, that is, it starts to return to controlling the bandgap reference circuit 110 to exit the working state, and disconnects the connection between the sampling and holding circuit 120 and the bandgap reference circuit 110 until the control of the next cycle is completed; wherein, the second time period may not be less than the shortest time period for the sampling and holding circuit 120 to complete the sampling and holding of the bandgap reference circuit 110, so as to ensure that when the output control of the next cycle starts, even if the bandgap reference circuit 110 exits the working state, the sampling and holding circuit 120 can still achieve the maintained output of the reference voltage.

[0043] In this way, by periodically controlling the bandgap reference circuit 110 and the sampling and holding circuit 120, the bandgap reference circuit 110 is first controlled to exit the working state, and the connection between the sampling and holding circuit 120 and the bandgap reference circuit 110 is disconnected, and the sampling and holding circuit 120 is kept working. Then, after reaching the first time length, the working state of the bandgap reference circuit 110 and the connection between the sampling and holding circuit 120 and the bandgap reference circuit 110 are restored, and the second time length is maintained, and then the next cycle control is performed. Since the bandgap reference circuit 110 only works for a period of time in a cycle, the overall power consumption of the circuit is greatly reduced, and by reasonably setting the first time length and the second time length, the continuous output of the reference voltage by the sampling and holding circuit 120 can be guaranteed, which meets the requirements of low circuit power consumption in standby mode and being able to provide the reference voltage normally.

[0044] In one embodiment, the low power consumption reference circuit further includes a delay circuit 140, such as Figure 2 As shown, the delay circuit 140 includes a first delay unit 141, and the control circuit 130 is also connected to the first delay unit 141; the control circuit 130 is also used to: after controlling the bandgap reference circuit 110 to exit the working state, start the first delay unit 141, and control the first delay unit 141 to output a first delay arrival signal after delaying for a first time length; when receiving the first delay arrival signal, control the bandgap reference circuit 110 to resume the working state.

[0045] It can be understood that the first delay unit 141 can be used to perform timing control of the first duration; specifically, the control circuit 130 can start the first delay unit 141 when controlling the bandgap reference circuit 110 to exit the working state, and control the first delay unit 141 to output the first delay arrival signal after reaching the first duration from the current moment, thereby instructing the control circuit 130 to control the bandgap reference circuit 110 to resume the working state, thereby realizing the control of the duration of the bandgap reference circuit 110 exiting the working state, and the structure is simple and easy to implement.

[0046] In the initial state, the first delay unit 141 is in a closed state. When the control circuit 130 controls the bandgap reference circuit 110 to exit the working state, the first delay unit 141 is turned on again. This can avoid the first delay unit 141 consuming power in an idle state, thereby reducing the overall power consumption of the circuit.

[0047] In one embodiment, the control circuit 130 is further configured to turn off the first delay unit 141 after receiving the first delay arrival signal.

[0048] It can be understood that after the control circuit 130 receives the first delay arrival signal, the first delay unit 141 has completed the timing control function of the first duration. In order to reduce the overall energy consumption of the circuit, the first delay unit 141 can be turned off and turned on again when it is used next time.

[0049] In one embodiment, the delay circuit 140 further includes a second delay unit 142, referring to Figure 2 As shown; the control circuit 130 is also used for: when the bandgap reference circuit 110 is in working state and the sampling and holding circuit 120 is connected to the bandgap reference circuit 110, starting the second delay unit 142, and controlling the second delay unit 142 to output a second delay arrival signal after delaying for a second time length; when the second delay arrival signal is received, entering the output control of the next cycle.

[0050] It can be understood that the second delay unit 142 can be used to perform timing control for the second duration; specifically, the control circuit 130 can start the second delay unit 142 after controlling the bandgap reference circuit 110 to resume working status and the sampling and holding circuit 120 is connected to the bandgap reference circuit 110 to resume connection, and control the second delay unit 142 to output a second delay arrival signal from the current moment after reaching the second duration, thereby entering the output control of the next cycle, thereby achieving control of the duration for which the bandgap reference circuit 110 remains in working status, with a simple structure and easy implementation.

[0051] In one embodiment, the control circuit 130 is further configured to turn off the second delay unit 142 after receiving the second delay arrival signal.

[0052] It can be understood that after the control circuit 130 receives the second delay arrival signal, the second delay unit 142 has completed the timing control function of the second duration. In order to reduce the overall energy consumption of the circuit, the second delay unit 142 can be turned off and turned on again when it is used next time.

[0053] In one embodiment, Figure 3 As shown, the low power consumption reference circuit further includes a buffer 150 , which is connected to the sample and hold circuit 120 and is used to buffer and output the reference voltage.

[0054] It can be understood that the buffer 150 can be an isolated drive output circuit with extremely low power consumption composed of an operational amplifier, which is used to receive the reference voltage in the sample and hold circuit 120 and finally output the reference voltage to the outside of the module. Using the buffer 150 for isolation buffering can ensure stable and accurate transmission of the reference voltage. In some embodiments, the control circuit 130 is also connected to the buffer 150 (refer to Figure 5 ), which is used to control the opening and closing of the buffer 150.

[0055] In one embodiment, the low power reference circuit further includes a detection circuit 160, such as Figure 4As shown, the detection circuit 160 is respectively connected to the buffer 150 and the control circuit 130, and is used to detect the output reference voltage and obtain the detection result; the control circuit 130 is also used to determine whether the reference voltage has reached a stable state based on the detection result. If it is determined that the reference voltage has reached a stable state, each round of output control is started.

[0056] It can be understood that before performing periodic control, the detection circuit 160 can be used to detect the output of the buffer 150 to ensure that the reference voltage output has reached a stable state before executing the output control. In this way, when the bandgap reference circuit 110 exits the working state, the sampling and holding circuit 120 can still output a stable reference voltage, so that the reference voltage output by the circuit during the output control process always meets the requirements.

[0057] The detection result may be used to characterize whether the reference voltage has reached a stable state, and may be, for example, the relationship between the voltage variation amplitude of the reference voltage within a period of time and the amplitude threshold.

[0058] In one embodiment, if the detection result is that the reference voltage reaches the target voltage, it is determined that the output reference voltage reaches a stable state.

[0059] It can be understood that the bandgap reference circuit 110 is in an unstable state when it is just started, and the reference voltage it outputs will not reach the target voltage immediately. Therefore, whether the bandgap reference circuit 110 is in a stable state can be determined by detecting whether the final output reference voltage reaches the target voltage. This method is simple and effective.

[0060] In one embodiment, the control circuit 130 is further configured to start the bandgap reference circuit 110 , the sample and hold circuit 120 , the buffer 150 and the detection circuit 160 according to the standby working signal S1 .

[0061] It can be understood that the control circuit 130 controls the working state of the bandgap reference circuit 110, the sampling and holding circuit 120, the buffer 150 and the detection circuit 160; the bandgap reference circuit 110, the sampling and holding circuit 120, the buffer 150 and the detection circuit 160 are in the off state by default. After receiving the standby working signal S1, the control circuit 130 starts the bandgap reference circuit 110, the sampling and holding circuit 120, the buffer 150 and the detection circuit 160 respectively, so that the bandgap reference circuit 110 outputs a reference voltage, and outputs it through the sampling and holding circuit 120 and the buffer 150. At the same time, the detection circuit 160 is used to detect the stable state of the output reference voltage, and then when the reference voltage reaches a stable state, the output control of each cycle is executed.

[0062] Among them, the standby working signal S1 can be controlled manually, so that the continuous output of the reference voltage can be achieved through one-key control of the low-power reference circuit, which is convenient to use and highly efficient.

[0063] In one embodiment, the control circuit 130 is further configured to stop executing output control according to the work enable signal S2 , and control the bandgap reference circuit 110 to be in a working state, and the sample and hold circuit 120 maintains the connection with the bandgap reference circuit 110 .

[0064] It can be understood that the low power consumption reference circuit can have a standby working mode and a normal working mode. When the working enable signal S2 is input to the digital control circuit 130, as shown in FIG. Figure 5 As shown, when the standby working signal S1 is input to the control circuit 130, it is in the standby working mode, and at this time it works in the low power consumption mode described above, that is, the control circuit 130 performs output control. When the standby working mode inputs the working enable signal S2, the control circuit 130 controls the bandgap reference circuit 110 to be fixed in the working state, the sampling and holding circuit 120 to be fixed in the sampling input working state (that is, to keep receiving the output signal of the bandgap reference circuit 110), and the buffer 150 works normally. In this way, by adding the normal working mode, the circuit can play a better performance.

[0065] Another embodiment of the present invention further provides a low power consumption reference circuit, referring to Figure 5 As shown, the low power consumption reference circuit includes a bandgap reference circuit 110, a sampling and holding circuit 120, a control circuit 130, a buffer 150, a detection circuit 160 and a delay circuit 140, wherein the delay circuit 140 includes a first delay unit 141 and a second delay unit 142; firstly, the control circuit 130 starts the bandgap reference circuit 110, the sampling and holding circuit 120, the buffer 150 and the detection circuit 160 according to the standby working signal S1, and the bandgap reference circuit 110 generates a reference voltage in the working state, which is then held and output by the sampling and holding circuit 120, and finally buffered and output by the buffer 150; during this period, the detection circuit 160 detects the reference voltage output by the buffer 150 to obtain a detection result. If the detection result is that the reference voltage reaches the target voltage, it is determined that the output reference voltage reaches a stable state, and at this time, the control circuit 130 starts to execute the output control of each cycle.

[0066] In the output control of each cycle: the control circuit 130 controls the bandgap reference circuit 110 to exit the working state, and disconnects the connection between the sampling and holding circuit 120 and the bandgap reference circuit 110, and starts the first delay unit 141 at the same time, and controls the first delay unit 141 to output a first delay arrival signal after delaying for a first time length. When receiving the first delay arrival signal, the control circuit 130 controls the bandgap reference circuit 110 to resume the working state, and at the same time turns off the first delay unit 141, and when receiving the reference establishment completion signal output by the bandgap reference circuit 110, restores the connection between the sampling and holding circuit 120 and the bandgap reference circuit 110, and when the bandgap reference circuit 110 is in the working state and the sampling and holding circuit 120 and the bandgap reference circuit 110 remain connected, starts the second delay unit 142, and controls the second delay unit 142 to output a second delay arrival signal after delaying for a second time length. When the control circuit 130 receives the second delay arrival signal, it turns off the second delay unit 142, and enters the output control of the next cycle.

[0067] The working process of the low power reference circuit is described in detail below. The working process of the low power reference circuit may include a startup phase and a cycle working phase, as follows:

[0068] 1. Start-up phase

[0069] The standby operation signal S1 is input to the control circuit 130, and the control circuit 130 controls the start-up of the bandgap reference circuit 110, the sampling and holding circuit 120, the buffer 150 and the detection circuit 160. At this time, the buffer 150 has not yet output a stable bandgap reference voltage, so the bandgap reference circuit 110, the sampling and holding circuit 120, the buffer 150 and the detection circuit 160 are all fixed in the working state, and the sampling and holding circuit 120 is in a connected state with the bandgap reference circuit 110, and works in the sampling input state. The delay circuit 140 is in a standby non-working state.

[0070] 2. Cycle work phase

[0071] When the detection circuit 160 detects that the output voltage of the buffer 150 reaches above the threshold, it feeds back the BUFOK signal to the control circuit 130, indicating that the bandgap reference voltage output by the buffer 150 has stabilized. After the control circuit 130 receives the valid BUFOK signal, it starts the following output control work, wherein the detection circuit 160 can be turned off after the control circuit 130 receives the BUFOK signal. At the beginning of the cycle, the control circuit 130 outputs an instruction to let the sampling and holding circuit 120 work in the holding state, and turns off the bandgap reference circuit 110, and starts the T1 time delay circuit 140 for delay; wherein when the sampling and holding circuit 120 works in the holding state, the sampling and holding circuit 120 is disconnected from the bandgap reference circuit 110, that is, the reception of the output of the bandgap reference circuit 110 is disconnected. In this stage, only the buffer 150 and the T1 time delay circuit 140 consume current. When the T1 time is reached, the T1 delay time arrival instruction is output to the control circuit 130. After receiving the T1 delay time arrival instruction, the control circuit 130 outputs the bandgap reference circuit 110 enable signal to start the bandgap reference circuit 110 and turns off the T1 delay time circuit. After the bandgap reference circuit 110 is established, it outputs the BANDGAPOK valid signal to the control circuit 130. After receiving the BANDGAPOK valid signal, the control circuit 130 controls the sampling and holding circuit 120 to be in the sampling working state, and then starts the T2 time delay to the delay circuit 140; wherein in the sampling working state, the sampling and holding circuit 120 is connected to the bandgap reference circuit 110, that is, receives the output of the bandgap reference circuit 110. When the T2 time delay arrives, the delay circuit 140 outputs the T2 time delay arrival signal to the control circuit 130. After the control circuit 130 receives the T2 time delay arrival instruction signal, the cycle ends and a new cycle begins. The control circuit 130 outputs an instruction to let the sampling and holding circuit 120 work in the holding working state, and then turns off the bandgap reference circuit 110, and starts the T1 time delay circuit for delay at the same time.

[0072] During normal operation, the control circuit 130 and the sample-and-hold circuit 120 do not consume current. The above periodic operation process can be divided into two stages, namely, the T1 stage and the T2 stage. The modules that work and consume current in the T1 stage include the buffer 150 and the T1 time delay circuit in the delay circuit 140. The modules that work and consume current in the T2 stage include the bandgap reference circuit 110, the buffer 150, and the T2 time delay circuit in the delay circuit 140. Assume:

[0073] Ivr: current consumed by the bandgap reference circuit 110 during operation;

[0074] Ibuf: current consumed by the buffer 150 during operation;

[0075] It1: The current consumed by the delay circuit during the T1 time delay;

[0076] It2: The current consumed by the delay circuit during the T2 time delay;

[0077] The average current consumed by the circuit during normal operation is:

[0078] Iav=T1*(Ibuf+It1) / (T1+T2)+T2*(Ivr+Ibuf+It2) / (T1+T2)

[0079] Both It1 and It2 currents can be made very small, but Ivr current cannot be made too small. When the average current Iav is to be relatively small, a relatively small Ibuf current can be designed. At the same time, T1 can be designed to be much larger than T2, so that a relatively small Iav current can be obtained. The value of Iav is calculated using one of the designed parameters below.

[0080] If T1 is designed to be 4mS, T2 to be 20uS, Ivr to be 5uA, Ibuf to be 0.175uA, It1 and It2 to be 0.05uA respectively, then the average current Iav=0.25uA can be calculated.

[0081] Therefore, the current consumed by the entire bandgap reference circuit 110 is only 0.25uA, which makes it possible to design a system with a standby power consumption of less than 1uA when the bandgap reference circuit 110 is working.

[0082] The above description is only a preferred embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A low power consumption reference circuit, characterized in that: include: A bandgap reference circuit, used for generating a reference voltage in an operating state; A sampling and holding circuit, connected to the bandgap reference circuit, for receiving the reference voltage and holding and outputting the reference voltage; A control circuit is connected to the bandgap reference circuit and the sample-and-hold circuit respectively, and is used for output control in each cycle: Controlling the bandgap reference circuit to exit the working state, and disconnecting the connection between the sampling and holding circuit and the bandgap reference circuit; When the duration of the bandgap reference circuit exiting the working state reaches a first duration, controlling the bandgap reference circuit to resume the working state, and when the bandgap reference circuit completes generating the reference voltage, restoring the connection between the sampling and holding circuit and the bandgap reference circuit; The bandgap reference circuit is maintained in the working state, and after the bandgap reference circuit and the sample-and-hold circuit remain connected for a second time period, the output control of the next cycle is entered.

2. The low power consumption reference circuit according to claim 1, characterized in that: The low power consumption reference circuit further comprises a delay circuit, the delay circuit comprises a first delay unit, and the control circuit is further connected to the first delay unit; the control circuit is further used for: After controlling the bandgap reference circuit to exit the working state, starting the first delay unit, and controlling the first delay unit to output a first delay arrival signal after delaying for the first time length; When the first delayed arrival signal is received, the bandgap reference circuit is controlled to restore the working state.

3. The low power consumption reference circuit according to claim 2, characterized in that: The control circuit is further configured to close the first delay unit after receiving the first delay arrival signal.

4. The low power consumption reference circuit according to claim 2, characterized in that: The delay circuit further includes a second delay unit; and the control circuit is further used for: When the bandgap reference circuit is in the working state and the sampling and holding circuit is in a connected state with the bandgap reference circuit, the second delay unit is started, and the second delay unit is controlled to output a second delay arrival signal after delaying for the second time length; When the second delayed arrival signal is received, the output control of the next cycle is entered.

5. The low power consumption reference circuit according to claim 4, characterized in that: The control circuit is further configured to close the second delay unit after receiving the second delay arrival signal.

6. The low power consumption reference circuit according to claim 1, characterized in that: The low power consumption reference circuit also includes: A buffer is connected to the sample-and-hold circuit and is used for buffering and outputting the reference voltage.

7. The low power consumption reference circuit according to claim 6, characterized in that: The low power consumption reference circuit also includes: A detection circuit, connected to the buffer and the control circuit respectively, for detecting the output reference voltage to obtain a detection result; The control circuit is further configured to determine whether the reference voltage has reached a stable state according to the detection result, and start executing the output control of each cycle if it is determined that the reference voltage has reached the stable state.

8. The low power consumption reference circuit according to claim 7, characterized in that: If the detection result is that the reference voltage reaches the target voltage, it is determined that the output reference voltage reaches the stable state.

9. The low power consumption reference circuit according to claim 7, characterized in that: The control circuit is also used to start the bandgap reference circuit, the sample and hold circuit, the buffer and the detection circuit according to a standby working signal.

10. The low power consumption reference circuit according to claim 1, characterized in that: The bandgap reference circuit is also used to output a reference establishment completion signal when the generation of the reference voltage is completed; The control circuit is further configured to restore the connection between the bandgap reference circuit and the sample-and-hold circuit upon receiving the reference establishment completion signal.

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