Bus communication card and test system

Abstract

The invention discloses a bus communication card and a test system, the bus communication card comprises a first interface, a second interface, a communication circuit, a sampling circuit, a decoding circuit and a storage circuit, the communication circuit is used for receiving a waveform output by a tested computer through the first interface and decoding the waveform to obtain first decoding data, and the sampling circuit is used for sampling the first decoding data; outputting the first decoded data through a second interface; the sampling circuit is used for collecting a waveform output by the tested computer through the first interface and sending the waveform to the storage circuit; the decoding circuit is used for decoding the waveform acquired by the sampling circuit to obtain second decoding data and sending the second decoding data to the storage circuit; and the storage circuit is used for storing the waveform and the second decoding data. The data output by the communication circuit is obtained through the test computer, whether a fault occurs in the communication process is judged, and when the fault occurs in the communication process is judged based on the waveform obtained by the test computer.

Description

Technical Field

[0001] The present invention relates to the technical field of bus communication cards, and more specifically, to a bus communication card and a test system. Background Art

[0002] In the process of testing products with bus communication, it is necessary to design a communication card in the test system, which can communicate with the product under test, send data to the product under test according to the agreed communication protocol, receive and parse the data sent back by the product under test, and analyze whether it is consistent with the design content. If it is inconsistent, it will be checked. In the current communication card design, there is only the functional circuit of bus communication transmission and reception. When a problem occurs, it is often necessary to add an adapter box and an external oscilloscope to the cable, capture the waveform on the cable, and manually compare the amplitude and pulse width with the oscilloscope display, which is time-consuming and labor-intensive. In addition, the occurrence of faults is accidental. When reproducing the fault, in order to capture the fault waveform, it is often necessary to repeat dozens or hundreds of times, which is time-consuming and labor-intensive, and the efficiency of fault finding is low. Summary of the invention

[0003] The present invention provides a bus communication card and a test system to solve at least one of the problems existing in the prior art.

[0004] In order to achieve the above object, the present invention adopts the following technical solutions:

[0005] A first aspect of the present invention provides a bus communication card, the bus communication card comprising a first interface, a second interface, a communication circuit, a sampling circuit, a decoding circuit and a storage circuit, wherein:

[0006] The communication circuit is used to receive the waveform output by the computer under test through the first interface and decode the waveform to obtain first decoded data, and output the first decoded data through the second interface;

[0007] The sampling circuit is used to collect the waveform output by the computer under test through the first interface and send the waveform to the storage circuit;

[0008] The decoding circuit is used to decode the waveform collected by the sampling circuit to obtain second decoded data, and send the second decoded data to the storage circuit;

[0009] The storage circuit is used to store the waveform and the second decoded data.

[0010] Optionally, the first decoded data is hexadecimal data, and / or the second decoded data is hexadecimal data.

[0011] A second aspect of the present invention provides a test system, the test system comprising a test computer and the above-mentioned bus communication card,

[0012] The test computer is used to obtain the first decoded data and the waveform and second decoded data stored in the storage circuit;

[0013] The test computer is also used to obtain waveform data output by the computer under test;

[0014] The test computer is also used to compare the acquired waveform data with the first decoded data or the second decoded data, and display the comparison result as the test result in the first interface.

[0015] Optionally, the first interface includes a first display area, and the test computer is used to read the waveform from the storage circuit and display it in the first display area.

[0016] Optionally, the first interface further includes a second display area, and the test computer is used to display the acquired waveform data in the second display area.

[0017] Optionally, the first interface further includes a third display area, and the test computer is used to display the first decoded data in the third display area, or read the second decoded data in the storage circuit and display it in the third display area.

[0018] Optionally, the first interface further includes a fourth display area, and the fourth display area is used to display the test results.

[0019] Optionally, the fourth display area is also used to display a test result identification.

[0020] Optionally, the fourth display area is further used to display a communication failure mark when the test computer cannot obtain the first decoding data.

[0021] Optionally, the test computer is used to attempt to obtain the first decoded data output by the communication circuit. If the first decoded data is successfully obtained, the obtained waveform data is compared with the first decoded data. If the comparison result between the obtained waveform data and the first decoded data is correct, the comparison result is displayed as a test result in the first interface. If the comparison result between the obtained waveform data and the first decoded data is incorrect or the first decoded data fails to be obtained, the second decoded data stored in the storage circuit is obtained, the obtained waveform data is compared with the second decoded data, and the comparison result between the obtained waveform data and the second decoded data is displayed as a test result in the first interface.

[0022] The beneficial effects of the present invention are as follows:

[0023] The present invention obtains the data output by the communication circuit through the test computer to determine whether a fault occurs during the communication process; a sampling circuit is set to collect the output waveform of the computer under test, the waveform diagram is decoded through the decoding circuit, the decoded data is transmitted to the test computer, and the test computer is used to determine when the fault occurs during the communication process. The present invention obtains the waveform data and the second decoded data in the storage circuit through the test computer, and compares them with the process data of the digital communication by using the waveform reproduction method, which is convenient for troubleshooting; the present invention has a recording method for waveform data and hexadecimal data, which can be played back and demonstrated by the test computer and compared with the data in the communication process in parallel. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The specific implementation modes of the present invention are further described in detail below in conjunction with the accompanying drawings.

[0025] Figure 1 Shown is a schematic diagram of a bus communication card of the present invention;

[0026] Figure 2 A schematic diagram showing that no failure occurs during the communication process displayed on the first interface of the test computer of the present invention;

[0027] Figure 3 A schematic diagram showing a failure occurring during the communication process displayed on the first interface of the test computer of the present invention. DETAILED DESCRIPTION

[0028] In order to more clearly illustrate the present invention, the present invention is further described below in conjunction with preferred embodiments and accompanying drawings. Similar components in the accompanying drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the content specifically described below is illustrative rather than restrictive, and should not be used to limit the scope of protection of the present invention.

[0029] The present invention provides a bus communication card and a test system. The bus communication card receives the waveform output by the computer under test through a first interface to complete the communication, and transmits the data output by the bus communication card to the test computer through a second interface to determine whether a fault is sent during the communication process. A sampling circuit and a decoding circuit are set to collect and decode the output waveform of the computer under test, and the decoded second decoded data is transmitted to the test computer to determine when the fault is sent during the communication process. The sampling circuit can realize complex functions in a small volume, and the storage circuit can save up to hundreds of G of data in a small volume. The waveform recording, storage and analysis parts can be added to the original communication card to assist in fault analysis and improve troubleshooting efficiency.

[0030] A first aspect of the present invention provides a bus communication card, the bus communication card comprising a first interface, a second interface, a communication circuit, a sampling circuit, a decoding circuit and a storage circuit, wherein:

[0031] The first interface of the bus communication card is connected to the computer under test through a cable, the communication circuit receives the waveform output by the computer under test through the first interface and decodes the waveform to obtain first decoded data, and outputs the first decoded data through the second interface;

[0032] The sampling circuit is used to collect the waveform output by the computer under test through the first interface and send the waveform to the storage circuit;

[0033] The decoding circuit is used to decode the waveform collected by the sampling circuit to obtain second decoded data, and send the second decoded data to the storage circuit;

[0034] The storage circuit is used to store the waveform and the second decoded data, and output the waveform and the second decoded data through the second interface.

[0035] The first decoded data is hexadecimal data, and / or the second decoded data is hexadecimal data.

[0036] In a specific embodiment, Figure 1 As shown, the bus communication card 10 includes a first interface, a second interface, a communication circuit 11, a sampling circuit 12, a decoding circuit 13 and a storage circuit 14, wherein:

[0037] The communication circuit 11 is connected to the computer under test through the first interface. The communication circuit 11 receives the waveform output by the computer under test and decodes the waveform into first decoded data. After the communication is completed, the first decoded data is output through the second interface; the first decoded data is hexadecimal data.

[0038] The sampling circuit 12 is connected in parallel with the communication circuit 11, and the sampling circuit 12 collects the waveform output by the computer under test through the first interface, and sends the collected waveform to the storage circuit 14;

[0039] The decoding circuit 13 decodes the waveform collected by the sampling circuit and sends the decoded second decoded data to the storage circuit 14;

[0040] The storage circuit 14 stores the waveform and the second decoded data, and outputs the waveform and the second decoded data through the second interface, wherein the second decoded data is hexadecimal data.

[0041] The second aspect of the present invention provides a test system, which includes the above-mentioned bus communication card and a test computer, the test computer is used to obtain the first decoded data and the waveform and second decoded data stored in the storage circuit; the computer under test is connected to the test computer through a cable, and the test computer is also used to obtain the waveform data output by the computer under test through the cable; and is also used to compare the obtained waveform data with the first decoded data or the second decoded data, and display the comparison result as the test result in the first interface. Wherein, the waveform data obtained by the test computer is hexadecimal data.

[0042] The data and test results acquired by the test computer are displayed on a first interface, the first interface includes a first display area, and the test computer is used to read the waveform from the storage circuit and display it in the first display area;

[0043] The first interface also includes a second display area, and the test computer is used to display the acquired waveform data in the second display area;

[0044] The first interface also includes a third display area, and the test computer is used to display the first decoded data in the third display area, or read the second decoded data in the storage circuit and display it in the third display area;

[0045] The first interface also includes a fourth display area, which is used to display the test results and present the test results to the user;

[0046] The fourth display area is also used to display the test result identification, wherein the test result indication includes a correct or incorrect text identification, or a graphic or color identification; the fourth display area is also used to display a communication failure identification when the test computer cannot obtain the first decoded data.

[0047] The test computer is also used to attempt to obtain the first decoded data output by the communication circuit. If the first decoded data is successfully obtained, the obtained waveform data is compared with the first decoded data. If the comparison result between the obtained waveform data and the first decoded data is correct, the comparison result is displayed as a test result in the first interface. If the comparison result between the obtained waveform data and the first decoded data is incorrect or the first decoded data fails to be obtained, the second decoded data stored in the storage circuit is obtained, the obtained waveform data is compared with the second decoded data, and the comparison result between the obtained waveform data and the second decoded data is displayed as a test result in the first interface.

[0048] If the comparison result between the acquired waveform data and the first decoded data is an error or the acquisition of the first decoded data fails, it is determined that there is a fault in the communication process, and the test computer obtains the second decoded data stored in the storage circuit. If the comparison result between the acquired waveform data and the second decoded data is correct, it is determined that a fault occurs during the communication process of the communication circuit. If the comparison result between the acquired waveform data and the second decoded data is an error, it is determined that a fault occurs during the communication between the computer under test and the communication circuit.

[0049] In a specific embodiment, the first interface of the test computer 20 includes four display areas, wherein the first display area displays the waveform obtained by the test computer 20 from the storage circuit; the second display area displays the waveform data obtained by the test computer 20 from the computer under test, that is, the hexadecimal data to be output by the computer under test, the computer under test stores hexadecimal data, and the output is a waveform; the third display area displays the first decoded data stored by the test computer 20 itself or the second decoded data obtained from the storage circuit; the fourth display area displays the comparison result of the waveform data displayed in the second display area with the first decoded data displayed in the third display area or the comparison result of the waveform data with the second decoded data. The waveform data is the original data in the second display area.

[0050] Before the communication circuit 11 communicates, the computer under test is connected to the test computer 20 via a cable. The test computer 20 directly obtains the hexadecimal data to be output by the computer under test and compares it with the first decoded data output through the second interface after the communication circuit 11 completes the communication as the original data.

[0051] After the communication is completed, the first decoded data output by the communication circuit 11 is obtained by the test computer 20, and the waveform data is compared with the first decoded data by the test computer 20, and the comparison result is displayed in the fourth display area. Specifically, the waveform diagram, waveform data and first decoded data obtained by the test computer 20 are displayed on the first interface in the form of graphics and text in the test computer 20, and the data comparison result of the test computer 20 is used as the test result and displayed in the fourth display area for the user to view. If no fault occurs during the communication process, the fourth display area displays that the comparison result is correct; if a fault occurs during the communication process, the fourth display area displays that the comparison result is wrong. The fourth display area is also used to display a communication fault mark when the test computer cannot obtain the first decoded data. If the test computer 20 cannot obtain the first decoded data, the test computer 20 obtains the second decoded data stored in the storage circuit.

[0052] If there is a fault in the communication process, it is necessary to determine whether the communication process of the communication circuit 11 fails or the fault occurs during the communication between the tested computer and the communication circuit 11. The waveform output by the tested computer is sampled and decoded by the sampling circuit 12 and the decoding circuit 13, and the sampled waveform is stored in the storage circuit 14, and the decoded second decoded data is stored in the storage circuit 14. After the communication is completed, the waveform and the second decoded data are uploaded to the test computer 20 through the storage circuit 14, and the original waveform data and the second decoded data are compared by the test computer 20, and the comparison result is displayed in the fourth display area for the user to view. The setting of the sampling circuit 12 and the decoding circuit 13 increases the waveform recording and decoding analysis parts, which is conducive to fault analysis and improves the troubleshooting efficiency. The waveform displayed in the first display area is convenient for quickly finding the waveform of the erroneous data when a fault occurs in the communication process. It is not necessary to compare each data in the communication process, and the fault can be quickly found.

[0053] Specifically, the raw data obtained by the test computer 20 is the hexadecimal waveform data output by the computer under test. After the communication circuit 11 receives the waveform output by the computer under test, the waveform data is decoded into the first decoded data for communication through the communication circuit 11. After the communication is completed, the first decoded data is output through the first interface, and the first decoded data is uploaded to the test computer 20. In the embodiment, in order to determine when a fault occurs during the communication process, the test computer 20 compares the pre-stored raw data with the first decoded data. Figure 2 As shown, if no failure occurs during the communication process, the fourth display area shows that the comparison result is correct; Figure 3 As shown, if a fault occurs during the communication process, the fourth display area will display that the comparison result is wrong.

[0054] If a failure occurs during the communication process, it is necessary to determine whether the failure occurs during the communication process of the communication circuit 11 or during the communication process from the computer under test to the communication circuit 11 .

[0055] The sampling circuit 12 is designed to be connected in parallel with the communication circuit 11. The waveform output by the computer under test is collected by the sampling circuit 12, and the collected waveform is stored in the storage circuit 14; the decoding circuit 13 decodes the waveform collected by the sampling circuit to obtain second decoded data, and stores the second decoded data in the storage circuit 14. After the communication process is completed, the test computer 20 obtains the waveform and the second decoded data in the storage circuit 14. When the data displayed by the test computer 20 is associated with the waveform data output by the computer under test, the first interface of the test computer 20 reads the waveform data output by the computer under test, that is, the original data, and displays the original data in the second display area. The test computer 20 obtains the second decoded data in the storage circuit 14, and displays the second decoded data in the third display area. The test computer 20 compares the waveform data with the second decoded data, and displays the comparison result as the test result in the fourth display area.

[0056] If a communication circuit fails during the communication process, the fourth display area will show that the comparison result is correct;

[0057] If a fault occurs between the computer under test and the communication circuit, the fourth display area will display that the comparison result is wrong.

[0058] In this embodiment, if a failure occurs in the communication process of the communication circuit 11, the sampling circuit 12 and the decoding circuit 13 are replayed by the test computer 20, that is, the test computer 20 obtains the waveform and the second decoded data in the storage circuit 14 through the second interface, and uses graphics and text to demonstrate whether a failure occurs in the communication process from the computer under test to the communication circuit 11. By comparing the second decoded data with the original data, it is determined whether the failure occurs in the communication process from the computer under test to the communication circuit 11, or in the communication process of the communication circuit 11.

[0059] In a specific embodiment, the first interface of the test computer 20 may also include four controls and four display areas. Specifically, in response to the first operation on the first control, the test computer 20 reads the waveform of the computer under test from the storage circuit 14 and displays the waveform in the first display area; in response to the second operation on the second control, the test computer 20 reads the waveform data pre-stored in itself and displays it in the second display area; in response to the third operation on the third control, the test computer 20 reads the first decoded data stored in itself and displays the first decoded data in the third display area; or in response to the third operation on the third control, the test computer 20 reads the second decoded data in the storage circuit 14 and displays the second decoded data in the third display area; in response to the fourth operation on the fourth control, the test computer 20 presents the comparison result of the test computer 20 on the data in the second display area and the third display area in the fourth display area.

[0060] The present invention obtains the first decoded data output by the communication circuit through a test computer and determines whether the communication process of the communication circuit sends a fault. If a fault occurs during the communication process of the communication circuit, the waveform record is added through the sampling circuit, the waveform data is decoded through the decoding circuit, and the second decoded data after decoding is compared with the original data through the test computer to determine when the fault develops during the communication process, and the auxiliary bus communication card performs fault analysis to improve the troubleshooting efficiency. The present invention can save the waveform during the communication process, and after the communication is completed, the waveform is reproduced by the test computer and compared with the data output by the digital communication, which is convenient for troubleshooting; the present invention also has the form of recording waveforms and hexadecimal data, which is played back and demonstrated by the test computer and compared in parallel with the data during the communication process to find when the fault occurs during the communication process.

[0061] In the description of the present invention, it should be noted that the terms "upper", "lower", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present invention. Unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be a connection between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0062] It should also be noted that, in the description of the present invention, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0063] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the implementation methods of the present invention. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present invention are still within the protection scope of the present invention.

Claims

1. A bus communication card, characterized in that: The bus communication card includes a first interface, a second interface, a communication circuit, a sampling circuit, a decoding circuit and a storage circuit, wherein: The communication circuit is used to receive the waveform output by the computer under test through the first interface and decode the waveform to obtain first decoded data, and output the first decoded data through the second interface; The sampling circuit is used to collect the waveform output by the computer under test through the first interface and send the waveform to the storage circuit; The decoding circuit is used to decode the waveform collected by the sampling circuit to obtain second decoded data, and send the second decoded data to the storage circuit; The storage circuit is used to store the waveform and the second decoded data.

2. The bus communication card according to claim 1, characterized in that: The first decoded data is hexadecimal data, and / or the second decoded data is hexadecimal data.

3. A testing system, characterized in that: The test system comprises a test computer and a bus communication card as claimed in claim 1 or 2, The test computer is used to obtain the first decoded data and the waveform and second decoded data stored in the storage circuit; The test computer is also used to obtain waveform data output by the computer under test; The test computer is also used to compare the acquired waveform data with the first decoded data or the second decoded data, and display the comparison result as the test result in the first interface.

4. The test system according to claim 3, characterized in that: The first interface includes a first display area, and the test computer is used to read the waveform from the storage circuit and display it in the first display area.

5. The test system according to claim 4, characterized in that: The first interface also includes a second display area, and the test computer is used to display the acquired waveform data in the second display area.

6. The test system according to claim 5, characterized in that: The first interface also includes a third display area, and the test computer is used to display the first decoded data in the third display area, or read the second decoded data in the storage circuit and display it in the third display area.

7. The test system according to claim 6, characterized in that: The first interface also includes a fourth display area, and the fourth display area is used to display the test results.

8. The test system according to claim 7, characterized in that: The fourth display area is also used to display the test result identification.

9. The test system according to claim 8, characterized in that: The fourth display area is also used to display a communication failure mark when the test computer cannot obtain the first decoding data.

10. The test system according to claim 3, characterized in that: The test computer is used to attempt to obtain the first decoded data. If the first decoded data is successfully obtained, the obtained waveform data is compared with the first decoded data. If the comparison result between the obtained waveform data and the first decoded data is correct, the comparison result is displayed as a test result in the first interface. If the comparison result between the obtained waveform data and the first decoded data is an error or the first decoded data fails to be obtained, the second decoded data stored in the storage circuit is obtained, the obtained waveform data is compared with the second decoded data, and the comparison result between the obtained waveform data and the second decoded data is displayed as a test result in the first interface.

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