Data transmission method and device, server and storage medium
By integrating a low-voltage differential signal module and a field-programmable gate array into the baseboard management controller, the problem of low data transmission efficiency is solved, achieving efficient data transmission and reducing cost and time consumption.
Patent Information
- Application Number
- CN202411501753.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-25
- Publication Date
- 2025-01-07
AI Technical Summary
When existing baseboard management controllers (BMCs) transmit data via field-programmable gate arrays (FPGAs), they suffer from low data transmission efficiency, which is particularly evident in scenarios with frequent data interactions.
A low-voltage differential signal module is built into the baseboard management controller. This module converts low-speed channel data into low-voltage differential signals and uses a field-programmable gate array (FPGA) for signal conversion. Finally, the data is sent to the processor, realizing the conversion between single-ended signals and low-voltage differential signals, reducing the need for additional FPGA design.
It improves data transmission efficiency, reduces transmission time and cost, and enhances the speed and quality of data transmission.
Smart Images
Figure CN119271597A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a data transmission method, device, server and storage medium. Background Art
[0002] At present, the existing baseboard management controller BMC in the server is connected to the field programmable gate array FPGA of the mainboard through the field programmable gate array FPGC to realize the interaction of a large amount of data, and the field programmable gate array FPGA is used to convert the data to realize data transmission. However, this connection method has the problem of low data transmission efficiency in scenarios with a large amount of interactive data and frequent interactions. Summary of the invention
[0003] Based on this, it is necessary to provide a data transmission method, device, server and storage medium that can improve data transmission efficiency in response to the above technical problems.
[0004] A data transmission method is applied to a server, the server includes a baseboard management controller and a mainboard, the baseboard management controller includes a low voltage differential signal module, and the mainboard includes a field programmable gate array and a processor, wherein the method includes:
[0005] Calling a baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through a low-voltage differential signal module;
[0006] Invoking a baseboard management controller to send a first low voltage differential signal to the mainboard;
[0007] The mainboard is called to convert the first low voltage differential signal into a first single-ended signal through a field programmable gate array, and the signal is sent to the processor, and the first single-ended signal is processed by the processor.
[0008] In one embodiment, the method further comprises:
[0009] Calling the mainboard to receive the second low-speed channel data through the processor and send it to the field programmable gate array;
[0010] Invoke the mainboard to convert the second low-speed channel data into a second low-voltage differential signal through a field programmable gate array, and send the second low-voltage differential signal to the baseboard management controller;
[0011] The baseboard management controller is called to convert the second low voltage differential signal into a second single-ended signal through the low voltage differential signal module.
[0012] In one embodiment, the low voltage differential signal module includes a transmitter module and a receiver module, the field programmable gate array includes a transmitting interface and a receiving interface, the transmitter module is connected to the receiving interface, and the receiver module is connected to the transmitting interface, wherein the baseboard management controller is called to receive the first low-speed channel data, and the first low-speed channel data is converted into a first low-voltage differential signal through the low voltage differential signal module, including:
[0013] Calling a baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through a transmitter module;
[0014] The step of calling the baseboard management controller to send the first low voltage differential signal to the mainboard includes:
[0015] Invoke the baseboard management controller to send the first low voltage differential signal to the mainboard through the transmitter module;
[0016] Invoking the mainboard to receive a first low voltage differential signal through a receiving interface of a field programmable gate array;
[0017] The calling mainboard converts the second low-speed channel data into a second low-voltage differential signal through a field programmable gate array and sends the second low-speed channel data to a baseboard management controller, including:
[0018] Calling the mainboard to convert the second low-speed channel data into a second low-voltage differential signal through a field programmable gate array, and sending the second low-voltage differential signal to the baseboard management controller through a sending interface;
[0019] The baseboard management controller is called to receive the second low voltage differential signal through the receiver module. The baseboard management controller is called to convert the second low voltage differential signal into a second single-ended signal through the low voltage differential signal module, including:
[0020] The baseboard management controller is called to convert the second low voltage differential signal into a second single-ended signal through the receiver module.
[0021] In one embodiment, the transmitter module includes a single-ended to differential module and a driver module, wherein calling a baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through the transmitter module includes:
[0022] Calling a baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through a single-ended to differential module;
[0023] The method of calling the baseboard management controller to send the first low voltage differential signal to the mainboard through the transmitter module includes:
[0024] The baseboard management controller is called to send a first low voltage differential signal to the mainboard by controlling the switch tube in the driving module.
[0025] In one embodiment, the receiver module includes a comparator module, wherein calling the baseboard management controller to convert the second low voltage differential signal into the second single-ended signal through the receiver module includes:
[0026] The baseboard management controller is called to convert the second low voltage differential signal into a second single-ended signal through a comparator module.
[0027] In one embodiment, the first low voltage differential signal or the second low voltage differential signal includes a corresponding positive low voltage differential signal and a negative low voltage differential signal, the positive low voltage differential signal and the negative low voltage differential signal have equal amplitudes and a phase difference of 180 degrees and opposite polarities.
[0028] In one embodiment, the baseboard management controller is connected to the field programmable gate array as a low voltage differential signaling channel protocol and interface LTPI link, and the method further includes:
[0029] When the baseboard management controller and the field programmable gate array complete power-on reset, the low voltage differential signaling channel protocol and the interface LTPI link are initialized;
[0030] After initialization, the low voltage differential signal channel protocol and the interface LTPI link are tested;
[0031] When the detection is successful, the step of calling the baseboard management controller to receive the first low-speed channel data is entered.
[0032] A data transmission device, the device is applied to a server, the server includes a baseboard management controller and a mainboard, the baseboard management controller includes a low voltage differential signal module, the mainboard includes a field programmable gate array and a processor, wherein the device includes:
[0033] A receiving module, used for calling a baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through a low-voltage differential signal module;
[0034] A sending module, used for calling a baseboard management controller to send a first low voltage differential signal to a mainboard;
[0035] The conversion module is used to call the mainboard to convert the first low voltage differential signal into a first single-ended signal through a field programmable gate array, send the first low voltage differential signal to the processor, and process the first single-ended signal through the processor.
[0036] A server comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program:
[0037] Calling a baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through a low-voltage differential signal module;
[0038] Invoking a baseboard management controller to send a first low voltage differential signal to the mainboard;
[0039] The mainboard is called to convert the first low voltage differential signal into a first single-ended signal through a field programmable gate array, and the signal is sent to the processor, and the first single-ended signal is processed by the processor.
[0040] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the following steps:
[0041] Calling a baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through a low-voltage differential signal module;
[0042] Invoking a baseboard management controller to send a first low voltage differential signal to the mainboard;
[0043] The mainboard is called to convert the first low voltage differential signal into a first single-ended signal through a field programmable gate array, and the signal is sent to the processor, and the first single-ended signal is processed by the processor.
[0044] The above-mentioned data transmission method, device, server and storage medium, the server includes a baseboard management controller and a mainboard, the baseboard management controller includes a low voltage differential signal module, the mainboard includes a field programmable gate array and a processor, wherein the baseboard management controller is called to receive the first low-speed channel data, the first low-speed channel data is converted into a first low-voltage differential signal through the low-voltage differential signal module, the baseboard management controller is called to send the first low-voltage differential signal to the mainboard, the mainboard is called to convert the first low-voltage differential signal into a first single-ended signal through the field programmable gate array, and the signal is sent to the processor, and the first single-ended signal is processed by the processor. Therefore, the baseboard management controller BMC has a built-in low-voltage differential signal module, which can convert the data of the low-speed channel to the BMC chip for transmission, and the BMC chip supports the low-voltage differential signal channel protocol and interface. The low-voltage differential signal module built into the BMC can realize the conversion between single-ended signals and low-voltage differential signals, without the need to additionally design FPGA for data conversion, reducing costs and transmission time, thereby improving data transmission efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0045] Figure 1 A schematic diagram of a flow chart of a data transmission method in an embodiment;
[0046] Figure 2 A schematic diagram of the structure of a server in one embodiment;
[0047] Figure 3 A schematic diagram of a flow chart of a data transmission method in an embodiment;
[0048] Figure 4 A schematic diagram of the structure of a server in one embodiment;
[0049] Figure 5 is a schematic structural diagram of a transmitter module in one embodiment;
[0050] Figure 6 is a schematic structural diagram of a receiver module in one embodiment;
[0051] Figure 7 Schematic diagram of the structure of a low voltage differential signal module in one embodiment;
[0052] Figure 8 A schematic diagram of a flow chart of a data transmission method in an embodiment;
[0053] Fig. 9 is a structural block diagram of a data transmission device in one embodiment;
[0054] Fig.10 FIG. 4 is a diagram showing the internal structure of a server in one embodiment. DETAILED DESCRIPTION
[0055] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0056] In one embodiment, Figure 1 As shown, a data transmission method is provided, and the method is applied to a server as an example for explanation. The server includes a baseboard management controller and a mainboard, the baseboard management controller includes a low voltage differential signal module, and the mainboard includes a field programmable gate array and a processor, wherein the following steps are included:
[0057] Step 102: calling a baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through a low-voltage differential signal module.
[0058] Among them, Figure 2 As stated, Figure 2A structural schematic diagram of a server in an embodiment is shown, where the server includes a baseboard management controller BMC (Baseboard Management Controller) and a mainboard, where the baseboard management controller BMC includes a low voltage differential signal module, and the mainboard includes a field programmable gate array FPGA (Field Programmable Gate Array) and a processor CPU (Central Processing Unit). The baseboard management controller BMC is connected to the field programmable gate array FPGA in the mainboard through the low voltage differential signal module, and the field programmable gate array FPGA in the mainboard is connected to the processor CPU.
[0059] Among them, the baseboard management controller BMC can be understood as a separate management chip on the server motherboard, but in a broad sense, BMC is a SoC system, which is divided into two levels: BMC chip and BMC firmware. BMC is a microcontroller integrated on the server motherboard, used to monitor and manage the operation and status of server hardware.
[0060] Among them, the low-voltage differential signal module is integrated on the baseboard management controller BMC, and is used to convert single-ended signals into low-voltage differential signals. The BMC with integrated low-voltage differential signal module can convert the input single-ended signal into a low-voltage differential signal or convert the received low-voltage differential signal into a single-ended signal, and perform high-speed data transmission between the BMC and the FPGA.
[0061] Among them, the field programmable gate array FPGA is used in the motherboard for converting single-ended signals and low-voltage differential signals. It is integrated in the motherboard, connected to the processor, and sends the converted low-voltage differential signal or single-ended signal to the processor for processing.
[0062] Specifically, the server, as the execution subject, calls the BMC to receive the first low-speed channel data, the low-speed channel data is the data related to the low-rate channel, and the first low-speed channel data here is single-ended input data, that is, it can be understood as a single-ended signal. After receiving the first low-speed channel data, the BMC converts the first low-speed channel data into a first low-voltage differential signal through the low-voltage differential signal module built into the BMC.
[0063] In one embodiment, the first low-speed channel data may be GPIO (General-purpose input / output) data, UART (Universal Asynchronous Receiver / Transmitter), or SMBus (System Management Bus) data.
[0064] Step 104: Invoke a baseboard management controller to send a first low voltage differential signal to the mainboard.
[0065] Step 106, calling the mainboard to convert the first low voltage differential signal into a first single-ended signal through the field programmable gate array, sending the signal to the processor, and processing the first single-ended signal through the processor.
[0066] Specifically, the BMC converts the input first low-speed channel data into a corresponding first low-voltage differential signal through a low-voltage differential signal module, and sends it to the field programmable gate array FPGA in the mainboard. The field programmable gate array FPGA converts the first low-voltage differential signal into a first single-ended signal, and sends it to the connected processor. Finally, the processor processes the first single-ended signal sent by the FPGA. Therefore, the BMC realizes data transmission with the FPGA of the mainboard through the built-in low-voltage differential signal module.
[0067] In the above data transmission method, the server includes a baseboard management controller and a mainboard, the baseboard management controller includes a low voltage differential signal module, and the mainboard includes a field programmable gate array and a processor, wherein the baseboard management controller is called to receive the first low-speed channel data, the first low-speed channel data is converted into a first low-voltage differential signal through the low-voltage differential signal module, the baseboard management controller is called to send the first low-voltage differential signal to the mainboard, the mainboard is called to convert the first low-voltage differential signal into a first single-ended signal through the field programmable gate array, and the signal is sent to the processor, and the first single-ended signal is processed by the processor. Therefore, the baseboard management controller BMC has a built-in low-voltage differential signal module, which can convert the data of the low-speed channel to the BMC chip for transmission, and the BMC chip supports the low-voltage differential signal channel protocol and interface. The conversion between single-ended signals and low-voltage differential signals can be realized through the built-in low-voltage differential signal module of the BMC, without the need to additionally design FPGA for data conversion, reducing costs and transmission time, thereby improving data transmission efficiency.
[0068] In one embodiment, Figure 3 As shown, the above method also includes:
[0069] Step 302, calling the mainboard to receive the second low-speed channel data through the processor and send it to the field programmable gate array.
[0070] Step 304: Invoke the mainboard to convert the second low-speed channel data into a second low-voltage differential signal through a field programmable gate array, and send the second low-voltage differential signal to the baseboard management controller.
[0071] Step 306: call the baseboard management controller to convert the second low voltage differential signal into a second single-ended signal through the low voltage differential signal module.
[0072] Among them, the low-voltage differential signal built into the BMC is a conversion between a single-ended signal and a differential signal, and can convert the received differential signal into a single-ended signal. Specifically, after the processor in the mainboard receives the second low-speed channel data, it sends the received second low-speed channel data to the FPGA in the mainboard, and the FPGA converts the received second low-speed channel data into a differential signal to obtain the corresponding second low-voltage differential signal, and sends it to the BMC.
[0073] Furthermore, after the BMC receives the second low-voltage differential signal, the second low-voltage differential signal can be converted into a second single-ended signal through the low-voltage differential signal module. That is to say, the low-voltage differential signal module of the BMC can realize the conversion between the single-ended signal and the low-voltage differential signal, thereby realizing data transmission between the BMC and the FPGA.
[0074] In one embodiment, the second low-speed channel data may be GPIO (General-purpose input / output) data, UART (Universal Asynchronous Receiver / Transmitter), or SMBus (System Management Bus) data.
[0075] In one embodiment, the low voltage differential signal module includes a transmitter module and a receiver module, the field programmable gate array includes a transmitting interface and a receiving interface, the transmitter module is connected to the receiving interface, and the receiver module is connected to the transmitting interface, wherein the baseboard management controller is called to receive the first low-speed channel data, and the first low-speed channel data is converted into a first low-voltage differential signal through the low voltage differential signal module, including:
[0076] Calling a baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through a transmitter module;
[0077] The step of calling the baseboard management controller to send the first low voltage differential signal to the mainboard includes:
[0078] Invoke the baseboard management controller to send the first low voltage differential signal to the mainboard through the transmitter module;
[0079] Invoking the mainboard to receive a first low voltage differential signal through a receiving interface of a field programmable gate array;
[0080] The calling mainboard converts the second low-speed channel data into a second low-voltage differential signal through a field programmable gate array and sends the second low-speed channel data to a baseboard management controller, including:
[0081] Calling the mainboard to convert the second low-speed channel data into a second low-voltage differential signal through a field programmable gate array, and sending the second low-voltage differential signal to the baseboard management controller through a sending interface;
[0082] Invoke the baseboard management controller to receive the second low voltage differential signal through the receiver module;
[0083] The method of calling the baseboard management controller to convert the second low voltage differential signal into a second single-ended signal through the low voltage differential signal module includes:
[0084] The baseboard management controller is called to convert the second low voltage differential signal into a second single-ended signal through the receiver module.
[0085] Among them, you can Figure 4 As shown, Figure 4 A schematic diagram of the structure of a server in one embodiment is shown. Figure 4 The built-in low voltage differential signal module of the BMC includes a transmitter module and a receiver module, the FPGA in the mainboard includes a transmitting interface and a receiving interface, the transmitter module of the low voltage differential signal module is connected to the receiving interface, and the receiver module is connected to the transmitting interface to realize data transmission between the BMC and the FPGA.
[0086] Specifically, after receiving the first low-speed channel data, the BMC performs differential signal conversion through the transmitter module of the low-voltage differential signal module, converts the first low-speed channel data into the corresponding first low-voltage differential signal, and then sends the converted first low-voltage differential signal to the mainboard through the transmitter module. The receiving interface of the FPGA in the mainboard receives the first low-voltage differential signal sent by the transmitter module.
[0087] Furthermore, after the mainboard receives the second low-speed channel data, the second low-speed channel data is converted into a corresponding second low-voltage differential signal through the FPGA, and the second low-voltage differential signal is sent to the receiver module of the low-voltage differential signal module of the BMC through the sending interface of the FPGA. The receiver module converts the received second low-voltage differential signal to obtain a converted second single-ended signal.
[0088] In one embodiment, the transmitter module includes a single-ended to differential module and a driver module, wherein the baseboard management controller is called to receive the first low-speed channel data, and the first low-speed channel data is converted into a first low-voltage differential signal through the transmitter module, including:
[0089] Calling a baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through a single-ended to differential module;
[0090] The method of calling the baseboard management controller to send the first low voltage differential signal to the mainboard through the transmitter module includes:
[0091] The baseboard management controller is called to send a first low voltage differential signal to the mainboard by controlling the switch tube in the driving module.
[0092] Among them, Figure 5 As shown, Figure 5 FIG. 1 shows a schematic diagram of the structure of a transmitter module in one embodiment. Figure 5 The transmitter module includes a single-ended to differential module and a driving module. The single-ended to differential module is connected to the driving module. The single-ended to differential module is used to convert the first low-speed channel data into a first low-voltage differential signal. The driving module is used to control the opening or closing of the switch tube to realize the transmission of the converted first low-voltage differential signal.
[0093] Specifically, after receiving the first low-speed channel data, the BMC converts the first low-speed channel data into a first low-voltage differential signal through the single-ended to differential module of the transmitter module, and then controls the switch tube in the driving module to send the converted first low-voltage differential signal to the FPGA in the mainboard.
[0094] in, Figure 5 DATA is the first low-speed channel data, INP and INN are both first low-voltage differential signals, but with opposite polarities, and OUTP and OUTN are outputs corresponding to the first low-voltage differential signal, which will be described in subsequent embodiments.
[0095] In one embodiment, the transmitter module further includes a constant current source module, which is used to generate the bias current required by the transmitter. Through these modules in the transmitter module, the single-ended signal input to the BMC can be converted into a corresponding low-voltage differential signal.
[0096] In one embodiment, the receiver module includes a comparator module, wherein calling the baseboard management controller to convert the second low voltage differential signal into the second single-ended signal through the receiver module includes:
[0097] The baseboard management controller is called to convert the second low voltage differential signal into a second single-ended signal through a comparator module.
[0098] Among them, Figure 6 As shown, Figure 6 FIG. 1 is a schematic diagram showing a structure of a receiver module in one embodiment. Figure 6 The receiver module includes a comparator module, which is used to convert the received low-voltage differential signal into a corresponding single-ended signal. Specifically, after the BMC receives the second low-voltage differential signal sent by the FPGA of the mainboard, the comparator module in the receiver module converts the second low-voltage differential signal into a second single-ended signal.
[0099] In one embodiment, the receiver module also includes a terminal resistance module. In order to achieve a voltage difference of 350mV at the output end of the low-voltage differential signal and perform impedance matching, a terminal resistance module needs to be designed in the receiver to convert the input low-voltage differential signal into a single-ended signal through the comparator module.
[0100] In one embodiment, Figure 7 As shown, Figure 7 FIG. 1 shows a schematic diagram of the structure of a low voltage differential signal module in an embodiment. The low voltage differential signal module includes a transmitter module and a receiver module. Specifically, the low voltage differential signal module can be as follows: Figure 7 shown.
[0101] In one embodiment, the first low voltage differential signal or the second low voltage differential signal includes a corresponding positive low voltage differential signal and a negative low voltage differential signal, the positive low voltage differential signal and the negative low voltage differential signal have equal amplitudes and a phase difference of 180 degrees and opposite polarities.
[0102] Among them, low-voltage differential signaling is a signal transmission method that is different from the traditional transmission method of one signal line and one ground line. In differential transmission, signals are transmitted on both lines. The amplitudes of the two signals are equal but the phase difference is 180 degrees, and the polarity is opposite. In other words, there is a positive voltage on one signal line and a negative voltage on the other signal line. The receiving end restores the original signal by comparing the difference between the two signals, thereby effectively suppressing external noise and electromagnetic interference and improving the transmission quality and integrity of the signal. Therefore, low-voltage differential signals include positive low-voltage differential signals and negative low-voltage differential signals.
[0103] In one embodiment, Figure 8 As shown, the baseboard management controller is connected to the field programmable gate array as a low voltage differential signal channel protocol and interface LTPI link, and the method also includes:
[0104] Step 802 : After the baseboard management controller and the field programmable gate array complete power-on reset, the low voltage differential signaling channel protocol and the interface LTPI link are initialized.
[0105] Step 804, after initialization, the low voltage differential signaling channel protocol and the interface LTPI link are detected.
[0106] Step 806, when the detection is successful, enter the step of calling the baseboard management controller to receive the first low-speed channel data.
[0107] Specifically, in the server, after the BMC and the motherboard FPGA complete the power-on reset, the LTPI (LVDS Tunneling Protocol and Interface) link is initialized for data transmission, and data transmission is prepared through the LTPI link. Then the BMC performs link detection on the LTPI link between it and the motherboard FPGA, and the PTPI link is put in a stable working state through the sending and receiving of data. Then, according to the actual needs of the interaction, the single-ended signals of the low-speed channels of GPIO, UART, and SMBus are converted into differential signals, and the received differential signals are converted into single-ended signals, so as to perform high-speed data transmission between the BMC and the FPGA.
[0108] In one embodiment, the BMC must design at least four groups of differential signals for the LTPI data transmission channel - LVDS (Low Voltage Differential Signaling) interface. The first group is used to transmit LVDS protocol data, the second group is used to receive LVDS protocol data, the third group is used to transmit the reference clock of LVDS data, and the fourth group is used to transmit the reference clock of LVDS data. Each group of differential signals includes two signals, a positive signal and a negative signal. The two signals have equal amplitudes but a phase difference of 180 degrees and opposite polarities.
[0109] It should be understood that, although the various steps in the above-mentioned flow chart are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the above-mentioned flow chart may include a plurality of sub-steps or a plurality of stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.
[0110] In one embodiment, Fig. 9 As shown, a data transmission device 900 is provided, and the above device is applied to a server, the server includes a baseboard management controller and a mainboard, the baseboard management controller includes a low voltage differential signal module, and the mainboard includes a field programmable gate array and a processor, wherein: a receiving module 902, a sending module 904 and a conversion module 906, wherein:
[0111] The receiving module 902 is used to call the baseboard management controller to receive the first low-speed channel data, and convert the first low-speed channel data into a first low-voltage differential signal through the low-voltage differential signal module.
[0112] The sending module 904 is used to call the baseboard management controller to send the first low voltage differential signal to the mainboard.
[0113] The conversion module 906 is used to call the mainboard to convert the first low voltage differential signal into a first single-ended signal through the field programmable gate array, send it to the processor, and process the first single-ended signal through the processor.
[0114] In one embodiment, the data transmission device 900 calls the mainboard to receive the second low-speed channel data through the processor and sends it to the field programmable gate array, calls the mainboard to convert the second low-speed channel data into a second low-voltage differential signal through the field programmable gate array, and sends it to the baseboard management controller, and calls the baseboard management controller to convert the second low-voltage differential signal into a second single-ended signal through the low-voltage differential signal module.
[0115] In one embodiment, the low voltage differential signal module includes a transmitter module and a receiver module, the field programmable gate array includes a transmitting interface and a receiving interface, the transmitter module is connected to the receiving interface, the receiver module is connected to the transmitting interface, the receiving module 902 calls the baseboard management controller to receive the first low-speed channel data, and converts the first low-speed channel data into a first low-voltage differential signal through the transmitter module.
[0116] In one embodiment, the sending module 904 calls the baseboard management controller to send the first low voltage differential signal to the mainboard through the transmitter module, and calls the mainboard to receive the first low voltage differential signal through the receiving interface of the field programmable gate array.
[0117] In one embodiment, the data transmission device 900 calls the mainboard to convert the second low-speed channel data into a second low-voltage differential signal through a field programmable gate array, and sends the second low-voltage differential signal to the baseboard management controller through a sending interface, and calls the baseboard management controller to receive the second low-voltage differential signal through a receiver module.
[0118] In one embodiment, the data transmission device 900 calls the baseboard management controller to convert the second low voltage differential signal into a second single-ended signal through a receiver module.
[0119] In one embodiment, the transmitter module includes a single-ended to differential module and a driver module. The data transmission device 900 calls the baseboard management controller to receive the first low-speed channel data, and converts the first low-speed channel data into a first low-voltage differential signal through the single-ended to differential module.
[0120] In one embodiment, the data transmission device 900 calls the baseboard management controller to send the first low voltage differential signal to the mainboard by controlling the switch tube in the driving module.
[0121] In one embodiment, the receiver module includes a comparator module, and the data transmission device 900 calls the baseboard management controller to convert the second low voltage differential signal into a second single-ended signal through the comparator module.
[0122] In one embodiment, the data transmission device 900 initializes the low voltage differential signal channel protocol and the interface LTPI link after the baseboard management controller and the field programmable gate array complete power-on reset. After initialization, the low voltage differential signal channel protocol and the interface LTPI link are detected. When the detection is successful, the receiving module 902 is entered to call the baseboard management controller to receive the first low-speed channel data.
[0123] For the specific definition of the data transmission device, please refer to the definition of the data transmission method above, which will not be repeated here. Each module in the above-mentioned data transmission device can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.
[0124] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Fig.10 As shown. The computer device includes a processor, a memory, a network interface and a database connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store first low-speed channel data. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a data transmission method is implemented.
[0125] Those skilled in the art will understand that Fig.10 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.
[0126] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps of the data transmission method in any of the above embodiments are implemented.
[0127] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the data transmission method in any of the above embodiments are implemented.
[0128] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
[0129] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0130] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.
Claims
1. A data transmission method, the method is applied to a server, the server comprises a baseboard management controller and a mainboard, the baseboard management controller comprises a low voltage differential signal module, the mainboard comprises a field programmable gate array and a processor, wherein: The method comprises: Calling the baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through the low-voltage differential signal module; Invoking the baseboard management controller to send the first low voltage differential signal to the mainboard; The mainboard is called to convert the first low voltage differential signal into a first single-ended signal through the field programmable gate array, and the signal is sent to the processor, and the first single-ended signal is processed by the processor.
2. The method according to claim 1, characterized in that The method further comprises: Calling the mainboard to receive the second low-speed channel data through the processor and sending the data to the field programmable gate array; Invoke the mainboard to convert the second low-speed channel data into a second low-voltage differential signal through the field programmable gate array, and send the second low-speed channel data to the baseboard management controller; The baseboard management controller is called to convert the second low voltage differential signal into a second single-ended signal through the low voltage differential signal module.
3. The method according to claim 1 or 2, characterized in that: The low voltage differential signal module includes a transmitter module and a receiver module, the field programmable gate array includes a transmitting interface and a receiving interface, the transmitter module is connected to the receiving interface, and the receiver module is connected to the transmitting interface, wherein the calling of the baseboard management controller to receive the first low-speed channel data and converting the first low-speed channel data into a first low-voltage differential signal through the low voltage differential signal module includes: Calling the baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through the transmitter module; The calling of the baseboard management controller to send the first low voltage differential signal to the mainboard includes: Invoking the baseboard management controller to send the first low voltage differential signal to the mainboard through the transmitter module; Invoking the main board to receive the first low voltage differential signal through the receiving interface of the field programmable gate array; The calling of the mainboard to convert the second low-speed channel data into a second low-voltage differential signal through the field programmable gate array and send the second low-speed channel data to the baseboard management controller includes: Calling the mainboard to convert the second low-speed channel data into a second low-voltage differential signal through a field programmable gate array, and sending the second low-voltage differential signal to the baseboard management controller through the sending interface; Invoking the baseboard management controller to receive the second low voltage differential signal through the receiver module; The calling of the baseboard management controller to convert the second low voltage differential signal into a second single-ended signal through the low voltage differential signal module includes: The baseboard management controller is called to convert the second low voltage differential signal into a second single-ended signal through the receiver module.
4. The method according to claim 3, characterized in that The transmitter module includes a single-ended to differential module and a driver module, wherein the calling of the baseboard management controller to receive the first low-speed channel data and converting the first low-speed channel data into a first low-voltage differential signal through the transmitter module includes: Calling the baseboard management controller to receive first low-speed channel data, and converting the first low-speed channel data into a first low-voltage differential signal through the single-ended to differential module; The calling of the baseboard management controller to send the first low voltage differential signal to the mainboard through the transmitter module includes: The baseboard management controller is called to send the first low voltage differential signal to the mainboard by controlling the switch tube in the driving module.
5. The method according to claim 3, characterized in that The receiver module includes a comparator module, wherein calling the baseboard management controller to convert the second low voltage differential signal into a second single-ended signal through the receiver module includes: The baseboard management controller is called to convert the second low voltage differential signal into a second single-ended signal through the comparator module.
6. The method according to any one of claims 1 to 5, characterized in that The first low-voltage differential signal or the second low-voltage differential signal includes a corresponding positive low-voltage differential signal and a negative low-voltage differential signal, and the positive low-voltage differential signal and the negative low-voltage differential signal have equal amplitudes and a phase difference of 180 degrees and opposite polarities.
7. The method according to claim 1, characterized in that The baseboard management controller is connected to the field programmable gate array as a low voltage differential signaling channel protocol and interface LTPI link, and the method further includes: When the baseboard management controller and the field programmable gate array complete power-on reset, initialize the low voltage differential signaling channel protocol and interface LTPI link; After initialization, the low voltage differential signal channel protocol and the interface LTPI link are detected; When the detection is successful, the step of calling the baseboard management controller to receive the first low-speed channel data is entered.
8. A data transmission device, characterized in that: The device is applied to a server, the server includes a baseboard management controller and a mainboard, the baseboard management controller includes a low voltage differential signal module, the mainboard includes a field programmable gate array and a processor, wherein the device includes: A receiving module, configured to call the baseboard management controller to receive first low-speed channel data, and convert the first low-speed channel data into a first low-voltage differential signal through the low-voltage differential signal module; A sending module, used for calling the baseboard management controller to send the first low voltage differential signal to the mainboard; The conversion module is used to call the mainboard to convert the first low voltage differential signal into a first single-ended signal through the field programmable gate array, send the first low voltage differential signal to the processor, and process the first single-ended signal through the processor.
9. A server comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.