Optimized memory mass production RDT test method and storage medium
By first performing RAM test in memory mass production RDT test, then scanning Flash bad blocks, and using self-test and joint testing methods, the problem of failing to fully detect memory RAM in the existing technology is solved, and the reliability of the memory mass production process is improved and test accuracy.
Patent Information
- Application Number
- CN202411549542.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-01
- Publication Date
- 2025-01-07
AI Technical Summary
The existing memory production RDT test failed to fully test the memory RAM, resulting in that even if the number of NAND Flash bad blocks is within the normal range, there are still bad products that cannot be effectively screened out.
During the RDT test, first perform RAM test, then scan Flash bad block operations, and verify RAM through self-test and joint tests, including data copying, reading and writing, and comparison to ensure that each type of RAM is fully Data verification between internal and indirect media.
By conducting RAM tests first, the reliability of the memory mass production process is significantly improved, ensuring that even if the number of NAND Flash bad blocks is within the normal range, potential quality problems can be found, and shipment quality and testing accuracy are significantly improved.
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Figure CN119274639A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of memory mass production testing, and in particular to an optimization method and storage medium for memory mass production RDT testing. Background Art
[0002] In the memory production process, the mass production process is the processing process of the memory product before it reaches the user. This process usually goes through four different mass production test processes: FT1, RDT, FT3, and QC. Figure 1 As shown. FT1 is the test link for burning RDT firmware into storage products. After the FT1 process, RDT testing, also known as Reliability Demonstration Testing, is required. The RDT testing process is the process of testing storage products with RDT firmware burned in the device. The purpose of this process is to scan out defective products. FT3 is the process of burning the real business logic program of the storage product firmware to form a qualified storage product to be launched on the market; the QC process is a full inspection process for qualified storage products to be launched on the market, checking whether the relevant parameters of the product firmware are normal, so as to avoid abnormalities in the final burning program.
[0003] During the RDT test, if Figure 2 As shown in the figure, the RDT firmware will perform full erase, write, read and data comparison on the NAND Flash to scan out the bad blocks of the NAND Flash. Finally, the number of bad blocks is used to determine whether the product is qualified, and all unqualified products are screened out as much as possible.
[0004] However, in the actual RDT test scanning NAND Flash bad blocks process, it was found that even if the number of bad blocks of NAND Flash was within the normal range, the problem of RAM memory was not fully tested and the fault could not be exposed in the mass production process. There were still very few defective products that showed normal state and could not be checked or screened out. Summary of the invention
[0005] The technical problem to be solved by the present invention is to provide an optimized memory mass production RDT testing method and storage medium to improve the quality problem that the existing RDT testing process does not fully test the RAM of the memory, and the number of bad blocks of NAND Flash is within the normal range, which appears to be good on the surface, but the actual memory product is not fully tested.
[0006] The present invention adopts the following technical solutions to solve the above technical problems: An optimized memory mass production RDT test method is characterized by: first performing a RAM test, and then performing a Flash bad block scan operation, the two links forming a complete RDT test process; and for each type of RAM, self-testing and joint testing are used for verification.
[0007] Compared with the prior art, the present invention first performs RAM testing and then performs a Flash bad block scanning operation, and unqualified points found in the two links are regarded as unqualified products.
[0008] In the above technical solution, performing the RAM test includes the following steps: First, determine the RAM type, and then verify the RAM by copying and / or reading and writing data, and comparing it.
[0009] In the above technical solution, verifying the RAM by means of data copying and / or reading and writing, and comparing includes copying and comparing data inside the storage medium, and copying and comparing data between storage media.
[0010] In the above technical solution, determining the RAM type includes determining the SRAM and DRAM ranges used for testing, and based on different RAM type ranges, copying and / or reading and writing, and comparing data within the storage medium and / or between storage media.
[0011] In the above technical solution, determining the RAM type includes determining the SRAM and DRAM ranges used for testing, and based on the SRAM and DRAM type ranges of different RAMs, performing data copying and / or reading and writing, and comparison within the respective storage media of the SRAM and / or DRAM, as well as data copying and / or reading and writing, and comparison between the SRAM and DRAM storage media, and / or between the SRAM and NAND, and / or between DRAM and NAND.
[0012] In the above technical solution, based on different RAM type ranges, data copying and / or reading and writing, and comparison include at least one of the following internal tests and at least one of the following bidirectional tests: When SRAM exists, data is copied and compared inside the SRAM from SRAM to SRAM; When DRAM is present, data is copied and compared within the DRAM from DRAM to DRAM; When SRAM and DRAM exist at the same time, bidirectional data copying and comparison between SRAM and DRAM is adopted; When SRAM is present, bidirectional data writing, reading and comparison between SRAM and NAND are performed; When DRAM is present, bidirectional data writing, reading, and comparison are performed between DRAM and NAND.
[0013] In the above technical solution, the data copying and comparison inside the SRAM includes: In the measurable range of SRAM from SRAM_ADDR_START to SRAM_ADDR_END, the entire area is divided into N parts with the first set byte as the unit, and data is copied and compared in groups of two until the entire measurable range of SRAM is traversed. If an error occurs, it is marked as unqualified and the test is stopped.
[0014] In the above technical solution, the data copying and comparison inside the DRAM includes: In the measurable range of DRAM DRAM_ADDR_START to DRAM_ADDR_END, the entire area is divided into M parts with the second set byte as the unit, and data is copied and compared in groups of two until the entire measurable range of DRAM is traversed. If an error occurs, it is marked as unqualified and the test is stopped; the second set byte is preferably greater than or equal to the first set byte.
[0015] In the above technical solution, the data copying and comparison between SRAM and DRAM includes: In the measurable range of SRAM SRAM_ADDR_START to SRAM_ADDR_END, the entire area is divided into N parts with the first set byte as the unit; in the measurable range of DRAM DRAM_ADDR_START to DRAM_ADDR_END, the entire area is divided into M parts with the second set byte as the unit; each part of SRAM is traversed through the M parts of the combined DRAM in turn until the measurable range of DRAM is traversed. If there is an error, it is marked as unqualified and the test is stopped.
[0016] Specifically, S1&D1, S2&D2, ..., S N &D N , S1&D N+1 、S2&D N+2 ,…,S N &D 2N , etc., until the testable range of DRAM is traversed. If any error occurs, it is marked as unqualified and the test is stopped.
[0017] In the above technical solution, data writing, reading and comparison between SRAM or DRAM and NAND include: First, a NAND Block is selected for testing with SRAM or DRAM. Data is written, read, and compared from the SRAM or DRAM to the corresponding die & page in units of page until the entire SRAM or DRAM area is traversed. If an error occurs, it is marked as unqualified and the test is stopped.
[0018] In the above technical solution, a plurality of different data formats are used in sequence to test and verify the RAM.
[0019] In the above technical solution, 3-8 different data formats are used in sequence to test and verify the RAM; preferably, 4-6 different data formats are used to test and verify the RAM.
[0020] In the above technical solution, different numbers of test cycles are set, and different data formats are used in each cycle to test and verify the RAM; the order of the data formats used in each cycle is the same or different.
[0021] In order to implement the above method, the present invention can also be installed in a storage medium or an electronic device. To this end, the present invention also provides the following technical solutions: A computer storage medium, characterized in that a computer program is stored thereon, characterized in that: when the computer program is executed, the steps of any of the above-mentioned optimized memory mass production RDT test methods are implemented. This is equivalent to burning the firmware (RDT firmware) into the memory product, and as long as the memory product is powered on, the RDT firmware program will run itself to perform self-test.
[0022] A computer device, characterized in that it includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the steps of the optimized memory mass production RDT test method described in any one of the above items are implemented.
[0023] Therefore, the present invention discloses an optimized memory mass production RDT test method and storage medium, which adds a test process for various types of RAM on the basis of the existing RDT firmware test process; in addition to scanning bad blocks during the RDT test process, the RAM (SRAM, DRAM, etc.) thereon is also tested and verified, thereby optimizing the existing mass production process and selecting all unqualified products as much as possible.
[0024] This test process is a systematic test method for RAM in the mass production process of memory, characterized in that each type of RAM is verified by self-testing and joint testing. The present invention makes up for the shortcomings of the existing memory mass production RDT test and improves the reliability of the memory mass production process.
[0025] Compared with the prior art, the present invention has the following beneficial effects: The RAM is fully tested, which changes the previous single scanning of NAND Flash bad blocks. When the number of bad blocks of NAND Flash is within the normal range, the surface quality is good but the quality defects of the RDT test link are actually hidden, which significantly improves the quality of mass production and shipment, and fully ensures the accuracy and effectiveness of RDT testing.
[0026] Combined with the types and range of actual storage products, the present invention creatively proposes corresponding testing methods within the medium and between the mediums, ensuring the adequacy of RAM testing. The data can be applied to RDT testing of different types of RAM storage products, which is easy to implement and can be used for large-scale mass production testing.
[0027] Using different data formats and test cycles to test and verify the RAM ensures the feasibility and applicability of repeated testing and verification of the RAM, which is conducive to significantly improving the reliability of mass production test results. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0029] Figure 1 It is a test process of storing product mass production process in the prior art.
[0030] Figure 2 In the prior art, the RDT firmware performs a bad block scanning detection process on the NAND Flash.
[0031] Figure 3 This is a flow chart of an optimized memory mass production RDT testing method according to an embodiment of the present application.
[0032] Figure 4 The present invention is a flowchart of an optimized memory mass production RDT test method according to one embodiment of the present application.
[0033] Figure 5 This is a flow chart of an optimized memory mass production RDT testing method according to another embodiment of the present application.
[0034] Figure 6 This is a flow chart of an optimized memory mass production RDT test method according to yet another embodiment of the present application.
[0035] Figure 7This is a specific data format change diagram in the optimized memory mass production RDT test method of the present application.
[0036] Figure 8 This is a schematic diagram of data copying and comparison inside the SRAM in the optimized memory mass production RDT test method of the present application.
[0037] Fig. 9 This is a schematic diagram of data copying and comparison inside DRAM in the optimized memory mass production RDT test method of the present application.
[0038] Fig.10 This is a schematic diagram of data copying and comparison between SRAM and DRAM in the optimized memory mass production RDT test method of the present application.
[0039] Fig.11 This is a schematic diagram of data writing, reading and comparison between SRAM and NAND in the optimized memory mass production RDT test method of the present application.
[0040] Fig.12 This is a schematic diagram of data writing, reading and comparison between DRAM and NAND in the optimized memory mass production RDT test method of the present application. DETAILED DESCRIPTION
[0041] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.
[0042] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0043] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0044] The features and performance of the present application are further described in detail below in conjunction with the embodiments.
[0045] Example 1 like Figure 3-4As shown in ,7, according to the optimized memory mass production RDT test method implemented according to the present invention, after the firmware is burned into the memory product, the RAM of the memory product is tested first, and then the Flash bad block operation is scanned on the memory product. The unqualified points found in the two links are regarded as bad blocks.
[0046] like Figure 4 As shown in the figure, the overall process of RAM testing is as follows: different data formats are used to test and verify the RAM in turn. The user can set the number of test cycles to repeatedly test and verify the RAM.
[0047] For example, using different data formats in turn: DataPattern0, DataPattern1, DataPattern2, DataPattern3, and DataPattern4 repeatedly test the RAM.
[0048] The user can also set different repeat times x, such as repeat x=3 times, the test will be repeated 3 times. In this way, the diversity of the test data format can be guaranteed, thereby ensuring the reliability and accuracy of the test, and being applicable to different data formats and multiple read, write, erase and comparison operations.
[0049] like Figure 7 , which is the data format used in the actual RDT test of the present invention. Figure 4 For each DataPattern instance in Figure 7 In DataPattern, the following rules are selected to ensure that the RAM is fully tested: The number of bits that are 1 in each unit byte; The distribution of bits that are 1 in each unit byte; Data format changes indicate conversion from one sequence of hexadecimal values to another, or to represent a particular data structure or memory layout.
[0050] Example 2 like Figure 3 , 5 As shown in FIG. 7 , another case of the optimized memory mass production RDT test method implemented according to the present invention is presented.
[0051] Different from Example 1, since some products may not have DRAM or have other types of RAM, the RAM type of the product must be determined first. Some RAM areas need to be used for firmware operation and do not need to be tested, so the available range of RAM must also be determined. After that, verification is performed by copying and comparing data.
[0052] It is mainly divided into data copying and comparison within the storage medium, and data copying and comparison between storage media.
[0053] This embodiment uses Figure 5 The following is an explanation using SRAM and DRAM as examples.
[0054] First determine the range of SRAM and DRAM that can be used for testing; Then, based on the different RAM type ranges, data copying and / or reading and writing, and comparison operations are performed; If there is SRAM, data is copied and compared from SRAM to SRAM; If DRAM exists, data is copied and compared from DRAM to DRAM; If SRAM and DRAM exist at the same time, a bidirectional data copy and comparison operation between SRAM and DRAM is adopted; If SRAM is present, bidirectional data writing, reading and comparison operations are performed between SRAM and NAND; If DRAM is present, bidirectional data writing, reading and comparison operations are performed between DRAM and NAND.
[0055] Example 3 like Figure 3 , 6 As shown in , 7, this embodiment combines the situations of embodiments 1 and 2.
[0056] exist Figure 6 In the process, the range of SRAM and DRAM that can be used for testing will be determined, and the data copying and comparison within the storage medium and the data copying and comparison between the storage media will be taken into consideration according to different situations. At the same time, the process of setting different numbers of circles and considering different data formats for RAM testing in each circle is also considered.
[0057] Example 4 like Figure 8 , showing a specific implementation method of the present invention for data copying and comparing inside SRAM when it involves data copying and comparing inside the storage medium.
[0058] The measurable range of SRAM is from SRAM_ADDR_START to SRAM_ADDR_END. The entire area is divided into N parts in units of 4 bytes, and data is copied and compared in pairs.
[0059] like Figure 8 , S1&S N 、S2&S N-1 、S3&S N-2…copy and compare data according to the given data format until the entire SRAM area is traversed. If an error occurs, it is marked as unqualified and the test is stopped.
[0060] Example 5 like Fig. 9 , showing a specific implementation of the present invention for data copying and comparison inside DRAM when considering data copying and comparison inside the storage medium.
[0061] Similar to SRAM, the measurable range of DRAM is from DRAM_ADDR_START to DRAM_ADDR_END. The entire area is divided into N parts in units of 4 bytes, and data is copied and compared in pairs. Fig. 9 , followed by D1&D M 、D2&D M-1 、D3&D M-2 …Copy and compare data according to the given data format until the entire DRAM area is traversed. If an error occurs, it is marked as unqualified and the test is stopped.
[0062] One small difference is that DRAM is usually much larger than SRAM, so the test unit can be adjusted appropriately, such as copying in units of 16 bytes or larger, to improve efficiency.
[0063] Example 6 like Fig.10 , showing a specific implementation of the present invention for data copying and comparison between SRAM and DRAM when considering data copying and comparison between storage media.
[0064] S1&D1, S2&D2, ..., S N &D N , S1&D N+1 、S2&D N+2 ,…,S N &D 2N , ... perform data copying and data comparison until the DRAM area is traversed. If an error occurs, it is marked as unqualified and the test is stopped.
[0065] Example 7 like Fig.11 , showing a specific implementation of the present invention for writing, reading and comparing data between SRAM and NAND when considering data copying and comparison between storage media.
[0066] First, select a NAND Block for testing with SRAM.
[0067] Data is written, read and compared from SRAM to the corresponding die & page in units of page (usually 16k bytes) until the entire SRAM area is traversed. If an error occurs, it is marked as unqualified and the test is stopped.
[0068] Example 8 like Fig.12 , showing a specific implementation of the present invention for writing, reading and comparing data between DRAM and NAND when considering data copying and comparison between storage media.
[0069] The test process between DRAM and NAND is basically the same as that between SRAM and NAND.
[0070] Similarly, first select a NAND Block for testing with DRAM.
[0071] Data is written, read, and compared from DRAM to the corresponding die & page in units of page (usually 16k bytes) until the entire DRAM area is traversed. If an error occurs, it is marked as unqualified and the test is stopped.
[0072] From Examples 7 and 8, no matter it is SRAM or DRAM, we will only perform read and write operations on them.
[0073] In a computer system, for example, to read the address 0x1000_0000 + 4 bytes, that is, a = *(int*)0x1000_0000, and to write, for example, a = 4, that is, to write data at this location.
[0074] The address ranges of DRAM / SRAM are different. For example, the address range of SRAM is 0x0001_0000~0x0004_0000; the address range of DRAM is 0x1000_0000~0x2000_0000.
[0075] It can be seen that when reading and writing them, there is no need to consider the differences in their physical structure, only the address range needs to be considered.
[0076] The following table shows the comparison of the mass production test results of the test method of this application and the test method before optimization. From the mass production data table before and after the RDT test process optimization, it can be seen that: for the total number of 3000 or 4000, and 7000 mass production batches, before and after optimization, the mass production defect rate increased and the customer complaint rate decreased. This shows that the optimized mass production process has better detection capabilities.
[0077]
[0078] The embodiments described above are part of the embodiments of the present application, rather than all of the embodiments. The detailed description of the embodiments of the present application is not intended to limit the scope of the present application for protection, but merely represents the selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application.
Claims
1. An optimized memory mass production RDT test method, characterized by: First perform the RAM test, then scan the Flash bad blocks. The two steps together constitute a complete RDT test process. Each type of RAM is verified using self-testing and joint testing.
2. The optimized memory mass production RDT test method according to claim 1, characterized in that Performing a RAM test includes the following steps: first determining the RAM type, then verifying the RAM by copying and / or reading and writing data, and comparing data based on different RAM type ranges; It includes copying and comparing data within the storage medium, as well as copying and comparing data between storage media.
3. The optimized memory mass production RDT test method according to claim 1, characterized in that It includes determining the types and ranges of SRAM and DRAM used for testing, and based on different SRAM and DRAM types and ranges, performing data copying and / or reading and writing, and comparison within the respective storage media of SRAM and / or DRAM, as well as data copying and / or reading and writing, and comparison between SRAM and DRAM storage media, and / or between SRAM and NAND, and / or between DRAM and NAND.
4. The optimized memory mass production RDT test method according to claim 1, characterized in that Based on different RAM types and ranges, data copying and / or reading and writing, and comparison include at least one of the following internal tests and at least one bidirectional test: When SRAM exists, data is copied and compared inside the SRAM from SRAM to SRAM; When DRAM is present, data is copied and compared within the DRAM from DRAM to DRAM; When SRAM and DRAM exist at the same time, bidirectional data copy and comparison between SRAM and DRAM is adopted; When SRAM is present, bidirectional data writing, reading and comparison between SRAM and NAND are performed; When DRAM is present, bidirectional data writing, reading, and comparison are performed between DRAM and NAND.
5. The optimized memory mass production RDT test method according to claim 1, characterized in that The data copying and comparison within SRAM and DRAM include: In the respective measurable range of SRAM or DRAM, the entire area is divided into N parts in units of set bytes, and data is copied and compared in groups of two until the entire measurable range of SRAM or DRAM is traversed. If an error is found, it is marked as unqualified and the test is stopped.
6. The optimized memory mass production RDT test method according to claim 1, characterized in that Data copying and comparison between SRAM and DRAM include: In the measurable range of SRAM SRAM_ADDR_START to SRAM_ADDR_END, the entire area is divided into N parts with the first set byte as the unit; in the measurable range of DRAM DRAM_ADDR_START to DRAM_ADDR_END, the entire area is divided into M parts with the second set byte as the unit; each part of SRAM is traversed through the M parts of the combined DRAM in turn until the measurable range of DRAM is traversed. If there is an error, it is marked as unqualified and the test is stopped. Specifically, S1&D1, S2&D2, ..., S N &D N , S1&D N+1 、S2&D N+2 ,…,S N &D 2N , etc., until the testable range of DRAM is traversed. If any error occurs, it is marked as unqualified and the test is stopped.
7. The optimized memory mass production RDT test method according to claim 1, characterized in that Data writing, reading, and comparison between SRAM or DRAM and NAND include: First, a NAND Block is selected for testing with SRAM or DRAM. Data is written, read, and compared from the SRAM or DRAM to the corresponding die & page in units of page until the entire SRAM or DRAM area is traversed. If an error occurs, it is marked as unqualified and the test is stopped.
8. The optimized memory mass production RDT test method according to claim 1, characterized in that The RAM is tested and verified using a number of different data formats in turn.
9. The optimized memory mass production RDT test method according to claim 1, characterized in that Set different test cycles, and use different data formats in each cycle to test and verify the RAM; the order of the data formats used in each cycle is the same or different.
10. A computer storage medium, characterized in that: A computer program is stored thereon, characterized in that: when the computer program is executed, the optimized memory mass production RDT test method described in any one of claims 1 to 9 is implemented.
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