Efficient dry argon etching method and application thereof in semiconductor manufacturing

Abstract

The invention relates to a high-efficiency dry argon etching method and application thereof in semiconductor manufacturing, and the method comprises the following steps: placing a semiconductor material to be processed in a vacuum etching cavity, exciting argon through a radio frequency power supply to form plasma, and implementing high-energy physical sputtering etching; suspending the etching and raising the temperature to activate the material surface; carrying out secondary argon etching; and carrying out low-temperature annealing treatment on the etched material. By optimizing plasma parameters, uniform etching of the material surface is achieved, the surface roughness is reduced, the device performance and reliability are improved, in addition, the technology is further suitable for various emerging semiconductor materials, and the prepared high-precision microstructure can be applied to the fields of high-power devices, high-frequency amplifiers and the like and has wide application prospects. And the processing effect and the manufacturing efficiency are improved.

Description

Technical Field

[0001] The invention relates to a high-efficiency dry argon etching method and its application in semiconductor manufacturing. Background Art

[0002] With the continuous development of semiconductor manufacturing technology, the requirements for the accuracy and uniformity of micro-nano structures are becoming higher and higher. Etching technology, as one of the key processes in semiconductor manufacturing, directly affects the performance and reliability of the final device. At present, dry etching technology has been widely used in integrated circuits, optoelectronic devices, and micro-electromechanical systems due to its advantages of high precision, high selectivity, and good controllability. However, the traditional dry etching method still faces some challenges in practical applications, which are mainly manifested in the following aspects: During the etching process, due to the uneven distribution of plasma density, it is easy to cause inconsistent etching depth on the material surface, affecting the final graphic accuracy; during the etching process, the material surface is susceptible to the impact of high-energy ions, resulting in increased surface roughness, affecting the electrical properties and mechanical stability of the device; the residual internal stress after etching may cause material deformation or microcracks, affecting the long-term reliability of the device.

[0003] In order to overcome the above problems, an efficient dry argon etching method is proposed to optimize etching uniformity, reduce surface roughness, and reduce the internal stress of the material through post-processing process, thereby further improving the performance and reliability of semiconductor devices. Summary of the invention

[0004] The purpose of the present invention is to solve the deficiencies of the above prior art, to provide an efficient dry argon etching method and its application in semiconductor manufacturing, to solve the problems of poor etching uniformity, high surface roughness and stress concentration in the prior art, and the method optimizes the etching process parameters, introduces surface activation treatment and low-temperature annealing steps, so that the semiconductor microstructure prepared by the efficient dry argon etching method has a consistent etching depth and a surface roughness of the microstructure of less than 5nm, thereby achieving high-precision etching of semiconductor materials and effectively improving the surface quality and mechanical properties of the materials, and is suitable for the manufacture of various semiconductor devices. The following is a specific scheme:

[0005] On the one hand, an efficient dry argon etching method comprises the following steps: S1: placing a semiconductor material to be processed in a vacuum etching chamber, wherein the working pressure inside the chamber is set to 0.1 to 0.5 Pa, introducing argon gas and controlling the flow rate to 50 to 200 sccm, using an RF power supply with an RF power density of 0.1 to 1 W / cm2 to excite the argon gas to form plasma, and by loading a negative bias voltage, accelerating argon ions to bombard the surface of the semiconductor material, forming a high-energy physical sputtering process, and etching the surface of the material to 50% to 70% of its thickness;

[0006] S2: Pause etching and raise the temperature in the etching chamber to 100 to 150°C, and maintain this temperature for a period of time to activate the surface of the semiconductor material, increase the kinetic energy of the surface atoms, reduce the surface roughness, and provide a basis for the uniformity of subsequent processes;

[0007] S3: Perform secondary argon etching, reduce the argon flow rate to 20 to 100 sccm, and adjust the RF power density to 0.05 to 0.5 W / cm 2 , controlling the etching rate and depth to further remove the residual semiconductor material so that its surface reaches the designed microstructure shape and size;

[0008] S4: The etched semiconductor material is subjected to low-temperature annealing treatment at a temperature of 300 to 500°C for 10 to 30 minutes to eliminate the internal stress of the material caused by the aforementioned etching process, repair surface defects, and further improve the electrical and mechanical properties of the material.

[0009] The argon plasma in step S1 is excited by adjusting the frequency in the range of 13.56 MHz to 2.45 GHz to enhance the density and uniformity of the plasma, thereby optimizing the etching rate and uniformity.

[0010] The temperature increase process in step S2 adopts a pulse heating method, by gradually increasing the temperature to the target temperature and maintaining it for 5 to 15 minutes.

[0011] The secondary etching in step S3 controls the bombardment angle of argon ions so that the side wall angle of the etched pattern is maintained between 88° and 90°, so as to reduce the internal stress concentration of the material, enhance the surface activity, and prevent the oxidation of the material surface or other adverse chemical reactions.

[0012] The low-temperature annealing treatment in step S4 is performed in an argon protective atmosphere to avoid unnecessary oxidation reactions on the material surface, and the temperature gradient during the annealing process is controlled below 10° C. / min to prevent new stress and cracks from being generated in the material.

[0013] On the other hand, high-efficiency dry argon etching methods are used in silicon, gallium nitride, zinc oxide and silicon carbide.

[0014] Parameter optimization is performed on silicon, gallium nitride, zinc oxide and silicon carbide, and the parameter optimization includes a combination of one or more of microchannels, nanostructures and photonic crystal structures, so that they have excellent electrical properties and thermal stability in high-power, high-frequency semiconductor devices.

[0015] Beneficial effects: By optimizing the plasma excitation frequency and etching parameters, the present invention achieves uniform distribution of high-density plasma, thereby ensuring uniform etching of the material surface and avoiding the common problem of inconsistent etching depth in traditional methods;

[0016] Through surface activation treatment and optimized secondary etching process, the present invention significantly reduces the roughness of the material surface and improves the electrical performance and reliability of the device;

[0017] The introduction of low-temperature annealing process effectively eliminates the residual internal stress during the etching process, reduces the risk of material deformation and microcracks, and extends the service life of the device;

[0018] The present invention is not only applicable to traditional silicon materials, but also to emerging semiconductor materials such as gallium nitride, zinc oxide, silicon carbide, etc., and exhibits excellent processing effects and device performance in a variety of application fields; the prepared high-precision microstructures are suitable for a variety of application scenarios such as high-power devices, high-frequency amplifiers, micro-electromechanical systems, optoelectronic devices, etc., significantly improving the performance and manufacturing efficiency of these devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a schematic flow chart of an efficient dry argon etching method. DETAILED DESCRIPTION

[0020] In order to deepen the understanding of the present invention, the present invention will be further described in detail below in conjunction with embodiments and drawings. The embodiments are only used to explain the present invention and do not constitute a limitation on the protection scope of the present invention.

[0021] Embodiment 1:

[0022] Step S1: Place a silicon wafer with a diameter of 100 mm and a thickness of 500 μm in a vacuum etching chamber. Adjust the chamber pressure to 0.4 Pa and introduce argon gas through a mass flow controller with a flow rate of 100 sccm. Start the 13.56 MHz RF power supply with a power density of 0.5 W / cm 2 By loading a negative bias of -100V, the argon ions are accelerated to bombard the surface of the silicon material for preliminary etching, and the etching depth is controlled at 60% of the thickness of the silicon wafer, that is, etching to 300μm;

[0023] Step S2: Pause etching, gradually increase the temperature in the etching chamber to 120° C., and maintain the temperature for 10 minutes to activate the kinetic energy of atoms on the surface of the silicon material, reduce the surface roughness generated during the etching process, and lay the foundation for subsequent fine etching;

[0024] Step S3: Adjust the argon gas flow rate to 50 sccm and reduce the RF power density to 0.2 W / cm 2 , and control the bombardment angle of the argon ions to make it close to the vertical angle of 88° to 90°. Continue etching until the designed microstructure depth and shape are reached. At this time, the surface roughness of the silicon material is less than 5nm, forming a highly consistent nanostructure;

[0025] Step S4: Perform low-temperature annealing on the etched silicon material. Set the chamber temperature to 400°C and maintain it for 20 minutes in an argon protective environment. During the annealing process, the temperature gradient is controlled at 5°C / min to eliminate the internal stress of the material and repair the surface micro defects, further improving the electrical properties and thermal stability of the silicon wafer.

[0026] The silicon-based microstructure prepared by the above method has low surface roughness, consistent etching depth, and a sidewall angle close to 90°, and is suitable for the manufacture of high-power semiconductor devices.

[0027] Embodiment 2:

[0028] Step S1: Place a 300 μm thick gallium nitride (GaN) substrate material in a vacuum etching chamber, set the chamber pressure to 0.3 Pa, introduce argon gas, and control the flow rate at 80 sccm. Use an RF power density of 0.7 W / cm 2 The 13.56MHz RF power source excites the argon gas to form plasma, and a negative bias voltage of -150V is applied for preliminary etching, with the etching depth being 70% of the material thickness, that is, etching to 210μm;

[0029] Step S2: stop etching and increase the chamber temperature to 140°C and maintain this temperature for 10 minutes to activate the GaN surface and reduce the roughness;

[0030] Step S3: Reduce the argon gas flow rate to 40 sccm and adjust the RF power density to 0.3 W / cm 2 , continue etching to a depth of 250μm, and form a surface morphology with a microchannel structure. By controlling the bombardment angle of argon ions, the side wall angle reaches 89°, ensuring the verticality and fineness of the microstructure;

[0031] Step S4: annealing the etched GaN material in an argon environment at 350° C. for 15 minutes to eliminate internal stress and repair surface defects. The temperature gradient during the annealing process is controlled within 8° C. / min.

[0032] The processed GaN-based microstructure has high precision, low surface roughness and good thermal stability, and is suitable for high-frequency microwave devices and LED manufacturing.

[0033] Embodiment 3:

[0034] Step S1: A single crystal zinc oxide (ZnO) substrate with a thickness of 200 μm is selected and placed in a vacuum etching chamber. The chamber pressure is set to 0.2 Pa, the argon gas flow rate is set to 60 sccm, and the RF power density is set to 0.6 W / cm 2The RF power source excites the argon gas for preliminary etching, and the etching depth is 60% of the material thickness, that is, 120μm;

[0035] Step S2: Pause etching and raise the chamber temperature to 110° C., and maintain the temperature for 15 minutes to reduce the surface roughness of the zinc oxide material;

[0036] Step S3: Adjust the argon gas flow rate to 30 sccm and the RF power density to 0.15 W / cm 2 , perform secondary etching until the etching depth reaches 160μm. By controlling the bombardment angle, the microstructure side wall angle reaches 88° to 89°, while ensuring the fineness of the surface morphology;

[0037] Step S4: annealing the etched ZnO material, with the annealing temperature set at 370° C. and the time set at 25 minutes. During the annealing process, the temperature gradient is controlled within 6° C. / min.

[0038] The zinc oxide-based micro-nanostructure prepared by this method is suitable for the manufacture of optoelectronic devices and has excellent optical properties and stability.

[0039] Embodiment 4:

[0040] Step S1: Place a 400 μm thick silicon carbide substrate in a vacuum etching chamber, set the chamber pressure to 0.5 Pa, control the argon gas flow rate to 70 sccm, and use a power density of 1 W / cm 2 The RF power source excites the argon gas to form plasma, and etching is performed by loading a negative bias voltage of -200V. The etching depth is 50% of the material thickness, i.e. 200μm.

[0041] Step S2: gradually raising the chamber temperature to 130° C. and maintaining the temperature for 12 minutes to reduce the surface roughness and activate the SiC surface;

[0042] Step S3: Reduce the argon flow rate to 35 sccm and adjust the RF power density to 0.4 W / cm 2 , and perform secondary etching until the etching depth reaches 240μm, forming a microstructure surface with a photonic crystal structure. By optimizing the bombardment angle of argon ions, the side wall angle is maintained at 89°;

[0043] Step S4: The etched SiC material is annealed at 450°C for 20 minutes. The annealing process is performed in an argon environment with a temperature gradient controlled within 10°C / min to eliminate residual stress and improve the electrical properties of the material.

[0044] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. A high-efficiency dry argon etching method, characterized in that: The following steps are involved: S1: The semiconductor material to be processed is placed in a vacuum etching chamber, the working pressure inside the chamber is set to 0.1 to 0.5 Pa, argon gas is introduced and the flow rate is controlled at 50 to 200 sccm, and the RF power density is 0.1 to 1 W / cm 2 The radio frequency power source excites the argon gas to form plasma, and by loading a negative bias voltage, the argon ions are accelerated to bombard the surface of the semiconductor material, forming a high-energy physical sputtering process, etching the surface of the material to 50% to 70% of its thickness; S2: Pause etching and raise the temperature in the etching chamber to 100 to 150° C., and maintain the temperature for a period of time to activate the surface of the semiconductor material; S3: Perform secondary argon etching, reduce the argon flow rate to 20 to 100 sccm, and adjust the RF power density to 0.05 to 0.5 W / cm 2 ; S4: performing low temperature annealing treatment on the etched semiconductor material, with the temperature controlled at 300 to 500° C. for 10 to 30 minutes.

2. The high-efficiency dry argon etching method according to claim 1, characterized in that , the argon plasma in step S1 is excited by adjusting the frequency in the range of 13.56 MHz to 2.45 GHz.

3. The high-efficiency dry argon etching method according to claim 1, characterized in that: The temperature increase process in step S2 is a pulse heating method, which gradually increases the temperature to the target temperature and maintains it for 5 to 15 minutes.

4. The high-efficiency dry argon etching method according to claim 1, characterized in that: The secondary etching in step S3 controls the bombardment angle of argon ions so that the side wall angle of the etched pattern is maintained between 88° and 90°.

5. The high-efficiency dry argon etching method according to claim 1, characterized in that: The low-temperature annealing treatment in step S4 is performed in an argon protective atmosphere, and the temperature gradient during the annealing process is controlled to be below 10° C. / min.

6. Application of the high-efficiency dry argon etching method according to any one of claims 1 to 5 in silicon, gallium nitride, zinc oxide and silicon carbide.

7. The use according to claim 6, characterized in that: Parameter optimization is performed on silicon, gallium nitride, zinc oxide and silicon carbide, wherein the parameter optimization includes a combination of one or more of a microchannel, a nanostructure and a photonic crystal structure.

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