Semiconductor structure and forming method thereof

Abstract

The embodiment of the invention provides a semiconductor structure and a forming method thereof, and the forming method of the semiconductor structure comprises the steps: providing a substrate; a plurality of initial connecting structures and at least one exhaust hole located among the initial connecting structures are at least formed on the surface of the substrate; supplementing structures are formed at least on the top surface and the bottom surface of the end, close to the exhaust hole, of the initial connecting structure; etching the initial connection structure and the supplementary structure to form a connection structure; the ends, close to and away from the exhaust hole, of the connecting structure are provided with a first width and a second width correspondingly. The first width is greater than or equal to the second width.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and relates to but is not limited to a semiconductor structure and a method for forming the same. Background Art

[0002] After the chip is packaged, it needs to be wrapped by injection molding to protect the chip. Since the chip and the substrate are directly connected by solder balls or other solder bumps, the gap is small and the distance between the connection points is also small. Therefore, it is difficult for the air to be discharged when the plastic packaging material is filled, which easily leads to the problem of unreliable packaging structure.

[0003] In the related art, in order to facilitate the discharge of gas during the injection molding process, air holes are set on the packaging substrate. Therefore, during the injection molding process, as the molding compound is filled, the gas is discharged from the air holes on the substrate, thereby improving the filling effect of the molding compound fluid.

[0004] However, the presence of pores makes it easy to over-etch when etching to form bond fingers (BF) because the etching amount cannot be effectively controlled, resulting in a smaller width of the bond finger near the pore, affecting the subsequent wire bonding process. Summary of the invention

[0005] In view of this, an embodiment of the present disclosure provides a semiconductor structure and a method for forming the same.

[0006] In a first aspect, an embodiment of the present disclosure provides a method for forming a semiconductor structure, the method comprising:

[0007] Providing a substrate; a surface of the substrate is formed with at least a plurality of initial connection structures and at least one exhaust hole located between the plurality of initial connection structures;

[0008] forming supplementary structures respectively on at least the top surface and the bottom surface of one end of the initial connection structure close to the exhaust hole;

[0009] Etching the initial connection structure and the supplementary structure to form a connection structure;

[0010] Wherein, one end of the connection structure close to and one end away from the exhaust hole have a first width and a second width respectively; and the first width is greater than or equal to the second width.

[0011] In some embodiments, the supplemental structure extends beyond the top and bottom surfaces of the initial connection structure.

[0012] In some embodiments, the supplementary structures located on the top surface and the bottom surface of the same initial connection structure are axially symmetrical along the initial connection structure.

[0013] In some embodiments, the supplementary structure includes a supplementary layer; at least on the top surface and the bottom surface of one end of the initial connection structure close to the exhaust hole, the supplementary structure is formed respectively, including:

[0014] Electroplating metal material on the top surface and the bottom surface of one end of the initial connection structure close to the exhaust hole to form the supplementary layer;

[0015] Wherein, the metal material is the same as the material of the initial connection structure.

[0016] In some embodiments, the supplementary structure includes a plurality of supplementary layers; the number of the supplementary layers gradually decreases as the distance between the initial connection structure and the exhaust hole increases.

[0017] In some embodiments, the plurality of supplementary layers are stepped; and supplementary structures are formed respectively on at least the top surface and the bottom surface of one end of the initial connection structure close to the exhaust hole, including:

[0018] Sequentially forming a first supplementary layer and at least one initial supplementary layer on the top surface and the bottom surface of the initial connection structure;

[0019] The initial supplementary layer is patterned from outside to inside in a direction close to the initial connection structure to form at least one supplementary layer; the supplementary layer and the first supplementary layer form a stepped multi-layer supplementary layer; wherein each supplementary layer exposes both ends of the supplementary layer below it.

[0020] In some embodiments, etching the initial connection structure and the supplementary structure to form a connection structure includes:

[0021] The initial connection structure and the supplementary structure are etched by wet etching technology to remove at least a portion of the supplementary structure to form the connection structure.

[0022] In some embodiments, providing a substrate includes:

[0023] providing an initial substrate;

[0024] forming a plurality of the initial connection structures on the initial substrate;

[0025] The initial substrate is etched to form at least one exhaust hole penetrating the initial substrate, so as to form the substrate.

[0026] In some embodiments, the width of each of the supplementary layers is 10% to 20% of the width of the initial connection structure.

[0027] In a second aspect, an embodiment of the present disclosure provides a semiconductor structure, including:

[0028] a substrate including a plurality of connection structures;

[0029] at least one exhaust hole, penetrating the substrate and disposed between the connecting structures;

[0030] Wherein, one end of the connection structure close to and one end away from the exhaust hole have a first width and a second width respectively; and the first width is greater than or equal to the second width.

[0031] The semiconductor structure and its forming method provided by the embodiment of the present disclosure, wherein the forming method of the semiconductor structure comprises: providing a substrate; forming at least a plurality of initial connection structures and at least one exhaust hole located between the plurality of initial connection structures on the surface of the substrate; forming supplementary structures respectively on at least the top surface and the bottom surface of the end of the initial connection structure close to the exhaust hole; etching the initial connection structure and the supplementary structure to form a connection structure; wherein the ends of the connection structure close to and far from the exhaust hole have a first width and a second width respectively; and the first width is greater than or equal to the second width. In the embodiment of the present disclosure, since the supplementary structure is formed at the end of the initial connection structure close to the exhaust hole, the supplementary structure can compensate for the over-etching phenomenon of etching the initial connection structure to form the connection structure, so that the width of the connection structure finally formed close to the exhaust hole and the end far from the exhaust hole can be made substantially the same, thereby not affecting the subsequent wiring process, thereby improving the reliability of the semiconductor structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In the accompanying drawings (which are not necessarily drawn to scale), like reference numerals may describe similar components in different views. Like reference numerals with different letter suffixes may represent different examples of similar components. The accompanying drawings generally illustrate various embodiments discussed herein by way of example and not limitation.

[0033] Figure 1 A schematic diagram of a semiconductor structure from a top view Figure 1 ;

[0034] Figure 2 A schematic diagram of a semiconductor structure from a top view Figure 2 ;

[0035] Figure 3 A scanning electron microscope for semiconductor structures Figure 1 ;

[0036] Figure 4 A scanning electron microscope for semiconductor structures Figure 2 ;

[0037] Figure 5 A schematic diagram of a process for forming a semiconductor structure provided by an embodiment of the present disclosure;

[0038] Figures 6 to 13 Schematic diagrams of various structures in the process of forming a semiconductor structure provided by an embodiment of the present disclosure;

[0039] Fig.14 A scanning electron microscope image of a semiconductor structure provided by an embodiment of the present disclosure;

[0040] Fig.15 A design flow chart of a semiconductor structure provided for an embodiment of the present disclosure. DETAILED DESCRIPTION

[0041] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the specific embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0042] In the following description, a large number of details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present disclosure, some technical features known in the art are not described; that is, all features of actual embodiments are not described here, and well-known functions and structures are not described in detail.

[0043] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0044] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on other elements or layers, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part discussed, it does not mean that the present disclosure necessarily has the first element, component, region, layer or part.

[0045] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present disclosure. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0046] Figure 1 and Figure 2 is a schematic diagram of a top view of a semiconductor structure. Figure 3 and Figure 4 This is a scanning electron microscope image of a semiconductor structure. Figure 1 As shown, the semiconductor structure 10 includes: a substrate 100, a plurality of initial solder fingers 101a located on the surface of the substrate 100, and pores 102 penetrating the top and bottom surfaces of the substrate 100. The pores 102 are used to discharge excess gas during the injection molding process, thereby improving the filling effect of the plastic encapsulation fluid. However, in the process of etching the initial solder fingers 101a to form solder fingers 101, due to the relatively high fluidity of the etching liquid near the pores 102, it is easy to cause over-etching of the initial solder fingers 101a, resulting in a smaller width of the end of the formed solder fingers 101 near the pores 102, that is, the end of the solder fingers 101 near the pores 102 becomes thinner (such as Figure 2 and Figure 3 As shown in the dashed box in FIG. 1 ). The reduced size of the bonding finger 101 will cause problems such as poor bonding when bonding with the chip later. For example, Figure 4 The solder joints shown hit the edge of the solder finger 101, but not the center of the solder finger 101. This will increase the contact resistance between the chip and the substrate, or even cause failure, affecting the performance and reliability of the semiconductor structure.

[0047] Based on this, an embodiment of the present disclosure provides a semiconductor structure and a method for forming the same, wherein the method for forming the semiconductor structure comprises: providing a substrate; forming at least a plurality of initial connection structures and at least one exhaust hole between the plurality of initial connection structures on the surface of the substrate; forming supplementary structures respectively on at least the top surface and the bottom surface of the initial connection structure at one end close to the exhaust hole; etching the initial connection structure and the supplementary structure to form a connection structure; wherein the ends of the connection structure close to and away from the exhaust hole have a first width and a second width respectively; and the first width is greater than or equal to the second width. In the embodiment of the present disclosure, since the supplementary structure is formed at the end of the initial connection structure close to the exhaust hole, the supplementary structure can compensate for the over-etching phenomenon of etching the initial connection structure to form the connection structure, so that the width of the connection structure finally formed close to the exhaust hole and away from the exhaust hole can be made substantially the same, thereby not affecting the subsequent wiring process and improving the reliability of the semiconductor structure.

[0048] The semiconductor structure and the method for forming the same in the embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0049] Figure 5 A schematic diagram of a process for forming a semiconductor structure provided by an embodiment of the present disclosure, Figures 6 to 13 The schematic diagrams of various structures in the semiconductor structure formation process provided by the embodiment of the present disclosure are as follows. Figures 5 to 13 The formation process of the semiconductor device is described in detail.

[0050] like Figure 5 As shown, the method for forming a semiconductor structure includes the following steps S501 to S503.

[0051] First, refer to Figures 5 to 7 , perform step S501, provide a substrate 200; at least a plurality of initial connection structures 201a and at least one exhaust hole 202 located between the plurality of initial connection structures 201a are formed on the surface of the substrate 200.

[0052] It should be noted that the substrate 200 in the embodiment of the present disclosure may be a packaged circuit board, and electrical connection structures such as interconnection circuits and solder pads are formed on the surface and / or inside of the substrate 200 for forming an electrical connection with the chip, inputting electrical signals to the chip, or outputting electrical signals generated by the chip.

[0053] In some embodiments, the shape of the substrate 200 generally corresponds to the shape of the chip to be packaged, for example, a square or a rectangle. In the disclosed embodiment, the substrate 200 is a rectangle, and the length direction of the substrate 200 can be defined as the X-axis direction, the width direction of the substrate 200 can be defined as the Y-axis direction, and the width direction of the substrate 200 can be defined as the Z-axis direction.

[0054] It should also be noted that the initial connection structure 201a is formed on the top surface of the substrate 200, and the initial connection structure 201a is subsequently etched to form a connection structure (i.e., a pad). The connection structure is used to lead out the electrical signal inside the substrate 200 and form an electrical connection with the chip, thereby realizing the electrical connection between the substrate 200 and the chip.

[0055] It should also be noted that the substrate 200 has a top surface and a bottom surface that are relatively arranged along the Z-axis direction. The exhaust hole 202 passes through the top surface and the bottom surface of the substrate 200 and is located between the connecting structure 201. The exhaust hole 202 is conducive to the discharge of gas during the plastic packaging process.

[0056] In some embodiments, providing the substrate 200 may include the following steps:

[0057] Providing an initial substrate 200a;

[0058] Here, the preliminary substrate 200 a may be formed of a silicon-containing material, for example, may include at least one of single crystal silicon, polycrystalline silicon, amorphous silicon, silicon germanium, single crystal silicon germanium, polycrystalline silicon germanium, and carbon-doped silicon.

[0059] forming a plurality of initial connection structures 201a on an initial substrate 200a;

[0060] During implementation, metal material may be electroplated on the surface of the initial substrate 200a by electroplating or the like to form a specific pattern, thereby forming the initial connection structure 201a; here, the metal material may be gold, copper, aluminum, nickel, or the like.

[0061] The initial substrate 200 a is etched to form at least one exhaust hole 202 penetrating the initial substrate 200 a , so as to form the substrate 200 .

[0062] During implementation, a dry etching technique (such as a plasma etching technique) may be used to etch the region between the initial connection structures 201 a on the initial substrate 200 a to form the exhaust holes 202 .

[0063] It should be noted that the exhaust hole 202 is a through-hole structure, and no interconnection circuit will be formed at the location of the exhaust hole 202 on the substrate 200 . In other words, the existence of the exhaust hole 202 will not affect the circuit function of the substrate 202 .

[0064] Secondly, refer to Figure 1 , Figures 8 to 12 , executing step S502, forming a supplementary structure 30 respectively on the top surface and the bottom surface of at least one end of the initial connection structure 201a close to the exhaust hole 202.

[0065] It should be noted that in the top view of the substrate 200 (i.e., the XY plane), the thickness direction of the initial connection structure 201 is the Y-axis direction. Therefore, the top surface and bottom surface of the initial connection structure 201a refer to the top surface and bottom surface of the initial connection structure 201 along the Y-axis direction.

[0066] In some embodiments, please see Figure 8 The supplementary structure 30 is at least located on the top and bottom surfaces of one end of the initial connection structure 201a close to the exhaust hole 202, and is used to compensate for the subsequent over-etching of the initial connection structure 201a. In other embodiments, the supplementary structure 30 also extends beyond the top and bottom surfaces of the initial connection structure 201a.

[0067] In the embodiment of the present disclosure, if the supplementary structure 30 does not extend beyond the initial connection structure 201a, and the end of the initial connection structure 201a is close to the exhaust hole 202, then when the initial connection structure 201a is subsequently etched to form a connection structure, an etching vortex will be formed in the exhaust hole 202, and the vortex phenomenon of the etchant will cause the end of the initial connection structure 201a to be excessively consumed, so that the end of the connection structure formed after etching near the exhaust hole will become narrower. If the supplementary structure 30 extends beyond the initial connection structure 201a, the protruding part of the supplementary structure 30 will block the etchant vortex, thereby preventing the etchant vortex from excessively etching the initial connection structure 201a, so that a wider connection structure can be formed.

[0068] In addition, the supplementary structure 30 in the embodiment of the present disclosure is only arranged at one end of the initial connection structure 201a away from the exhaust hole 202. If the supplementary structure 30 is added to the entire initial connection structure 201a, the subsequent etching to form the connection structure will cause the end of the connection structure away from the exhaust hole 202 to become wider. This will cause adjacent connection structures to contact and cause a short circuit. At the same time, a large number of dense connection structures cannot be formed on the surface of the substrate.

[0069] Figures 9 to 11 for Figure 8 The enlarged view of the supplementary structure 30 in the dotted box, Figures 10 to 12 The specific formation process of a supplementary structure 30 is shown below. Figures 9 to 11 The formation process of the supplementary structure 30 will be described in detail.

[0070] In some embodiments, please see Fig. 9 The supplementary structure 30 includes a supplementary layer 301; at least on the top surface and the bottom surface of one end of the initial connection structure 201a close to the exhaust hole 202, the supplementary structure 30 is formed respectively, including:

[0071] Metal material is electroplated on the top and bottom surfaces of one end of the initial connection structure 201a near the exhaust hole 202 to form a Fig. 9 The supplementary layer 301 is shown; wherein the metal material is the same as the material of the initial connection structure 201a.

[0072] In the embodiment of the present disclosure, the metal material may be, for example, gold or copper.

[0073] It should be noted that from Figure 8 and Fig. 9 It can be seen that the supplementary layer 301 protrudes beyond the initial connection structure 201a in the X-axis direction, that is, the supplementary layer 301 is closer to the exhaust hole 202. When etching the initial connection structure 201a, the etching liquid will form a vortex near the exhaust hole 202. At the same time, since the supplementary layer 301 protrudes beyond the initial connection structure 201a, the protruding part can block the vortex, thereby preventing the vortex from over-etching the initial connection structure 201a, thereby forming a wider morphology.

[0074] In some embodiments, please see Fig.10 The supplementary structure 30 includes a plurality of supplementary layers 301 ; the number of the supplementary layers 301 gradually decreases as the distance between the initial connection structure 201 a and the exhaust hole 202 increases.

[0075] It should be noted that, since the etchant near the exhaust hole 202 will form an etching vortex when etching the initial connection structure 201a, the etching vortex will cause the end of the initial connection structure 201a close to the exhaust hole 202 to be over-etched, thereby narrowing. Furthermore, since the etching vortex exists around the exhaust hole 202, the closer to the exhaust hole 202, the greater the impact of the etching vortex on the initial connection structure 201a, the more serious the over-etching phenomenon is. In the embodiment of the present disclosure, the over-etching phenomenon of the initial connection structure 201a is compensated by the supplementary structure 30. Therefore, as the distance between the initial connection structure 201a and the exhaust hole 202 increases, the number of supplementary layers 301 in the supplementary structure 30 gradually decreases. In this way, different amounts of compensation for different degrees of over-etching can be achieved.

[0076] In some embodiments, please see Fig.11 , the multi-layer supplementary layer 301 is in a stepped shape.

[0077] Here, the multi-layer supplementary layer 301 is in a stepped shape, which can form a circular shape, so that the end of the connection structure formed by etching the initial connection structure 201a subsequently appears circular.

[0078] In some embodiments, the process of forming the stepped structure composed of multiple supplementary layers 301 may include the following steps:

[0079] Step 1: sequentially forming a first supplementary layer 301 and at least one initial supplementary layer 301b on the top surface and the bottom surface of the initial connection structure 201a;

[0080] During implementation, first, metal materials are electroplated on the top and bottom surfaces of the initial connection structure 201a to form Fig.10 The first supplementary layer 301 is shown, and then the metal material is electroplated again on the surface of the first supplementary layer 301 to form Fig.10 The initial supplementary layer 301b is shown. Here, the metal material may be gold, for example.

[0081] It should be noted that Fig.10 The structure shown forms two initial supplementary layers 301b, which are the outermost initial supplementary layer 32 and the second outermost initial supplementary layer 31. In fact, one initial supplementary layer 301b or more initial supplementary layers 301b may be formed on the surface of the first supplementary layer 301. The number of initial supplementary layers 301b depends on the distance between the initial connection structure 201a and the exhaust hole 202 covered by the initial supplementary layer 301b. When the distance between the initial connection structure 201a and the exhaust hole 202 is smaller, the number of initial supplementary layers 301b is larger.

[0082] Step 2: Patterning the initial supplementary layer 301b from outside to inside in a direction close to the initial connection structure 201a to form at least one supplementary layer 301; the supplementary layer 301 and the first supplementary layer 301 form a stepped multi-layer supplementary layer; wherein each supplementary layer 301 exposes both ends of the supplementary layer 301 below it.

[0083] During implementation, first, a patterned first photoresist layer (not shown) can be formed on the top surface and the bottom surface (i.e., the top surface and the bottom surface along the Y-axis direction) of the outermost initial supplementary layer 32, and the first photoresist layer exposes both ends of the outermost initial supplementary layer 32 along the X-axis direction; secondly, the outermost initial supplementary layer 32 exposed by the first photoresist layer and the sub-outer initial supplementary layer 31 located under the outermost initial supplementary layer 32 are etched and removed until the first supplementary layer 301 is exposed, forming a Fig.11 The second supplementary layer 301 is shown; next, a patterned second photoresist layer (not shown) is formed on the top surface and the bottom surface of the etched outermost initial supplementary layer 32; the second photoresist layer exposes the two ends of the etched outermost initial supplementary layer 32 along the X-axis direction; finally, the outermost initial supplementary layer 32 exposed by the second photoresist layer is removed by etching until the two ends of the second supplementary layer 301 are exposed, forming Fig.12 A third supplementary layer 301 is shown.

[0084] In some embodiments, the width of each supplementary layer 301 is 10% to 20% of the width of the initial connection structure 201 a ; for example, it may be 15%.

[0085] In some embodiments, see Figure 8 , Fig. 9 , Fig.12 The supplementary structures 30 located on the top and bottom surfaces of the same initial connection structure 201a are axially symmetrical along the initial connection structure 201a.

[0086] In the disclosed embodiment, since a large number of connection structures are formed on the substrate 200, if the supplementary structures 30 located on the top and bottom surfaces of the same initial connection structure 201a are asymmetric along the initial connection structure 201a, adjacent connection structures may contact each other and cause a short circuit.

[0087] Finally, reference Figure 5 and Fig.13 , execute step S503, etch the initial connection structure 201a and the supplementary structure 30 to form a connection structure 201; wherein the connection structure 201 has a first width d1 and a second width d2 at one end close to and away from the exhaust hole 202, respectively; the first width d1 is greater than or equal to the second width d2.

[0088] It should be noted that the connection structure 201 in the embodiment of the present disclosure may be a bond finger.

[0089] In some embodiments, the formation process of the connection structure 201 may include the following steps:

[0090] The initial connection structure 201a and the supplementary structure 30 are etched by wet etching technology to remove at least a portion of the supplementary structure 30, thereby forming a Fig.13 The connection structure 201 is shown.

[0091] It should be noted that, since the etching liquid in the wet process will form an etching vortex near the exhaust hole 202, the closer to the exhaust hole 202, the greater the etching rate. Therefore, the etching rate (or etching amount) of the initial connection structure 201a near one end of the exhaust hole 202 is greater than the etching rate (or etching amount) at the end away from the exhaust hole 202. In the embodiment of the present disclosure, a supplementary structure 30 is additionally formed on the top surface and bottom surface of the initial connection structure 201a near one end of the exhaust hole 202. The supplementary structure 30 can be used to compensate for the difference in etching rate (or etching amount) at both ends of the initial connection structure 201a, so that the widths of the two ends of the finally formed connection structure 201 are basically the same, or the width of the connection structure 201 near one end of the exhaust hole 202 is slightly greater than the width at the end away from the exhaust hole 202. In this way, the subsequent wire bonding process will not be affected, and the reliability of the semiconductor structure is improved.

[0092] Fig.14 The scanning electron microscope image of the semiconductor structure provided by the embodiment of the present disclosure is as follows: Fig.14 As shown, the widths of the two ends of the connection structure 201 are substantially the same, which is beneficial to improving the reliability of the semiconductor structure.

[0093] The disclosed embodiment provides a method for forming a semiconductor structure, the method comprising: providing a substrate; forming at least a plurality of initial connection structures and at least one exhaust hole between the plurality of initial connection structures on the surface of the substrate; forming supplementary structures respectively on the top surface and the bottom surface of at least one end of the initial connection structure close to the exhaust hole; etching the initial connection structure and the supplementary structure to form a connection structure; wherein the ends of the connection structure close to and far from the exhaust hole have a first width and a second width respectively; and the first width is greater than or equal to the second width. Since the supplementary structure is formed at the end of the initial connection structure close to the exhaust hole, the supplementary structure can compensate for the over-etching phenomenon of etching the initial connection structure to form the connection structure, so that the width of the connection structure finally formed close to the exhaust hole and far from the exhaust hole can be made substantially the same, thereby not affecting the subsequent wire bonding process and improving the reliability of the semiconductor structure.

[0094] As packaging circuit technology develops, circuit technology becomes more and more difficult. In particular, as semiconductor circuits become thinner, fine spacing is required, and thin circuits need to be compensated in various ways, but due to poor opening or short circuit defects, the design of the circuit board is becoming more and more important.

[0095] Fig.15 A design flow chart of a semiconductor structure provided by an embodiment of the present disclosure, such as Fig.15 As shown, the design process of the semiconductor structure provided by the embodiment of the present disclosure includes the following steps:

[0096] Step S151, obtaining main data;

[0097] It should be noted that the main data includes the spacing between the initial connection structures 201a, the width of the initial connection structure 201a, the pattern of the initial connection structure 201a, the size of the exhaust hole 202, the position of the exhaust hole 202, the distance between the initial connection structure 201a and the exhaust hole 202 and other data.

[0098] Step S152, Check CAD; that is, check whether the initial connection structure 201a and the like meet the design requirements;

[0099] Step S153, determining the area that needs to be compensated;

[0100] It should be noted that, in the embodiment of the present disclosure, one end of the initial connection structure 201 a close to the exhaust hole 202 may be determined as the area that needs to be compensated.

[0101] Step S154, compensation (Hammer design);

[0102] It should be noted that in the embodiment of the present disclosure, since the etchant near the exhaust hole 202 will form an etching vortex when etching the initial connection structure 201a, the etching vortex will cause the end of the initial connection structure 201a close to the exhaust hole 202 to be over-etched, thereby narrowing, and the closer to the exhaust hole 202, the greater the impact of the etching vortex on the initial connection structure 201a, and the more serious the over-etching phenomenon. In other words, the etching amount at different positions is different, so the compensation amount is also different. Therefore, before compensation, it is first necessary to obtain the compensation amount for each position, and according to the compensation amount, compensate for the end of the initial connection structure 201a close to the exhaust hole 202 at different positions.

[0103] Specifically, the compensation process may be, for example: a Block structure (corresponding to the supplementary layer 301 in the above embodiment) is set at one end of the initial connection structure 201a close to the exhaust hole 202; when the initial connection structure 201a is far away from the exhaust hole 202, a 1-layer Block structure (supplementary structure) may be set; when the initial connection structure 201a is close to the exhaust hole 202, a 2-layer Block structure, a 3-layer Block structure, a 4-layer Block structure, and more layers of Block structures may be set.

[0104] In some embodiments, 1 layer of Block can represent 1 micron (width along the Y-axis direction). When the etching amount is 1 micron, 1 layer of Block (i.e., 1 layer of supplementary layer 301) structure can be compensated. When the etching amount is 2 microns, 2 layers of Block structure can be compensated.

[0105] Step S155, exhaust hole detection;

[0106] Step S156, checking the etching process.

[0107] It should be noted that the execution of step S155 and step S156 does not have a strict order relationship. In other embodiments, the etching process inspection may be performed first and the exhaust hole inspection may be performed later.

[0108] The hammer design structure proposed in the disclosed embodiment can enhance the reliable management of structures that cannot be fully controlled. In particular, the circuit located at the exhaust hole has a larger etching activation and therefore a larger range of variation. The hammer design architecture is a key technology in the design, and is designed to be 15% symmetrical to the existing circuit. The use of the above-mentioned hammer design structure makes it possible to manufacture the irregular circuit at the exhaust hole location in the most complete and reliable way, which also helps to improve uniformity.

[0109] Another embodiment of the present disclosure provides a Fig.13 The semiconductor structure shown. Fig.13 As shown, the semiconductor structure includes:

[0110] The substrate 200 includes a plurality of connection structures 201;

[0111] At least one exhaust hole 202 passes through the substrate 200 and is disposed between the connecting structures 201;

[0112] The ends of the connection structure 201 close to and away from the exhaust hole 202 have a first width and a second width respectively; the first width is greater than or equal to the second width.

[0113] It should be noted that the substrate 200 may be a packaging substrate, and the packaging substrate may be an inorganic packaging substrate or an organic packaging substrate; the inorganic packaging substrate may be, for example, a ceramic-based packaging substrate or a glass-based packaging substrate, and the organic packaging substrate may be, for example, a phenolic packaging substrate, a polyester packaging substrate, or an epoxy resin packaging substrate. In other embodiments, the substrate 200 may also be a core packaging substrate or a coreless packaging substrate.

[0114] It should also be noted that the substrate 200 has interconnection circuits, solder pads (i.e., connection structure 201) and other electrical connection structures formed on the surface and / or inside, which are used to form an electrical connection with the chip, input electrical signals to the chip, or output electrical signals generated by the chip.

[0115] It is worth noting that the exhaust holes 202 are located between the connecting structures 201 , and the exhaust holes 202 are beneficial to the exhaust of gas during the injection molding process.

[0116] In some embodiments, see Fig.11 The end of the connection structure 201 close to the exhaust hole 202 has a first width d1, and the end of the connection structure 201 away from the exhaust hole 202 has a second width d2, and the first width d1 is greater than or equal to the second width d2.

[0117] In some embodiments, the semiconductor structure further includes: a chip (not shown), wherein the chip 201 is located on the top surface of the substrate 200 and is electrically connected to the connection structure 201 on the substrate 200 .

[0118] In the disclosed embodiment, the first width d1 is equal to the second width d2, so that the width of the connection structure 201 can be relatively uniform. In the subsequent process of connecting the connection structure with the chip by wire bonding, a good electrical connection can be achieved regardless of the location of the wire bonding.

[0119] It should be noted that the semiconductor structure in the embodiment of the present disclosure is formed by the method for forming the semiconductor structure provided in the above embodiment. For the technical features not fully disclosed in the embodiment of the present disclosure, please refer to the above embodiment for understanding, and no further details will be given here.

[0120] The semiconductor structure provided by the embodiment of the present disclosure has substantially the same width at both ends of the connection structure 201 on the substrate close to and away from the exhaust hole, thereby not affecting the subsequent wire bonding process and improving the reliability of the semiconductor structure.

[0121] In the several embodiments provided in the present disclosure, it should be understood that the disclosed structures and methods can be implemented in a non-targeted manner. The structural embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the components shown or discussed are coupled or directly coupled to each other.

[0122] The features disclosed in several method or structural embodiments provided in the present disclosure may be arbitrarily combined without conflict to obtain new method embodiments or structural embodiments.

[0123] The above are only some embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: The method comprises: Providing a substrate; a surface of the substrate is formed with at least a plurality of initial connection structures and at least one exhaust hole located between the plurality of initial connection structures; forming supplementary structures respectively on at least the top surface and the bottom surface of one end of the initial connection structure close to the exhaust hole; Etching the initial connection structure and the supplementary structure to form a connection structure; Wherein, one end of the connection structure close to and one end away from the exhaust hole have a first width and a second width respectively; and the first width is greater than or equal to the second width.

2. The method according to claim 1, characterized in that The supplemental structure extends beyond the top and bottom surfaces of the initial connection structure.

3. The method according to claim 2, characterized in that The supplementary structures located on the top surface and the bottom surface of the same initial connection structure are axially symmetrical along the initial connection structure.

4. The method according to claim 1, characterized in that: The supplementary structure comprises a supplementary layer; at least on the top surface and the bottom surface of one end of the initial connection structure close to the exhaust hole, the supplementary structure is formed respectively, including: Electroplating metal material on the top surface and the bottom surface of one end of the initial connection structure close to the exhaust hole to form the supplementary layer; Wherein, the metal material is the same as the material of the initial connection structure.

5. The method according to claim 1, characterized in that: The supplementary structure includes multiple supplementary layers; the number of the supplementary layers gradually decreases as the distance between the initial connection structure and the exhaust hole increases.

6. The method according to claim 5, characterized in that The multiple supplementary layers are in a stepped shape; supplementary structures are formed respectively on at least the top surface and the bottom surface of one end of the initial connection structure close to the exhaust hole, including: Sequentially forming a first supplementary layer and at least one initial supplementary layer on the top surface and the bottom surface of the initial connection structure; The initial supplementary layer is patterned from outside to inside in a direction close to the initial connection structure to form at least one supplementary layer; the supplementary layer and the first supplementary layer form a stepped multi-layer supplementary layer; wherein each supplementary layer exposes both ends of the supplementary layer below it.

7. The method according to claim 1, characterized in that Etching the initial connection structure and the supplementary structure to form a connection structure, comprising: The initial connection structure and the supplementary structure are etched by wet etching technology to remove at least a portion of the supplementary structure to form the connection structure.

8. The method according to claim 1, characterized in that The providing of the substrate comprises: providing an initial substrate; forming a plurality of the initial connection structures on the initial substrate; The initial substrate is etched to form at least one exhaust hole penetrating the initial substrate, so as to form the substrate.

9. The method according to claim 4 or 5, characterized in that: The width of each supplementary layer is 10% to 20% of the width of the initial connection structure.

10. A semiconductor structure, characterized in that: include: a substrate including a plurality of connection structures; at least one exhaust hole, penetrating the substrate and disposed between the connecting structures; Wherein, one end of the connection structure close to and one end away from the exhaust hole have a first width and a second width respectively; and the first width is greater than or equal to the second width.

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