Method and system for detecting and positioning defects of stacked package semiconductor device

Abstract

The invention belongs to the technical field of device detection and positioning, particularly relates to a method and a system for detecting and positioning defects of a stacked package semiconductor device, and aims to solve the problem that the defects of the stacked package semiconductor device are difficult to position. The method comprises the following steps: obtaining structural parameters and material parameters of a failed stacked package semiconductor device; if the laminated packaging semiconductor device is a ceramic packaging device, sample grinding is carried out after sample preparation, then an excitation signal is taken out in a lossless mode and applied, and if the laminated packaging semiconductor device is a plastic packaging device, the excitation signal is directly applied; collecting the temperature of the side surface of the laminated packaging semiconductor device, and determining the position of a defect in an X-axis-Z-axis plane; constructing a temperature-time sequence, and calculating a phase angle after Fourier transform to obtain a defect phase difference-frequency relationship; and establishing a Y-axis depth defect solving model by using a heat conduction algorithm, and determining the position of the defect in combination with a defect phase difference-frequency relationship. According to the invention, the defect detection and positioning accuracy is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of device detection and positioning, and in particular relates to a method and system for detecting and positioning defects of stacked packaged semiconductor devices. Background Art

[0002] As Moore's Law gradually slows down, semiconductor devices are facing severe challenges brought about by the development trend of multi-function, miniaturization, portability, high speed and low power consumption. The industry believes that three-dimensional stacked packaging is the best solution to expand the application of high-density semiconductor devices, including stacked bare chips, package stacking, silicon through-via interconnection, etc., which promotes the development of highly integrated and multi-functional electronic products.

[0003] However, during failure analysis, when stacked packaged semiconductor devices (such as staggered stacked types) are positioned on the Z-axis using phase-locked thermal imaging, the positioning deviation of defects at the edge of the multi-layer chip is large, making it difficult to determine on which layer of the chip the failure occurred, which brings great difficulties to the failure analysis.

[0004] Therefore, how to accurately detect and locate defects at the edge of a stacked package semiconductor device chip has become a problem that needs to be solved urgently. Based on this, the present invention proposes a method for detecting and locating defects in a stacked package semiconductor device. Summary of the invention

[0005] In order to solve the above-mentioned problems in the prior art, that is, to solve the problem that defects of stacked package semiconductor devices are difficult to locate, especially defects at chip edge positions, the first aspect of the present invention provides a stacked package semiconductor device defect detection and location method, the method comprising:

[0006] S100, obtaining structural parameters and material parameters of a failed stacked package semiconductor device; if the stacked package semiconductor device is a plastic package device, jump to S400; if the stacked package semiconductor device is a ceramic package device, jump to S200;

[0007] S200, grinding the stacked package semiconductor device after preparing the sample;

[0008] S300, removing the stacked package semiconductor device from the ground sample without loss;

[0009] S400, applying an excitation signal to the failure internal pressure point of the stacked package semiconductor device to generate a heat source; controlling the frequency of the excitation signal to change the heating frequency of the heat source;

[0010] S500, collecting the side temperature of the stacked package semiconductor device, obtaining the heat source position of the stacked package semiconductor device on the plane formed by the X-axis and the Z-axis, and then determining the position of the defect on the X-axis-Z-axis plane;

[0011] S600, constructing a temperature-time series based on the collected side temperature and the corresponding time; calculating the phase angle after Fourier transformation of the temperature-time series to obtain a defect phase difference-frequency relationship;

[0012] S700, according to the position of the defect in the X-axis-Z-axis plane, the heat conduction path of the excitation signal at the depth position in the Y-axis direction is analyzed using a heat conduction algorithm, a Y-axis depth defect solution model is established, and the position of the defect is determined in combination with the defect phase difference-frequency relationship.

[0013] In some preferred embodiments, the stacked packaged semiconductor device is ground after being sampled, and the method is as follows: after the stacked packaged semiconductor device is sampled using resin, the side of the stacked packaged semiconductor device is ground and the packaging on at least two opposite sides is removed to expose the chip.

[0014] In some preferred embodiments, when grinding the side surface of the stacked package semiconductor device, a grinding disc with a roughness of 200 to 400 mesh is used for grinding to quickly remove the ceramic shell.

[0015] In some preferred embodiments, the stacked package semiconductor device is removed from the ground sample without loss by:

[0016] The ground resin sample is heated at a temperature of 150°C to 180°C for 20 to 30 minutes; then the heated resin sample is taken out and placed in an ice-water mixture for 1 to 2 minutes to quickly cool down;

[0017] After repeating the heating and cooling steps for a set number of times, taking out the stacked package semiconductor device from the resin;

[0018] After being taken out, the stacked packaged semiconductor device is subjected to three ultrasonic cleanings, the ultrasonic cleaning frequency is set to 20kHz-40kHz, the cleaning solutions are acetone, alcohol and pure water respectively, and each ultrasonic cleaning time is 3-5 minutes to remove residual resin.

[0019] In some preferred embodiments, when an excitation signal is applied to the failure internal pressure point of the stacked package semiconductor device, the defect heating power is 100uW to 1mW, and the heating frequency of the heat source is 0.5Hz to 20Hz.

[0020] In some preferred embodiments, the side temperature of the stacked package semiconductor device is collected by:

[0021] The side temperature of the stacked package semiconductor device is collected by an infrared detector, and the infrared detector lens is parallel to the horizontal plane.

[0022] In some preferred embodiments, when the side surface temperature of the stacked package semiconductor device is collected by an infrared detector, at least four temperature points are collected in each excitation cycle, and the integration time is not less than 1 minute.

[0023] In some preferred embodiments, the temperature-time series is Fourier transformed and the phase angle is calculated by:

[0024] The temperature-time series is Fourier transformed, and after the transformation, the phase angle is calculated by the real and imaginary parts of the complex signal:

[0025]

[0026] Wherein, Φ(ω) represents the phase angle, ImF(ω) represents the imaginary part of the complex signal, and ReF(ω) represents the real part of the complex signal.

[0027] In some preferred embodiments, the location of the defect is determined by:

[0028] Based on the established three-dimensional Cartesian coordinate system, the X-axis and Z-axis positions, as well as the minimum increment ΔY in the Y-axis direction, are obtained, and then the geometric structure model of the heat conduction path of the excitation signal at different positions is analyzed to confirm the materials and related characteristics at different Y values;

[0029] Combining the materials and related properties at different Y values, according to the heat conduction algorithm, the phase deviation of the geometric model at different positions on the Y axis in the plane formed by the X axis and the Z axis is calculated:

[0030]

[0031] Among them, θ represents the phase deviation, i is the number, that is, the number of materials, n is the upper limit of i, ρ i is the material density, C i is the specific heat capacity of the material, κ i is the thermal conductivity of the material, Y i is the material thickness value, f is the frequency of the excitation signal;

[0032] On the same plane formed by the X-axis and the Z-axis, when the phase deviations obtained by S600 and S700 are equal, the position on the Y-axis corresponding to the phase deviation in the heat conduction model is the defect position.

[0033] In a second aspect of the present invention, a defect detection and positioning system for stacked package semiconductor devices is provided, the system comprising: an excitation signal source, a probe, a microscope, a positioning sheet, a test platform, a computer, and an infrared detector; the microscope, the infrared detector, and the excitation signal source are all connected to the computer in communication;

[0034] The excitation signal source is used to generate an excitation signal and apply a voltage through the probe contacting the failure internal pressure point of the stacked package semiconductor device;

[0035] The microscope includes an optical microscope for observing the probe when a voltage is applied;

[0036] The infrared detector is used to collect the side temperature of the stacked package semiconductor device;

[0037] The positioning piece is fixed on the test platform, and the positioning piece is used to fix the stacked package semiconductor device;

[0038] A sample preparation and grinding unit, used for grinding the stacked package semiconductor device after sample preparation, and removing the stacked package semiconductor device from the ground sample without loss;

[0039] The computer is used to obtain structural parameters and material parameters of the failed stacked package semiconductor device, control the excitation signal source to apply an excitation signal to the failed internal pressure point of the stacked package semiconductor device to generate a heat source; and control the frequency of the excitation signal to change the heating frequency of the heat source;

[0040] Controlling the infrared detector to collect the side temperature of the stacked package semiconductor device to obtain the heat source position of the stacked package semiconductor device on the plane formed by the X-axis and the Z-axis, and then determining the position of the defect in the X-axis-Z-axis plane;

[0041] Control the side temperature and the corresponding time collected by the infrared detector to construct a temperature-time series; calculate the phase angle after Fourier transformation of the temperature-time series to obtain the defect phase difference-frequency relationship;

[0042] According to the position of the defect in the X-axis-Z-axis plane, the heat conduction path of the excitation signal at the depth position in the Y-axis direction is analyzed using the heat conduction algorithm, a Y-axis depth defect solution model is established, and the position of the defect is determined in combination with the defect phase difference-frequency relationship.

[0043] Beneficial effects of the present invention:

[0044] The present invention improves the accuracy of defect detection and positioning.

[0045] 1) The present invention denatures the resin by heating in an oven and rapidly cooling the mixture of ice and water, and non-destructively extracts the sample for metallographic sampling. While ensuring efficiency, it avoids the damage to the sample caused by the traditional sampling method and reduces the pollution of the environment by organic reagents;

[0046] 2) When the present invention locates and analyzes the hot spots of the device from the side, the sample is placed with the aid of the positioning sheet, which effectively saves the time consumed in the detection and positioning process;

[0047] 3) The present invention establishes a heat conduction model at any position in the geometric model to obtain the phase deviation generated by different frequency excitation signals, and combines thermal infrared technology to determine the position on the Y axis, thereby reducing the destructive test step of unsealing the plastic-sealed device, optimizing the destructive test into a non-destructive test, avoiding damage to the plastic-sealed laminated device, and effectively improving the success rate of defect detection and positioning. Compared with the prior art, the detection of defects located at the bottom layer chip and edge position has higher accuracy, especially for ceramic packaged devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings.

[0049] Figure 1 It is a schematic flow chart of a defect detection and positioning method for a stacked package semiconductor device according to an embodiment of the present invention;

[0050] Figure 2 is a cross-sectional structural diagram of a staggered stacked packaging device according to an embodiment of the present invention;

[0051] Figure 3 It is a schematic diagram of non-destructive sampling in resin according to an embodiment of the present invention;

[0052] Figure 4 The diagram is a schematic diagram of a defect detection and positioning system for a stacked package semiconductor device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0053] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution in the embodiment of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiment is a part of the embodiment of the present invention, not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0054] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the relevant invention are shown in the accompanying drawings.

[0055] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application may be combined with each other.

[0056] A defect detection and location method for a stacked package semiconductor device according to a first embodiment of the present invention comprises the following steps:

[0057] S100, obtaining structural parameters and material parameters of a failed stacked package semiconductor device; if the stacked package semiconductor device is a plastic package device, jump to S400; if the stacked package semiconductor device is a ceramic package device, jump to S200;

[0058] S200, grinding the stacked package semiconductor device after preparing the sample;

[0059] S300, removing the stacked package semiconductor device from the ground sample without loss;

[0060] S400, applying an excitation signal to the failure internal pressure point of the stacked package semiconductor device to generate a heat source; controlling the frequency of the excitation signal to change the heating frequency of the heat source;

[0061] S500, collecting the side temperature of the stacked package semiconductor device, obtaining the heat source position of the stacked package semiconductor device on the plane formed by the X-axis and the Z-axis, and then determining the position of the defect on the X-axis-Z-axis plane;

[0062] S600, constructing a temperature-time series based on the collected side temperature and the corresponding time; calculating the phase angle after Fourier transformation of the temperature-time series to obtain a defect phase difference-frequency relationship;

[0063] S700, according to the position of the defect in the X-axis-Z-axis plane, the heat conduction path of the excitation signal at the depth position in the Y-axis direction is analyzed using a heat conduction algorithm, a Y-axis depth defect solution model is established, and the position of the defect is determined in combination with the defect phase difference-frequency relationship.

[0064] In order to more clearly illustrate the defect detection and positioning method of a stacked package semiconductor device of the present invention, the following is combined with the attached Figure 1 Each step in an embodiment of the method of the present invention is described in detail.

[0065] The present invention provides a detection and positioning method for accurately locating the number of chip layers where defects are located, solving the problem that defects in stacked packaged semiconductor devices are difficult to locate, especially defects at the edge of the chip. The present invention is applicable to stacked chip packaging with ceramic sealing and plastic sealing. The types of stacked packaged semiconductor devices include but are not limited to integrated circuits. The stacking types include but are not limited to same-size stacking, staggered stacking, pyramid stacking, etc., which can significantly improve the accuracy of defect detection and positioning, and avoid the step of unsealing the plastic-sealed circuit during defect positioning. The details are as follows:

[0066] S100, obtaining structural parameters and material parameters of a failed stacked package semiconductor device; if the stacked package semiconductor device is a plastic package device, jump to S400; if the stacked package semiconductor device is a ceramic package device, jump to S200;

[0067] In this embodiment, the structural parameters and material parameters include the size parameters of each structure, the density, thermal conductivity and specific heat capacity parameters of each material.

[0068] S200, grinding the stacked package semiconductor device after preparing the sample;

[0069] In this embodiment, the resin (preferably a thermosetting epoxy resin in the present invention) and the curing agent are preferably mixed in a ratio of 7:3 and added to the mold, and then placed in a low vacuum environment of 0.1Pa to 10Pa for curing for 12 hours. After the device metallographic sample is prepared, two sides are selected for grinding, and a 200-400 mesh roughness grinding disc is used for grinding, and the outer shell is quickly removed to expose the side of the chip.

[0070] S300, removing the stacked package semiconductor device from the ground sample without loss;

[0071] In this embodiment, the resin sample is heated to soften (preferably placed in an oven for heating); the oven heating temperature is 150°C to 180°C, and the heating time is 20 to 30 minutes; after the softened resin sample is taken out of the oven, it is immersed in an ice-water mixture for 1 to 2 minutes to quickly cool down, and the resin hardens. Repeat the above steps for a set number of times (preferably three times in the present invention), the resin becomes denatured and brittle, and the stacked packaged semiconductor device can be easily removed from the resin by applying a small amount of external force. The stacked packaged semiconductor device is further ultrasonically cleaned three times, with the cleaning solutions being acetone, alcohol, and pure water, respectively, and the ultrasonic cleaning frequency being set to 20kHz to 40kHz, with the cleaning time being 3 to 5 minutes each time, to remove residual resin.

[0072] S400, applying an excitation signal to the failure internal pressure point of the stacked package semiconductor device to generate a heat source; controlling the frequency of the excitation signal to change the heating frequency of the heat source;

[0073] In this embodiment, the failed stacked package semiconductor device is fixed on the platform by using a positioning plate. With the help of a 10x magnification optical microscope, the probe is brought into contact with the failed internal pressure point of the device and a voltage (i.e., an excitation signal) is applied to generate a heat source so that the defect heating power is 100uW~1mW; and the excitation signal frequency is controlled to change the heating frequency of the heat source, and the frequency can be adjusted within the range of 0.5~20Hz.

[0074] S500, collecting the side temperature of the stacked package semiconductor device, obtaining the heat source position of the stacked package semiconductor device on the plane formed by the X-axis and the Z-axis, and then determining the position of the defect on the X-axis-Z-axis plane;

[0075] In this embodiment, the temperature of the side of the device is collected by an infrared detector (i.e., phase-locked thermal imaging), at least four temperature points are collected in each excitation cycle, the integration time is not less than 1 minute, the infrared detector lens is parallel to the horizontal plane, the device to be tested is placed based on the positioning piece, and the position of the device to be tested and the infrared lens is adjusted by a mechanical device to obtain the heat source position information of the sample to be tested on the plane formed by the X-axis and Z-axis, and determine the position of the defect in the X-axis-Z-axis plane (i.e., the chip layer number where the defect is located). In the present invention, the infrared detector lens can be adjusted in the up and down, left and right, front and back directions, and the detection lens can be selected to be 1x, 4x, or 10x magnified.

[0076] S600, constructing a temperature-time series based on the collected side temperature and the corresponding time; calculating the phase angle after Fourier transformation of the temperature-time series to obtain a defect phase difference-frequency relationship;

[0077] In this embodiment, the defect phase-frequency relationship is obtained by a computer according to a surface temperature processing algorithm. During the temperature acquisition process of the infrared camera, the sample surface temperature is recorded every 3 ms by default. The total acquisition time is not less than 1 minute to form a temperature-time series.

[0078] The recorded temperature-time series is Fourier transformed, namely:

[0079] F(ω)=A(ω)e jΦ(ω)

[0080] Where A(ω) is the amplitude and Φ(ω) is the phase angle.

[0081] The phase angle can be obtained by calculating the real and imaginary parts of the complex signal, that is:

[0082]

[0083] Wherein, Φ(ω) represents the phase angle, ImF(ω) represents the imaginary part of the complex signal, and ReF(ω) represents the real part of the complex signal.

[0084] S700, according to the position of the defect in the X-axis-Z-axis plane, the heat conduction path of the excitation signal at the depth position in the Y-axis direction is analyzed using a heat conduction algorithm, a Y-axis depth defect solution model is established, and the position of the defect is determined in combination with the defect phase difference-frequency relationship.

[0085] In this embodiment, based on the established three-dimensional Cartesian coordinate system (i.e., the three-dimensional Cartesian coordinate system constructed in the present invention), the X-axis and Z-axis positions, as well as the minimum increment ΔY in the Y-axis direction are obtained, and the geometric structure model analysis is performed on the heat conduction path of the excitation signal at different positions. For example, for a device with a length of 1000 μm in the Y direction, X=50 μm, Z=50 μm and ΔY=50 μm are input; then Y=1*ΔY=50 μm, Y=2*ΔY=100 μm, ..., Y=20*ΔY=1000 μm will be analyzed at X=50 μm and Z=50 μm, respectively, to confirm the materials and related properties at different Y values, as shown in Table 2. According to the heat conduction algorithm, the geometric model is on the plane formed by the X-axis and the Z-axis, and the phase deviation at different positions on the Y-axis is:

[0086]

[0087] Among them, θ represents the phase deviation, i is the number, that is, the number of materials, n is the upper limit of i, ρ i is the material density, C i is the specific heat capacity of the material, κ i is the thermal conductivity of the material, Y i is the material thickness value, and f is the frequency of the excitation signal.

[0088] On the plane formed by the X-axis and the Z-axis, when the phase deviations obtained by the infrared detector test and the model calculation are substantially equal (ie, when the phase deviations obtained by S600 and S700 are equal), the corresponding position on the Y-axis in the heat conduction model is the defect position.

[0089] In order to facilitate further understanding of the present invention, examples are given below:

[0090] The structure of stacked package semiconductor devices is as follows Figure 2 As shown, it generally includes a plastic / ceramic housing 1, a chip 2, an adhesive 3, a transfer board 4, a failure point 5, etc. The position defect detection process is as follows:

[0091] Step 1: Statistical device structure and material parameters include the size parameters of each structure, the density, thermal conductivity and specific heat capacity parameters of each material, as shown in Table 1:

[0092] Table 1

[0093] Step 2: Prepare samples of stacked package semiconductor devices, where the resin component is thermosetting epoxy resin; mix the resin and curing agent in a ratio of 7:3 and add them to the mold, and put them in a low vacuum environment of 0.1Pa to 10Pa for curing for 12 hours. After the device metallographic sample is prepared, two sides are selected for grinding, and a 200-400 mesh roughness grinding disc is used for grinding, and the outer shell is quickly removed to expose the side of the chip.

[0094] Step 3: If Figure 3 As shown, the resin sample is placed in an oven for heating and softening; the oven heating temperature is 150℃~180℃, and the heating time is 20~30 minutes; after taking the softened resin sample out of the oven, immerse it in an ice-water mixture for 1~2 minutes to quickly cool down, and the resin hardens. Repeat the above steps three times, the resin becomes brittle, and the stacked package semiconductor device can be easily removed from the resin by applying a small amount of external force. The stacked package semiconductor device is further ultrasonically cleaned three times, and the cleaning solutions are acetone, alcohol and pure water respectively. The ultrasonic cleaning frequency is set to 20kHz~40kHz, and the cleaning time is 3~5 minutes each time to remove the residual resin.

[0095] Step 4: Apply an excitation signal to make the defect heating power 100uW~1mW; and control the excitation signal frequency to change the heating frequency of the heat source, and the frequency can be adjusted in the range of 0.5~20Hz.

[0096] Step 5: If Figure 4 As shown, the temperature of the side surface of the device is collected by an infrared detector, the infrared detector lens is parallel to the horizontal plane, the device to be tested is placed based on the positioning piece, and the position of the device to be tested and the infrared lens is adjusted by a mechanical device to obtain the heat source position information of the sample to be tested on the plane formed by the X-axis and Z-axis, and determine the position of the defect in the X-axis-Z-axis plane.

[0097] Step 6: Obtain the defect phase-frequency relationship through the computer according to the surface temperature processing algorithm. During the temperature acquisition process of the infrared camera, the sample surface temperature is recorded every 3ms by default, and the total acquisition time is not less than 1 minute to form a temperature-time series. Perform Fourier transform on the recorded temperature-time series, and the phase angle can be obtained by calculating the real and imaginary parts of the complex signal.

[0098] Step 7: Based on the established three-dimensional Cartesian coordinate system, obtain the X-axis and Z-axis positions, as well as the minimum increment ΔY in the Y-axis direction, and then perform geometric structural model analysis on the heat conduction path of the excitation signal at different positions to confirm the materials and related characteristics at different Y values;

[0099] Combining the materials and related characteristics at different Y values, and based on the heat conduction algorithm, the phase deviation of the geometric model at different positions on the Y axis in the plane formed by the X axis and the Z axis is calculated;

[0100] On the same plane formed by the X-axis and the Z-axis, when the phase deviations obtained by S600 and S700 are equal, the position on the Y-axis corresponding to the phase deviation in the heat conduction model is the defect position.

[0101] In summary, the present invention creatively proposes a defect detection and positioning method for stacked packaged semiconductor devices, which solves the problem that defects in stacked packaged semiconductor devices are difficult to locate, especially defects at the edge of the chip. The method is applicable to stacked bare chip packaging with ceramic sealing and plastic sealing, such as same-size stacking, staggered stacking, pyramid stacking, etc. While ensuring efficiency, it avoids damage to samples caused by plastic-sealed stacked devices and traditional sampling methods, reduces the pollution of organic reagents to the environment, and significantly improves the accuracy of defect detection and positioning.

[0102] A second embodiment of the present invention is a defect detection and positioning system for stacked package semiconductor devices, the system comprising: an excitation signal source, a probe, a microscope, a positioning sheet, a test platform, a computer, an infrared detector, the microscope, the infrared detector, and the excitation signal source are all connected to the computer in communication; Figure 4 As shown:

[0103] The excitation signal source is used to generate an excitation signal and apply a voltage through the probe contacting the failure internal pressure point of the stacked package semiconductor device;

[0104] The microscope includes an optical microscope for observing the probe when a voltage is applied;

[0105] The infrared detector is used to collect the side temperature of the stacked package semiconductor device;

[0106] The positioning piece is fixed on the test platform, and the positioning piece is used to fix the stacked package semiconductor device;

[0107] A sample preparation and grinding unit, used for grinding the stacked package semiconductor device after sample preparation, and removing the stacked package semiconductor device from the ground sample without loss;

[0108] The computer is used to obtain the structural parameters and material parameters of the failed stacked package semiconductor device; control the excitation signal source to apply an excitation signal to the failed internal pressure point of the stacked package semiconductor device to generate a heat source; control the frequency of the excitation signal to change the heating frequency of the heat source; that is, if the stacked package semiconductor device is a ceramic packaged device, control the sample preparation and grinding unit to process the stacked package semiconductor device, and after the processing, control the excitation signal source to apply an excitation signal to the failed internal pressure point of the stacked package semiconductor device to generate a heat source; control the frequency of the excitation signal to change the heating frequency of the heat source; if the stacked package semiconductor device is a plastic packaged device, control the excitation signal source to apply an excitation signal to the failed internal pressure point of the stacked package semiconductor device to generate a heat source; control the frequency of the excitation signal to change the heating frequency of the heat source;

[0109] Controlling the infrared detector to collect the side temperature of the stacked package semiconductor device to obtain the heat source position of the stacked package semiconductor device on the plane formed by the X-axis and the Z-axis, and then determining the position of the defect in the X-axis-Z-axis plane;

[0110] Control the side temperature and the corresponding time collected by the infrared detector to construct a temperature-time series; calculate the phase angle after Fourier transformation of the temperature-time series to obtain the defect phase difference-frequency relationship;

[0111] According to the position of the defect in the X-axis-Z-axis plane, the heat conduction path of the excitation signal at the depth position in the Y-axis direction is analyzed using the heat conduction algorithm, a Y-axis depth defect solution model is established, and the position of the defect is determined in combination with the defect phase difference-frequency relationship.

[0112] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process and related instructions of the system described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0113] It should be noted that the defect detection and positioning system for stacked packaged semiconductor devices provided in the above embodiment is only illustrated by the division of the above functional modules. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the modules or steps in the embodiments of the present invention can be decomposed or combined. For example, the modules in the above embodiment can be combined into one module, or further divided into multiple sub-modules to complete all or part of the functions described above. The names of the modules and steps involved in the embodiments of the present invention are only for distinguishing the modules or steps, and are not regarded as improper limitations of the present invention.

[0114] A third embodiment of the present invention is a defect detection and positioning device for a stacked packaged semiconductor device, comprising at least one processor; and a memory communicatively connected to at least one of the processors; wherein the memory stores instructions executable by the processor, and the instructions are used to be executed by the processor to implement the above-mentioned defect detection and positioning method for a stacked packaged semiconductor device.

[0115] A computer-readable storage medium according to a fourth embodiment of the present invention stores computer instructions, and the computer instructions are used to be executed by the computer to implement the above-mentioned defect detection and positioning method for a stacked package semiconductor device.

[0116] Technicians in the technical field can clearly understand that, for the convenience and brevity of description, the specific working process and related instructions of the above-described defect detection and positioning equipment for stacked packaging semiconductor devices and readable storage media can refer to the corresponding process in the aforementioned method example and will not be repeated here.

[0117] Those skilled in the art should be able to appreciate that the modules and method steps of each example described in conjunction with the embodiments disclosed herein can be implemented with electronic hardware, computer software or a combination of the two, and the programs corresponding to the software modules and method steps can be placed in random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs, or any other form of storage medium known in the technical field. In order to clearly illustrate the interchangeability of electronic hardware and software, the composition and steps of each example have been generally described in the above description according to the function. Whether these functions are performed in electronic hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0118] The terms "first", "second", "third", etc. are used to distinguish similar objects rather than to describe or indicate a particular order or sequence.

[0119] So far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.

Claims

1. A method for defect detection and positioning of a stacked package semiconductor device, characterized in that: The method includes: S100, obtaining structural parameters and material parameters of a failed stacked package semiconductor device; if the stacked package semiconductor device is a plastic package device, jump to S400; if the stacked package semiconductor device is a ceramic package device, jump to S200; S200, grinding the stacked package semiconductor device after preparing the sample; S300, removing the stacked package semiconductor device from the ground sample without loss; S400, applying an excitation signal to the failure internal pressure point of the stacked package semiconductor device to generate a heat source; controlling the frequency of the excitation signal to change the heating frequency of the heat source; S500, collecting the side temperature of the stacked package semiconductor device, obtaining the heat source position of the stacked package semiconductor device on the plane formed by the X-axis and the Z-axis, and then determining the position of the defect on the X-axis-Z-axis plane; S600, constructing a temperature-time series based on the collected side temperature and the corresponding time; calculating the phase angle after Fourier transformation of the temperature-time series to obtain the defect phase difference-frequency relationship; S700, according to the position of the defect in the X-axis-Z-axis plane, the heat conduction path of the excitation signal at the depth position in the Y-axis direction is analyzed using a heat conduction algorithm, a Y-axis depth defect solution model is established, and the position of the defect is determined in combination with the defect phase difference-frequency relationship.

2. A defect detection and positioning method for stacked package semiconductor devices according to claim 1, characterized in that: The stacked packaged semiconductor device is sampled and then ground. The method is as follows: after the stacked packaged semiconductor device is sampled with resin, the side of the stacked packaged semiconductor device is ground and the packaging on at least two opposite sides is removed to expose the chip.

3. A defect detection and positioning method for stacked package semiconductor devices according to claim 2, characterized in that: When grinding the side surface of the stacked package semiconductor device, a grinding disc with a roughness of 200 to 400 meshes is used for grinding to quickly remove the ceramic shell.

4. A defect detection and positioning method for stacked package semiconductor devices according to claim 3, characterized in that: The stacked package semiconductor device is taken out from the ground sample without loss, and the method is as follows: The ground resin sample is heated at a temperature of 150°C to 180°C for 20 to 30 minutes; then the heated resin sample is taken out and placed in an ice-water mixture for 1 to 2 minutes to quickly cool down; After repeating the heating and cooling steps for a set number of times, taking out the stacked package semiconductor device from the resin; After being taken out, the stacked packaged semiconductor device is subjected to three ultrasonic cleanings, the ultrasonic cleaning frequency is set to 20kHz-40kHz, the cleaning solutions are acetone, alcohol and pure water respectively, and each ultrasonic cleaning time is 3-5 minutes to remove residual resin.

5. A defect detection and positioning method for stacked package semiconductor devices according to claim 4, characterized in that: When an excitation signal is applied to the failure internal pressure point of the stacked package semiconductor device, the defect heating power is 100uW-1mW, and the heating frequency of the heat source is 0.5Hz-20Hz.

6. A defect detection and positioning method for stacked package semiconductor devices according to claim 5, characterized in that: The side temperature of the stacked package semiconductor device is collected by: The side temperature of the stacked package semiconductor device is collected by an infrared detector, and the infrared detector lens is parallel to the horizontal plane.

7. A defect detection and positioning method for stacked package semiconductor devices according to claim 6, characterized in that: When the side surface temperature of the stacked package semiconductor device is collected by an infrared detector, at least four temperature points are collected in each excitation cycle, and the integration time is not less than 1 minute.

8. The defect detection and positioning method of a stacked package semiconductor device according to claim 6, characterized in that: The temperature-time series is Fourier transformed to calculate the phase angle, and the method is: The temperature-time series is Fourier transformed, and after the transformation, the phase angle is calculated by the real and imaginary parts of the complex signal: Wherein, Φ(ω) represents the phase angle, ImF(ω) represents the imaginary part of the complex signal, and ReF(ω) represents the real part of the complex signal.

9. The defect detection and positioning method of a stacked package semiconductor device according to claim 6, characterized in that: Determine the location of the defect by: Based on the established three-dimensional Cartesian coordinate system, the X-axis and Z-axis positions, as well as the minimum increment ΔY in the Y-axis direction, are obtained, and then the geometric structure model of the heat conduction path of the excitation signal at different positions is analyzed to confirm the materials and related characteristics at different Y values; Combining the materials and related properties at different Y values, according to the heat conduction algorithm, the phase deviation of the geometric model at different positions on the Y axis in the plane formed by the X axis and the Z axis is calculated: Among them, θ represents the phase deviation, i is the number, that is, the number of materials, n is the upper limit of i, ρ i is the material density, C i is the specific heat capacity of the material, κ i is the thermal conductivity of the material, Y i is the material thickness value, f is the frequency of the excitation signal; On the same plane formed by the X-axis and the Z-axis, when the phase deviations obtained by S600 and S700 are equal, the position on the Y-axis corresponding to the phase deviation in the heat conduction model is the defect position.

10. A defect detection and positioning system for stacked package semiconductor devices, characterized in that: The system comprises: an excitation signal source, a probe, a microscope, a positioning plate, a test platform, a computer, and an infrared detector; the microscope, the infrared detector, and the excitation signal source are all connected to the computer in a communication manner; The excitation signal source is used to generate an excitation signal and apply a voltage through the probe contacting the failure internal pressure point of the stacked package semiconductor device; The microscope includes an optical microscope for observing the probe when a voltage is applied; The infrared detector is used to collect the side temperature of the stacked package semiconductor device; The positioning piece is fixed on the test platform, and the positioning piece is used to fix the stacked package semiconductor device; A sample preparation and grinding unit, used for grinding the stacked package semiconductor device after sample preparation, and removing the stacked package semiconductor device from the ground sample without loss; The computer is used to obtain structural parameters and material parameters of the failed stacked package semiconductor device, control the excitation signal source to apply an excitation signal to the failed internal pressure point of the stacked package semiconductor device to generate a heat source; and control the frequency of the excitation signal to change the heating frequency of the heat source; Controlling the infrared detector to collect the side temperature of the stacked package semiconductor device to obtain the heat source position of the stacked package semiconductor device on the plane formed by the X-axis and the Z-axis, and then determining the position of the defect in the X-axis-Z-axis plane; Control the side temperature and the corresponding time collected by the infrared detector to construct a temperature-time series; calculate the phase angle after Fourier transformation of the temperature-time series to obtain the defect phase difference-frequency relationship; According to the position of the defect in the X-axis-Z-axis plane, the heat conduction path of the excitation signal at the depth position in the Y-axis direction is analyzed using the heat conduction algorithm, a Y-axis depth defect solution model is established, and the position of the defect is determined in combination with the defect phase difference-frequency relationship.

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