Crash switching method for master control box of high-voltage frequency converter

By monitoring and switching the crash of the main control box of the high-voltage inverter, using the communication between FPGA and DSP processor, the problem of the main control box that cannot be switched in the existing technology is solved. Improves the reliability of high-voltage inverters.

CN119292032APending Publication Date: 2025-01-10SANMEN NUCLEAR POWER CO LTD
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Patent Information

Application Number
CN202411361029.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-27
Publication Date
2025-01-10

AI Technical Summary

Technical Problem

The existing high-voltage inverter main control box cannot achieve interference-free switching when the main control box is frozen or powered, resulting in a single failure point of the high-voltage inverter, affecting its reliability.

Method used

Monitor the crash of the main control box through the backup main control box, use the communication between FPGA and DSP processor to determine in real time whether the CPU board is dead, and switch control rights when it is dead, ensuring that the high-voltage inverter is dead or power loss is lost. Achieve disturbance-free switching.

Benefits of technology

The single failure point of the high-voltage inverter is eliminated, the reliability of the high-voltage inverter is improved, and the interference-free switching is achieved in the case of crash or power loss.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention particularly relates to a high-voltage frequency converter main control box crash switching method. The method comprises the following steps that a standby main control box monitors whether a main main control box crashes or not; and when the main master control box crashes, the standby master control box is switched to the main master control box. According to the invention, by monitoring the crash of the main master control box, the undisturbed switching of the control box under the condition of crash or power loss of the main master control box is ensured, the single failure point of the high-voltage frequency converter is eliminated, and the reliability of the high-voltage frequency converter is improved.
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Description

Technical Field

[0001] The invention relates to the technical field of crash switching of a main control box of a high-voltage frequency converter, and in particular to a crash switching method of a main control box of a high-voltage frequency converter. Background Art

[0002] The main control box is one of the core components of the high-voltage inverter. Once a fault occurs, the high-voltage inverter will shut down. Nuclear power plants have extremely high reliability requirements for high-voltage inverters and require that there should not be a single failure point in the high-voltage inverter.

[0003] Existing high-voltage inverter main control boxes mostly adopt redundant design, in which one main control box is used as the main control box, and the other main control boxes are used as backup main control boxes. When the main control box crashes and needs to be switched, the backup main control box needs to receive the valid bit change of the main control box before starting the disturbance-free switching of the main control box. This method cannot cope with the situation where the main control box crashes or loses power. Summary of the invention

[0004] The purpose of the present invention is to provide a method for switching a main control box of a high-voltage inverter when it crashes, by monitoring the crash of the main control box, ensuring that the main control box can achieve disturbance-free switching when it crashes or loses power, eliminating the single failure point of the high-voltage inverter and improving the reliability of the high-voltage inverter.

[0005] In order to achieve the above object, the present invention provides the following technical solutions:

[0006] A method for switching a main control box of a high-voltage inverter when it crashes comprises the following steps:

[0007] The standby main control box monitors whether the main main control box is dead;

[0008] When the active main control box crashes, the standby main control box switches to the active main control box.

[0009] As one of the feasible ways, the main control box of the high-voltage inverter adopts a redundant design, in which one main control box serves as the main control box and the other main control boxes serve as backup main control boxes.

[0010] As one of the feasible ways, the main control box of the high-voltage inverter adopts a triple-redundancy design, in which one main control box serves as the main control box and the other two main control boxes serve as backup main control boxes.

[0011] As one of the feasible ways, the main control box includes a fiber optic board and a CPU board. The fiber optic board is provided with an FPGA, and the CPU board is provided with a DSP processor. The FPGA communicates with the DSP processor backplane, and the FPGA receives the heartbeat word sent by the DSP processor in real time. The FPGA determines whether the CPU board is frozen by judging the heartbeat word sent by the DSP processor.

[0012] As one of the feasible ways, the active main control box and the standby main control box are connected via a network cable and an Ethernet switch, and the internal operating data of the active main control box and the standby main control box are synchronized in real time.

[0013] As one of the feasible methods, the FPGA of the main control box determines whether the CPU board is dead, including the following steps:

[0014] The FPGA uses internal logic resources to create an external readable and writable RAM for the DSP processor;

[0015] Through the address bus, the FPGA and DSP processor agree on an address to send the heartbeat word;

[0016] FPGA receives the heartbeat word sent by DSP processor in real time;

[0017] The FPGA creates a variable to store the heartbeat word sent by the DSP processor and uses this variable to compare with the heartbeat word sent by the next DSP processor;

[0018] The heartbeat word sent by the DSP processor remains unchanged outside the deadlock determination time, and the FPGA determines that the CPU board is dead.

[0019] As one of the feasible ways, when the FPGA of the main control box determines whether the CPU board is dead, the FPGA delays for a period of time after power-on and compares the created variable with the heartbeat word sent by the next DSP processor.

[0020] As one of the feasible ways, when the FPGA of the main control box determines whether the CPU board is dead, if the heartbeat word sent by the DSP processor does not change within 5ms, that is, within the 21 interrupt times of the DSP processor, the FPGA determines that the CPU board is dead.

[0021] As one of the achievable methods, when the main control box crashes, the standby control box switches to the main control box, including the following steps:

[0022] The CPU board of the standby main control box monitors the heartbeat status of the main main control box in real time;

[0023] The CPU board of the standby main control box determines the status of the main control box according to the heartbeat word status of the main control box;

[0024] When the heartbeat word status variable of the active main control box remains unchanged beyond the deadlock determination time, the CPU board of the standby main control box determines that the active main control box has deadlocked;

[0025] The CPU board of the standby main control box first sends a shutdown command to its own fiber optic board, and then modifies its own position to a valid position to take over the control;

[0026] After the standby main control box takes over control, it sends a start command to its own fiber optic board to realize actual control of the high-voltage inverter.

[0027] Beneficial technical effects of the present invention:

[0028] The method for switching the main control box of a high-voltage inverter in the event of a crash of the main control box of the present invention ensures that the main control box can be switched without disturbance in the event of a crash or power loss, thereby eliminating a single failure point of the high-voltage inverter and improving the reliability of the high-voltage inverter. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 The present invention is a flow chart of an embodiment of a method for switching a main control box of a high-voltage inverter when the main control box crashes. DETAILED DESCRIPTION

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used in the specification of the application are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" and any variations thereof in the specification and claims of this application and the above-mentioned figure descriptions are intended to cover non-exclusive inclusions.

[0031] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0032] The technical solution of the present invention is clearly and completely described below in conjunction with the accompanying drawings and specific embodiments.

[0033] See also Figure 1 This embodiment provides a method for switching a main control box of a high-voltage inverter when it crashes, comprising the following steps:

[0034] The standby main control box monitors whether the main main control box is dead;

[0035] When the active main control box crashes, the standby main control box switches to the active main control box.

[0036] In this embodiment, as one of the feasible ways, the main control box of the high voltage inverter adopts a redundant design, wherein one of the main control boxes is used as the main control box and the other main control boxes are used as backup main control boxes.

[0037] In this embodiment, as one of the feasible ways, the main control box of the high-voltage inverter adopts a triple-redundancy design, in which one main control box is used as the main control box and the other two main control boxes are used as backup main control boxes.

[0038] In this embodiment, as one of the feasible methods, the main control box includes a fiber optic board and a CPU board, the fiber optic board is provided with an FPGA, the CPU board is provided with a DSP processor, the FPGA communicates with the DSP processor backplane, the FPGA receives the heartbeat word sent by the DSP processor in real time, and the FPGA determines whether the CPU board is frozen by judging the heartbeat word sent by the DSP processor.

[0039] In this embodiment, as one of the feasible ways, the active main control box and the standby main control box are connected via a network cable and an Ethernet switch, and the internal operating data of the active main control box and the standby main control box are synchronized in real time.

[0040] In this embodiment, as one of the achievable methods, the FPGA of the main control box determines whether the CPU board is dead, including the following steps:

[0041] The FPGA uses internal logic resources to create an external readable and writable RAM for the DSP processor;

[0042] Through the address bus, the FPGA and DSP processor agree on an address to send the heartbeat word;

[0043] FPGA receives the heartbeat word sent by DSP processor in real time;

[0044] The FPGA creates a variable to store the heartbeat word sent by the DSP processor and uses this variable to compare with the heartbeat word sent by the next DSP processor;

[0045] The heartbeat word sent by the DSP processor remains unchanged outside the deadlock determination time, and the FPGA determines that the CPU board is dead.

[0046] In this embodiment, as one of the achievable ways, when the FPGA of the main control box determines whether the CPU board is dead, the FPGA delays for a period of time after power-on and compares the created variable with the heartbeat word sent by the next DSP processor.

[0047] Because the power-on initialization of the FPGA of the main control box is faster than that of the DSP processor, a delay is made after power-on to determine whether the heartbeat word sent by the DSP processor has changed, thereby eliminating the possibility that the FPGA determines that the CPU board has crashed as soon as power is turned on.

[0048] In this embodiment, as one of the feasible ways, when the FPGA of the main control box determines whether the DSP processor is dead, if the heartbeat word sent by the DSP processor does not change within 5ms, that is, does not change within the 21 interrupt times of the DSP processor, the FPGA determines that the CPU board is dead.

[0049] In this embodiment, as one of the achievable methods, when the active main control box crashes, the standby main control box switches to the active main control box, including the following steps:

[0050] The CPU board of the standby main control box monitors the heartbeat status of the main main control box in real time;

[0051] The CPU board of the standby main control box determines the status of the main control box according to the heartbeat word status of the main control box;

[0052] When the heartbeat word status variable of the active main control box remains unchanged beyond the deadlock determination time, the CPU board of the standby main control box determines that the active main control box has deadlocked;

[0053] The CPU board of the standby main control box first sends a shutdown command to its own fiber optic board, and then modifies its own position to a valid position to take over the control;

[0054] After the standby main control box takes over control, it sends a start command to its own fiber optic board to realize actual control of the high-voltage inverter.

[0055] The shutdown command and start command of the standby main control box actually control the global inverter enable state. By monitoring the main main control box crash, it ensures that the main control box can be switched without disturbance in the event of a crash or power loss, eliminating the single failure point of the high-voltage inverter and improving the reliability of the high-voltage inverter.

[0056] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A method for switching a high-voltage inverter control box when it crashes, characterized in that: The steps include: The standby main control box monitors whether the main main control box is dead; When the active main control box crashes, the standby main control box switches to the active main control box.

2. The method for switching the inverter control box when it crashes according to claim 1, characterized in that: The main control box of the high-voltage inverter adopts a redundant design, one of the main control boxes serves as the main control box, and the remaining main control boxes serve as backup main control boxes.

3. The method for switching the inverter control box when it crashes according to claim 2 is characterized in that: The main control box of the high-voltage inverter adopts a triple-redundancy design, in which one main control box serves as the main control box and the other two main control boxes serve as backup main control boxes.

4. The method for switching the inverter control box when it crashes according to claim 1, characterized in that: The main control box includes a fiber optic board and a CPU board. The fiber optic board is provided with an FPGA, and the CPU board is provided with a DSP processor. The FPGA communicates with the DSP processor backplane, and the FPGA receives the heartbeat word sent by the DSP processor in real time. The FPGA determines whether the CPU board is frozen by judging the heartbeat word sent by the DSP processor.

5. The method for switching the inverter control box when it crashes according to claim 4, characterized in that: The active main control box and the standby main control box are connected via a network cable and an Ethernet switch, and the internal operating data of the active main control box and the standby main control box are synchronized in real time.

6. The method for switching the inverter control box when it crashes according to claim 4, characterized in that: The FPGA of the main control box determines whether the CPU board is dead, including the following steps: The FPGA uses internal logic resources to create an external readable and writable RAM for the DSP processor; Through the address bus, the FPGA and DSP processor agree on an address to send the heartbeat word; FPGA receives the heartbeat word sent by DSP processor in real time; The FPGA creates a variable to store the heartbeat word sent by the DSP processor and uses this variable to compare with the heartbeat word sent by the next DSP processor; The heartbeat word sent by the DSP processor remains unchanged outside the deadlock determination time, and the FPGA determines that the CPU board is dead.

7. The method for switching the inverter control box when it crashes according to claim 6, characterized in that: When the FPGA of the main control box determines whether the CPU board is dead, the FPGA delays for a period of time after power-on and compares the created variable with the heartbeat word sent by the next DSP processor.

8. The method for switching a voltage converter control box when it crashes according to claim 6, characterized in that: When the FPGA of the main control box determines whether the CPU board is dead, if the heartbeat word sent by the DSP processor does not change within 5ms, that is, it does not change within the 21 interrupt times of the DSP processor, the FPGA determines that the CPU board is dead.

9. The method for switching a voltage converter control box when it crashes according to claim 6, characterized in that: When the active main control box crashes, the standby main control box switches to the active main control box, including the following steps: The CPU board of the standby main control box monitors the heartbeat status of the main main control box in real time; The CPU board of the standby main control box determines the status of the main control box according to the heartbeat word status of the main control box; When the heartbeat word status variable of the active main control box remains unchanged beyond the deadlock determination time, the CPU board of the standby main control box determines that the active main control box has deadlocked; The CPU board of the standby main control box first sends a shutdown command to its own fiber optic board, and then modifies its own position to a valid position to take over the control; After the standby main control box takes over control, it sends a start command to its own fiber optic board to realize actual control of the high-voltage inverter.