Optimal read voltage determination method and device, terminal and storage medium

By constructing the error bit count curve and the threshold voltage curve, combining the error bit count in adjacent storage states, the optimal read voltage is determined, which solves the fluctuation problem that cannot be fully covered in the prior art, and improves the accuracy of the read voltage and data integrity. sex.

CN119296614APending Publication Date: 2025-01-10HANGZHOU CORE POWER SEMICON CO LTD
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Patent Information

Application Number
CN202411308235.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-19
Publication Date
2025-01-10

AI Technical Summary

Technical Problem

When determining the optimal read voltage, the prior art cannot fully cover various situations, especially when the number of data bits in the memory cell increases, the integrity of the read data is difficult to ensure, and the existing methods have fluctuations that cannot be covered, resulting in The optimal read voltage determination is inaccurate.

Method used

By constructing the error bit count curve of the storage medium at each threshold voltage, two storage states adjacent to the target read voltage level are obtained, the first and second threshold voltage curves are constructed, and the optimal read is determined by combining the original threshold voltage curves. Voltage, eliminates the influence of non-target state, and improves the accuracy of read voltage.

Benefits of technology

Accurate determination of the optimal read voltage in various situations is achieved, reducing the impact of implicated flips and noise, and improving the integrity and stability of data reading.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of data storage, and provides an optimal reading voltage determination method and device, a terminal and a storage medium, and the method comprises the steps: constructing an original threshold voltage curve corresponding to a target reading voltage grade according to the error bit number of the storage medium under each threshold voltage; obtaining error bit numbers of storage units corresponding to two storage states adjacent to the target read voltage level under each threshold voltage, and constructing a first threshold voltage curve and a second threshold voltage curve; and according to the first threshold voltage curve, the second threshold voltage curve and the original threshold voltage curve, determining an optimal reading voltage under the target reading voltage grade. According to the method and the device, the storage units are divided into different storage states, when the optimal read voltage under the target read voltage level is determined, only the error bit number of the two storage states adjacent to the target read voltage level needs to be considered, and the influence of implicated overturning and noise brought by other storage units is eliminated, so that the optimal read voltage is determined more accurately.
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Description

Technical Field

[0001] The present application relates to the field of data storage technology, and in particular to a method, device, terminal and storage medium for determining an optimal read voltage. Background Art

[0002] Different types of storage media (flash memory particles) store different amounts of data in a storage unit, and the number of data bits stored in the storage unit is increasing. In order to ensure the integrity of data reading, it is necessary to find the optimal threshold voltage as the optimal read voltage to achieve optimal read data from the storage unit.

[0003] In the prior art, usually at a certain read voltage level (read level), the threshold voltage is changed from low to high in a certain order within the threshold voltage range, while keeping the other read voltage levels at 0, scanning the original read data of the storage device in the corresponding storage page, and obtaining the original read data of the two threshold voltages before and after the current threshold voltage by XOR to determine the number of storage cells (threshold) that the current threshold voltage sends a change. For example, at readlevel 1, the original read data read at the threshold voltage -60 and the threshold voltage -58 are respectively XORed to obtain the flipped cell number as the number of storage cells that send a change at -60. The offset (horizontal axis) and the cell number (vertical axis) obtained in the above manner are used to draw a threshold curve to find the optimal read voltage.

[0004] Based on the above, the existing technology mainly includes the following four ways to obtain the optimal read voltage:

[0005] Directly select the threshold voltage corresponding to the point with the minimum threshold value in a range near the threshold voltage of 0 as the optimal read voltage;

[0006] Find the 5 minimum thresholds in the selected range, and average the threshold voltages to get the optimal read voltage;

[0007] Calculate the threshold change from left to right, and when the slope exceeds the specified value, the threshold voltage is considered to be the optimal read voltage;

[0008] All adjacent calculated valley points within a certain range are obtained, and the threshold voltage closest to 0 among these valley points is the optimal read voltage.

[0009] Each of the above methods can obtain the ideal optimal reading voltage in most cases, but there are fluctuations that cannot be covered, that is, the above four methods are not comprehensive.

[0010] The following two examples are used to illustrate the shortcomings of several methods in the prior art. Figure 1 and Figure 2The solid line x is the actual storage unit change curve, and the dotted line y is the ideal curve without fluctuations that is filled in at the bottom position according to the original solid line trend.

[0011] Example 1, generally occurs when a relatively large value suddenly appears at the theoretically optimal threshold voltage position;

[0012] like Figure 1 As shown, according to intuitive judgment of the graph, the ideal position of the optimal reading voltage should be at the trough position in the graph filled with the black dotted line y after excluding fluctuations. In this case, the minimum value of Scheme 1 is at the position where the threshold voltage is 4, the average value of Scheme 2 is at the position where the threshold voltage is 12, Scheme 3 is at the position where the threshold voltage is 4 according to the general slope setting value, and Scheme 4 is at the position where the threshold voltage is 4; the ideal curve takes the position where the threshold voltage is 12 or 11, and in this case, only Scheme 2 has the correct value.

[0013] Example 2, generally occurs when the overall value fluctuates smoothly at a position close to the theoretical optimum;

[0014] like Figure 2 As shown, the minimum value of Scheme 1 is at the position of threshold voltage 16, the average value of Scheme 2 is at the position of threshold voltage 8, Scheme 3 is at the position of threshold voltage -4 according to the general slope setting value, and Scheme 4 is at the position of threshold voltage -4. In the case where the ideal curve takes the threshold voltage of 8, only Scheme 2 has the correct value. Summary of the invention

[0015] In view of this, embodiments of the present application provide a method, device, terminal, and storage medium for determining an optimal read voltage, which can achieve determination of the optimal read voltage in various situations.

[0016] In a first aspect, an embodiment of the present application provides a method for determining an optimal read voltage, comprising:

[0017] According to the number of error bits of the storage medium at each threshold voltage, an original threshold voltage curve corresponding to the target read voltage level is constructed;

[0018] Acquire two storage states adjacent to the target read voltage level as a first storage state and a second storage state;

[0019] A first threshold voltage curve is constructed according to the number of error bits of the first storage unit at each of the threshold voltages, and a second threshold voltage curve is constructed according to the number of error bits of the second storage unit at each of the threshold voltages; wherein the first storage unit is a storage unit in the storage medium that belongs to the first storage state, and the second storage unit is a storage unit in the storage medium that belongs to the second storage state;

[0020] An optimal read voltage at the target read voltage level is determined according to the first threshold voltage curve, the second threshold voltage curve, and the original threshold voltage curve.

[0021] In some embodiments, before constructing the original threshold voltage curve corresponding to the target read voltage level according to the number of error bits of the storage medium at each threshold voltage, the method further includes:

[0022] Determine the threshold voltage variation range;

[0023] The constructing the original threshold voltage curve corresponding to the target read voltage level according to the number of error bits of the storage medium at each threshold voltage includes:

[0024] Under the target read voltage level and within the threshold voltage variation range, after changing the threshold voltage in a sequence from low to high according to a preset voltage interval each time, reading original read data in the storage medium under the current threshold voltage, and comparing the original read data with known write data to obtain a corresponding number of error bits;

[0025] The original threshold voltage curve is constructed with the threshold voltage as the abscissa and the corresponding number of error bits as the ordinate.

[0026] In some embodiments, before acquiring the two storage states adjacent to the target read voltage level as the first storage state and the second storage state, the method further includes:

[0027] The storage state to which each storage unit belongs is determined according to the writing state of each storage unit in the storage medium when writing data.

[0028] In some embodiments, constructing a first threshold voltage curve according to the number of error bits of the first storage unit at each of the threshold voltages, and constructing a second threshold voltage curve according to the number of error bits of the second storage unit at each of the threshold voltages includes:

[0029] Under the target read voltage level and within the threshold voltage variation range, after the threshold voltage is changed in order from low to high according to a preset voltage interval each time, first original read data of the first storage unit and second original read data of the second storage unit under the current threshold voltage are respectively read;

[0030] Comparing the first original read data with the first known written data of the first storage unit to obtain a first number of error bits;

[0031] Comparing the second original read data with the second known written data of the second storage unit to obtain a second number of error bits;

[0032] The first threshold voltage curve is constructed with the threshold voltage as the abscissa and the first number of error bits as the ordinate, and the second threshold voltage curve is constructed with the threshold voltage as the abscissa and the second number of error bits as the ordinate.

[0033] In some embodiments, determining the optimal read voltage at the target read voltage level according to the first threshold voltage curve, the second threshold voltage curve, and the original threshold voltage curve comprises:

[0034] Adding the number of error bits corresponding to each of the threshold voltages in the first threshold voltage curve and the second threshold voltage curve to obtain a sum of the number of error bits corresponding to each of the threshold voltages;

[0035] Constructing a third threshold voltage curve with the threshold voltage as the abscissa and the corresponding sum of the number of error bits as the ordinate;

[0036] An optimal read voltage at the target read voltage level is determined according to the original threshold voltage curve and the third threshold voltage curve.

[0037] In some embodiments, determining the optimal read voltage at the target read voltage level according to the original threshold voltage curve and the third threshold voltage curve includes:

[0038] Acquire the threshold voltage corresponding to a valley point in the third threshold voltage curve as a reference threshold voltage;

[0039] Obtaining all minimum error bit numbers in the original threshold voltage curve;

[0040] Obtaining a threshold voltage corresponding to all the minimum numbers of error bits as a comparison threshold voltage;

[0041] The threshold voltage of the comparison threshold voltages that is closest to the reference threshold voltage is used as the optimal read voltage at the target read voltage level.

[0042] In some embodiments, the storage state included in the storage medium is determined by a Gray code arrangement rule.

[0043] In a second aspect, an embodiment of the present application provides an optimal read voltage determination device, comprising:

[0044] A first construction module is used to construct an original threshold voltage curve corresponding to a target read voltage level according to the number of error bits of the storage medium at each threshold voltage;

[0045] An acquisition module, configured to acquire two storage states adjacent to the target read voltage level as a first storage state and a second storage state;

[0046] A second construction module, configured to construct a first threshold voltage curve according to the number of error bits of the first storage unit at each of the threshold voltages, and to construct a second threshold voltage curve according to the number of error bits of the second storage unit at each of the threshold voltages; wherein the first storage unit is a storage unit in the storage medium that belongs to the first storage state, and the second storage unit is a storage unit in the storage medium that belongs to the second storage state;

[0047] A determination module is used to determine the optimal read voltage under the target read voltage level according to the first threshold voltage curve, the second threshold voltage curve and the original threshold voltage curve.

[0048] In a third aspect, an embodiment of the present application provides a terminal device, comprising a processor and a memory, wherein the memory stores a computer program, and the processor is used to execute the computer program to implement the above-mentioned optimal read voltage determination method.

[0049] In a fourth aspect, an embodiment of the present application provides a readable storage medium storing a computer program, which, when executed on a processor, implements the above-mentioned method for determining the optimal read voltage.

[0050] The embodiments of the present application have the following beneficial effects: the present application divides the storage cells of the storage medium into different storage states, so that when determining the optimal read voltage under the target read voltage level, only the number of error bits of the two storage states adjacent to the target read voltage level needs to be considered, and the influence of the involved flips and noise brought by the storage cells in the remaining storage states is eliminated, so that the optimal read voltage can be determined more accurately. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0052] Figure 1 A first curve schematic diagram of Example 1 in the background technology is shown;

[0053] Figure 2 A second curve schematic diagram of Example 2 in the background technology is shown;

[0054] Figure 3 A schematic diagram of the read voltage level of MLC in an embodiment of the present application is shown;

[0055] Figure 4 A schematic diagram of the read voltage level of TLC in an embodiment of the present application is shown;

[0056] Figure 5 A schematic diagram showing a flow chart of a method for determining an optimal read voltage according to an embodiment of the present application is shown;

[0057] Figure 6 An example schematic diagram showing a threshold voltage curve of an embodiment of the present application;

[0058] Figure 7 Shown based on Figure 6 A schematic diagram of the curve obtained from the example schematic diagram of the threshold voltage curve;

[0059] Figure 8 A schematic structural diagram of an optimal read voltage determination device according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0060] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0061] The components of the embodiments of the present application generally described and shown in the drawings herein may be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0062] Hereinafter, the terms "including", "having" and their cognates that can be used in various embodiments of the present application are intended only to indicate specific features, numbers, steps, operations, elements, components or a combination of the foregoing items, and should not be understood as first excluding the existence of one or more other features, numbers, steps, operations, elements, components or a combination of the foregoing items or increasing the possibility of one or more features, numbers, steps, operations, elements, components or a combination of the foregoing items. In addition, the terms "first", "second", "third" and the like are only used to distinguish descriptions and cannot be understood as indicating or implying relative importance.

[0063] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meanings as those generally understood by those skilled in the art to which the various embodiments of the present application belong. The terms (such as those defined in generally used dictionaries) will be interpreted as having the same meanings as the contextual meanings in the relevant technical field and will not be interpreted as having idealized meanings or overly formal meanings unless clearly defined in the various embodiments of the present application.

[0064] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0065] The optimal read voltage determination method in the present application can support the determination of the optimal read voltage of different types of flash memory, such as single-level cell (SLC), double-level cell (MLC), triple-level cell (TLC) and quad-level cell (QLC) flash memory particles.

[0066] The storage states involved in this application are described below. Different storage media contain different storage states. The storage states of the storage media are determined according to the Gray code arrangement rules. For example, a storage unit of SLC stores 1 bit of data, corresponding to 2 storage states (including: 0 and 1), a storage unit of MLC stores 2 bits of data, corresponding to 4 storage states (including: (0, 0), (0, 1), (1, 1) and (1, 0)), a storage unit of TLC stores 3 bits of data, corresponding to 8 storage states (0, 0, 0), (0, 0, 1), (0, 1, 1), (0, 1, 0), (1, 1, 0), (1, 1, 1), (1, 0, 1) and (1, 0, 0), and a storage unit of QLC stores 3 bits of data, corresponding to 8 storage states (0, 0, 0), (0, 0, 1), (0, 1, 1), (0, 1, 0), (1, 1, 1), (1, 0, 1) and (1, 0, 0). A storage unit stores 4 bits of data, corresponding to 16 storage states (including: (0,0,0,0), (0,0,0,1), (0,0,1,1), (0,0,1,0), (0,1,1,0), (0,1,1,1), (0,1,0,1), (0,1,0,0), (1,1,0,0), (1,1,0,0), (1,1,0,1), (1,1,1,1), (1,1,1,0), (1,0,1,0), (1,0,1,1), (1,0,0,1) and (1,0,0,0)).

[0067] Further explanation of the read voltage level in this application, since each storage medium contains a different number of storage states, in order to obtain data of different storage states, different comparison voltages are required for comparison. Figure 3As shown, each storage cell in MLC can store two bits of data. In order to obtain two bits of data, each flash memory cell has four threshold voltage states, and three comparison voltages are required for comparison. The three comparison voltages correspond to three read voltage levels ( Figure 3 read level1, read level2 and read level3); Figure 4 As shown, each storage cell in TLC can store three bits of data. In order to obtain three bits of data, each flash memory cell has eight threshold voltage states, and seven comparison voltages are required for comparison. The seven comparison voltages correspond to seven read voltage levels ( Figure 3 The read voltage levels of other storage media are determined in the same manner. Generally, the read voltage levels can be set as needed, and after the setting, the storage states adjacent to each read voltage level can also be determined.

[0068] The method for determining the optimal read voltage is described below in conjunction with some specific embodiments.

[0069] Figure 5 A schematic flow chart of a method for determining an optimal read voltage according to an embodiment of the present application is shown. Exemplarily, the method for determining an optimal read voltage includes the following steps:

[0070] Step S100 , constructing an original threshold voltage curve corresponding to a target read voltage level according to the number of error bits of the storage medium at each threshold voltage.

[0071] Before step S100, the present application also includes determining a threshold voltage variation interval, that is, a threshold voltage offset range. The threshold voltage variation interval of the present application is -60 to 60. When obtaining the number of error bits below, it is performed within this range.

[0072] Step S100 specifically includes: under the target read voltage level, within the threshold voltage variation range, after changing the threshold voltage in order from low to high according to a preset voltage interval each time, reading the original read data in the storage medium under the current threshold voltage, and comparing the original read data with the known write data to obtain the corresponding number of error bits; constructing an original threshold voltage curve with the threshold voltage as the horizontal coordinate and the corresponding number of error bits as the vertical coordinate.

[0073] It can be understood that the present application can obtain the optimal read voltage at each read voltage level, and when obtaining the optimal read voltage of a certain read voltage level, the read voltage level is used as the target read voltage level. Within the threshold voltage variation range, first, when the threshold voltage is -60, the original read data in the storage medium is read, wherein the original read data is the data directly read from the storage medium; then the read original read data is compared with the known write data to obtain the number of error bits at -60, wherein the known write data is the data written to the storage medium, and since the storage state of each storage unit when the known write data is known, the storage state of the storage unit where the read original read data is located can also be obtained, and the number of storage units whose storage state has changed is the number of error bits. Continue to move the threshold voltage according to the preset voltage interval, read the original read data in the storage medium, and then compare the read original read data with the known write data to obtain the number of error bits under the changed threshold voltage, and so on. After obtaining the number of error bits under the current threshold voltage, continue to obtain the number of error bits under the preset voltage interval; if the threshold voltage interval is 1, after obtaining the number of error bits under -60, then obtain the number of error bits under -59, and so on, until the number of error bits under 60 is obtained; if the threshold voltage interval is 0.5, after obtaining the number of error bits under -60, then obtain the number of error bits under -59.5, and so on, until the number of error bits under 60 is obtained. It can be understood that the above-mentioned preset voltage interval of 1 or 0.5 is only exemplary, and the specific preset voltage interval can be set according to actual needs, and is not specifically limited here.

[0074] After obtaining the number of error bits at each threshold voltage, an original threshold voltage curve is constructed with the threshold voltage as the horizontal axis and the corresponding number of error bits as the vertical axis (e.g. Figure 6 Curve a) in .

[0075] Step S200 , acquiring two storage states adjacent to the target read voltage level as a first storage state and a second storage state.

[0076] It can be seen from the above description of the read voltage level that two adjacent storage states of each read voltage level can be obtained.

[0077] Step S300 , constructing a first threshold voltage curve according to the number of error bits of the first storage unit at each threshold voltage, and constructing a second threshold voltage curve according to the number of error bits of the second storage unit at each threshold voltage.

[0078] The first storage unit is a storage unit in the storage medium that belongs to the first storage state, and the second storage unit is a storage unit in the storage medium that belongs to the second storage state.

[0079] Before step S200, it also includes: determining the storage state of each storage unit according to the write state of each storage unit in the storage medium when writing data; that is, like the storage state of each storage medium mentioned above, when writing data to each storage unit, the storage state of the storage unit has been determined, that is, the state when writing data is used as the storage state of the storage unit; if the state of writing data to a storage unit is (0, 0, 1), then the storage unit belongs to the storage state of (0, 0, 1). Taking TLC as an example, the storage units can be divided into 8 groups according to the write state of each storage unit when writing data, and each group corresponds to one storage state.

[0080] Step S300 specifically includes: under the target read voltage level, within the threshold voltage variation range, each time after changing the threshold voltage in order from low to high according to a preset voltage interval, respectively read the first original read data of the first storage unit and the second original read data of the second storage unit under the current threshold voltage; compare the first original read data with the first known write data of the first storage unit to obtain a first number of error bits; compare the second original read data with the second known write data of the second storage unit to obtain a second number of error bits; construct a first threshold voltage curve with the threshold voltage as the horizontal coordinate and the corresponding first number of error bits as the vertical coordinate, and construct a second threshold voltage curve with the threshold voltage as the horizontal coordinate and the corresponding second number of error bits as the vertical coordinate.

[0081] The following describes in detail the construction of the first threshold voltage curve as an example.

[0082] Under the target read voltage level, within the threshold voltage variation range, firstly, when the threshold voltage is -60, the first original read data in the storage cell corresponding to the first storage state adjacent to the target read voltage level in the storage medium is read; Figure 4 As shown, taking TLC as an example, if the target read voltage level is read level 6, the two storage states adjacent to read level 6 are P5 and P6, and only the original data corresponding to P5 and P6 can be obtained in this step.

[0083] After obtaining the first original read data in the first storage unit corresponding to the first storage state, the read first original read data is compared with the first known write data, that is, compared with the write data previously written in the first storage state, to obtain the number of error bits corresponding to the first storage state at -60. Continue to change the threshold voltage according to the preset voltage interval, continue to read the first original read data in the first storage unit corresponding to the first storage state in the storage medium, and then compare the read first original read data with the first known write data to obtain the number of error bits under the changed threshold voltage, and so on. After obtaining the number of error bits corresponding to the first storage state under the current threshold voltage, continue to obtain the number of error bits corresponding to the first storage state under the next threshold voltage according to the preset voltage interval until the threshold voltage moves to 60.

[0084] After obtaining the number of error bits corresponding to the first storage state at each threshold voltage, a first threshold voltage curve (such as Figure 6 (shown as curve b in the figure).

[0085] The second threshold voltage curve (such as Figure 6 The construction of the curve c) is the same as that of the first threshold voltage curve, which will not be repeated here.

[0086] It should be noted that if Figure 6 The unmarked dashed lines in the figure are the noise values ​​of other storage states, and do not need to be compared or calculated when determining the optimal read voltage. Figure 6 The curve in FIG. 1 is an example given to illustrate the method of the present application.

[0087] Step S400 , determining an optimal read voltage at the target read voltage level according to the first threshold voltage curve, the second threshold voltage curve, and the original threshold voltage curve.

[0088] Specifically, the number of error bits corresponding to each of the threshold voltages in the first threshold voltage curve and the second threshold voltage curve is added to obtain the sum of the number of error bits corresponding to each of the threshold voltages; that is, the ordinates corresponding to the same abscissa in the first threshold voltage curve and the second threshold voltage curve are added to obtain the sum of the number of error bits corresponding to the abscissa (threshold voltage); after obtaining the sum of the number of error bits corresponding to all the threshold voltages, a third threshold voltage curve (such as Figure 7 Curve d shown); finally, determining the optimal read voltage under the target read voltage level according to the original threshold voltage curve and the third threshold voltage curve.

[0089] Wherein, determining the optimal read voltage at the target read voltage level according to the original threshold voltage curve and the third threshold voltage curve includes:

[0090] Obtain the threshold voltage corresponding to the valley point in the third threshold voltage curve as the reference threshold voltage; obtain all the minimum error bit numbers in the original threshold voltage curve; obtain the threshold voltage corresponding to all the minimum error bit numbers as the comparison threshold voltage; and use the threshold voltage closest to the reference threshold voltage among the comparison threshold voltages as the optimal read voltage under the target read voltage level. Figure 7 The valley point position e of the curve d is taken as the reference threshold voltage, the minimum value of all error bit numbers in the original threshold voltage curve is obtained, and the threshold voltage closest to the threshold voltage corresponding to the valley position e is found from the threshold voltages corresponding to at least one minimum error bit number obtained as the optimal read voltage, such as Figure 7 From the threshold voltage curve shown in Figure 7 The optimal reading voltage shown in is 18V.

[0091] The present application divides the storage cells of the storage medium into different storage states through different storage media. In this way, when determining the optimal read voltage under the target read voltage level, only the number of error bits of the two storage states adjacent to the target read voltage level needs to be considered, and the influence of the involved flipping and noise brought by the storage cells of the remaining storage states is excluded; in addition, the present application ensures the stability of the comparison source by comparing the original read data (raw data) with the corresponding known write data (source data). In the process of the read voltage level (read level) shifting in the same direction, that is, the threshold voltage shifting, the number of error bits (error bit) obtained by comparison will only maintain an increase or decrease consistent with the characteristics of the storage medium, and the threshold voltage curve obtained is smooth. This smoothing can ensure that the third threshold voltage curve obtained retains a unique valley bottom, thereby ensuring that the problem of excessive shift of the optimal read voltage found can be solved.

[0092] Figure 8 A schematic diagram of the structure of an optimal read voltage determination device according to an embodiment of the present application is shown. Exemplarily, the optimal read voltage determination device includes:

[0093] The first constructing module 100 is used to construct an original threshold voltage curve corresponding to a target read voltage level according to the number of error bits of the storage medium at each threshold voltage.

[0094] The acquisition module 200 is used to acquire the two storage states adjacent to the target read voltage level as a first storage state and a second storage state.

[0095] The second construction module 300 is used to construct a first threshold voltage curve according to the number of error bits of the first storage unit at each of the threshold voltages, and to construct a second threshold voltage curve according to the number of error bits of the second storage unit at each of the threshold voltages; wherein the first storage unit is a storage unit in the storage medium that belongs to the first storage state, and the second storage unit is a storage unit in the storage medium that belongs to the second storage state.

[0096] The determination module 400 is configured to determine the optimal read voltage at the target read voltage level according to the first threshold voltage curve, the second threshold voltage curve and the original threshold voltage curve.

[0097] It can be understood that the device of this embodiment corresponds to the optimal read voltage determination method of the above embodiment, and the options in the above embodiment are also applicable to this embodiment, so they will not be described repeatedly here.

[0098] The present application also provides a terminal device. Exemplarily, the terminal device includes a processor and a memory, wherein the memory stores a computer program, and the processor runs the computer program to enable the terminal device to execute the functions of each module in the above-mentioned optimal read voltage determination method or the above-mentioned optimal read voltage determination device.

[0099] Among them, the processor can be an integrated circuit chip with signal processing capabilities. The processor can be a general-purpose processor, including a central processing unit (CPU), a graphics processing unit (GPU) and a network processor (NP), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. At least one of the general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc., which can implement or execute the disclosed methods, steps and logic block diagrams in the embodiments of the present application.

[0100] The memory may be, but is not limited to, a random access memory (RAM), a read only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), etc. The memory is used to store a computer program, and the processor may execute the computer program accordingly after receiving an execution instruction.

[0101] The present application also provides a readable storage medium for storing the computer program used in the above-mentioned terminal device.

[0102] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and structure diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in an alternative implementation, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the structure diagram and / or the flow diagram, and the combination of boxes in the structure diagram and / or the flow diagram, can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0103] In addition, the functional modules or units in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

[0104] If the function is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art, and the computer software product is stored in a storage medium, including several instructions for a computer device (which can be a smart phone, a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk.

[0105] The above description is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.

Claims

1. A method for determining an optimal read voltage, characterized in that: include: According to the number of error bits of the storage medium at each threshold voltage, an original threshold voltage curve corresponding to the target read voltage level is constructed; Acquire two storage states adjacent to the target read voltage level as a first storage state and a second storage state; A first threshold voltage curve is constructed according to the number of error bits of the first storage unit at each of the threshold voltages, and a second threshold voltage curve is constructed according to the number of error bits of the second storage unit at each of the threshold voltages; wherein the first storage unit is a storage unit in the storage medium that belongs to the first storage state, and the second storage unit is a storage unit in the storage medium that belongs to the second storage state; An optimal read voltage at the target read voltage level is determined according to the first threshold voltage curve, the second threshold voltage curve, and the original threshold voltage curve.

2. The method for determining the optimal read voltage according to claim 1, characterized in that: Before constructing the original threshold voltage curve corresponding to the target read voltage level according to the number of error bits of the storage medium at each threshold voltage, the method further includes: Determine the threshold voltage variation range; The constructing the original threshold voltage curve corresponding to the target read voltage level according to the number of error bits of the storage medium at each threshold voltage includes: Under the target read voltage level and within the threshold voltage variation range, after changing the threshold voltage in a sequence from low to high according to a preset voltage interval each time, reading original read data in the storage medium under the current threshold voltage, and comparing the original read data with known write data to obtain a corresponding number of error bits; The original threshold voltage curve is constructed with the threshold voltage as the abscissa and the corresponding number of error bits as the ordinate.

3. The method for determining the optimal read voltage according to claim 2, wherein: Before acquiring the two storage states adjacent to the target read voltage level as the first storage state and the second storage state, the method further includes: The storage state to which each storage unit belongs is determined according to the writing state of each storage unit in the storage medium when writing data.

4. The method for determining the optimal read voltage according to claim 3, characterized in that: The step of constructing a first threshold voltage curve according to the number of error bits of the first storage unit at each of the threshold voltages, and constructing a second threshold voltage curve according to the number of error bits of the second storage unit at each of the threshold voltages comprises: Under the target read voltage level and within the threshold voltage variation range, after the threshold voltage is changed in order from low to high according to a preset voltage interval each time, first original read data of the first storage unit and second original read data of the second storage unit under the current threshold voltage are respectively read; Comparing the first original read data with the first known written data of the first storage unit to obtain a first number of error bits; Comparing the second original read data with the second known written data of the second storage unit to obtain a second number of error bits; The first threshold voltage curve is constructed with the threshold voltage as the abscissa and the first number of error bits as the ordinate, and the second threshold voltage curve is constructed with the threshold voltage as the abscissa and the second number of error bits as the ordinate.

5. The method for determining the optimal read voltage according to claim 1, wherein: The determining the optimal read voltage at the target read voltage level according to the first threshold voltage curve, the second threshold voltage curve and the original threshold voltage curve comprises: Adding the number of error bits corresponding to each of the threshold voltages in the first threshold voltage curve and the second threshold voltage curve to obtain a sum of the number of error bits corresponding to each of the threshold voltages; Constructing a third threshold voltage curve with the threshold voltage as the abscissa and the corresponding sum of the number of error bits as the ordinate; An optimal read voltage at the target read voltage level is determined according to the original threshold voltage curve and the third threshold voltage curve.

6. The method for determining the optimal read voltage according to claim 5, characterized in that: The determining the optimal read voltage at the target read voltage level according to the original threshold voltage curve and the third threshold voltage curve comprises: Acquire the threshold voltage corresponding to a valley point in the third threshold voltage curve as a reference threshold voltage; Obtaining the minimum number of error bits corresponding to all valley points in the original threshold voltage curve; Obtaining threshold voltages corresponding to all the minimum number of error bits as comparison threshold voltages; The threshold voltage of the comparison threshold voltages that is closest to the reference threshold voltage is used as the optimal read voltage at the target read voltage level.

7. The method for determining the optimal read voltage according to claim 1, wherein: The storage state included in the storage medium is determined by a Gray code arrangement rule.

8. An optimal reading voltage determination device, characterized in that: include: A first construction module is used to construct an original threshold voltage curve corresponding to a target read voltage level according to the number of error bits of the storage medium at each threshold voltage; An acquisition module, used for acquiring two storage states adjacent to the target read voltage level as a first storage state and a second storage state; A second construction module, configured to construct a first threshold voltage curve according to the number of error bits of the first storage unit at each of the threshold voltages, and to construct a second threshold voltage curve according to the number of error bits of the second storage unit at each of the threshold voltages; wherein the first storage unit is a storage unit in the storage medium that belongs to the first storage state, and the second storage unit is a storage unit in the storage medium that belongs to the second storage state; A determination module is used to determine the optimal read voltage under the target read voltage level according to the first threshold voltage curve, the second threshold voltage curve and the original threshold voltage curve.

9. A terminal device, characterized in that: The terminal device comprises a processor and a memory, wherein the memory stores a computer program, and the processor is configured to execute the computer program to implement the optimal read voltage determination method according to any one of claims 1 to 7.

10. A readable storage medium, characterized in that: The device stores a computer program, which, when executed on a processor, implements the optimal read voltage determination method according to any one of claims 1 to 7.

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