Lossless absorption circuit

By designing a lossless absorption circuit including capacitors, diodes and inductors in the switching power supply, the energy loss and structural complexity problems in the prior art are solved, and efficient power efficiency and reliability are achieved.

CN119298640APending Publication Date: 2025-01-10SHENZHEN GOSPELL DIGITAL TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202411612824.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-13
Publication Date
2025-01-10

AI Technical Summary

Technical Problem

In switching power supplies, the RC or RCD absorbing circuit used in the prior art causes energy loss under high power and high current conditions, affects power efficiency, and lacks structural complexity and reliability.

Method used

A lossless absorption circuit is designed, including capacitor C1, diodes D1 and D2, and inductor L1. Through the combination of diode and inductor, the leakage inductance energy of the transformer is absorbed and transferred to Vin to avoid energy consumption on the resistor.

Benefits of technology

It realizes lossless absorption with simple structure and high reliability, reduces energy loss, improves power efficiency, and transfers leakage inductance energy to Vin, improving the overall efficiency of the system.

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Abstract

The invention belongs to the technical field of circuits, and discloses a lossless absorption circuit which comprises a capacitor C1, one end of the capacitor C1 is connected with the positive end of a diode D1 and the negative end of a diode D2, the positive end of the diode D2 is connected with one end of an inductor L1, and the other end of the capacitor C1, the negative end of the diode D1 and the other end of the inductor L1 are connected with a circuit to be absorbed. The negative end of the diode D1 is connected with the port Vin and one end of the capacitor C5, and the other end of the capacitor C5 is connected with the other end of the inductor L1 and the port GND. The beneficial effects of the invention are that the structure is simple, the reliability is high, the leakage inductance energy is not consumed and is transferred to Vin, and the efficiency is improved.
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Description

Technical Field

[0001] The present invention relates to the field of circuit technology, and in particular to a lossless absorption circuit. Background Art

[0002] In switching power supplies, DCDC conversion is widely used, and typical topologies include forward, flyback, half-bridge, full-bridge, and push-pull. Forward flyback is a single-ended topology, which only requires a switch connected to a transformer, such as Figure 1 As shown. The advantage is the simple structure, the disadvantage is that there is no clamping when the switch tube is turned off. Due to the leakage inductance of the transformer, very high burrs will be generated between the drain and source of the tube. Simple RC (resistance + capacitor) absorption is usually used to reduce the size of the burr and keep the drain-source voltage of the tube within a safe range. When the leakage inductance energy is larger, RCD (resistance + capacitor + diode) absorption is usually used instead, such as Figure 2 As shown in the figure, no matter the RC absorption in the front or the RCD absorption in the back, the leakage inductance energy is consumed by the resistor. In the case of higher power and higher current, this energy is still quite significant, which will lead to a larger external resistor and affect the power supply efficiency.

[0003] Therefore, it is necessary to provide a lossless absorption circuit with simple structure, high reliability, reduced energy loss and improved power supply efficiency. Summary of the invention

[0004] The invention discloses a lossless absorption circuit, relates to the technical field of power electronics, can be widely used in switching power supplies, and can effectively solve the technical problems involved in the background technology.

[0005] To achieve the above object, the technical solution of the present invention is:

[0006] A lossless absorption circuit comprises a capacitor C1, one end of the capacitor C1 is connected to the positive end of a diode D1 and the negative end of a diode D2, the positive end of the diode D2 is connected to one end of an inductor L1, and the other end of the capacitor C1, the negative end of the diode D1 and the other end of the inductor L1 are connected to a circuit to be absorbed.

[0007] As a preferred improvement of the present invention: the circuit to be absorbed includes a DCDC conversion circuit.

[0008] As a preferred improvement of the present invention: the negative end of the diode D1 is connected to the port Vin and one end of the capacitor C5, and the other end of the capacitor C5 is connected to the other end of the inductor L1 and the port GND.

[0009] As a preferred improvement of the present invention: the circuit to be absorbed includes an isolation topology structure.

[0010] As a preferred improvement of the present invention: the circuit to be absorbed is a single-ended isolation topology.

[0011] As a preferred improvement of the present invention: the circuit to be absorbed includes a transformer T1, a pin 4 of the transformer T1 is connected to the negative end of the diode D1, one end of the capacitor C5 and a port Vin, a pin 3 of the transformer T1 is connected to the other end of the capacitor C1 and the drain of the MOS tube Q3, and a source of the MOS tube Q3 is connected to the other end of the inductor L1, the other end of the capacitor C5 and a port GND.

[0012] As a preferred improvement of the present invention: the circuit to be absorbed includes a non-isolated topology structure.

[0013] As a preferred improvement of the present invention: the circuit to be absorbed is a Boost circuit.

[0014] As a preferred improvement of the present invention: the circuit to be absorbed includes a port Vin, the port Vin is connected to one end of the capacitor C5, the negative end of the diode D1 and one end of the inductor L2, the other end of the inductor L2 is connected to the positive end of the diode D3, the other end of the capacitor C1 and the drain of the MOS tube Q3, the negative end of the diode D3 is connected to the port Vout and one end of the capacitor C2, the other end of the capacitor C2 is connected to the source of the MOS tube Q3, the other end of the inductor L1, the other end of the capacitor C5 and the port GND.

[0015] The beneficial effects of the present invention are as follows:

[0016] The absorption circuit composed of C1, L1, D1 and D2 are all passive devices with simple structure and high reliability. The leakage inductance energy is not consumed but transferred to Vin, which improves the efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0018] Figure 1 For existing circuits Figure 1 ;

[0019] Figure 2 For existing circuits Figure 2 ;

[0020] Figure 3 A schematic diagram of a lossless absorption circuit of the present invention Figure 1 ;

[0021] Figure 4 A schematic diagram of a lossless absorption circuit of the present invention Figure 2 . DETAILED DESCRIPTION

[0022] The technical solutions in the embodiments of the present invention will be described clearly and completely below in combination with the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0024] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0025] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0026] In addition, the technical solutions between the various embodiments of the present invention can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0027] See also Figure 3As shown, the present invention provides a lossless absorption circuit, including a capacitor C1, one end of the capacitor C1 is connected to the positive end of the diode D1 and the negative end of the diode D2, the positive end of the diode D2 is connected to one end of the inductor L1, the other end of the capacitor C1, the negative end of the diode D1 and the other end of the inductor L1 are connected to the circuit to be absorbed, in this embodiment, the circuit to be absorbed includes a DCDC conversion circuit, the circuit to be absorbed includes an isolation topology structure, specifically a single-ended isolation topology, the circuit to be absorbed includes a transformer T1, the pin 4 of the transformer T1 is connected to the negative end of the diode D1, one end of the capacitor C5 and the port Vin, the pin 3 of the transformer T1 is connected to the other end of the capacitor C1 and the drain of the MOS tube Q3, the source of the MOS tube Q3 is connected to the other end of the inductor L1, the other end of the capacitor C5 and the port GND. The transformer T1 is divided into a primary side and a secondary side, and the two sides of the circuit are respectively connected to structures such as a power grid, a battery, a load, and a photovoltaic panel, and the turns ratio is set as needed to complete the voltage conversion.

[0028] The absorption circuit is composed of D1, D2, C1 and L1.

[0029] When Q3 is just turned off, when the Vds (drain-source voltage) of Q3 increases, the voltage on the left side of C1 follows the drain voltage of Q3. When the voltage on the right side of C1 is higher than Vin, D1 will be turned on, so that C1 will suppress the Vds voltage of Q3 and reduce the burrs. When the Vds of Q3 is turned off and stabilized, the Vds voltage is higher than Vin, and the voltage of C1 remains high on the left and low on the right.

[0030] When Q3 is turned on, the left side of C1 is shorted to the ground by Q3, and the voltage on the right side of C1 becomes negative, so D2 is turned on, and the inductor L1 discharges to C1 through D2, and the current of L1 increases. When the voltage of C1 is reduced to 0V, the current of inductor L1 is the largest and continues to flow. The voltage of capacitor C1 gradually becomes lower on the left and higher on the right, L1 continues to discharge, and the voltage on the right side of C1 continues to rise. When it is higher than Vin, D1 is turned on. L1 continues to discharge until the current is 0, and maintains this state until the next time Q3 is turned off.

[0031] When Q3 is turned off again, the voltage of C1 is low on the left and high on the right, and D1 is turned on. Due to the clamping effect of C1, the Vds rising rate of Q3 is limited, thereby reducing the Vds stress of Q3.

[0032] In this way, through the energy transfer between C1 and L1, the leakage inductance energy of the transformer is transferred to Vin, completing the lossless leakage inductance energy absorption. The absorption circuit composed of C1, L1, D1 and D2 are all passive devices with simple structure and high reliability. The leakage inductance energy is not consumed, but transferred to Vin, which improves the efficiency. The figure takes the single-ended isolation topology (forward, flyback) as an example, but the protection range is not limited to the single-ended topology, and other isolation topologies are also within the protection range.

[0033] The non-isolated topology usually has a clamping effect itself, but when the PCB routing and the device lead inductance are relatively long, an external absorption circuit is also required. The present invention can also effectively absorb the parasitic inductance energy, and such topological applications are also within the scope of protection required. For example Figure 4 In topologies such as Boost circuits, D3 itself has a clamping effect in low-power applications. However, in high-power applications, since D3 / Q3 both use large plug-in devices and the back-mounted heat sink for heat dissipation, the spatial layout will cause a certain amount of parasitic inductance between D3 and Q3, as well as the connection with L2, which will also cause relatively large burrs on Q3.

[0034] When the lossless absorption circuit of the present invention is applied thereto, the circuit to be absorbed includes a port Vin, the port Vin is connected to one end of the capacitor C5, the negative end of the diode D1 and one end of the inductor L2, the other end of the inductor L2 is connected to the positive end of the diode D3, the other end of the capacitor C1 and the drain of the MOS tube Q3, the negative end of the diode D3 is connected to the port Vout and one end of the capacitor C2, the other end of the capacitor C2 is connected to the source of the MOS tube Q3, the other end of the inductor L1, the other end of the capacitor C5 and the port GND, one end of the capacitor C1 is connected to the positive end of the diode D1 and the negative end of the diode D2, and the positive end of the diode D2 is connected to one end of the inductor L1. By adding the absorption circuit composed of C1, L1, D1 and D2, the parasitic inductance energy can be effectively absorbed and the power supply efficiency can be improved. It should be further explained that the use of other components to achieve the above-mentioned effects should all belong to the inventive concept of the present invention and should belong to the protection scope of the present invention.

[0035] Although the embodiments of the present invention have been disclosed as above, they are not limited to the applications listed in the specification and the embodiments. They can be fully applied to various fields suitable for the present invention. For those familiar with the art, additional modifications can be easily implemented. Therefore, without departing from the general concept defined by the claims and the scope of equivalents, the present invention is not limited to the specific details and the illustrations shown and described herein.

Claims

1. A lossless absorption circuit, characterized in that: It includes a capacitor C1, one end of which is connected to the positive end of a diode D1 and the negative end of a diode D2, the positive end of the diode D2 is connected to one end of an inductor L1, and the other end of the capacitor C1, the negative end of the diode D1 and the other end of the inductor L1 are connected to a circuit to be absorbed.

2. A lossless absorption circuit according to claim 1, characterized in that: The circuit to be absorbed includes a DCDC conversion circuit.

3. A lossless absorption circuit according to claim 1, characterized in that: The negative end of the diode D1 is connected to the port Vin and one end of the capacitor C5 , and the other end of the capacitor C5 is connected to the other end of the inductor L1 and the port GND.

4. A lossless absorption circuit according to claim 1, characterized in that: The circuit to be absorbed includes an isolation topology structure.

5. A lossless absorption circuit according to claim 4, characterized in that: The circuit to be absorbed is a single-ended isolation topology.

6. A lossless absorption circuit according to claim 5, characterized in that: The circuit to be absorbed includes a transformer T1, a pin 4 of the transformer T1 is connected to the negative end of the diode D1, one end of the capacitor C5 and a port Vin, a pin 3 of the transformer T1 is connected to the other end of the capacitor C1 and the drain of the MOS tube Q3, and a source of the MOS tube Q3 is connected to the other end of the inductor L1, the other end of the capacitor C5 and a port GND.

7. A lossless absorption circuit according to claim 1, characterized in that: The circuit to be absorbed includes a non-isolated topology structure.

8. A lossless absorption circuit according to claim 7, characterized in that: The circuit to be absorbed is a Boost circuit.

9. A lossless absorption circuit according to claim 8, characterized in that: The circuit to be absorbed includes a port Vin, the port Vin is connected to one end of the capacitor C5, the negative end of the diode D1 and one end of the inductor L2, the other end of the inductor L2 is connected to the positive end of the diode D3, the other end of the capacitor C1 and the drain of the MOS tube Q3, the negative end of the diode D3 is connected to the port Vout and one end of the capacitor C2, the other end of the capacitor C2 is connected to the source of the MOS tube Q3, the other end of the inductor L1, the other end of the capacitor C5 and the port GND.