Communication address allocation method for multi-motor networking system

Abstract

The invention discloses a communication address allocation method for a multi-motor networking system, which comprises the following steps of: short-circuiting a certain output port and a certain input port of a first motor to form a slave 1, connecting signal input ports Vint and signal output ports Vout of other slaves in series in a matching way, and matching with the communication of a data bus, so as to realize the communication address allocation of the first motor. The upper computer sends an automatic addressing starting instruction in a broadcast mode to enable the slave 1 to determine a communication address; then, the slave 1 starts to send the next allocated address, the slave 2 confirms to change the address sent by the slave 1 according to an output signal X of a signal output port Vout of the slave 1, so that the communication address of each slave is determined one by one, the steps of the whole addressing process are reduced to the minimum, automation is realized, the operation time is shortened, and the reliability of the scheme is improved; and the operation needing to be executed by each motor is simplified.

Description

Technical Field

[0001] The present invention belongs to the technical field of motor communication applications, and in particular relates to a communication address allocation method for a multi-motor networking system. Background Art

[0002] In recent years, with the widespread application of 485 communication technology, the communication of the current multi-motor networking system generally adopts 485 communication. Communication technology is widely used. Most application scenarios are that multiple slaves (i.e. motors) are connected together to share the communication line. In this case, the address allocation scheme for the slaves is particularly important. For a small and fixed number, some simple methods can be used to allocate, but for some networking situations where the number and address of the network are uncertain, a solution that can facilitate the client to set the address is needed. The commonly used technical solutions are:

[0003] Solution 1: Assign addresses by connecting two external address selection lines. - When the number of addresses is large, more lead wires are required, which increases the cost and the addresses are fixed. See patent number: CN202210463600, title: Invention patent for a BLDC motor and electrical equipment with networking communication function.

[0004] Solution 2: Through the motor number written when the motor leaves the factory, when the motor number is known, use a special communication instruction to use the motor number as the second address of the slave to change the first address; see patent number CN202310224250, title: A method for allocating addresses for a multi-motor networked control system - invention patent. This solution is too cumbersome to operate, and all operations must be completed by the customer one by one.

[0005] Solution 3: When the default address of the slave is known, one slave is powered on, and then the host sends a communication command to change the slave address to address1. Then another slave is powered on and changed to address2... until the last slave changes its slave address to addressN. This technical solution is also too cumbersome to operate, and all operations must be completed by the customer one by one.

[0006] Solution 4: When the default address of the slave is unknown, a slave is powered on, and the host changes the slave address to address1 using broadcast mode. Then the slave is powered off; then another slave is powered on, its address is changed to address2, and the power is turned off; ... The process is repeated in this order until the last slave changes its slave address to addressN. This technical solution is also too cumbersome, and all operations must be completed by the customer one by one.

[0007] In order to solve the technical problems existing in the communication address allocation method of the multi-motor networking system mentioned above, a foreign company provides a simple, convenient and reliable communication address allocation method for the multi-motor networking system.Figure 1 As shown, the specific process is as follows: The address is selected by receiving the output signal of the host or the previous motor through the Din1 port of the motor. The steps are as follows:

[0008] Step 1: After completing the installation according to the above diagram, all motors are powered on and run.

[0009] Step 2: The master changes the address of all slaves to 01 using broadcast mode.

[0010] Step 3: Set the addressing switches of all slaves to enable through broadcast mode, and change the voltage output mode to the voltage output mode of automatic addressing.

[0011] Step 4: The host device outputs a pulse signal 1 to the Din of the next slave A (i.e., the motor) through the lead. After receiving the pulse signal, slave A increases its own address by 1, becoming 2. The host determines whether it has received the pulse signal. If not, it proceeds to the next step. If yes, it proceeds to step 8.

[0012] Step 5: The host device generates another pulse signal 2 through the lead to slave A, and the address of slave A increases by 2 to 3. Then slave A generates a pulse signal 1 to slave B, and the address of slave B increases by 1 to 2. The host determines whether it has received the pulse signal. If not, it executes the next step. If yes, it executes step 8.

[0013] Step 6: The host device generates another pulse signal 3 through the lead to slave A, and the address of slave A increases by 3 to 4. Then slave A generates a pulse signal 2 to slave B, and the address of slave B increases by 2 to 3. Then slave B generates a pulse signal 1 to slave C, and the address of slave C increases by 1 to 2. The host determines whether it has received the pulse signal. If not, it executes the next step. If yes, it executes step 8.

[0014] Step 7: The host device generates another pulse signal 4 through the lead to slave A, and the address of slave A increases by 4 to 5. Then slave A generates a pulse signal 3 to slave B, and the address of slave B increases by 3 to 4. Then slave B generates a pulse signal 2 to slave C, and the address of slave C increases by 2 to 3. Then slave C generates a pulse signal 1 to the host. The host determines whether it has received the pulse signal. If not, proceed to the next step. If yes, proceed to step 8.

[0015] Step 8: The host detects the input signal pulse 1, confirms that the addressing process is completed, sets the addressing switches of all slaves to disable through the broadcast mode, and changes the voltage output mode to the normal voltage output mode.

[0016] However, this technical solution still has the following technical problems:

[0017] 1: The address is fixed and there is no way to freely choose the address.

[0018] 2: If other slaves are added to the network, all of them need to be reconnected before using this solution. This is not conducive to maintenance solutions.

[0019] 3: The whole solution takes a long time to execute and is prone to exceptions. The address of slave 1 is changed too many times, which increases the possibility of exceptions.

[0020] 4: What is the host machine? If it is a special device or something else, it will increase the cost.

[0021] 5: The output signal is required to be a pulse signal, which limits the derivation of the solution.

[0022] 6: The host needs to send more instructions if it wants to enable the automatic addressing function. Summary of the invention

[0023] The purpose of the present invention is to provide a communication address allocation method for a multi-motor networking system, so as to solve the technical problems in the prior art that multiple multi-motor networking systems use motor ports in series to allocate addresses, the addresses are fixed, there is no way to freely select addresses, it is not conducive to maintenance, the execution time of the whole solution is long, abnormalities are prone to occur, and the host needs to send more instructions.

[0024] The technical solution of the present invention is achieved in this way:

[0025] A communication address allocation method for a multi-motor networking system, the multi-motor networking system comprises N motors connected to a host computer, the N motors are networked with the host computer via a data bus, the motors comprise a microprocessor and a network communication module, each motor is connected to the data bus via the network communication module, the motors are provided with a signal input port Vint and a signal output port Vout, N is an integer greater than 4; the signal output ports Vout of the N motors have two output voltage modes, namely a conventional voltage output mode and an automatic addressing mode, characterized in that the N motors are numbered sequentially according to slave 1, slave 2 ... slave N, slave 1 is determined in a certain way, the signal output port Vout of slave 1 is connected to the signal input port Vint of slave 2, the signal output port Vout of slave 2 is connected to the signal input port Vint of slave 3, and the connections are made in this order until the Nth motor;

[0026] The host computer sends an automatic addressing start command through the broadcast mode, and slave 1 obtains its own communication address from the automatic addressing start command; slave 1 sends the next address to be assigned through the data bus, and slave 1 outputs signal X to slave 2 through the signal output port Vout. Slave 2 confirms that it has received signal X, and then slave 2 obtains its own communication address from the data bus;

[0027] Slave 2 sends the next address to be assigned through the data bus, and slave 2 outputs signal X to slave 3 through the signal output port Vout. Slave 3 confirms that it has received signal X, and then slave 3 obtains its own communication address from the data bus; the operation is carried out in this order until slave N obtains its own communication address.

[0028] The specific steps of the above address allocation method are as follows:

[0029] Step 1: Number N motors sequentially as slave 1, slave 2, ... slave N, short-circuit a certain output port of the first motor with a certain input port, so that the first motor serves as slave 1 of the multi-motor networking system, connect the signal output port Vout of slave 1 with the signal input port Vint of slave 2, connect the signal output port Vout of slave 2 with the signal input port Vint of slave 3, and so on, until the Nth motor;

[0030] Step 2: All N motors are powered on, and the host computer sends an automatic addressing start command through the broadcast mode, and specifies the address allocation starting value Address_start in the command. The automatic addressing switch of each motor is turned on, and the output voltage mode is changed to the automatic addressing mode;

[0031] Step 3: Slave 1 gets Address_start as its own address, and sends out the next address to be assigned, Address_start+K1*1, through the data bus. At this time, all slaves now know that the next address to be assigned is Address_start+K1*1. Slave 1 outputs signal X to slave 2 through the signal output port Vout. Slave 2 confirms that it has received signal X, and then the address of slave 2 is changed to Address_start+K1*1, where K1 is the increment of each address increase.

[0032] Step 4: Slave 2 sends the next address to be assigned, Address_start+K1*2, through the data bus. Slave 1 recognizes the instruction, and then the automatic addressing mode of slave 1 is turned off, and the output voltage mode of slave 1 is changed to the normal voltage output mode. Slave 2 outputs signal X to slave 3 through the signal output port Vout. After slave 3 confirms that it has received signal X, it changes its own address to Address_start+K1*2.

[0033] Step 5: Slave 3 sends the next address to be assigned, Address_start+K1*3, through the data bus. Slave 2 recognizes the instruction, and then the automatic addressing mode of slave 2 is turned off, and the output voltage mode of slave 2 is changed to the normal voltage output mode. Slave 3 outputs signal X to slave 4 through the signal output port Vout. After slave 4 confirms that it has received signal X, it changes its own address to Address_start+K1*3.

[0034] Step six, in the same way as step five, the addresses of slaves 5 to N are allocated one by one. When slave N outputs signal X through the signal output port Vout, there is no next slave at this time, and slave N will not receive the address instruction sent by the next slave. After a period of time T, slave N determines that there are no remaining slaves, so slave N turns off the automatic addressing mode and changes the voltage output mode to the normal voltage output mode, and the address allocation is completed.

[0035] The above-mentioned K1 is obtained through the instruction sent by the host computer or the value provided by the software itself.

[0036] The "short-circuiting of an output port of the first motor and an input port" described in the above step 1 refers to short-circuiting the 24V output port and the PWM input port of the first motor; or short-circuiting the 10V output port of the first motor and the 0-10V speed control signal input port.

[0037] The above-mentioned host computer is a computer or a system controller of a central air-conditioning system.

[0038] The N motors mentioned above are all permanent magnet synchronous motors.

[0039] The conventional voltage output mode means that the signal output port Vout outputs a voltage signal of 0-10V, and the automatic addressing mode means that the signal output port Vout outputs a signal X, where the signal X is a specific integer value that is not zero.

[0040] Compared with the prior art, the present invention has the following advantages:

[0041] 1. The entire system operation does not require additional equipment. By utilizing the signal input port Vint and the signal output port Vout set by the motor, as well as the combination of communications, the steps of the entire addressing process are reduced to a minimum and automated, reducing operation time, improving the reliability of the solution, and simplifying the operations that each motor needs to perform.

[0042] 2. The address range is optional, and the specified address range can be flexibly allocated, and the address of each motor is known after the addressing is completed.

[0043] 3. Except for the need for the host computer to send an addressing instruction once, no other operations are required.

[0044] 4. Various address allocation modes can be set, such as the address of motor 1 is 01, the address of motor 2 is 03, the address of motor 3 is 03, or the address of motor 1 is 03, the address of motor 2 is 06, and the address of motor 3 is 09.

[0045] 5. The addressing process is simple, efficient, reliable and takes the shortest time.

[0046] 6. There is no need to wait until the addressing is completed before turning off the addressing mode switch of each motor, which improves the reliability of the entire solution.

[0047] 7. There is no major restriction on the output signal X at the signal output port Vout, and the options are flexible.

[0048] 8. Each motor needs to perform few operations, so the scheme design will be simple. This improves the feasibility of the scheme and reduces the difficulty of scheme design. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 The present invention is a wiring diagram for allocating addresses by connecting motor ports in series in the prior art.

[0050] Figure 2 This is a wiring diagram of the multi-motor networking system provided by the present invention.

[0051] Figure 3 This is a schematic diagram of the structure of the motor provided by the present invention.

[0052] Figure 4 This is a schematic diagram of the circuit structure of the motor provided by the present invention.

[0053] Figure 5 A schematic diagram of the circuit structure of a circuit board of a motor controller provided by the present invention.

[0054] Figure 6 A circuit diagram of a conventional voltage output circuit provided by the present invention.

[0055] Figure 7 The present invention provides a circuit diagram of an automatic addressing voltage output.

[0056] Figure 8 It is a flow chart of the present invention. DETAILED DESCRIPTION

[0057] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0058] like Figures 2 to 5 As shown, this embodiment provides a multi-motor networking system, including N motors connected to a host computer 10, the N motors are connected to the host computer 10 through a network, the motors include a microprocessor and a network communication module, and each motor is connected to the network through the network communication module; specifically, the motor includes a motor body 100 and a motor controller 200, the motor body 100 includes a stator assembly, a rotor assembly and a casing, the stator assembly and the rotor assembly are installed in the casing, the motor controller 200 includes a circuit board 1 and a control box 201, the circuit board 1 is placed in the control box 201, the circuit board 1 includes a sub-circuit board and a mother circuit board, the sub-circuit board It is electrically connected to the mother circuit board. The daughter circuit board is provided with a daughter board microprocessor, a power supply circuit, a network communication module (i.e., a 485 serial communication circuit), a PWM signal processing circuit, an input voltage processing circuit, and a VSP signal processing circuit. The mother circuit board includes a motherboard microprocessor, an inverter circuit, and a detection circuit. The output end of the inverter circuit is electrically connected to the coil winding on the stator assembly. The motor body 100 is installed with a Hall sensor HALL for detecting the rotor position. The rotor assembly is mounted inside the stator assembly. The rotor position detection circuit sends the rotor position signal to the motherboard microprocessor. The motherboard microprocessor outputs a signal to control the operation of the inverter circuit.

[0059] The network communication module on the sub-circuit board leads to two communication lines A and B, and the two communication lines A and B are used to connect to the host computer. The communication signal input by the host computer is divided into two paths A and B, and then enters the daughter board microprocessor after being processed by the network communication module of the sub-circuit board. The communication signal processed by the daughter board microprocessor is sent to the motherboard microprocessor. The power supply circuit supplies power to the sub-circuit board and the mother circuit board, and the power supply circuit leads to 10V output and 24V output. The network communication module described in this embodiment is essentially a 485 serial communication circuit.

[0060] In this embodiment, the motor is a permanent magnet synchronous motor, and is provided with a signal input port Vint and a signal output port Vout. The signal input port Vint is sent to the daughter board microprocessor after passing through the input voltage processing circuit; the signal output port Vout of the N motors has two output voltage modes, namely, a conventional voltage output mode and an automatic addressing mode. The conventional voltage output mode refers to outputting a voltage of 0-10V, and the automatic addressing mode is to output a fixed digital voltage, such as a +10V DC voltage. Figure 5 The conventional voltage output mode in corresponds to the conventional voltage output circuit, Figure 5 The automatic addressing mode in corresponds to the automatic addressing voltage output. The conventional voltage output circuit and the automatic addressing voltage output are controlled by the daughter board microprocessor, such as Figure 6 As shown, the output signal DAC1 of the daughter board microprocessor controls the conventional voltage output circuit to output a voltage of 0-10V; the automatic addressing voltage output is to obtain a fixed digital voltage (for example, +5VDC) by connecting the resistors R5 and R6 in series between the +24V DC power supply and the ground GND. Figure 7 As shown, it is also connected to an on-off electronic switch JK1 controlled by the daughter board microprocessor to control the normal voltage output mode. Of course, the input voltage processing circuit is also divided into two parts, corresponding to the normal voltage output mode and the automatic addressing mode, which will not be described here. (Please read this paragraph carefully to see if it is described correctly)

[0061] like Figures 2 to 8 As shown, this embodiment provides a communication address allocation method for a multi-motor networking system, the multi-motor networking system includes N motors connected to a host computer, the N motors are networked with the host computer through a data bus, the motors include a microprocessor and a network communication module (i.e., a serial communication circuit), each motor is connected to the data bus through the network communication module, the motor is provided with a signal input port Vint and a signal output port Vout, N is an integer greater than 4; the signal output port Vout of the N motors has two output voltage modes, namely, a conventional voltage output mode and an automatic addressing mode, characterized in that the N motors are numbered sequentially according to slave 1, slave 2...slave N, slave 1 is determined in a certain way, the signal output port Vout of slave 1 is connected to the signal input port Vint of slave 2, the signal output port Vout of slave 2 is connected to the signal input port Vint of slave 3, and so on, until the Nth motor;

[0062] The host computer sends an automatic addressing start command through the broadcast mode, and slave 1 obtains its own communication address from the automatic addressing start command; slave 1 sends the next address to be assigned through the data bus, and slave 1 outputs signal X to slave 2 through the signal output port Vout. Slave 2 confirms that it has received signal X, and then slave 2 obtains its own communication address from the data bus;

[0063] Slave 2 sends the next address to be assigned through the data bus, and slave 2 outputs signal X to slave 3 through the signal output port Vout. Slave 3 confirms that it has received signal X, and then slave 3 obtains its own communication address from the data bus; the operation is carried out in this order until slave N obtains its own communication address.

[0064] The specific steps of the above address allocation method are as follows:

[0065] Step 1: Number N motors sequentially as slave 1, slave 2, ... slave N, short-circuit a certain output port of the first motor with a certain input port, so that the first motor serves as slave 1 of the multi-motor networking system, connect the signal output port Vout of slave 1 with the signal input port Vint of slave 2, connect the signal output port Vout of slave 2 with the signal input port Vint of slave 3, and so on, until the Nth motor;

[0066] Step 2: All N motors are powered on, and the host computer sends an automatic addressing start command through the broadcast mode, and specifies the address allocation starting value Address_start in the command. The automatic addressing switch of each motor is turned on, and the output voltage mode is changed to the automatic addressing mode;

[0067] Step 3: Slave 1 gets Address_start as its own address, and sends out the next address to be assigned, Address_start+K1*1, through the data bus. At this time, all slaves now know that the next address to be assigned is Address_start+K1*1. Slave 1 outputs signal X to slave 2 through the signal output port Vout. Slave 2 confirms that it has received signal X, and then the address of slave 2 is changed to Address_start+K1*1, where K1 is the increment of each address increase, and K1 is an integer.

[0068] Step 4: Slave 2 sends the next address to be assigned via the data bus

[0069] Address_start+K1*2 is sent out, slave 1 recognizes the instruction, then the automatic addressing mode of slave 1 is turned off, the output voltage mode of slave 1 is changed to the normal voltage output mode, slave 2 outputs signal X to slave 3 through the signal output port Vout, and after slave 3 confirms that it has received signal X, it changes its own address to Address_start+K1*2;

[0070] Step 5: Slave 3 sends the next address to be assigned via the data bus

[0071] Address_start+K1*3 is sent out, slave 2 recognizes the instruction, then the automatic addressing mode of slave 2 is turned off, the output voltage mode of slave 2 is changed to the normal voltage output mode, slave 3 outputs signal X to slave 4 through the signal output port Vout, and after slave 4 confirms that it has received signal X, it changes its own address to Address_start+K1*3;

[0072] Step six, in the same way as step five, the addresses of slaves 5 to N are allocated one by one. When slave N outputs signal X through the signal output port Vout, there is no next slave at this time, and slave N will not receive the address instruction sent by the next slave. After a period of time T, slave N determines that there are no remaining slaves, so slave N turns off the automatic addressing mode and changes the voltage output mode to the normal voltage output mode, and the address allocation is completed.

[0073] The automatic addressing switches of the above motors are turned on, and the output voltage mode is changed to the automatic addressing mode. This means that the automatic addressing switch is turned on by the software in the microprocessor.

[0074] The above K1 is obtained through the instruction sent by the host computer or the value provided by the software itself.

[0075] The "short-circuiting of an output port and an input port of the first motor" described in the above step 1 refers to short-circuiting the 24V output port and the PWM input port of the first motor; or short-circuiting the 10V output port of the first motor and the 0-10V speed control signal input port.

[0076] The above-mentioned host computer is a computer or a system controller of a central air-conditioning system.

[0077] The N motors mentioned above are all permanent magnet synchronous motors.

[0078] The conventional voltage output mode means that the signal output port Vout outputs a voltage signal of 0-10V, and the automatic addressing mode means that the signal output port Vout outputs a signal X, where the signal X is a DC voltage of 0V or a DC voltage greater than or equal to 10V.

[0079] Specific implementation example 1: There are 3 motors, and their addresses are 01 03 05, time T = 0.1S, K1 = 2. The specific operations are as follows:

[0080] The first motor has its 24V output connected to the PWM input port, and the remaining motors follow the same Figure 2 After the connection is completed.

[0081] The host computer sends an automatic addressing instruction and sends out the beginning of the address and the increment plan for each time.

[0082] After the first motor receives the automatic addressing instruction, it determines that it is the first motor, i.e., motor 1, by judging the pwm input signal. Motor 1 changes its own address to 01 through the automatic addressing instruction, and then motor 1 sends the next address 03 on the communication line and outputs the signal output port Vout as a high level.

[0083] The signal input port Vint of motor 2 receives a high level, and receives the address 03, changes its own address to 03, and motor 2 sends the address 05 through the communication line, and outputs the signal output port Vout as a high level.

[0084] When motor 1 receives the address of 05, the automatic addressing mode of motor 1 is turned off, and the voltage output mode is changed back to the normal voltage output mode.

[0085] The signal input port Vint of motor 3 receives a high level, and receives the address 05, changes its own address to 05, and motor 3 sends the address 07 through the communication line, and outputs the signal output port Vout as a high level.

[0086] When motor 2 receives address 07, the automatic addressing mode of motor 2 is turned off, and the voltage output mode is changed back to the normal voltage output mode.

[0087] After 0.1s, if motor 3 does not receive address 09, the automatic addressing mode of motor 3 is turned off, and the voltage output mode is changed back to the normal voltage output mode. End!

[0088] Specific implementation example 2: There are 3 motors, and their addresses are to be 01 03 05T=0.1S, K1=2. The specific steps are as follows:

[0089] The first motor has its 10V output connected to the 0-10V input. The remaining motors follow the same Figure 2 The connection is complete.

[0090] The host computer sends an automatic addressing instruction and sends out the beginning of the address and the increment plan for each time.

[0091] After the first motor receives the automatic addressing instruction, it determines that it is now the first motor, namely motor 1, by judging the input signal X of the signal input port Vint.

[0092] Motor 1 changes its own address to 01 through the automatic addressing instruction, and then sends the next address 03 on the communication line, and outputs the signal output port Vout to 5V (a specific integer value that is not 0).

[0093] The signal input port Vint of motor 2 receives 5V and address 03, and changes its own address to 03. Motor 2 sends address 05 through the communication line and outputs 5V at the signal output port Vout.

[0094] When motor 1 receives the address of 05, it turns off the automatic addressing mode and the voltage output returns to 0V.

[0095] The signal input port Vint of motor 3 receives 5V and address 05, and changes its own address to 05. Motor 3 sends address 07 through the communication line and outputs 5V at the signal output port Vout.

[0096] When motor 2 receives address 07, the automatic addressing mode of motor 2 is turned off and the voltage output is 0V.

[0097] After 0.1s, if motor 3 does not receive address 09, then motor 3 turns off the automatic addressing mode and the voltage output is 0V. End!

[0098] Compared with the prior art, the communication address allocation method of the multi-motor networking system of the present invention has the following advantages:

[0099] 1. The whole set of operations does not require additional equipment.

[0100] 2. A specified address range can be allocated, and the address of each motor is known after addressing is completed.

[0101] 3. Various address allocation modes can be set, such as motor 1 address is 01, motor 2 address is 03, motor 3 address is 05. Or motor 1 address is 01, motor 2 address is 04, motor 3 address is 09.

[0102] 4. The operation steps are fully automatic, simple and convenient.

[0103] 5. The addressing process is simple, efficient, reliable and takes the shortest time.

[0104] 6. There is no need to wait until the addressing is completed before turning off the addressing mode switch of each motor, which improves the reliability of the entire solution.

[0105] 7. There is no major restriction on the output signal X, and the options are flexible.

[0106] 8. Each motor needs to perform few operations, so the scheme design will be simple. This improves the feasibility of the scheme and reduces the difficulty of scheme design.

[0107] The above embodiments are preferred implementation modes of the present invention, but the implementation modes of the present invention are not limited thereto. Any other changes, modifications, substitutions, combinations, and simplifications made without departing from the spirit and principle of the present invention are all equivalent replacement methods and are included in the protection scope of the present invention.

Claims

1. A communication address allocation method for a multi-motor networking system, the multi-motor networking system comprises N motors connected to a host computer, the N motors are networked with the host computer via a data bus, the motors comprise a microprocessor and a network communication module, each motor is connected to the data bus via the network communication module, the motors are provided with a signal input port Vint and a signal output port Vout, N is an integer greater than 4; the signal output ports Vout of the N motors have two output voltage modes, namely a conventional voltage output mode and an automatic addressing mode, characterized in that: N motors are numbered sequentially as slave 1, slave 2, ... slave N. Slave 1 is determined in some way. The signal output port Vout of slave 1 is connected to the signal input port Vint of slave 2. The signal output port Vout of slave 2 is connected to the signal input port Vint of slave 3. The connections are connected in this order until the Nth motor. The host computer sends an automatic addressing start command through the broadcast mode, and slave 1 obtains its own communication address from the automatic addressing start command; slave 1 sends the next address to be assigned through the data bus, and slave 1 outputs signal X to slave 2 through the signal output port Vout. Slave 2 confirms that it has received signal X, and then slave 2 obtains its own communication address from the data bus; Slave 2 sends the next address to be assigned through the data bus, and slave 2 outputs signal X to slave 3 through the signal output port Vout. Slave 3 confirms that it has received signal X, and then slave 3 obtains its own communication address from the data bus; the operation is carried out in this order until slave N obtains its own communication address.

2. The communication address allocation method of a multi-motor networking system according to claim 1, characterized in that: The specific steps of the address allocation method are as follows: Step 1: Number N motors sequentially as slave 1, slave 2, ... slave N, short-circuit a certain output port of the first motor with a certain input port, so that the first motor serves as slave 1 of the multi-motor networking system, connect the signal output port Vout of slave 1 with the signal input port Vint of slave 2, connect the signal output port Vout of slave 2 with the signal input port Vint of slave 3, and so on, until the Nth motor; Step 2: All N motors are powered on, and the host computer sends an automatic addressing start command through the broadcast mode, and specifies the address allocation starting value Address_start in the command. The automatic addressing switch of each motor is turned on, and the output voltage mode is changed to the automatic addressing mode; Step 3: Slave 1 gets Address_start as its own address, and sends out the next address to be assigned, Address_start+K1*1, through the data bus. At this time, all slaves now know that the next address to be assigned is Address_start+K1*1. Slave 1 outputs signal X to slave 2 through the signal output port Vout. Slave 2 confirms that it has received signal X, and then the address of slave 2 is changed to Address_start+K1*1, where K1 is the increment of each address increase, and K1 is an integer. Step 4: Slave 2 sends the next address to be assigned, Address_start+K1*2, through the data bus. Slave 1 recognizes the instruction, and then the automatic addressing mode of slave 1 is turned off, and the output voltage mode of slave 1 is changed to the normal voltage output mode. Slave 2 outputs signal X to slave 3 through the signal output port Vout. After slave 3 confirms that it has received signal X, it changes its own address to Address_start+K1*2. Step 5: Slave 3 sends the next address to be assigned, Address_start+K1*3, through the data bus. Slave 2 recognizes the instruction, and then the automatic addressing mode of slave 2 is turned off, and the output voltage mode of slave 2 is changed to the normal voltage output mode. Slave 3 outputs signal X to slave 4 through the signal output port Vout. After slave 4 confirms that it has received signal X, it changes its own address to Address_start+K1*3. Step six, in the same way as step five, the addresses of slaves 5 to N are allocated one by one. When slave N outputs signal X through the signal output port Vout, there is no next slave at this time, and slave N will not receive the address instruction sent by the next slave. After a period of time T, slave N determines that there are no remaining slaves, so slave N turns off the automatic addressing mode and changes the voltage output mode to the normal voltage output mode, and the address allocation is completed.

3. The communication address allocation method of a multi-motor networking system according to claim 2, characterized in that: K1 is obtained through the command sent by the host computer or the value provided by the software itself.

4. The communication address allocation method of a multi-motor networking system according to claim 2, characterized in that: The "short-circuiting of an output port of the first motor and an input port" described in step 1 refers to short-circuiting the 24V output port and the PWM input port of the first motor; or short-circuiting the 10V output port of the first motor and the 0-10V speed control signal input port.

5. A communication address allocation method for a multi-motor networking system according to claim 1, 2, 3 or 4, characterized in that: The host computer is a computer or a system controller of a central air conditioning system.

6. A communication address allocation method for a multi-motor networking system according to claim 1, 2, 3 or 4, characterized in that: The N motors are all permanent magnet synchronous motors.

7. A communication address allocation method for a multi-motor networking system according to claim 1, 2, 3 or 4, characterized in that: The conventional voltage output mode means that the signal output port Vout outputs a voltage signal of 0-10V, and the automatic addressing mode means that the signal output port Vout outputs a signal X, where the signal X is a specific integer value that is not 0.

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