Electronic device

Abstract

There is provided an electronic device including: a display layer having pixels; and a sensor layer having a sensing electrode, in which the pixels may include a first pixel group and a second pixel group, the first pixel group may include: a (1-1) th sub-pixel; a (1-2) th sub-pixel spaced apart from the (1-1) th sub-pixel by a first distance; and a (1-3) th sub-pixel. The second pixel group may include: a (2-1) th sub-pixel; a (2-2) th sub-pixel spaced apart from the (2-1) th sub-pixel by a first distance; and a (2-3) th sub-pixel, the (1-1) th sub-pixel and the (2-2) th sub-pixel may be adjacent to each other and may be spaced apart from each other by a second distance different from the first distance.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0089377 filed in the Korean Intellectual Property Office on July 10, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] The present disclosure herein relates to electronic devices having multiple pixels with improved lifetime. Background Art

[0004] An organic light-emitting electronic device includes two electrodes and a light-emitting layer positioned therebetween. Electrons injected from one electrode and holes injected from the other electrode are recombined in the light-emitting layer to form excitons, and light is emitted when the excitons release energy.

[0005] A plurality of light-emitting layers that respectively display red, green, and blue can express full color, and at this time may have a stripe structure in which light-emitting layers that display the same color are arranged in a row. Summary of the invention

[0006] The present disclosure provides an electronic device having multiple pixels with improved lifespan.

[0007] One or more embodiments of the present disclosure provide an electronic device, comprising: a display layer, comprising pixels, the pixels comprising a first pixel group and a second pixel group; and a sensor layer, which is above the display layer and comprises a sensing electrode, wherein the first pixel group comprises: a (1-1)th sub-pixel, configured to emit a first light; a (1-2)th sub-pixel, spaced apart from the (1-1)th sub-pixel by a first distance in a second direction and configured to emit a second light different from the first light; and a (1-3)th sub-pixel, spaced apart from each of the (1-1)th sub-pixel and the (1-2)th sub-pixel in a first direction intersecting the second direction. A first distance is formed between the subpixel and the first pixel, and is configured to emit a third light different from the first light and the second light, wherein the second pixel group includes: a (2-1)th subpixel, configured to emit the first light; a (2-2)th subpixel, adjacent to the (1-1)th subpixel in the second direction, spaced apart from the (1-1)th subpixel by a second distance different from the first distance, spaced apart from the (2-1)th subpixel in the second direction by a first distance, and configured to emit the second light; and a (2-3)th subpixel, spaced apart from each of the (2-1)th subpixel and the (2-2)th subpixel by a first distance in the first direction, and configured to emit the third light.

[0008] The first distance may be smaller than the second distance.

[0009] The sensing electrode may include: a first mesh line having a mesh structure and surrounding the first pixel group and the second pixel group; and a second mesh line electrically connected to the first mesh line, between the first pixel group and the second pixel group, and extending in the first direction.

[0010] The first meshed wire may have the same electrode width as the second meshed wire, and the electrode width is smaller than the first distance.

[0011] When viewed on a plane, the first mesh line and the second mesh line may not overlap with the first pixel group and the second pixel group.

[0012] The first mesh line may include a (1-1)th protruding portion which is between the (1-1)th sub-pixel and the (1-2)th sub-pixel on a plane and protrudes in the first direction.

[0013] The first mesh line may further include a (1-2)th protruding portion, which is between the (2-1)th sub-pixel and the (2-2)th sub-pixel on a plane and protrudes in the first direction.

[0014] The second mesh line may include a (2-1)th protruding portion which is between the (1-1)th sub-pixel and the (1-3)th sub-pixel on a plane and protrudes in the second direction.

[0015] The second mesh line may further include a (2-2)th protruding portion which is between the (2-2)th sub-pixel and the (2-3)th sub-pixel on a plane and protrudes in a direction opposite to the second direction.

[0016] The (1-1)th protrusion portion may have the same length as the (1-2)th protrusion portion, wherein the (2-1)th protrusion portion has the same length as the (2-2)th protrusion portion.

[0017] When viewed on a plane, the first mesh line and the second mesh line may not be between the (1-2)th sub-pixel and the (1-3)th sub-pixel.

[0018] When viewed on a plane, the first mesh line and the second mesh line may not be between the (2-1)th sub-pixel and the (2-3)th sub-pixel.

[0019] The sensing electrode may further include a third mesh line electrically connected to the first mesh line in the second direction, wherein the third mesh line overlaps at least a portion of the first pixel group and at least a portion of the second pixel group when viewed on a plane.

[0020] The sensing electrode may further include a fourth mesh line electrically connected to the first mesh line in the first direction, wherein the fourth mesh line overlaps at least a portion of the first pixel group when viewed on a plane.

[0021] The sensing electrode may further include a fifth mesh line electrically connected to the first mesh line in the first direction, wherein the fifth mesh line overlaps at least a portion of the second pixel group when viewed on a plane.

[0022] The sensing electrode may further include an auxiliary electrode electrically connected to the first mesh line, wherein the auxiliary electrode overlaps at least a portion of at least one of the first pixel group, the second pixel group, and the second mesh line when viewed on a plane.

[0023] The auxiliary electrode may have a sawtooth shape.

[0024] The auxiliary electrode may include a transparent material.

[0025] The (1-1)th sub-pixel may have an area smaller than that of the (1-2)th sub-pixel, and the area of ​​the (1-2)th sub-pixel is smaller than that of the (1-3)th sub-pixel.

[0026] The (2-1)th sub-pixel may have an area smaller than that of the (2-2)th sub-pixel, and the area of ​​the (2-2)th sub-pixel is smaller than that of the (2-3)th sub-pixel. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the accompanying drawings:

[0028] Figure 1 is a perspective view of an electronic device according to one or more embodiments of the present disclosure;

[0029] Figure 2 is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure;

[0030] Figure 3 is a plan view of a display layer according to one or more embodiments of the present disclosure;

[0031] Figure 4 is a plan view of a sensor layer according to one or more embodiments of the present disclosure;

[0032] Figure 5 According to one or more embodiments of the present disclosure, Figure 4 A cross-sectional view taken along line II';

[0033] Figure 6is a diagram showing one or more embodiments according to the present disclosure Figure 1 The plan view of the area AA';

[0034] Figure 7 According to one or more embodiments of the present disclosure, Figure 6 A cross-sectional view of the electronic device taken along line II-II';

[0035] Figure 8 is a diagram showing one or more embodiments according to the present disclosure Figure 1 a plan view of area AA'; and

[0036] Fig. 9 is a diagram showing one or more embodiments according to the present disclosure Figure 1 Plan view of area AA'. DETAILED DESCRIPTION

[0037] By referring to the specific embodiments and the accompanying drawings of the embodiments, it is easier to understand the aspects of some embodiments of the present disclosure and the methods for realizing them. The described embodiments are provided as examples so that the present disclosure will be thorough and complete, and will fully convey the aspects of the present disclosure to those skilled in the art. Therefore, redundant, irrelevant or unrelated to the description of the embodiments or processes, elements and techniques that are not necessary for a person of ordinary skill in the art to fully understand the aspects of the present disclosure can be omitted. Unless otherwise stated, throughout the drawings and written descriptions, the same reference numerals, characters or combinations thereof represent the same elements, and therefore, their repeated descriptions can be omitted.

[0038] The described embodiments may have various modifications and may be implemented in different forms, and should not be construed as being limited to the embodiments shown herein. When describing an embodiment, the use of "can", "may", or "may not" corresponds to one or more embodiments of the present disclosure. The present disclosure encompasses all modifications, equivalents, and substitutions within the scope of the ideas and techniques of the present disclosure. In addition, each of the features of the various embodiments of the present disclosure may be combined with each other in part or in its entirety, and various interlocks and drives are technically possible. Each embodiment may be implemented independently of one another, or may be implemented together in association.

[0039] In the drawings, the relative sizes of elements, layers, and regions may be exaggerated for clarity and / or descriptive purposes. In addition, the use of cross-hatching and / or shading in the drawings is generally provided to clarify the boundaries between adjacent elements. Therefore, unless specified, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for specific materials, material properties, size, proportion, commonality between the elements shown, and / or any other characteristics, attributes, properties, etc. of the elements.

[0040] Various embodiments are described herein with reference to cross-sectional views as schematic diagrams of embodiments and / or intermediate structures. Therefore, differences from the shapes shown in the drawings due to, for example, manufacturing techniques and / or tolerances should be expected. In addition, the specific structures or functional lines described herein are shown only for the purpose of describing the embodiments according to the concepts of the present disclosure. Therefore, the embodiments disclosed herein should not be interpreted as being limited to the shapes of the elements, layers, or regions shown, but should include deviations in shapes caused by, for example, manufacturing.

[0041] For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and / or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place.

[0042] For ease of explanation, spatial relative terms such as "below", "below", "lower", "lower side", "below", "above", "upper side", etc. may be used herein to describe the relationship between an element or feature and another (some) element or feature as shown in the drawings. It will be understood that, in addition to the orientation depicted in the drawings, spatial relative terms are intended to include different orientations of the device in use or in operation. For example, if the device in the drawings can be flipped, the elements described as being "below", "below" or "below" other elements or features will be oriented "above" other elements or features. Therefore, the exemplary terms "below" and "below" can include both upper and lower orientations. The device can be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein should be interpreted accordingly. Similarly, when the first part is described as being arranged "on" the second part, this means that the first part is arranged at the upper or lower side of the second part, and is not limited to being arranged at the upper side of the second part based on the direction of gravity.

[0043] In addition, the phrase "in a plan view" means when the object portion is observed from above, and the phrase "in a schematic cross-sectional view" means when a schematic cross section taken by vertically cutting the object portion is observed from the side. The term "overlap" or "overlapped" means that the first object can be above or below the second object, or to one side of the second object, and vice versa. In addition, the term "overlap" may include stacking, facing or facing, extending on, covering or partially covering, or any other suitable term as will be appreciated and understood by a person of ordinary skill in the art. The expression "non-overlapping" may include meanings such as "spaced apart from" or "separated from" or "offset from" and any other suitable equivalents as will be appreciated and understood by a person of ordinary skill in the art. The terms "face" and "facing" may mean that the first object may be directly opposite or indirectly opposite to the second object. In the case where a third object is between the first object and the second object, the first object and the second object may be understood to be indirectly opposite to each other, but still facing each other.

[0044] It will be understood that when an element, layer, region, or component is referred to as being "formed on," "on," "connected to," or "(operably or communicatively) coupled to" another element, layer, region, or component, it may be directly formed on, directly on, directly connected to, or directly coupled to, or indirectly formed on, indirectly on, indirectly connected to, or indirectly coupled to, such that there may be one or more intervening elements, layers, regions, or components. Furthermore, this may collectively mean direct or indirect coupling or connection, as well as integral or non-integral coupling or connection. For example, when a layer, region, or component is referred to as being "electrically connected" or "electrically coupled" to another layer, region, or component, it may be directly electrically connected or directly electrically coupled to, or there may be one or more intervening layers, regions, or components. One or more intervening components may include switches, resistors, capacitors, etc. When describing the embodiments, unless explicitly described as directly connected, the expression of connection indicates electrical connection, and "directly connected / directly coupled" or "directly on..." means that one component is directly connected or directly coupled to another component or directly on another component without intermediate components.

[0045] In addition, in this specification, when a part of a layer, film, region, plate, etc. is formed on another part, the formation direction is not limited to the upper direction, but includes forming the part on the side surface or in the lower direction. On the contrary, when a part of a layer, film, region, plate, etc. is formed "under" another part, this includes not only the situation that the part is "directly under" another part, but also includes the situation that there is another part between the part and the other part. At the same time, other expressions describing the relationship between components, such as "between...", "directly between..." or "adjacent to..." and "directly adjacent to..." can be interpreted similarly. It will be understood that when an element or layer is referred to as "between" two elements or layers, it can be the only element or layer between the two elements or layers, or one or more intervening elements or layers may also be present.

[0046] For the purposes of this disclosure, when expressions such as "at least one of..." or "any one of..." or "one or more of..." are located after a list of elements, they modify the entire list of elements and do not modify the individual elements in the list. For example, "at least one of X, Y, and Z," "at least one of X, Y, or Z," "at least one selected from the group consisting of X, Y, and Z," and "at least one selected from the group consisting of X, Y, or Z" may be interpreted as any combination of only X, only Y, only Z, two or more of X, Y, and Z (such as, for example, XYZ, XYY, YZ, and ZZ), or any variation thereof. Similarly, the expressions "at least one of A and B" and "at least one of A or B" may include A, B, or A and B. As used herein, "or" generally means "and / or," and the term "and / or" includes any and all combinations of one or more of the relevant listed items. For example, the expression "A and / or B" may include A, B, or A and B. Similarly, expressions such as “at least one of,” “a plurality of,” “one of,” and other prepositional phrases, when preceding / following a list of elements, modify the entire list of elements and do not modify the individual elements of the list.

[0047] It will be understood that although the terms "first", "second", "third", etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms do not correspond to a specific order, position or advantage, and are only used to distinguish an element, member, component, zone, region, layer, section or part from another element, member, component, zone, region, layer, section or part. Therefore, without departing from the spirit and scope of the present disclosure, the first element, first component, first area, first layer or first section described below can be referred to as the second element, second component, second area, second layer or second section. The description of the element as the "first" element may not require or imply the existence of the second element or other elements. The terms "first", "second", etc. can also be used herein to distinguish between different categories or different groups of elements. For the sake of simplicity, the terms "first", "second", etc. can respectively represent "first category (or first group)", "second category (or second group)", etc.

[0048] In the example, the x-axis, y-axis and / or z-axis are not limited to the three axes of the rectangular coordinate system, and can be interpreted in a broader sense. For example, the x-axis, y-axis and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. The same applies to the first direction, the second direction and / or the third direction.

[0049] The terms used herein are only used for the purpose of describing the embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "an" are intended to include the plural forms as well, and the plural forms are intended to include the singular forms as well, unless the context clearly indicates otherwise. It will also be understood that when used in this specification, the terms "comprises", "comprising", "have", "having", "includes" and "including" specify the presence of stated features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof.

[0050] As used herein, the terms "substantially", "about", "approximately" and similar terms are used as approximate terms and not as terms of degree, and are intended to allow for inherent deviations in measurements or calculations that will be recognized by those of ordinary skill in the art. For example, "substantially" may include a range of + / - 5% of the corresponding value. In view of the measurements discussed and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), as used herein, "about" or "approximately" includes the value and means within an acceptable deviation range for a particular value determined by a person of ordinary skill in the art. For example, "approximately" may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the value. In addition, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure".

[0051] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0052] Figure 1 is a perspective view of an electronic device according to one or more embodiments of the present disclosure, and Figure 2 is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure.

[0053] refer to Figure 1 and Figure 2 , the electronic device 1000 can generally generate an image. The electronic device 1000 can be an emission-type electronic device or a light-receiving electronic device. For example, the electronic device 1000 can be any one of an organic light-emitting electronic device, a quantum dot light-emitting electronic device, a micro-LED electronic device, a nano-LED electronic device, a liquid crystal electronic device, an electrophoretic electronic device, an electrowetting electronic device, and a MEMS electronic device, and is not particularly limited thereto.

[0054] The electronic device 1000 may include a display layer 100 and a sensor layer 200 located on the display layer 100 .

[0055] The electronic device 1000 may display an image through the display surface IS. The display surface IS may be parallel to a surface defined by the first direction DR1 and the second direction DR2. The display surface IS may include an active area AA and a peripheral area NA. The pixel PX may be located in the active area AA, and the pixel PX may not be located in the peripheral area NA. The peripheral area NA may be defined along an edge of the display surface IS. The peripheral area NA may surround the active area AA. According to one or more embodiments of the present disclosure, the peripheral area NA may be omitted, or may be located only on one side of the active area AA.

[0056] A normal direction of the display surface IS as a thickness direction of the electronic device 1000 may be represented by a third direction DR3. A front surface (or upper surface) and a rear surface (or lower surface) of each of layers or units described hereinafter may be distinguished based on the third direction DR3.

[0057] According to one or more embodiments of the present disclosure, an electronic device 1000 having a flat display surface IS is shown, but one or more embodiments of the present disclosure are not limited thereto. The electronic device 1000 may include a curved display surface or a three-dimensional display surface. The three-dimensional display surface may include multiple display areas indicating different directions.

[0058] The display layer 100 according to one or more embodiments of the present disclosure may be an emissive display layer, but is not particularly limited thereto. For example, the display layer 100 may include an organic light-emitting display layer, a quantum dot display layer, a micro-LED display layer, or a nano-LED display layer. The light-emitting layer of the organic light-emitting display layer may include an organic light-emitting material. The light-emitting layer of the quantum dot display layer may include quantum dots, quantum rods, etc. The light-emitting layer of the micro-LED display layer may include micro-LEDs. The light-emitting layer of the nano-LED display layer may include nano-LEDs.

[0059] The display layer 100 may include a base layer 110 , a circuit layer 120 , a light emitting element layer 130 , and an encapsulation layer 140 .

[0060] The base layer 110 may provide a surface on which the circuit layer 120 is located. The base layer 110 may be a glass substrate, a metal substrate, or a polymer substrate. However, one or more embodiments of the present disclosure are not limited thereto, and the base layer 110 may be an inorganic layer, an organic layer, or a composite material layer.

[0061] The base layer 110 may have a multi-layer structure. For example, the base layer 110 may include a first synthetic resin layer, a silicon oxide (SiO x ) layer, located in the silicon oxide (SiO x) layer and a second synthetic resin layer on the amorphous silicon (a-Si) layer. Silicon oxide (SiO x ) layer and the amorphous silicon (a-Si) layer may be referred to as a base barrier layer.

[0062] The first synthetic resin layer and the second synthetic resin layer may each include a polyimide-based resin. In addition, the first synthetic resin layer and the second synthetic resin layer may each include at least one of an acrylate-based resin, a methacrylate-based resin, a polyisoprene-based resin, an ethylene-based resin, an epoxy-based resin, a urethane-based resin, a cellulose-based resin, a siloxane-based resin, a polyamide-based resin, or a perylene-based resin. Meanwhile, in this specification, the term "resin based on tert-butyl ester" refers to a functional group containing "tert-butyl ester".

[0063] The circuit layer 120 may be located on the base layer 110. The circuit layer 120 may include an insulating layer, a semiconductor pattern, a conductive pattern, a signal line, etc. The insulating layer, the semiconductor layer, and the conductive layer may be formed on the base layer 110 by coating, deposition, etc., and then the insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned by a plurality of series of photolithography processes. Thereafter, the semiconductor pattern, the conductive pattern, and the signal line included in the circuit layer 120 may be formed.

[0064] The light emitting element layer 130 may be located on the circuit layer 120. The light emitting element layer 130 may include a light emitting element. For example, the light emitting element layer 130 may include an organic light emitting material, a quantum dot, a quantum rod, a micro LED, or a nano LED.

[0065] The encapsulation layer 140 may be located on the light emitting element layer 130. The encapsulation layer 140 may protect the light emitting element layer 130 from moisture, oxygen, and foreign substances such as dust particles.

[0066] The sensor layer 200 may be formed on the display layer 100 through a continuous process. In this case, the sensor layer 200 may be directly located on the display layer 100. "Directly located" may mean that there is no intervening component between the sensor layer 200 and the display layer 100 (e.g., there is no intervening component between the sensor layer 200 and the display layer 100). That is, there may not be a separate adhesive member located between the sensor layer 200 and the display layer 100. Alternatively, the sensor layer 200 may be bonded to the display layer 100 by an adhesive member. The adhesive member may include a general adhesive or a glue.

[0067] Figure 3 is a plan view of a display layer according to one or more embodiments of the present disclosure.

[0068] refer to Figure 3, the display layer 100 may include an active area 100A and a peripheral area 100N adjacent to the active area 100A. The active area 100A and the peripheral area 100N may be distinguished according to whether a plurality of pixels PX11 to PXnm are positioned. A plurality of pixels PX11 to PXnm may be positioned in the active area 100A and may be omitted from the peripheral area 100N.

[0069] When viewed on a plane, the active area 100A may be aligned with the electronic device 1000 (see Figure 1 ) of the active area AA (see Figure 1 ) The peripheral area 100N may overlap with the electronic device 1000 (see Figure 1 ) of the peripheral area NA (see Figure 1 )overlapping.

[0070] The plurality of pixels PX11 to PXnm may be connected to corresponding gate lines among the plurality of gate lines GL1 to GLn, respectively, and may be connected to corresponding data lines among the plurality of data lines DL1 to DLm, respectively. The plurality of pixels PX11 to PXnm may each include a pixel driving circuit and a display element. According to the configuration of the pixel driving circuits of the plurality of pixels PX11 to PXnm, the display layer 100 may include more signal lines of various types.

[0071] The scan driving circuit GDC and the plurality of pads PD may be located in the peripheral area 100N. The scan driving circuit GDC may be formed by the same process as that of the circuit inside the electronic device 1000. The data driving circuit may be a partial circuit configured in a driving chip, and the driving chip may be electrically connected to the plurality of pixels PX11 to PXnm through the pads PD located in the peripheral area 100N.

[0072] The display layer 100 may further include a plurality of sensing pads TPD. The plurality of sensing pads TPD may be located in the peripheral area 100N. The plurality of sensing pads TPD may be electrically connected to the sensor layer 200 (see Figure 2 ) of multiple sensing electrodes.

[0073] Figure 4 is a plan view of a sensor layer according to one or more embodiments of the present disclosure.

[0074] refer to Figure 4 , the sensor layer 200 may include an active area 200A and a peripheral area 200N adjacent to the active area 200A. The active area 200A may be an area that is activated in response to an electrical signal. The active area 200A may be an area that detects input. When viewed on a plane, the active area 200A may be adjacent to the display layer 100 (see FIG. 1 ). Figure 3 ) effective area 100A (see Figure 3) The peripheral area 200N may overlap with the display layer 100 (see Figure 3 ) of the peripheral area 100N (see Figure 3 )overlapping.

[0075] The sensor layer 200 may include a base layer 201, a plurality of sensing electrodes SP, a plurality of sensing lines TL1 and TL2, and a dummy electrode DE. The plurality of sensing electrodes SP and the dummy electrode DE may be located in the active area 200A. The plurality of sensing lines TL1 and TL2 may be located in the peripheral area 200N.

[0076] The base layer 201 may be an inorganic layer including any one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the base layer 201 may be an organic layer including epoxy resin, acrylate resin, or imide-based resin. The base layer 201 may be directly formed on the display layer 100 (see Figure 2 )superior.

[0077] The plurality of sensing electrodes SP may include a plurality of first sensing electrodes TE1 and a plurality of second sensing electrodes TE2. The sensor layer 200 may acquire information about an external input through a change in capacitance between the plurality of first sensing electrodes TE1 and the plurality of second sensing electrodes TE2.

[0078] The plurality of first sensing electrodes TE1 may each extend along the first direction DR1, and the plurality of first sensing electrodes TE1 may be arranged along the second direction DR2. The plurality of first sensing electrodes TE1 may each include a plurality of first sensing patterns SP1 and a plurality of first connection patterns BSP1. The plurality of first connection patterns BSP1 may each electrically connect two first sensing patterns SP1 adjacent to each other. The plurality of first sensing patterns SP1 and the plurality of first connection patterns BSP1 may have a mesh structure. The plurality of first sensing patterns SP1 may be referred to as a plurality of first sensing portions SP1. The plurality of first connection patterns BSP1 may be referred to as a plurality of first connection portions BSP1.

[0079] The plurality of second sensing electrodes TE2 may each extend along the second direction DR2, and the plurality of second sensing electrodes TE2 may be arranged along the first direction DR1. The plurality of second sensing electrodes TE2 may each include a plurality of second sensing patterns SP2 and a plurality of second connection patterns BSP2. The plurality of second connection patterns BSP2 may each electrically connect two second sensing patterns SP2 adjacent to each other. The plurality of second sensing patterns SP2 and the plurality of second connection patterns BSP2 may have a mesh structure. The plurality of second sensing patterns SP2 may be referred to as a plurality of second sensing portions SP2. The plurality of second connection patterns BSP2 may be referred to as a plurality of second connection portions BSP2.

[0080] The plurality of first connection patterns BSP1 may be located on a different layer from the plurality of second connection patterns BSP2. The plurality of second connection patterns BSP2 and the plurality of first sensing electrodes TE1 may cross each other while being insulated from each other. For example, the plurality of first connection patterns BSP1 and the plurality of second connection patterns BSP2 may cross each other while being insulated from each other, respectively.

[0081] The dummy electrode DE may be positioned adjacent to the plurality of sensing electrodes SP. The dummy electrode DE may have a mesh structure.

[0082] The plurality of sensing lines TL1 and TL2 may include a plurality of first sensing lines TL1 and a plurality of second sensing lines TL2. The plurality of first sensing lines TL1 may be electrically connected to the plurality of first sensing electrodes TE1, respectively. The plurality of second sensing lines TL2 may be electrically connected to the plurality of second sensing electrodes TE2, respectively.

[0083] The plurality of first sensing lines TL1 and the plurality of second sensing lines TL2 may be electrically connected to the plurality of sensing pads TPD through contact holes, respectively (see Figure 3 ).

[0084] Figure 5 According to one or more embodiments of the present disclosure, Figure 4 A cross-sectional view taken along line II'.

[0085] refer to Figure 4 and Figure 5 The sensor layer 200 may include a base layer 201 , a first conductive layer 202 , a sensing insulating layer 203 , a second conductive layer 204 and a cover insulating layer 205 .

[0086] The first conductive layer 202 may be located on the base layer 201. The first conductive layer 202 may include a plurality of second connection patterns BSP2. The plurality of second connection patterns BSP2 may have a mesh structure.

[0087] The sensing insulating layer 203 may be located on the first conductive layer 202. The sensing insulating layer 203 may have a single layer or a multi-layer structure. The sensing insulating layer 203 may include an inorganic material, an organic material, or a composite material.

[0088] The second conductive layer 204 may be located on the sensing insulating layer 203. The second conductive layer 204 may include a plurality of first sensing patterns SP1, a plurality of first connecting patterns BSP1, and a plurality of second sensing patterns SP2. The plurality of first sensing patterns SP1, a plurality of second sensing patterns SP2, and a plurality of first connecting patterns BSP1 may have a mesh structure.

[0089] The first conductive layer 202 and the second conductive layer 204 may each have a single layer structure, or may have a structure of a plurality of layers stacked along the third direction DR3.

[0090] The plurality of contact holes CNT may be formed by penetrating the sensing insulating layer 203 in the third direction DR3. Two of the second sensing patterns SP2 adjacent to each other may be electrically connected to the second connection patterns BSP2 through the plurality of contact holes CNT.

[0091] The capping insulating layer 205 may be located on the plurality of first sensing patterns SP1, the plurality of first connecting patterns BSP1, and the plurality of second sensing patterns SP2. The capping insulating layer 205 may have a single layer structure or a multi-layer structure. The capping insulating layer 205 may include an inorganic material, an organic material, or a composite material.

[0092] Figure 5 A bottom bridge structure is shown in which the plurality of second connection patterns BSP2 are located below the plurality of first sensing patterns SP1, the plurality of first connection patterns BSP1, and the plurality of second sensing patterns SP2, but one or more embodiments of the present disclosure are not limited thereto. For example, the sensor layer 200 may have a top bridge structure in which the plurality of second connection patterns BSP2 are located above the plurality of first sensing patterns SP1, the plurality of first connection patterns BSP1, and the plurality of second sensing patterns SP2.

[0093] Figure 6 is a diagram showing one or more embodiments according to the present disclosure Figure 1 Plan view of area AA'.

[0094] refer to Figure 1 and Figure 6 The first pixel group area PXAG1, the second pixel group area PXAG2, and the light blocking area NPXA may be defined in the display layer 100 of the electronic device 1000 (see Figure 3 )superior.

[0095] The plurality of pixels PX may include a first pixel group PX1 and a second pixel group PX2 .

[0096] The first pixel group PX1 may include a (1-1)th sub-pixel PX1-1, a (1-2)th sub-pixel PX1-2, and a (1-3)th sub-pixel PX1-3. The (1-1)th sub-pixel PX1-1 may emit a first light. The (1-2)th sub-pixel PX1-2 may emit a second light. The (1-3)th sub-pixel PX1-3 may emit a third light.

[0097] The first pixel group region PXAG1 may include a (1-1)th sub-pixel region PXA1-1, a (1-2)th sub-pixel region PXA1-2, and a (1-3)th sub-pixel region PXA1-3.

[0098] The (1-1)th subpixel region PXA1-1 may be a region corresponding to the (1-1)th subpixel PX1-1, the (1-2)th subpixel region PXA1-2 may be a region corresponding to the (1-2)th subpixel PX1-2, and the (1-3)th subpixel region PXA1-3 may be a region corresponding to the (1-3)th subpixel PX1-3.

[0099] That is, the (1-1)th subpixel region PXA1-1 may correspond to the region of the (1-1)th subpixel PX1-1, the (1-2)th subpixel region PXA1-2 may correspond to the region of the (1-2)th subpixel PX1-2, and the (1-3)th subpixel region PXA1-3 may correspond to the region of the (1-3)th subpixel PX1-3.

[0100] Display layer 100 (see Figure 3 ) may provide a first light through a plurality of (1-1)th sub-pixel regions PXA1-1, may provide a second light through a plurality of (1-2)th sub-pixel regions PXA1-2, and may provide a third light through a plurality of (1-3)th sub-pixel regions PXA1-3.

[0101] The first light, the second light, and the third light may correspond to different colors, respectively. For example, the first light may be red light, the second light may be green light, and the third light may be blue light.

[0102] The (1-2)th sub-pixel PX1-2 may be spaced apart from the (1-1)th sub-pixel PX1-1 by a first distance W1 in the second direction DR2. For example, the first distance W1 may be about 12.2 μm.

[0103] The (1-3)th subpixel PX1 - 3 may be spaced apart from each of the (1-1)th subpixel PX1 - 1 and the (1-2)th subpixel PX1 - 2 by a first distance W1 in the first direction DR1 .

[0104] The area of ​​the (1-1)th sub-pixel PX1-1 may be smaller than the area of ​​the (1-2)th sub-pixel PX1-2. The area of ​​the (1-2)th sub-pixel PX1-2 may be smaller than the area of ​​the (1-3)th sub-pixel PX1-3. For example, the area of ​​the (1-1)th sub-pixel PX1-1 may be about 970 μm 2 , the area of ​​the (1-2)th sub-pixel PX1-2 may be about 1087 μm 2 , and the area of ​​the (1-3)th sub-pixel PX1-3 may be about 1678 μm 2 .

[0105] According to one or more embodiments of the present disclosure, since the mesh lines ML1 and ML2 are not located in a partial area between the (1-1)th sub-pixel PX1-1, the (1-2)th sub-pixel PX1-2, and the (1-3)th sub-pixel PX1-3, the area of ​​each of the (1-1)th sub-pixel PX1-1, the (1-2)th sub-pixel PX1-2, and the (1-3)th sub-pixel PX1-3 can be increased. Therefore, the first distance W1 can be reduced. Since the aperture ratio of each of the (1-1)th sub-pixel region PXA1-1, the (1-2)th sub-pixel region PXA1-2, and the (1-3)th sub-pixel region PXA1-3 is improved, the current density applied to the plurality of pixels PX can be reduced, so that the life of each of the plurality of pixels PX can be increased. Therefore, it can be possible to provide an electronic device 1000 with improved reliability.

[0106] The second pixel group PX2 may include a (2-1)th subpixel PX2-1, a (2-2)th subpixel PX2-2, and a (2-3)th subpixel PX2-3. The (2-1)th subpixel PX2-1 may emit a first light, the (2-2)th subpixel PX2-2 may emit a second light, and the (2-3)th subpixel PX2-3 may emit a third light.

[0107] The second pixel group region PXAG2 may include a (2-1)th sub-pixel region PXA2-1, a (2-2)th sub-pixel region PXA2-2, and a (2-3)th sub-pixel region PXA2-3.

[0108] The (2-1)th subpixel region PXA2-1 may be a region corresponding to the (2-1)th subpixel PX2-1, the (2-2)th subpixel region PXA2-2 may be a region corresponding to the (2-2)th subpixel PX2-2, and the (2-3)th subpixel region PXA2-3 may be a region corresponding to the (2-3)th subpixel PX2-3.

[0109] That is, the (2-1)th subpixel region PXA2-1 may correspond to the region of the (2-1)th subpixel PX2-1, the (2-2)th subpixel region PXA2-2 may correspond to the region of the (2-2)th subpixel PX2-2, and the (2-3)th subpixel region PXA2-3 may correspond to the region of the (2-3)th subpixel PX2-3.

[0110] Display layer 100 (see Figure 3 ) may provide a first light through a plurality of (2-1)th sub-pixel regions PXA2-1, may provide a second light through a plurality of (2-2)th sub-pixel regions PXA2-2, and may provide a third light through a plurality of (2-3)th sub-pixel regions PXA2-3.

[0111] The (2-2)th sub-pixel region PXA2-2 may be located adjacent to the (1-1)th sub-pixel region PXA1-1 by a second distance W2 in the second direction DR2. The second distance W2 may be greater than the first distance W1. For example, the second distance W2 may be about 19 μm.

[0112] That is, according to one or more embodiments of the present disclosure, the distance between the sub-pixels included in each of the first pixel group PX1 and the second pixel group PX2 may be smaller than the distance between the first pixel group PX1 and the second pixel group PX2. Therefore, the area of ​​each of the sub-pixels included in each of the first pixel group PX1 and the second pixel group PX2 may be increased, and the aperture ratio of each of the sub-pixels may be improved, so that the current density applied to the plurality of pixels PX may be reduced, and thus the life of each of the plurality of pixels PX may be increased. Therefore, it may be possible to provide an electronic device 1000 having improved reliability.

[0113] The (2-1)th sub-pixel PX2 - 1 may be spaced apart from the (2-2)th sub-pixel PX2 - 2 by a first distance W1 in the second direction DR2 .

[0114] The (2-3)th subpixel PX2 - 3 may be spaced apart from each of the (2-1)th subpixel PX2 - 1 and the (2-2)th subpixel PX2 - 2 by a first distance W1 in the first direction DR1 .

[0115] The area of ​​the (2-1)th sub-pixel PX2-1 may be smaller than the area of ​​the (2-2)th sub-pixel PX2-2. The area of ​​the (2-2)th sub-pixel PX2-2 may be smaller than the area of ​​the (2-3)th sub-pixel PX2-3. For example, the area of ​​the (2-1)th sub-pixel PX2-1 may be about 970 μm 2 , the area of ​​the (2-2)th sub-pixel PX2-2 may be about 1087 μm 2 , and the area of ​​the (2-3)th sub-pixel PX2-3 may be about 1678 μm 2 .

[0116] According to one or more embodiments of the present disclosure, since the mesh lines ML1 and ML2 are not located in a partial area between the (2-1)th sub-pixel PX2-1, the (2-2)th sub-pixel PX2-2, and the (2-3)th sub-pixel PX2-3, the area of ​​each of the (2-1)th sub-pixel PX2-1, the (2-2)th sub-pixel PX2-2, and the (2-3)th sub-pixel PX2-3 can be increased. Therefore, the first distance W1 can be reduced. Since the aperture ratio of each of the (2-1)th sub-pixel region PXA2-1, the (2-2)th sub-pixel region PXA2-2, and the (2-3)th sub-pixel region PXA2-3 is improved, the current density applied to the plurality of pixels PX can be reduced, so that the life of each of the plurality of pixels PX can be increased. Therefore, it can be possible to provide an electronic device 1000 with improved reliability.

[0117] The light blocking region NPXA may be a region positioned adjacent to the (1-1)th sub-pixel region PXA1-1, the (1-2)th sub-pixel region PXA1-2, the (1-3)th sub-pixel region PXA1-3, the (2-1)th sub-pixel region PXA2-1, the (2-2)th sub-pixel region PXA2-2, and the (2-3)th sub-pixel region PXA2-3. The light blocking region NPXA may set a boundary of the (1-1)th sub-pixel region PXA1-1, the (1-2)th sub-pixel region PXA1-2, the (1-3)th sub-pixel region PXA1-3, the (2-1)th sub-pixel region PXA2-1, the (2-2)th sub-pixel region PXA2-2, and the (2-3)th sub-pixel region PXA2-3. The light blocking area NPXA may reduce or prevent color mixing of the (1-1)th sub-pixel area PXA1-1, the (1-2)th sub-pixel area PXA1-2, the (1-3)th sub-pixel area PXA1-3, the (2-1)th sub-pixel area PXA2-1, the (2-2)th sub-pixel area PXA2-2, and the (2-3)th sub-pixel area PXA2-3.

[0118] The sensor layer 200 of the electronic device 1000 (see Figure 4 ) may include a sensing electrode SP (see Figure 4 ). Sensing electrode SP (see Figure 4 ) may include a first mesh line ML1 and a second mesh line ML2. For example, the first mesh line ML1 and the second mesh line ML2 may be disposed in the second conductive layer 204 (see Figure 5 However, this is only described as an example, and according to one or more embodiments of the present disclosure, the first mesh line ML1 and the second mesh line ML2 may be disposed in the first conductive layer 202 (see Figure 5 )middle.

[0119] When viewed on a plane, the first mesh line ML1 may be positioned by surrounding the first pixel group area PXAG1 and the second pixel group area PXAG2 .

[0120] The second mesh line ML2 may be electrically connected to the first mesh line ML1 and may extend in the first direction DR1. At this time, the second mesh line ML2 may be located between the first pixel group region PXAG1 and the second pixel group region PXAG2.

[0121] When viewed on a plane, the first mesh line ML1 and the second mesh line ML2 may not overlap the first pixel group area PXAG1 and the second pixel group area PXAG2. The first mesh line ML1 and the second mesh line ML2 may have the same electrode width WM. The electrode width WM may be smaller than the first distance W1. For example, the electrode width WM may be about 3 μm.

[0122] The first mesh line ML1 may include a (1-1)th protrusion portion MLP1-1 and a (1-2)th protrusion portion MLP1-2.

[0123] The (1-1)th protrusion portion MLP1-1 may be electrically connected to the first mesh line ML1 and may protrude by a first protrusion distance WP1 in the first direction DR1. When viewed on a plane, the (1-1)th protrusion portion MLP1-1 may be located between the (1-1)th sub-pixel PX1-1 and the (1-2)th sub-pixel PX1-2. The first protrusion distance WP1 may be smaller than a width of each of the (1-1)th sub-pixel PX1-1 and the (1-2)th sub-pixel PX1-2 in the first direction DR1.

[0124] The (1-2)th protrusion portion MLP1-2 may be electrically connected to the first mesh line ML1 and may protrude by a first protrusion distance WP1 in the first direction DR1. When viewed on a plane, the (1-2)th protrusion portion MLP1-2 may be located between the (2-1)th sub-pixel PX2-1 and the (2-2)th sub-pixel PX2-2. The first protrusion distance WP1 may be smaller than a width of each of the (2-1)th sub-pixel PX2-1 and the (2-2)th sub-pixel PX2-2 in the first direction DR1.

[0125] The second mesh line ML2 may include a (2-1)th protrusion portion MLP2-1 and a (2-2)th protrusion portion MLP2-2.

[0126] The (2-1)th protrusion portion MLP2-1 may be electrically connected to the second mesh line ML2 and may protrude by a second protrusion distance WP2 in the second direction DR2. When viewed on a plane, the (2-1)th protrusion portion MLP2-1 may be located between the (1-1)th sub-pixel PX1-1 and the (1-3)th sub-pixel PX1-3. The second protrusion distance WP2 may be smaller than a width of each of the (1-1)th sub-pixel PX1-1 and the (1-3)th sub-pixel PX1-3 in the second direction DR2.

[0127] The (2-2)th protrusion portion MLP2-2 may be electrically connected to the second mesh line ML2 and may protrude by a second protrusion distance WP2 in a direction opposite to the second direction DR2. When viewed on a plane, the (2-2)th protrusion portion MLP2-2 may be located between the (2-2)th sub-pixel PX2-2 and the (2-3)th sub-pixel PX2-3. The second protrusion distance WP2 may be smaller than a width of each of the (2-2)th sub-pixel PX2-2 and the (2-3)th sub-pixel PX2-3 in the second direction DR2.

[0128] The first protrusion distance WP1 and the second protrusion distance WP2 may have different sizes, but one or more embodiments of the present disclosure are not limited thereto. The first protrusion distance WP1 and the second protrusion distance WP2 may have the same size.

[0129] Unlike one or more embodiments of the present disclosure, if the mesh line is located in all areas between the (1-1)th sub-pixel PX1-1, the (1-2)th sub-pixel PX1-2, the (1-3)th sub-pixel PX1-3, the (2-1)th sub-pixel PX2-1, the (2-2)th sub-pixel PX2-2, and the (2-3)th sub-pixel PX2-3, then due to the mesh line located on the light emitting element, the light emitted from each of the plurality of pixels PX may be blocked by the mesh line, so that the first angle AG (see Figure 7 ) may decrease.

[0130] However, according to one or more embodiments of the present disclosure, a plurality of pixels PX may emit light through the pixel group region PXAG1 or PXAG2. Figure 4 ) may not be located in a partial area between the (1-2)th sub-pixel PX1-2 and the (1-3)th sub-pixel PX1-3 or in a partial area between the (2-1)th sub-pixel PX2-1 and the (2-3)th sub-pixel PX2-3. Therefore, the influence of the phenomenon that the light emitted from each of the plurality of pixels PX is blocked by the mesh lines located on the light emitting element can be reduced or prevented. Therefore, the first angle AG (see Figure 7 ) may not be restricted by the mesh lines ML1 and ML2. The area of ​​each of the (1-1)th sub-pixel PX1-1, the (1-2)th sub-pixel PX1-2, the (1-3)th sub-pixel PX1-3, the (2-1)th sub-pixel PX2-1, the (2-2)th sub-pixel PX2-2, and the (2-3)th sub-pixel PX2-3 may be increased. Since the aperture ratio of each of the (1-1)th sub-pixel region PXA1-1, the (1-2)th sub-pixel region PXA1-2, the (1-3)th sub-pixel region PXA1-3, the (2-1)th sub-pixel region PXA2-1, the (2-2) sub-pixel region PXA2-2, and the (2-3) sub-pixel region PXA2-3 is improved, the current density applied to the plurality of pixels PX may be reduced, so that the life of each of the plurality of pixels PX may be increased. Therefore, it may be possible to provide the electronic device 1000 having improved reliability.

[0131] Figure 7 According to one or more embodiments of the present disclosure, Figure 6 A cross-sectional view of the electronic device taken along line II-II'. Figure 7 Description, reference Figure 2 The described components will be denoted by the same reference numerals or symbols, and description thereof will be omitted.

[0132] refer to Figure 6 and Figure 7 , electronic device 1000 (see Figure 1 ) may include a display layer 100 , a sensor layer 200 , an anti-reflection panel 300 and a window 400 .

[0133] The display layer 100 may include a base layer 110 , a circuit layer 120 , a light emitting element layer 130 , and an encapsulation layer 140 .

[0134] At least one inorganic layer is formed on the upper surface of the base layer 110. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, or hafnium oxide. The inorganic layer may be formed as a multilayer. The plurality of inorganic layers may include a barrier layer and / or a buffer layer. It is shown that the display layer 100 includes a buffer layer BFL.

[0135] The buffer layer BFL may improve the adhesion between the base layer 110 and the semiconductor pattern. The buffer layer BFL may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the buffer layer BFL may include a structure of alternately stacked silicon oxide layers and silicon nitride layers.

[0136] The semiconductor pattern may be located on the buffer layer BFL. The semiconductor pattern may include polysilicon. However, one or more embodiments of the present disclosure are not limited thereto, and the semiconductor pattern may include amorphous silicon, low temperature polysilicon, or an oxide semiconductor.

[0137] Figure 7 Only a portion of the semiconductor pattern is shown, and the semiconductor pattern may also be located in another region. The semiconductor pattern may be arranged in a certain regular pattern across multiple pixels. The semiconductor pattern may differ in electrical properties depending on whether it is doped. The semiconductor pattern may include a first region with high conductivity and a second region with low conductivity. The first region may be doped with an N-type dopant or a P-type dopant. The P-type transistor may include a doped region doped with a P-type dopant, and the N-type transistor may include a doped region doped with an N-type dopant. The second region may be an undoped region, or may be a doped region doped with a lower concentration than the first region.

[0138] The first region may have a higher conductivity than the conductivity of the second region and may be substantially used as an electrode or a signal line. The second region may substantially correspond to an active region of a transistor. In other words, a portion of the semiconductor pattern may be an active region of a transistor, another portion of the semiconductor pattern may be a source region or a drain region of the transistor, and another region may be a connecting electrode or a connecting signal line.

[0139] The plurality of pixels may include a plurality of first pixels, a plurality of second pixels, and a plurality of third pixels. The plurality of pixels may each have an equivalent circuit including seven transistors, a capacitor, and a light emitting element, and the equivalent circuit diagram of the pixel may be changed in various forms. Figure 7 One transistor and a light emitting element included in each of the pixels are shown.

[0140] The (1-1)th sub-pixel PX1 - 1 may include a first transistor 100PC1 and a first light emitting element 100PE1 .

[0141] The (1-2)th sub-pixel PX1 - 2 may include a second transistor 100PC2 and a second light emitting element 100PE2 .

[0142] The (1-3)th sub-pixel PX1 - 3 may include a third transistor 100PC3 and a third light emitting element 100PE3 .

[0143] The source region SC1, the active region A1, and the drain region D1 of each of the first transistor 100PC1, the second transistor 100PC2, and the third transistor 100PC3 may be formed of a semiconductor pattern. The source region SC1 and the drain region D1 may extend from the active region A1 in opposite directions in a cross section, respectively. Figure 7A portion of a connection signal line SCL formed of a semiconductor pattern is shown. In one or more embodiments, the connection signal line SCL may be connected to the drain region D1 of the first transistor 100PC1 on a plane.

[0144] The first insulating layer 10 may be located on the buffer layer BFL. The first insulating layer 10 may overlap with a plurality of pixels PX and may cover a semiconductor pattern. The first insulating layer 10 may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The first insulating layer 10 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. The first insulating layer 10 may be a single-layer silicon oxide layer. In addition to the first insulating layer 10 being an inorganic layer and / or an organic layer, the insulating layer of the circuit layer 120 to be described later may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The inorganic layer may include at least one of the materials mentioned above, but one or more embodiments of the present disclosure are not limited thereto.

[0145] The gate G1 of each of the first transistor 100PC1, the second transistor 100PC2, and the third transistor 100PC3 is located on the first insulating layer 10. The gate G1 may be a part of the metal pattern. The gate G1 overlaps the active area A1. The gate G1 may be used as a mask in the doping process of the semiconductor pattern.

[0146] The second insulating layer 20 may be located on the first insulating layer 10 and may cover the gate G1. The second insulating layer 20 may overlap with the pixel PX. The second insulating layer 20 may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The second insulating layer 20 may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. The second insulating layer 20 may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.

[0147] The third insulating layer 30 may be located on the second insulating layer 20. The third insulating layer 30 may have a single layer structure or a multi-layer structure. For example, the third insulating layer 30 may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.

[0148] The first connection electrode CNE1 may be located on the third insulating layer 30. The first connection electrode CNE1 may be connected to the connection signal line SCL through a contact hole CNT-1 passing through the first insulating layer 10, the second insulating layer 20, and the third insulating layer 30.

[0149] The fourth insulating layer 40 may be located on the third insulating layer 30. The fourth insulating layer 40 may be a single silicon oxide layer. The fifth insulating layer 50 may be located on the fourth insulating layer 40. The fifth insulating layer 50 may be an organic layer.

[0150] The second connection electrode CNE2 may be located on the fifth insulating layer 50. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a contact hole CNT-2 passing through the fourth insulating layer 40 and the fifth insulating layer 50.

[0151] The sixth insulating layer 60 may be located on the fifth insulating layer 50 and may cover the second connection electrode CNE2. The sixth insulating layer 60 may be an organic layer.

[0152] The light emitting element layer 130 may be located on the circuit layer 120. The light emitting element layer 130 may include a plurality of light emitting elements 100PE1, 100PE2, and 100PE3. For example, the light emitting element layer 130 may include an organic light emitting material, a quantum dot, a quantum rod, a micro-LED, or a nano-LED. Hereinafter, the plurality of light emitting elements 100PE1, 100PE2, and 100PE3 are illustrated as organic light emitting elements, but this is not particularly true for one or more embodiments of the present disclosure.

[0153] The first light emitting element 100PE1 may include a first pixel electrode AE1, a first light emitting layer EL1, and a common electrode CE.

[0154] The second light emitting element 100PE2 may include a second pixel electrode AE2, a second light emitting layer EL2, and a common electrode CE.

[0155] The third light emitting element 100PE3 may include a third pixel electrode AE3, a third light emitting layer EL3, and a common electrode CE.

[0156] The first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3 may be located on the sixth insulating layer 60. The first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3 may each be connected to the second connection electrode CNE2 through a contact hole CNT-3 passing through the sixth insulating layer 60.

[0157] The pixel defining film 70 may be located on the sixth insulating layer 60 and may cover a portion of the first pixel electrode AE1. An opening 70-OP is defined in the pixel defining film 70. The opening 70-OP of the pixel defining film 70 exposes at least a portion of each of the first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3.

[0158] Effective area 100A (see Figure 3) may include a light blocking region NPXA adjacent to the (1-1)th sub-pixel region PXA1-1, the (1-2)th sub-pixel region PXA1-2, and the (1-3)th sub-pixel region PXA1-3. The light blocking region NPXA may surround the (1-1)th sub-pixel region PXA1-1, the (1-2)th sub-pixel region PXA1-2, and the (1-3)th sub-pixel region PXA1-3.

[0159] The (1-1)th, (1-2)th, and (1-3)th subpixel regions PXA1-1, PXA1-2, and PXA1-3 are respectively defined corresponding to partial regions of the first, second, and third pixel electrodes AE1, AE2, and AE3 exposed by the opening 70-OP.

[0160] The first light emitting layer EL1 may be located on the first pixel electrode AE1. The second light emitting layer EL2 may be located on the second pixel electrode AE2. The third light emitting layer EL3 may be located on the third pixel electrode AE3. The first light emitting layer EL1, the second light emitting layer EL2, and the third light emitting layer EL3 may each be located in a region corresponding to the opening 70-OP.

[0161] When light emitted from the light emitting layer EL1, EL2, or EL3 passes through the encapsulation layer 140, the light may be emitted at an angle (e.g., a predetermined angle) due to the second conductive layer 204. The light emitted from the light emitting layer EL1, EL2, or EL3 may be referred to as first light LE. The angle (e.g., a predetermined angle) may refer to an angle formed by a line L1 parallel to the third direction DR3 and the first light LE. The angle may be referred to as a first angle AG.

[0162] The common electrode CE may be located on the light emitting layers EL1, EL2, and EL3. The common electrode CE may have an integral shape and may be commonly located on a plurality of pixels PX.

[0163] In one or more embodiments, the hole control layer may be located between the first pixel electrode AE1 and the first light emitting layer EL1. The hole control layer may be located in the (1-1)th sub-pixel region PXA1-1 and the light blocking region NPXA. The hole control layer may include a hole transport layer and may further include a hole injection layer. The electron control layer may be located between the first light emitting layer EL1 and the common electrode CE. The electron control layer may include an electron transport layer and may further include an electron injection layer. The hole control layer and the electron control layer may be formed together on a plurality of pixels PX using an open mask.

[0164] The encapsulation layer 140 may be located on the light emitting element layer 130. The encapsulation layer 140 may include only an inorganic layer, but the layers constituting the encapsulation layer 140 are not limited thereto. The encapsulation layer 140 may have a thickness of about 10 μm to about 12 μm. For example, the thickness of the encapsulation layer 140 may be about 10.5 μm. Unlike one or more embodiments of the present disclosure, when the thickness of the encapsulation layer 140 is less than about 10 μm, the encapsulation layer 140 may not properly perform its function, and when the thickness of the encapsulation layer 140 is greater than about 12 μm, the first light LE may be blocked by the second conductive layer 204 to be described later, so that the first angle AG may be reduced. Therefore, there may be limitations in increasing the area of ​​the sub-pixel.

[0165] The inorganic layer may protect the light emitting element layer 130 from moisture and oxygen. The inorganic layer may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, and the like.

[0166] The sensor layer 200 may include a base layer 201 , a first conductive layer 202 , a sensing insulating layer 203 , a second conductive layer 204 , and a cover insulating layer 205 .

[0167] The base layer 201 may be an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the base layer 201 may be an organic layer including epoxy resin, acrylate resin, or imide-based resin. The base layer 201 may have a single-layer structure, or may have a structure of multiple layers stacked along the third direction DR3.

[0168] The first conductive layer 202 and the second conductive layer 204 may each have a single layer structure, or may have a stacked structure of multiple layers. The first conductive layer 202 may include a plurality of second connection patterns BSP2. The second conductive layer 204 may include a plurality of first sensing patterns SP1, a plurality of first connection patterns BSP1, and a plurality of second sensing patterns SP2. However, this is shown only as an example, and according to one or more embodiments of the present disclosure, the components included in each of the first conductive layer 202 and the second conductive layer 204 are not limited thereto.

[0169] The single-layer conductive layer may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum or an alloy thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO) or indium zinc tin oxide (IZTO). In addition, the transparent conductive layer may include a conductive polymer such as PEDOT, metal nanowires, graphene, etc.

[0170] The multi-layer conductive layer may include a metal layer. The metal layer may have a three-layer structure of, for example, titanium / aluminum / titanium. The multi-layer conductive layer may include at least one metal layer and at least one transparent conductive layer.

[0171] At least one of the sensing insulating layer 203 and the capping insulating layer 205 may include an inorganic film. The inorganic film may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0172] At least one of the sensing insulating layer 203 and the cover insulating layer 205 may include an organic film. The organic film may include at least one of acrylate-based resin, methacrylate-based resin, polyisoprene-based resin, vinyl-based resin, epoxy-based resin, urethane-based resin, cellulose-based resin, siloxane-based resin, polyimide-based resin, polyamide-based resin, and perylene-based resin.

[0173] The anti-reflection panel 300 may be located on the sensor layer 200. The anti-reflection panel 300 reduces reflectivity of external light incident from above the window 400. According to one or more embodiments of the present disclosure, the anti-reflection panel 300 may be omitted.

[0174] The window 400 may be located on the anti-reflection panel 300. The window 400 may include an optically transparent insulating material. For example, the window 400 may include glass or plastic. The window 400 may have a multi-layer structure or a single-layer structure. For example, the window 400 may include a plurality of plastic films bonded to each other by an adhesive, or include a glass substrate and a plastic film bonded to each other by an adhesive.

[0175] Unlike one or more embodiments of the present disclosure, when the second conductive layer 204 is located in all areas between the (1-2)th sub-pixel region PXA1-2 and the (1-3)th sub-pixel region PXA1-3, the first light LE may be blocked by the second conductive layer 204, so that the above-mentioned first angle AG may be reduced. However, according to one or more embodiments of the present disclosure, because the second conductive layer 204 is not located between the (1-2)th sub-pixel region PXA1-2 and the (1-3)th sub-pixel region PXA1-3, it may be possible to reduce or prevent the possibility of the first light LE being blocked by the second conductive layer 204. The first angle AG of light emitted from each of the plurality of pixels PX may be increased. The area of ​​each of the (1-1)th sub-pixel PX1-1, the (1-2)th sub-pixel PX1-2, and the (1-3)th sub-pixel PX1-3 may be increased. Therefore, since the aperture ratio of each of the (1-1)th sub-pixel region PXA1-1, the (1-2)th sub-pixel region PXA1-2, and the (1-3)th sub-pixel region PXA1-3 is improved, the current density applied to the plurality of pixels PX can be reduced, so that the life of each of the plurality of pixels PX can be increased. Therefore, it may be possible to provide the electronic device 1000 having improved reliability.

[0176] Figure 8 The present invention is a diagram showing one or more embodiments of the present invention. Figure 1 The area AA' corresponds to the plane diagram of the area. Figure 8 Description, reference Figure 6 The described components will be denoted by the same reference numerals or symbols, and description thereof will be omitted.

[0177] In the sensor layer 200 (see Figure 4 ), the sensing electrode SP may be defined (see Figure 4 ). Sensing electrode SP (see Figure 4 ) may include a (1-1)th mesh line ML1-1, a (2-1)th mesh line ML2-1, a third mesh line ML3, a fourth mesh line ML4, and a fifth mesh line ML5.

[0178] For example, the (1-1)th mesh line ML1-1, the (2-1)th mesh line ML2-1, the third mesh line ML3, the fourth mesh line ML4, and the fifth mesh line ML5 may be included in the second conductive layer 204 (see Figure 5 However, this is shown only as an example, and according to one or more embodiments of the present disclosure, the (1-1)th mesh line ML1-1, the (2-1)th mesh line ML2-1, the third mesh line ML3, the fourth mesh line ML4, and the fifth mesh line ML5 may be included in the first conductive layer 202 (see Figure 5 )middle.

[0179] When viewed on a plane, the (1-1)th mesh line ML1-1 may be positioned by surrounding the first pixel group area PXAG1 and the second pixel group area PXAG2. The (1-1)th mesh line ML1-1 may have a rectangular shape.

[0180] The (2-1)th mesh line ML2-1 may be electrically connected to the (1-1)th mesh line ML1-1 and may extend in the first direction DR1. At this time, the (2-1)th mesh line ML2-1 may be located between the first pixel group region PXAG1 and the second pixel group region PXAG2.

[0181] The third mesh line ML3 may extend from the (1-1)th mesh line ML1-1 in the second direction DR2 and may be electrically connected to the (1-1)th mesh line ML1-1. When viewed on a plane, the third mesh line ML3 may overlap at least a portion of the first pixel group PX1 and the second pixel group PX2.

[0182] Figure 8 The third mesh line ML3 is shown to overlap with the (1-3)th sub-pixel PX1-3 and the (2-3)th sub-pixel PX2-3 on a plane, but one or more embodiments of the present disclosure are not limited thereto. For example, on a plane, the third mesh line ML3 may overlap with the (1-1)th sub-pixel PX1-1, the (1-2)th sub-pixel PX1-2, the (2-1)th sub-pixel PX2-1, and the (2-2)th sub-pixel PX2-2.

[0183] The fourth mesh line ML4 may extend from the (1-1)th mesh line ML1-1 in the first direction DR1 and may be electrically connected to the (1-1)th mesh line ML1-1. When viewed on a plane, the fourth mesh line ML4 may overlap at least a portion of the first pixel group PX1.

[0184] Figure 8 The fourth mesh line ML4 is shown to overlap with the (1-2)th sub-pixel PX1-2 and the (1-3)th sub-pixel PX1-3 on a plane, but one or more embodiments of the present disclosure are not limited thereto. For example, on a plane, the fourth mesh line ML4 may overlap with the (1-1)th sub-pixel PX1-1 and the (1-3)th sub-pixel PX1-3.

[0185] The fifth mesh line ML5 may extend from the (1-1)th mesh line ML1-1 in the first direction DR1 and may be electrically connected to the (1-1)th mesh line ML1-1. When viewed on a plane, the fifth mesh line ML5 may overlap at least a portion of the second pixel group PX2.

[0186] Figure 8The fifth mesh line ML5 is shown to overlap with the (2-2)th sub-pixel PX2-2 and the (2-3)th sub-pixel PX2-3 on a plane, but one or more embodiments of the present disclosure are not limited thereto. For example, on a plane, the fifth mesh line ML5 may overlap with the (2-1)th sub-pixel PX2-1 and the (2-3)th sub-pixel PX2-3.

[0187] According to one or more embodiments of the present disclosure, on a plane, due to the third mesh line ML3, the fourth mesh line ML4, and the fifth mesh line ML5 positioned overlapping with the first pixel group PX1 and the second pixel group PX2, a plurality of first sensing electrodes TE1 (see Figure 4 ) and a plurality of second sensing electrodes TE2 (see Figure 4 ) can increase the mutual capacitance between them. As the mutual capacitance increases, the amount of change in the mutual capacitance can increase. Therefore, the sensor layer 200 (see Figure 4 )’s sensing sensitivity.

[0188] Fig. 9 The present invention is a diagram showing one or more embodiments of the present invention. Figure 1 The area AA' corresponds to the plane diagram of the area. Fig. 9 Description, reference Figure 6 and Figure 8 The described components will be denoted by the same reference numerals or symbols, and description thereof will be omitted.

[0189] In the sensor layer 200 (see Figure 4 ), the sensing electrode SP may be defined (see Figure 4 ). Sensing electrode SP (see Figure 4 ) may include a (1-1)th mesh line ML1-1, a (2-1)th mesh line ML2-1, and an auxiliary electrode AEL.

[0190] refer to Figure 5 and Fig. 9 , the auxiliary electrode AEL may be located on a different layer from the (1-1)th mesh line ML1-1 and the (2-1)th mesh line ML2-1. For example, the (1-1)th mesh line ML1-1 and the (2-1)th mesh line ML2-1 may be located on the first conductive layer 202, and the auxiliary electrode AEL may be located on the second conductive layer 204. The auxiliary electrode AEL may have a zigzag shape. The auxiliary electrode AEL may include a transparent metal oxide, for example, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium zinc tin oxide (IZTO), etc.

[0191] The auxiliary electrode AEL may be electrically connected to the (1-1)th mesh line ML1-1. When viewed on a plane, the auxiliary electrode AEL may overlap at least a portion of at least one of the first pixel group PX1, the second pixel group PX2, or the (2-1)th mesh line ML2-1.

[0192] Fig. 9 The auxiliary electrode AEL is shown to overlap with the (1-1)th sub-pixel PX1-1, the (1-3)th sub-pixel PX1-3, and the (2-1)th mesh line ML2-1, but one or more embodiments of the present disclosure are not limited thereto. For example, on a plane, the auxiliary electrode AEL may overlap only with the (1-1)th sub-pixel PX1-1 and the (1-3)th sub-pixel PX1-3.

[0193] According to one or more embodiments of the present disclosure, on a plane, due to the auxiliary electrode AEL positioned overlapping at least a portion of at least one of the first pixel group PX1, the second pixel group PX2, and the (2-1) mesh line ML2-1, mutual capacitance between the sensing electrodes each formed as the auxiliary electrode AEL may increase. Due to the increase in mutual capacitance, the amount of change in mutual capacitance may increase. Therefore, the sensor layer 200 (see Figure 4 )’s sensing sensitivity.

[0194] According to the previously described content, since the electronic device has a sensing electrode that is not located in a partial area, the area of ​​the plurality of pixels can be increased. Therefore, the current density applied to the plurality of pixels can be reduced, so that the life of each of the plurality of pixels can be increased. Therefore, the reliability of the electronic device can be improved.

[0195] Although the embodiments of the present disclosure have been described, it should be understood that the present disclosure should not be limited to these embodiments, but various changes and modifications can be made by ordinary technicians in the field within the spirit and scope of the present disclosure to be protected. Therefore, the technical scope of the present disclosure should not be limited to the contents described in the specific embodiments of the specification, but should be defined by the claims, and the functional equivalents of the claims should be included in the claims.

Claims

1. An electronic device, comprising: A display layer including pixels, wherein the pixels include a first pixel group and a second pixel group; as well as a sensor layer, above the display layer, and comprising sensing electrodes, Wherein, the first pixel group includes: A (1-1)th sub-pixel, configured to emit a first light; a (1-2)th sub-pixel spaced apart from the (1-1)th sub-pixel by a first distance in a second direction and configured to emit a second light different from the first light; and a (1-3)th sub-pixel spaced apart from each of the (1-1)th sub-pixel and the (1-2)th sub-pixel by the first distance in a first direction intersecting the second direction, and configured to emit a third light different from the first light and the second light, wherein the second pixel group includes: A (2-1)th sub-pixel, configured to emit the first light; a (2-2)th sub-pixel, adjacent to the (1-1)th sub-pixel in the second direction, spaced apart from the (1-1)th sub-pixel by a second distance different from the first distance, spaced apart from the (2-1)th sub-pixel in the second direction by the first distance, and configured to emit the second light; and The (2-3)th sub-pixel is spaced apart from each of the (2-1)th sub-pixel and the (2-2)th sub-pixel by the first distance in the first direction and is configured to emit the third light.

2. The electronic device according to claim 1, wherein: The first distance is smaller than the second distance.

3. The electronic device according to claim 1, wherein: The sensing electrode comprises: a first mesh line having a mesh structure and surrounding the first pixel group and the second pixel group; and A second mesh line is electrically connected to the first mesh line, is between the first pixel group and the second pixel group, and extends in the first direction.

4. The electronic device according to claim 3, wherein: The first meshed wire and the second meshed wire have the same electrode width, and the electrode width is smaller than the first distance.

5. The electronic device according to claim 3, wherein: When viewed on a plane, the first mesh lines and the second mesh lines do not overlap with the first pixel group and the second pixel group.

6. The electronic device according to claim 3, wherein: The first mesh line includes a (1-1)th protruding portion, which is between the (1-1)th sub-pixel and the (1-2)th sub-pixel on a plane and protrudes in the first direction.

7. The electronic device according to claim 6, wherein: The first mesh line further includes a (1-2)th protruding portion, which is between the (2-1)th sub-pixel and the (2-2)th sub-pixel on the plane and protrudes in the first direction.

8. The electronic device according to claim 7, wherein: The second mesh line includes a (2-1)th protruding portion, which is between the (1-1)th sub-pixel and the (1-3)th sub-pixel on the plane and protrudes in the second direction.

9. The electronic device according to claim 8, wherein: The second mesh line further includes a (2-2)th protruding portion, which is between the (2-2)th sub-pixel and the (2-3)th sub-pixel on the plane and protrudes in a direction opposite to the second direction.

10. The electronic device according to claim 9, wherein: The (1-1)th protruding portion and the (1-2)th protruding portion have the same length, and Wherein, the (2-1)th protruding portion and the (2-2)th protruding portion have the same length.

11. The electronic device according to claim 3, wherein: When viewed on a plane, the first mesh line and the second mesh line are not between the (1-2)th sub-pixel and the (1-3)th sub-pixel.

12. The electronic device according to claim 3, wherein: When viewed on a plane, the first mesh line and the second mesh line are not between the (2-1)th sub-pixel and the (2-3)th sub-pixel.

13. The electronic device according to claim 3, wherein: The sensing electrode further includes a third mesh line electrically connected to the first mesh line in the second direction, and When viewed on a plane, the third mesh line overlaps with at least a portion of the first pixel group and at least a portion of the second pixel group.

14. The electronic device according to claim 3, wherein: The sensing electrode further includes a fourth mesh line electrically connected to the first mesh line in the first direction, and When viewed on a plane, the fourth mesh line overlaps with at least a portion of the first pixel group.

15. The electronic device according to claim 3, wherein: The sensing electrode further includes a fifth mesh line electrically connected to the first mesh line in the first direction, and When viewed on a plane, the fifth mesh line overlaps with at least a portion of the second pixel group.

16. The electronic device according to claim 3, wherein: The sensing electrode further includes an auxiliary electrode electrically connected to the first mesh line, and When viewed in a plane, the auxiliary electrode overlaps at least a portion of at least one of the first pixel group, the second pixel group, and the second mesh line.

17. The electronic device according to claim 16, wherein: The auxiliary electrode has a sawtooth shape.

18. The electronic device according to claim 16, wherein: The auxiliary electrode includes a transparent material.

19. The electronic device according to claim 1, wherein: The (1-1)th sub-pixel has an area smaller than that of the (1-2)th sub-pixel, and the area of ​​the (1-2)th sub-pixel is smaller than that of the (1-3)th sub-pixel.

20. The electronic device according to claim 1, wherein: The (2-1)th sub-pixel has an area smaller than that of the (2-2)th sub-pixel, and the area of ​​the (2-2)th sub-pixel is smaller than that of the (2-3)th sub-pixel.

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