Converter and overvoltage suppression method and device of converter

Abstract

The invention provides a current converter and an overvoltage suppression method and device of the current converter. The converter comprises a first bridge arm, a second bridge arm, a first inversion unit, a second inversion unit and a bridge arm inductor. When the positive and negative alternating first voltage output by the first inversion unit is zero, zero-voltage circulating current is generated, and the bridge arm inductor can restrain the zero-voltage circulating current. Meanwhile, the bridge arm inductor can slow down the rise rate of the fault current, thereby limiting the fault current. In the overvoltage suppression method, a control duration can be preset or determined according to an actual current of a bridge arm inductor in the converter, all power tubes of a first inversion unit in the converter are controlled to be conducted according to the control duration, and a first bridge arm in the converter is controlled. The problem of heating caused by the energy release device can be avoided, safe and stable operation of the current converter is ensured, and the reliability of the current converter is improved.

Description

Technical Field

[0001] The present application relates to the field of power transmission technology, and in particular to a converter, and a method and device for suppressing overvoltage of the converter. Background Art

[0002] The flexible low-frequency AC transmission system can flexibly select frequencies below 50Hz with the help of frequency conversion and grid control technology of power electronic devices to improve the AC transmission capacity, while retaining the characteristics of electromagnetic induction transformation and current zero-crossing interruption of AC transmission. It is a supplement to industrial frequency AC transmission and DC transmission. The converter is the core part of the flexible low-frequency AC transmission system, which can realize frequency conversion and perform flexible control of the power grid such as flow control and voltage regulation.

[0003] When there is a phase difference between the output voltage and output current of the converter, since the output current of the converter is not zero when the output voltage of the converter passes through zero, the zero-crossing reversal of the output voltage will cause a sudden change in the polarity of the bridge arm inductor current, resulting in a spike voltage in the bridge arm inductor, which in turn causes an overvoltage in the output voltage of the converter. Related technologies usually suppress overvoltage in the converter through an energy dissipation device. Due to the existence of the energy dissipation device and the heat generated during the energy dissipation process of the energy dissipation device, the size of the converter is large and affects the safe and stable operation of the converter, that is, the reliability of the converter is low. Summary of the invention

[0004] In order to solve the problems of large size and low reliability of the converter in the prior art, the present application provides a converter, which may include a first bridge arm, a second bridge arm, a first inversion unit, a second inversion unit and a bridge arm inductor.

[0005] The second bridge arm, the first bridge arm, the bridge arm inductor and the first inversion unit are connected in series to form a series loop. The second bridge arm is connected in parallel with the second inversion unit. The first inversion unit serves as an output unit or an input unit of the converter, and the second inversion unit serves as an input unit or an output unit of the converter.

[0006] In a possible implementation manner, the first bridge arm is used to: generate an output voltage of the first bridge arm.

[0007] The second bridge arm is used to generate an output voltage of the second bridge arm.

[0008] The first inversion unit is used to: superimpose the output voltage of the second bridge arm and the output voltage of the first bridge arm, and reverse the polarity of the superimposed voltage to generate a first voltage that alternates between positive and negative. The superimposed voltage has the same polarity as the output voltage of the second bridge arm, and the first voltage is used to indicate the output voltage or input voltage of the converter.

[0009] The second inversion unit is used to invert the polarity of the output voltage of the second bridge arm to generate a second voltage that alternates between positive and negative; wherein the second voltage is used to indicate the input voltage or output voltage of the converter.

[0010] The bridge arm inductance is used to: suppress the current in the series loop.

[0011] It can be seen that the first inversion unit can be used as the input unit of the converter, and can also be used as the output unit of the converter. Similarly, the second inversion unit can be used as the input unit of the converter, and can also be used as the output unit of the converter. In other words, the converter provided in the present application can be a bidirectional converter.

[0012] Exemplarily, the first inversion unit is specifically used to: invert the polarity of the superimposed voltage according to a first preset frequency and a first preset phase angle to generate the first voltage.

[0013] The second inversion unit is specifically used to invert the polarity of the output voltage of the second bridge arm according to the second preset frequency and the second preset phase angle to generate a second voltage.

[0014] Exemplarily, the first bridge arm includes one or more cascaded first submodules. The first submodule is a full-bridge module.

[0015] The second bridge arm includes one or more cascaded second submodules, which are half-bridge modules or full-bridge modules.

[0016] Optionally, the first inversion unit and the second inversion unit both adopt an H-bridge topology structure; each bridge arm of the H-bridge topology structure includes one or more power tubes connected in series.

[0017] In another aspect, the present application provides a method for suppressing overvoltage of a converter, comprising:

[0018] The control time is preset, or the control time is determined according to the actual current of the bridge arm inductor in the converter;

[0019] All power tubes of the first inversion unit in the converter are controlled to be turned on according to the control duration, and the first bridge arm in the converter is controlled.

[0020] In a possible implementation, the control time is preset, or the control time is determined according to the actual current of the bridge arm inductor in the converter, including:

[0021] Preset the control time according to the power quality of the converter output; or,

[0022] The interval between the first time node and the second time node is used as the control duration; wherein the first time node is used to indicate the time node when the first voltage of the first inversion unit passes through zero; the second time node is used to indicate the time node corresponding to the actual current of the bridge arm inductor being equal to the amplitude of the current of the bridge arm inductor when the first voltage of the first inversion unit passes through zero and having opposite polarity.

[0023] In another possible implementation, all power tubes of the first inversion unit in the converter are controlled to be turned on according to the control duration, and the first bridge arm in the converter is controlled, including:

[0024] The driving signal is output according to the control time, and all the power tubes are controlled to be turned on according to the driving signal. Therefore, the output voltage of the first inversion unit can be 0.

[0025] The actual voltage of the bridge arm inductance within the control time is determined according to the control time, and the output voltage of the first bridge arm within the control time is determined according to the actual voltage of the bridge arm inductance within the control time; wherein the actual voltage of the bridge arm inductance within the control time is opposite to the voltage polarity of the bridge arm inductance when the first voltage of the first inversion unit passes through zero.

[0026] Optionally, the actual voltage of the bridge arm inductor during the control time satisfies Among them, Δu represents the actual voltage of the bridge arm inductance during the control time, L represents the inductance value of the bridge arm inductance, T d Indicates the preset control duration, i r It represents the current of the bridge arm inductor when the first voltage of the first inversion unit passes through zero.

[0027] The output voltage of the first bridge arm during the control time satisfies u F ′=u F -Δu; where u F ′ represents the output voltage of the first bridge arm during the control time, u F It represents the output voltage of the first bridge arm outside the control time, and Δu represents the actual voltage of the bridge arm inductance within the control time.

[0028] Furthermore, the overvoltage suppression method provided by the present application also includes:

[0029] If the polarity of the first voltage of the first inversion unit at the current time node is opposite to the polarity of the first voltage of the first inversion unit at the previous time node, or if the first amplitude or the second amplitude is 0, it is determined that the first voltage of the first inversion unit crosses zero. In other words, the overvoltage suppression method provided in the present application can also determine whether the first voltage of the first inversion unit crosses zero.

[0030] The first amplitude is used to indicate the amplitude of the first voltage of the first inversion unit at the current time node, and the second amplitude is used to indicate the amplitude of the first voltage of the first inversion unit at the previous time node.

[0031] Optionally, the overvoltage suppression method provided by the present application further includes:

[0032] When the control time is over, the output voltage of the first bridge arm is restored to u F , the output voltage of the first inversion unit is restored to the first voltage of the first inversion unit.

[0033] In another aspect, the present application provides an overvoltage suppression device for a converter, comprising:

[0034] The first determination module is used to pre-set the control time length, or determine the control time length according to the actual current of the bridge arm inductance in the converter.

[0035] The control module is used to control all power tubes of the first inversion unit in the converter to be turned on according to the control duration, and to control the first bridge arm in the converter.

[0036] In some possible implementations, the first determining module is specifically configured to:

[0037] The control duration is pre-set according to the power quality output by the converter. Alternatively, the interval between the first time node and the second time node is used as the control duration. The first time node is used to indicate the time node when the first voltage of the first reversing unit passes through zero. The second time node is used to indicate the time node corresponding to the actual current of the bridge arm inductor and the current of the bridge arm inductor when the first voltage of the first reversing unit passes through zero equal in amplitude and opposite in polarity.

[0038] In some other possible implementations, the control module is specifically used to:

[0039] The driving signal is output according to the control time, and all the power tubes are controlled to be turned on according to the driving signal. Therefore, the output voltage of the first inversion unit is 0.

[0040] The actual voltage of the bridge arm inductance within the control time is determined according to the control time, and the output voltage of the first bridge arm within the control time is determined according to the actual voltage of the bridge arm inductance within the control time. The actual voltage of the bridge arm inductance within the control time is opposite to the voltage polarity of the bridge arm inductance when the first voltage of the first inversion unit passes through zero.

[0041] Optionally, the actual voltage of the bridge arm inductor during the control time satisfies Among them, Δu represents the actual voltage of the bridge arm inductance during the control time, L represents the inductance value of the bridge arm inductance, T d Indicates the preset control duration, i rIt represents the current of the bridge arm inductor when the first voltage of the first inversion unit passes through zero.

[0042] The output voltage of the first bridge arm during the control time satisfies u F ′=u F -Δu; where u F ′ represents the output voltage of the first bridge arm during the control time, u F It represents the output voltage of the first bridge arm outside the control time, and Δu represents the actual voltage of the bridge arm inductance within the control time.

[0043] Furthermore, the overvoltage suppression device provided in the present application also includes a second determination module.

[0044] The second determination module is used to determine that the first voltage of the first inversion unit passes through zero if the polarity of the first voltage of the first inversion unit at the current time node is opposite to the polarity of the first voltage of the first inversion unit at the previous time node, or if the first amplitude or the second amplitude is 0.

[0045] The first amplitude is used to indicate the amplitude of the first voltage of the first inversion unit at the current time node, and the second amplitude is used to indicate the amplitude of the first voltage of the first inversion unit at the previous time node.

[0046] Optionally, the overvoltage suppression method provided in the present application further includes a recovery module. The recovery module is used to: when the control time is over, restore the output voltage of the first bridge arm to u F , the output voltage of the first inversion unit is restored to the first voltage of the first inversion unit.

[0047] On the other hand, the present application also provides a computer device, including: one or more processors.

[0048] A processor is used to execute one or more programs.

[0049] When one or more programs are executed by one or more processors, the overvoltage suppression method as described above is implemented.

[0050] In another aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed, the above-mentioned overvoltage suppression method is implemented.

[0051] Compared with the prior art, the beneficial effects of this application are:

[0052] The converter provided by the present application includes a first bridge arm, a second bridge arm, a first reversing unit, a second reversing unit and a bridge arm inductor. The second bridge arm, the first bridge arm, the bridge arm inductor and the first reversing unit are connected in series to form a series loop. The second bridge arm is connected in parallel with the second reversing unit. When the first voltage outputted by the first reversing unit is zero, a zero voltage circulating current is generated, and the bridge arm inductor can suppress the zero voltage circulating current. At the same time, the bridge arm inductor can slow down the rate of rise of the fault current, thereby limiting the fault current.

[0053] The present application does not use an energy dissipation device, which can reduce the volume of the inverter.

[0054] In the converter provided by the present application, the first inversion unit and the second inversion unit adopt an H-bridge topology structure, and the H-bridge topology structure adopts one or more power tubes connected in series. It can be seen that the first inversion unit and the second inversion unit do not need a DC support capacitor. At the same time, since the power tube only operates when the voltage passes through zero, the loss of the power tube is low, thereby reducing the power consumption of the first inversion unit and the second inversion unit.

[0055] In the overvoltage suppression method provided by the present application, the control duration can be pre-set or determined according to the actual current of the bridge arm inductor in the converter, and all power tubes of the first inversion unit in the converter are controlled to be turned on according to the control duration, and the first bridge arm in the converter is controlled. The present application can avoid the heating problem caused by the energy dissipation device, ensure the safe and stable operation of the converter, that is, improve the reliability of the converter.

[0056] The present application constructs an energy dissipation circuit by turning on all power tubes, and no additional energy dissipation circuit is required inside the converter. Since the energy dissipation circuit usually includes resistors and capacitors, the large amount of heat energy generated by the resistors will affect the safe and stable operation of the converter. Therefore, the present application can ensure the safe and stable operation of the converter, that is, improve the operating reliability of the converter.

[0057] In this application, the actual voltage Δu of the bridge arm inductance during the control time satisfies It can not only reduce the current i of the bridge arm inductance when the first voltage of the first inversion unit passes through zero r The current change rate can reduce the overvoltage peak value on the bridge arm inductor. At the same time, the current i of the bridge arm inductor when the first voltage of the first inversion unit passes through zero can be actively controlled by changing Δu. r , further improving the real-time performance of overvoltage suppression. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] In order to more clearly illustrate the technical solutions in the present application or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0059] Figure 1 is a schematic structural diagram of a converter in an embodiment of the present application;

[0060] Figure 2 is another schematic structural diagram of a converter in an embodiment of the present application;

[0061] Figure 3a A schematic structural diagram of a half-bridge submodule in an embodiment of the present application;

[0062] Figure 3b A schematic structural diagram of a full-bridge submodule in an embodiment of the present application;

[0063] Figure 4 A schematic flow chart of a method for suppressing overvoltage of a converter in an embodiment of the present application;

[0064] Figure 5 Another schematic flow chart of the overvoltage suppression method of the converter in the embodiment of the present application;

[0065] Figure 6 A schematic structural diagram of an overvoltage suppression device for a converter in an embodiment of the present application. DETAILED DESCRIPTION

[0066] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0067] The terms "first", "second", etc. in the specification embodiments, claims, and drawings of the present application are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, including a series of steps or units. The method, system, product, or device is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0068] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0069] Embodiment 1:

[0070] Embodiment 1 of the present application provides a converter, such as Figure 1 The converter 100 may include a first bridge arm 101, a second bridge arm 102, a first inverting unit 103, a second inverting unit 104 and a bridge arm inductor L.

[0071] The second bridge arm 102, the first bridge arm 101, the bridge arm inductor L and the first inversion unit 103 are connected in series to form a series loop. The second bridge arm 102 is connected in parallel with the second inversion unit 104. The first inversion unit 103 serves as an output unit or an input unit of the converter 100, and the second inversion unit 104 serves as an input unit or an output unit of the converter 100. In Embodiment 1 of the present application, the converter 100 can realize AC-AC conversion, and therefore, the converter 100 provided in the embodiment of the present application can be called an AC converter.

[0072] It can be understood that the converter 100 may include a multi-phase topology structure. Each phase topology structure may include a first bridge arm 101, a second bridge arm 102, a first inverting unit 103, a second inverting unit 104 and a bridge arm inductor L.

[0073] In a possible implementation, the first bridge arm 101 is used to generate an output voltage of the first bridge arm 101 (which can be represented by U F The output voltage of the first bridge arm 101 may be a half-wave voltage.

[0074] The second bridge arm 102 is used to generate an output voltage of the second bridge arm 102 (which can be H The output voltage of the second bridge arm 102 may also be a half-wave voltage. The output voltage of the second bridge arm 102 has the same polarity as the output voltage of the first bridge arm 101.

[0075] The first inverting unit 103 is used to:H and the output voltage U of the first bridge arm 101 F By superposition, we can get the voltage obtained by superposition (which can be obtained by U C The voltage U C The polarity is reversed to generate a first voltage (which can be represented by U1) with alternating positive and negative polarity. The voltage obtained by superposition is equal to the output voltage U of the second bridge arm 102. H The first voltage U1 is used to indicate the output voltage or input voltage of the converter 100.

[0076] It should be noted that the voltage of the bridge arm inductance L can be expressed as U L Indicates that U L +U F +U H =U C If we ignore U L , then satisfy U F +U H =U C .

[0077] The second inversion unit 104 is used to invert the polarity of the output voltage of the second bridge arm 102 to generate a second voltage (which can be represented by U2) with alternating positive and negative polarity. The second voltage U2 is used to indicate the input voltage or output voltage of the converter 100.

[0078] The bridge arm inductance L is used to suppress the current of the series loop, that is, to suppress the zero voltage circulating current caused by the voltage fluctuation of the submodule capacitors in the first bridge arm 101 and the second bridge arm 102 .

[0079] It can be seen that the first inversion unit 103 can be used as an input unit of the converter 100, or as an output unit of the converter 100. Similarly, the second inversion unit 104 can be used as an input unit of the converter 100, or as an output unit of the converter 100. That is, the converter 100 provided in the embodiment of the present application can be a bidirectional converter.

[0080] Optionally, the first voltage that alternates between positive and negative may be an industrial frequency voltage, and the second voltage that alternates between positive and negative may be a low-frequency voltage.

[0081] The first inversion unit 103 is specifically used to: obtain a voltage U according to the superposition of the first preset frequency and the first preset phase angle. C The polarity is reversed to generate a first voltage that alternates between positive and negative.

[0082] The second inversion unit 104 is specifically used to invert the polarity of the output voltage of the second bridge arm 102 according to the second preset frequency and the second preset phase angle, so as to generate a second voltage with alternating positive and negative polarities.

[0083] For example, Figure 2 As shown, the first bridge arm 101 includes one or more cascaded first submodules SM1. The first submodule SM1 is a full-bridge module.

[0084] The second bridge arm 102 includes one or more cascaded second submodules SM2. The second submodule SM2 is a half-bridge module or a full-bridge module.

[0085] In the embodiment of the present application, the second submodule may adopt a half-bridge submodule HBSM, such as Figure 3a The first submodule can adopt a full bridge submodule FBSM, such as Figure 3b It can be seen that both the half-bridge submodule HBSM and the full-bridge submodule FBSM may include power tubes (such as IGBTs, etc.) and capacitors, etc.

[0086] Optionally, the first inversion unit 103 and the second inversion unit 104 both adopt an H-bridge topology structure. Each bridge arm of the H-bridge topology structure includes one or more controllable switches such as power tubes connected in series, such as Figure 2 The number of power tubes depends on the specific scenario requirements.

[0087] The converter 100 provided in the embodiment of the present application greatly reduces the number of sub-modules and the number of power tubes, which not only saves costs but also simplifies the complexity of the topological structure.

[0088] Example 2

[0089] Embodiment 2 of the present application provides a method for suppressing overvoltage of a converter, such as Figure 4 The overvoltage suppression method 200 may include the following steps:

[0090] Step S201: presetting the control time length, or determining the control time length according to the actual current of the bridge arm inductor L in the above-mentioned converter 100.

[0091] Step S202: Control all power tubes of the first inversion unit 103 in the converter 100 to be turned on according to the control duration, and control the first bridge arm 101 in the converter 100. It can be understood that controlling all power tubes in the first inversion unit 103 to be turned on can enable the first inversion unit 103 to have both a forward current path and a reverse current path.

[0092] In a possible implementation, the control time length is preset in the above step S201, or the control time length is determined according to the actual current of the bridge arm inductor L in the converter 100, including:

[0093] The control duration is pre-set according to the power quality output by the converter 100. Alternatively, the interval between the first time node and the second time node is used as the control duration. The first time node is used to indicate the time node when the first voltage of the first reversing unit 103 passes through zero. The second time node is used to indicate the time node corresponding to the actual current of the bridge arm inductance L being equal to the current of the bridge arm inductance L when the first voltage of the first reversing unit 103 passes through zero and having opposite polarity.

[0094] It can be imagined that if the control time is extremely small, it can be considered that the current direction of the bridge arm inductance changes suddenly.

[0095] In another possible implementation, the above step S202 controls all power tubes of the first inversion unit 103 in the converter 100 to be turned on according to the control duration, and controls the first bridge arm 101 in the converter 100, including:

[0096] The driving signal is output according to the control time, and all power tubes are controlled to be turned on according to the driving signal. Therefore, the output voltage of the first inversion unit 103 can be 0.

[0097] The actual voltage of the bridge arm inductance L within the control time is determined according to the control time, and the output voltage of the first bridge arm L within the control time is determined according to the actual voltage of the bridge arm inductance L within the control time. The actual voltage of the bridge arm inductance L within the control time is opposite to the voltage polarity of the bridge arm inductance L when the first voltage of the first inversion unit 103 passes through zero.

[0098] Optionally, the actual voltage of the bridge arm inductor L during the control time satisfies Wherein, Δu represents the actual voltage of the bridge arm inductor L during the control time, L represents the inductance value of the bridge arm inductor L, T d Indicates the preset control duration, i r It represents the current of the bridge arm inductor L when the first voltage of the first inversion unit 103 passes through zero. It can be understood that when the first voltage of the first inversion unit 103 passes through zero, the current direction of the bridge arm inductor L is positive, and when the control time ends, the current direction of the bridge arm inductor L is negative.

[0099] The output voltage of the first bridge arm 101 within the control time period satisfies u F ′=u F -Δu. Where u F ′ represents the output voltage of the first bridge arm 101 within the control time, u Frepresents the output voltage of the first bridge arm 101 outside the control time, and Δu represents the actual voltage of the bridge arm inductance L during the control time. That is to say, a negative voltage Δu applied to the bridge arm inductance L can make the output voltage of the first bridge arm 101 during the control time u without adding an additional voltage source. F -Δu.

[0100] Further, such as Figure 5 As shown, the overvoltage suppression method provided in Example 2 of the present application also includes:

[0101] Step S201a: If the polarity of the first voltage of the first inversion unit 103 at the current time node is opposite to the polarity of the first voltage of the first inversion unit 103 at the previous time node, or if the first amplitude or the second amplitude is 0, it is determined that the first voltage of the first inversion unit 103 passes through zero. In other words, the overvoltage suppression method 200 provided in the present application can also determine whether the first voltage of the first inversion unit 103 passes through zero.

[0102] The first amplitude is used to indicate the amplitude of the first voltage of the first inversion unit 103 at the current time node, and the second amplitude is used to indicate the amplitude of the first voltage of the first inversion unit 103 at the previous time node.

[0103] That is, in step S1a, by judging whether the polarity of the first voltage of the first inversion unit 103 at the current time node is opposite to the polarity of the first voltage of the first inversion unit 103 at the previous time node, or by judging whether the first amplitude or the second amplitude is 0, it is determined that the first voltage of the first inversion unit 103 passes through zero.

[0104] Optional, such as Figure 5 As shown, the overvoltage suppression method 200 provided in Embodiment 2 of the present application further includes:

[0105] Step S202a: When the control time is over, the output voltage of the first bridge arm 101 is restored to u F , the output voltage of the first inversion unit 103 is restored to the first voltage of the first inversion unit 103 by restoring the original trigger pulse of the first inversion unit 103 .

[0106] Example 3

[0107] Based on the same inventive concept, Embodiment 3 of the present application provides an overvoltage suppression device for a converter, such as Figure 6 As shown. The overvoltage suppression device 300 includes:

[0108] The first determination module 301 is used to preset the control time length, or determine the control time length according to the actual current of the bridge arm inductance L in the converter 100 .

[0109] The control module 302 is used to control all power tubes of the first inversion unit 103 in the converter 100 to be turned on according to the control duration, and to control the first bridge arm 101 in the converter 100 .

[0110] In some possible implementations, the first determining module 301 is specifically configured to:

[0111] The control duration is pre-set according to the power quality output by the converter 100. Alternatively, the interval between the first time node and the second time node is used as the control duration. The first time node is used to indicate the time node when the first voltage of the first reversing unit 103 passes through zero. The second time node is used to indicate the time node corresponding to the actual current of the bridge arm inductance L being equal to the current of the bridge arm inductance L when the first voltage of the first reversing unit 103 passes through zero and having opposite polarity.

[0112] In some other possible implementations, the control module 302 is specifically configured to:

[0113] The driving signal is output according to the control time, and all the power tubes are controlled to be turned on according to the driving signal. Therefore, the output voltage of the first inversion unit is 0.

[0114] The actual voltage of the bridge arm inductance L within the control time length is determined according to the control time length, and the output voltage of the first bridge arm L within the control time length is determined according to the actual voltage of the bridge arm inductance L within the control time length. The actual voltage of the bridge arm inductance within the control time length is opposite to the voltage polarity of the bridge arm inductance L when the first voltage of the first inversion unit 103 passes through zero.

[0115] Optionally, the actual voltage of the bridge arm inductor L during the control time satisfies Wherein, Δu represents the actual voltage of the bridge arm inductor L during the control time, L represents the inductance value of the bridge arm inductor L, T d Indicates the preset control duration, i r represents the current of the bridge arm inductor L when the first voltage of the first inversion unit 103 passes through zero.

[0116] The output voltage of the first bridge arm 101 within the control time period satisfies u F ′=u F -Δu; where u F ′ represents the output voltage of the first bridge arm 101 within the control time, u F represents the output voltage of the first bridge arm 101 outside the control time, and Δu represents the actual voltage of the bridge arm inductance L within the control time.

[0117] Furthermore, the overvoltage suppression device 300 provided in Embodiment 3 of the present application further includes a second determination module. The second determination module is used to determine that the first voltage of the first inversion unit 103 is zero-crossing if the polarity of the first voltage of the first inversion unit 103 at the current time node is opposite to the polarity of the first voltage of the first inversion unit 103 at the previous time node, or if the first amplitude or the second amplitude is 0.

[0118] The first amplitude is used to indicate the amplitude of the first voltage of the first inversion unit 103 at the current time node, and the second amplitude is used to indicate the amplitude of the first voltage of the first inversion unit 103 at the previous time node.

[0119] Optionally, the overvoltage suppression device 300 provided in Embodiment 3 of the present application further includes a recovery module. The recovery module is used to: when the control time is over, restore the output voltage of the first bridge arm 101 to u F , the output voltage of the first inversion unit 103 is restored to the first voltage of the first inversion unit 103 .

[0120] Embodiment 4:

[0121] Based on the same inventive concept, the embodiment of the present application also provides a computer device, which includes a processor and a memory, the memory is used to store a computer program, the computer program includes program instructions, and the processor is used to execute the program instructions stored in a computer storage medium. The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. It is the computing core and control core of the terminal, which is suitable for implementing one or more instructions, and is specifically suitable for loading and executing one or more instructions in a computer storage medium to implement the corresponding method flow or corresponding functions, so as to implement the steps of the overvoltage suppression method provided in the above embodiment.

[0122] Embodiment 5:

[0123] Based on the same inventive concept, the embodiment of the present application also provides a storage medium, specifically a computer-readable storage medium (Memory), which is a memory device in a computer device for storing programs and data. It is understandable that the computer-readable storage medium here can include both the built-in storage medium in the computer device and the extended storage medium supported by the computer device. The computer-readable storage medium provides a storage space, which stores the operating system of the terminal. In addition, one or more instructions suitable for being loaded and executed by the processor are also stored in the storage space, and these instructions can be one or more computer programs (including program codes). It should be noted that the computer-readable storage medium here can be a high-speed RAM memory or a non-volatile memory, such as at least one disk memory. The processor can load and execute one or more instructions stored in the computer-readable storage medium to implement the steps of the overvoltage suppression method provided in the above embodiment.

[0124] Those skilled in the art will appreciate that the embodiments of the application may be provided as methods, systems, or computer program products. Therefore, the application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0125] The application is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0126] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1A function specified in one or more boxes.

[0127] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0128] The above are merely embodiments of the application and are not intended to limit the application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the application are included in the scope of the claims of the pending application.

Claims

1. A converter, characterized in that: It includes a first bridge arm, a second bridge arm, a first inversion unit, a second inversion unit and a bridge arm inductor; The second bridge arm, the first bridge arm, the bridge arm inductor and the first inversion unit are connected in series to form a series loop; the second bridge arm is connected in parallel with the second inversion unit; The first bridge arm is used to: generate an output voltage of the first bridge arm; The second bridge arm is used to: generate an output voltage of the second bridge arm; The first inversion unit is used to: superimpose the output voltage of the second bridge arm and the output voltage of the first bridge arm, and reverse the polarity of the superimposed voltage to generate a first voltage that alternates between positive and negative; wherein the superimposed voltage has the same polarity as the output voltage of the second bridge arm, and the first voltage is used to indicate the output voltage or input voltage of the converter; The second inversion unit is used to: invert the polarity of the output voltage of the second bridge arm to generate a second voltage that alternates between positive and negative; wherein the second voltage is used to indicate the input voltage or output voltage of the converter; The bridge arm inductance is used to suppress the current of the series loop.

2. The inverter according to claim 1, characterized in that: The first inversion unit is specifically used to: invert the polarity of the superimposed voltage according to a first preset frequency and a first preset phase angle to generate the first voltage; The second inversion unit is specifically used to invert the polarity of the output voltage of the second bridge arm according to a second preset frequency and a second preset phase angle to generate the second voltage.

3. The inverter according to claim 1, characterized in that: The first bridge arm includes one or more cascaded first submodules; the first submodule is a full-bridge module.

4. The inverter according to claim 1, characterized in that: The second bridge arm includes one or more cascaded second submodules; the second submodule is a half-bridge module or a full-bridge module.

5. The inverter according to claim 1, characterized in that: The first inversion unit and the second inversion unit both adopt an H-bridge topology structure; each bridge arm of the H-bridge topology structure includes one or more power tubes connected in series.

6. A method for suppressing overvoltage of a converter, characterized in that: include: Presetting the control time length, or determining the control time length according to the actual current of the bridge arm inductance in the converter; All power tubes of the first inversion unit in the converter are controlled to be turned on according to the control duration, and the first bridge arm in the converter is controlled.

7. The overvoltage suppression method according to claim 6, characterized in that: The presetting of the control duration, or determining the control duration according to the actual current of the bridge arm inductance in the converter, includes: The control duration is pre-set according to the quality of the power output by the converter; or, The interval between the first time node and the second time node is used as the control duration; wherein the first time node is used to indicate the time node when the first voltage of the first inversion unit passes through zero; the second time node is used to indicate the time node corresponding to the actual current of the bridge arm inductor being equal in amplitude to the current of the bridge arm inductor when the first voltage of the first inversion unit passes through zero and having opposite polarity.

8. The overvoltage suppression method according to claim 6, characterized in that: The controlling all power tubes of the first inversion unit in the converter to be turned on according to the control duration, and controlling the first bridge arm in the converter, comprises: Outputting a driving signal according to the control duration, and controlling all power tubes to be turned on according to the driving signal; The actual voltage of the bridge arm inductance within the control time length is determined according to the control time length, and the output voltage of the first bridge arm within the control time length is determined according to the actual voltage of the bridge arm inductance within the control time length; wherein the actual voltage of the bridge arm inductance within the control time length is opposite in polarity to the voltage of the bridge arm inductance when the first voltage of the first inversion unit passes through zero.

9. The overvoltage suppression method according to claim 8, characterized in that: The actual voltage of the bridge arm inductor during the control time period satisfies Wherein, Δu represents the actual voltage of the bridge arm inductance during the control time, L represents the inductance value of the bridge arm inductance, T d represents the preset control duration, i r Represents the current of the bridge arm inductor when the first voltage of the first inversion unit passes through zero.

10. The overvoltage suppression method according to claim 8, characterized in that: The output voltage of the first bridge arm during the control time period satisfies u F ′=u F -Δu; where u F ′ represents the output voltage of the first bridge arm during the control time, u F represents the output voltage of the first bridge arm outside the control time, and Δu represents the actual voltage of the bridge arm inductance within the control time.

11. The overvoltage suppression method according to claim 6, characterized in that: The overvoltage suppression method further comprises: If the polarity of the first voltage of the first inversion unit at the current time node is opposite to the polarity of the first voltage of the first inversion unit at the previous time node, or if the first amplitude or the second amplitude is 0, it is determined that the first voltage of the first inversion unit crosses zero; The first amplitude is used to indicate the amplitude of the first voltage of the first inversion unit at a current time node, and the second amplitude is used to indicate the amplitude of the first voltage of the first inversion unit at a previous time node.

12. The overvoltage suppression method according to claim 10, characterized in that: The overvoltage suppression method further comprises: When the control time is over, the output voltage of the first bridge arm is restored to u F , restore the output voltage of the first inversion unit to the first voltage of the first inversion unit.

13. An overvoltage suppression device for a converter, characterized in that: include: A first determining module, used to pre-set a control duration, or determine the control duration according to an actual current of an arm inductor in the converter; A control module is used to control all power tubes of the first inversion unit in the converter to be turned on according to the control duration, and to control the first bridge arm in the converter.

14. The overvoltage suppression device according to claim 13, characterized in that: The first determining module is specifically used for: The control duration is pre-set according to the quality of the power output by the converter; or, The interval between the first time node and the second time node is used as the control duration; wherein the first time node is used to indicate the time node when the first voltage of the first inversion unit passes through zero; the second time node is used to indicate the time node corresponding to the actual current of the bridge arm inductor being equal in amplitude to the current of the bridge arm inductor when the first voltage of the first inversion unit passes through zero and having opposite polarity.

15. The overvoltage suppression device according to claim 13, characterized in that: The control module is specifically used for: Outputting a driving signal according to the control duration, and controlling all power tubes to be turned on according to the driving signal; The actual voltage of the bridge arm inductance within the control time length is determined according to the control time length, and the output voltage of the first bridge arm within the control time length is determined according to the actual voltage of the bridge arm inductance within the control time length; wherein the actual voltage of the bridge arm inductance within the control time length is opposite in polarity to the voltage of the bridge arm inductance when the first voltage of the first inversion unit passes through zero.

16. The overvoltage suppression device according to claim 15, characterized in that: The actual voltage of the bridge arm inductor during the control time period satisfies Wherein, Δu represents the actual voltage of the bridge arm inductance during the control time, L represents the inductance value of the bridge arm inductance, T d represents the preset control duration, i r Represents the current of the bridge arm inductor when the first voltage of the first inversion unit passes through zero.

17. The overvoltage suppression device according to claim 15, characterized in that: The output voltage of the first bridge arm during the control time period satisfies u F ′=u F -Δu; where u F ′ represents the output voltage of the first bridge arm during the control time, u F represents the output voltage of the first bridge arm outside the control time, and Δu represents the actual voltage of the bridge arm inductance within the control time.

18. The overvoltage suppression device according to claim 13, characterized in that: The overvoltage suppression device further includes a second determination module; The second determination module is used to: determine that the first voltage of the first inversion unit crosses zero if the polarity of the first voltage of the first inversion unit at the current time node is opposite to the polarity of the first voltage of the first inversion unit at the previous time node, or if the first amplitude or the second amplitude is 0; The first amplitude is used to indicate the amplitude of the first voltage of the first inversion unit at a current time node, and the second amplitude is used to indicate the amplitude of the first voltage of the first inversion unit at a previous time node.

19. The overvoltage suppression device according to claim 17, characterized in that: The overvoltage suppression device further includes a recovery module; the recovery module is used to: When the control time is over, the output voltage of the first bridge arm is restored to u F , restore the output voltage of the first inversion unit to the first voltage of the first inversion unit.

20. A computer device, characterized in that: include: one or more processors; The processor is used to store one or more programs; When the one or more programs are executed by the one or more processors, the overvoltage suppression method according to any one of claims 6 to 12 is implemented.

21. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed, the overvoltage suppression method according to any one of claims 6 to 12 is implemented.

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