Manufacturing method of circuit board structure

Abstract

A manufacturing method of a circuit board structure comprises the following steps: providing a first insulating layer; a first conductive pattern is arranged on the first insulating layer, a plurality of openings are formed in the first conductive pattern in a penetrating mode, and part of the first insulating layer is exposed out of the bottoms of the openings. A second conductive pattern is arranged in each opening, and the second conductive patterns are electrically connected with the first conductive patterns. And arranging a first metal layer on the first conductive pattern and the second conductive pattern, and removing the second conductive pattern and a part of the first metal layer corresponding to the second conductive pattern, so that the first conductive pattern and the remaining part of the first metal layer form an inner side circuit layer. The manufacturing method provided by the invention has the advantages of being simple in process and easy to control.

Description

Technical Field

[0001] The invention belongs to the field of circuit board manufacturing, and in particular relates to a method for manufacturing a circuit board structure. Background Art

[0002] The main methods for making flexible circuit boards are subtractive processes and semi-additive processes. Among them, the subtractive process is a method of selectively removing part of the copper foil on the surface of the copper-clad laminate to obtain a conductive pattern, which is the main method for printed circuit manufacturing today. However, the subtractive method is more difficult to manufacture interlayer vias, and it is not easy to make printed circuit boards with high-pore copper and thick surface copper. The semi-additive process is a method of making an anti-etching pattern on a copper-clad substrate, and then thickening the pre-made substrate metal circuit pattern through electroplating technology, and then removing the anti-etching pattern and flash etching to remove the excess chemical copper layer. The remaining part forms a conductive pattern. However, the semi-additive process is not suitable for making printed circuit boards with a large residual copper rate on both sides, and the process is relatively long and the cost is relatively high. Summary of the invention

[0003] In order to solve the above deficiencies of the prior art, the present application provides a method for manufacturing a circuit board structure.

[0004] A method for manufacturing a circuit board structure comprises the following steps: providing a first insulating layer; providing a first conductive pattern on the first insulating layer, wherein the first conductive pattern is provided with a plurality of openings, and a portion of the first insulating layer is exposed at the bottom of the opening; providing a second conductive pattern on each of the openings, wherein the second conductive pattern is electrically connected to the first conductive pattern; providing a first metal layer on the first conductive pattern and the second conductive pattern, and removing the second conductive pattern and a portion of the first metal layer corresponding to the second conductive pattern, so that the first conductive pattern and the remaining portion of the first metal layer form an inner circuit layer.

[0005] In some possible embodiments, the first insulating layer is provided with a plurality of first openings, the first conductive pattern includes an upper conductive pattern and a lower conductive pattern, part of the upper conductive pattern and part of the lower conductive pattern are filled into the first opening to form a hollow conductor, and the manufacturing method further includes the steps of: providing a first conductive ink layer on one side of the first insulating layer, and part of the first conductive ink layer is filled into the first opening from one end to form a first half hollow column. A second conductive ink layer is provided on the other side of the first insulating layer, and part of the second conductive ink layer is filled into the second end of the first opening to form a second half hollow column, and the second half hollow column is connected to the second half hollow column to form a hollow hole. The first conductive ink layer is cured to form the upper conductive pattern, the second conductive ink layer is cured to form the lower conductive pattern, and the hollow hole is cured to form the inner hollow conductor.

[0006] In some possible embodiments, the first conductive ink layer is disposed on one side of the first insulating layer by printing, the second conductive ink layer is disposed on the other side of the first insulating layer by printing, and the second conductive pattern is formed on the portion of the first insulating layer exposed in the opening by sputtering.

[0007] In some possible embodiments, the first metal layer is formed on the first conductive pattern and the second conductive pattern by electroplating, and the step of "arranging the first metal layer on the first conductive pattern and the second conductive pattern" also includes: electroplating in the inner hollow conductor to form a conductive column, and the conductive column is electrically connected to the inner circuit layer.

[0008] In some possible embodiments, the method further includes the steps of: disposing a second insulating layer on the inner circuit layer, disposing a third conductive pattern on the second insulating layer, and disposing a second metal layer on the third conductive pattern.

[0009] In some possible embodiments, the second insulating layer is penetrated by a second opening, part of the inner circuit layer is exposed at the bottom of the second opening, part of the third conductive pattern is filled into the second opening to form an outer conductor, and the step of "arranging a third conductive pattern in the second insulating layer" includes: arranging a third conductive ink layer in the second insulating layer, filling part of the third conductive ink into the second opening and curing the third conductive ink layer to form the third conductive pattern, curing part of the third conductive ink filled into the second opening to form the outer conductor, and the outer conductor electrically connects the inner circuit layer and the second metal layer.

[0010] In some possible embodiments, the second insulating layer is penetrated by a third opening, a portion of the inner circuit layer is exposed at the bottom of the third opening, and before the step of "arranging a second metal layer on the third conductive pattern", the step further includes: arranging a dry film on the third opening. After the step of "arranging a second metal layer on the third conductive pattern", the step further includes: removing the dry film.

[0011] In some possible embodiments, the method further includes the step of removing an edge portion of the second metal layer.

[0012] In some possible embodiments, the second metal layer is formed on the third conductive pattern by electroplating.

[0013] In some possible embodiments, the second insulating layer and the first insulating layer are made of polyimide or liquid crystal copolymer.

[0014] The manufacturing method of the circuit board structure provided by the present application can realize forming a circuit layer on the first insulating layer by arranging a first conductive pattern on the first insulating layer, and then electroplating the first metal layer on the first conductive pattern, and the first metal layer and the first conductive pattern form an inner circuit layer. Compared with the subtractive method or the semi-additive method, the process is simple and easy to control, which is conducive to improving the production efficiency and reducing the production cost. At the same time, it also avoids liquid etching, which is conducive to reducing liquid and has environmental advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A schematic cross-sectional view of a first insulating layer provided in one embodiment of the present application.

[0016] Figure 2 for Figure 1 The cross-sectional diagram shown is a diagram of a first insulating layer after a first opening is provided through the first insulating layer.

[0017] Figure 3 for Figure 2 The cross-sectional schematic diagram shown is after a first conductive ink layer is provided on one side of the first insulating layer.

[0018] Figure 4 for Figure 3 The cross-sectional schematic diagram shows that a second conductive ink layer is disposed on the other side of the first insulating layer.

[0019] Figure 5 For curing Figure 4 A schematic cross-sectional view of the first conductive ink layer and the second conductive ink layer is shown.

[0020] Figure 6 for Figure 5 The cross-sectional schematic diagram of the first conductive pattern after the second conductive pattern is provided is shown.

[0021] Figure 7 for Figure 6 The cross-sectional schematic diagram of the first conductive pattern and the second conductive pattern after the first metal layer is provided.

[0022] Figure 8 For etching Figure 7 A schematic cross-sectional view of an intermediate body obtained after forming the second conductive pattern and its corresponding partial metal layer.

[0023] Fig. 9 for Figure 8 The cross-sectional schematic diagram shown is after second insulating layers are provided on opposite sides of the intermediate body.

[0024] Fig.10 for Fig. 9 The cross-sectional schematic diagram shown is after the second upper insulating layer is provided with the third conductive ink layer.

[0025] Fig.11 for Fig.10 The cross-sectional schematic diagram shown is after the second lower insulating layer is provided with a fourth conductive ink layer.

[0026] Fig.12 For curing Fig.11 A schematic cross-sectional view of the third conductive ink layer and the fourth conductive ink layer is shown.

[0027] Fig.13 for Fig.12 The third conductive pattern and the fourth conductive pattern are shown as a schematic cross-sectional view after being provided with a dry film.

[0028] Fig.14 for Fig.13 The third conductive pattern and the fourth conductive pattern are schematic cross-sectional views after the second metal layer is disposed respectively.

[0029] Fig.15 A schematic cross-sectional view of a circuit board structure provided in one embodiment of the present application.

[0030] Main component symbols

[0031] Circuit board structure 100

[0032] The first insulating layer 10

[0033] The first opening 11

[0034] The first conductive ink layer 12

[0035] First half hollow column 121

[0036] The second conductive ink layer 13

[0037] The second half hollow column 131

[0038] Hollow column 14

[0039] The first conductive pattern 20

[0040] Opening 201

[0041] Upper opening 201a

[0042] Lower side opening 201b

[0043] First upper side pattern 21

[0044] First lower side pattern 22

[0045] Inner hollow conductor 23

[0046] Electroplating surface 24

[0047] First shielding plate 25

[0048] First through hole 251

[0049] Second shielding plate 26

[0050] The second through hole 261

[0051] The second conductive pattern 202

[0052] Second upper side pattern 231

[0053] Second lower side pattern 232

[0054] First metal layer 30

[0055] Inner conductor 301

[0056] Intermediate 302

[0057] First upper metal layer 31

[0058] First lower metal layer 32

[0059] Inner circuit layer 33

[0060] The first inner circuit layer 331

[0061] The second inner circuit layer 332

[0062] The second insulating layer 40

[0063] The second opening 41

[0064] Second upper insulating layer 42

[0065] Second lower insulating layer 43

[0066] The third opening 44

[0067] The third upper opening 441

[0068] The third lower opening 442

[0069] The third conductive pattern 51

[0070] External conductive body 52

[0071] The third conductive ink layer 53

[0072] Fourth conductive ink layer 54

[0073] Dry film 55

[0074] The second metal layer 60

[0075] Second upper metal layer 61

[0076] Second lower metal layer 62

[0077] Thickness direction A

[0078] The following specific implementation methods will further illustrate the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0079] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0080] See also Figures 1 to 15 , an embodiment of the present application provides a method for manufacturing a circuit board structure 100, comprising the steps of:

[0081] S1: See Figure 1 A first insulating layer 10 is provided, wherein the material of the first insulating layer 10 includes at least one of polyimide (PI), liquid crystal polymer (LCP), epoxy resin (EP), polytetrafluoroethylene (PTFE), polyetheretherketone (PEEK), polyphenylene oxide (PPO), polyimide (PI), polyester resin (PET) and polyethylene naphthalate diformic acid glycol ester (PEN). The first insulating layer 10 has a thickness direction A.

[0082] S2: See Figure 2 A plurality of first openings 11 are arranged at intervals in the first insulating layer 10, and the first openings 11 penetrate the first insulating layer 10 along the thickness direction A. Specifically, the plurality of first openings 11 are formed by laser ablation or mechanical drilling.

[0083] S3: See Figures 3 to 5 A first conductive pattern 20 is disposed on the first insulating layer 10 . A plurality of openings 201 are formed through the first conductive pattern 20 . Part of the first insulating layer 10 is exposed at the bottom of the openings 201 .

[0084] In this embodiment, the first conductive pattern 20 includes a first upper pattern 21 and a first lower pattern 22. The plurality of openings 201 include a plurality of upper openings 201a and a plurality of lower openings 201b. Part of the first upper pattern 21 and part of the first lower pattern 22 are filled into the first opening 11 to form an inner hollow conductor 23. Step S3 specifically includes:

[0085] S31: See Figure 3 , a first conductive ink layer 12 is disposed on one side of the first insulating layer 10, and the second conductive ink layer 13 is pre-cured by light, and a portion of the pre-cured first conductive ink layer 12 is filled from one end of the first opening 11 to form a first semi-hollow column 121,

[0086] In this embodiment, the first conductive ink layer 12 includes conductive particles, a solvent, a curing agent and a dispersant. The conductive particles are the main components for realizing the conductive function of the first conductive ink layer 12. The conductive particles include nanosilver, copper ions and gold. The mass of the conductive particles accounts for 1%-4% of the total mass. The solvent includes alcohols or ketones. The mass of the solvent accounts for 73% to 95% of the total mass. The curing agent includes one of an acrylate curing agent, an imine curing agent and an epichloride curing agent. The dispersant includes one of sodium dodecyl sulfonate and polyoxyethylene stearate. The mass of the curing agent and the dispersant accounts for 1%-4% of the total mass.

[0087] S32: See Figure 4 , a second conductive ink layer 13 is disposed on the other side of the first insulating layer 10, and part of the second conductive ink layer 13 is filled from the other end of the first opening 11 to form a second semi-hollow column 131. The second semi-hollow column 131 is connected to the first semi-hollow column 121 to form a hollow column 14. The material of the second conductive ink layer 13 is the same as that of the first conductive ink layer 12. It can be understood that in other embodiments of the present application, the first insulating layer 10 can be provided with conductive ink only on one side.

[0088] S33: See Figure 5 , bake to completely cure the first conductive ink layer 12 and form the first upper pattern 21; bake to cure the second conductive ink layer 13 and form the first lower pattern 22; bake to cure the hollow column 14 to form the inner hollow conductor 23. The first upper pattern 21 is formed with a plurality of upper openings 201a, and the first lower pattern 22 is formed with a plurality of lower openings 201b.

[0089] S4: See Figure 6, sputtering is performed in the plurality of openings 201 of the first conductive pattern 20 to form a second conductive pattern 202. The second conductive pattern 202 connects the first conductive pattern 20 separated by the openings 201. In this way, the first conductive pattern 20 and the second conductive pattern 202 are electrically connected to form a continuous electroplating surface 24, and the electroplating surface 24 can be subjected to subsequent electroplating operations. It can be understood that in other embodiments of the present application, if the openings 201 do not separate the first conductive pattern 20 into isolated areas (e.g., isolated connection pad areas), there is no need to set the second conductive pattern 202 to connect the first conductive pattern 20.

[0090] In this embodiment, the second conductive pattern 202 includes a second upper pattern 231 and a second lower pattern 232. The second upper pattern 231 is disposed at the bottom of the upper opening 201a, and the second lower pattern 232 is disposed at the bottom of the lower opening 201b. Step S4 specifically includes:

[0091] S41: See Figure 6 A first shielding plate 25 is provided on the first upper side pattern 21, and a first through hole 251 is penetrated by the first shielding plate 25, and the first through hole 251 is provided corresponding to the upper side opening 201a; and a second shielding plate 26 is provided on the first lower side pattern 22, and a second through hole 261 is penetrated by the second shielding plate 26, and the second through hole 261 is provided corresponding to the lower side opening 201b.

[0092] S42: See Figure 6 , sputtering is performed above the first baffle plate 25, and part of the sputtered particles are deposited at the bottom of the upper opening 201a through the first through hole 251, thereby forming the second upper pattern 231; and sputtering is performed above the second baffle plate 26, and part of the sputtered particles are deposited at the bottom of the lower opening 201b through the second through hole 261, thereby forming the second lower pattern 232.

[0093] S5: See Figure 7 , electroplating is performed on the electroplating surface 24 to form a first metal layer 30, and the first metal layer 30 covers the first conductive pattern 20 and the second conductive pattern 202. Part of the first metal layer 30 fills the cavity of the inner hollow conductor 23, and the inner hollow conductor 23 and part of the metal filled in the inner hollow conductor 23 constitute the inner conductive body 301. The material of the first metal layer 30 includes at least one of copper, iron, aluminum, silver and gold.

[0094] In this embodiment, the first metal layer 30 includes a first upper metal layer 31 and a first lower metal layer 32. The first upper metal layer 31 covers the first upper pattern 21 and the second upper pattern 231. The first lower metal layer 32 covers the first lower pattern 22 and the second lower pattern 232.

[0095] In this embodiment, step S5 also includes: cutting edge portions of the first metal layer 30 and the first conductive pattern 20 to form chamfers, thereby removing burrs formed during the electroplating process, thereby improving the conductive properties of the first metal layer 30 and reducing the risk of short circuits in subsequent manufacturing processes.

[0096] S6: See Figure 7 and Figure 8 , the second conductive pattern 202 and the portion of the first metal layer 30 corresponding to the second conductive pattern 202 are etched away, so that the first conductive pattern 20 and the portion of the first metal layer 30 corresponding to the first conductive pattern 20 together form an inner circuit layer 33, and an intermediate 302 is obtained. That is, the first conductive pattern 20 and the remaining portion of the first metal layer 30 constitute the inner circuit layer 33. Specifically, the second conductive pattern 202 and the portion of the first metal layer 30 corresponding to the second conductive pattern 202 are removed by rapid etching with liquid medicine.

[0097] In this embodiment, the inner circuit layer 33 includes a first inner circuit layer 331 and a second inner circuit layer 332. The first inner circuit layer 331 and the second inner circuit layer 332 are respectively formed on opposite sides of the first insulating layer 10. The inner conductive body 301 penetrates the first insulating layer 10 and electrically connects the first inner circuit layer 331 and the second inner circuit layer 332.

[0098] S7: See Fig. 9 A second insulating layer 40 is disposed on the intermediate body 302, and a second opening 41 and a third opening 44 are disposed through the second insulating layer 40, and a portion of the inner circuit layer 33 is exposed at the bottom of the second opening 41 and the bottom of the third opening 44. The material of the second insulating layer 40 is the same as that of the first insulating layer 10.

[0099] In this embodiment, the second insulating layer 40 includes a second upper insulating layer 42 and a second lower insulating layer 43. The second upper insulating layer 42 is disposed on the first inner circuit layer 331, and the second lower insulating layer 43 is disposed on the second inner circuit layer 332. The third opening 44 includes a third upper opening 441 and a third lower opening 442. The second opening 41 and the third upper opening 441 both penetrate the second upper insulating layer 42, and the third lower opening 442 both penetrate the second lower insulating layer 43.

[0100] S8: See Figures 10 to 13 , a third conductive pattern 51 is provided on the second insulating layer 40, and a portion of the third conductive pattern 51 is filled into the second opening 41 to form an outer conductive body 52. ​​The outer conductive body 52 is electrically connected to the first inner circuit layer 331. The third conductive pattern 51 is provided with a window 510, and the third opening 44 is provided corresponding to the window 510, so that a portion of the inner circuit layer 33 can be exposed at the bottom of the window 510.

[0101] In this embodiment, the third conductive pattern 51 includes a third upper pattern 511 and a third lower pattern 512. Step S8 specifically includes:

[0102] S81: See Fig.10 A third conductive ink layer 53 is provided on the second upper insulating layer 42 by printing, and a portion of the third conductive ink layer 53 is filled into the second opening 41. The material of the third conductive ink layer 53 is the same as that of the first conductive ink layer 12 and the second conductive ink layer 13.

[0103] S82: See Fig.11 A fourth conductive ink layer 54 is provided on the second lower insulating layer 43 by printing. The material of the fourth conductive ink layer 54 is the same as that of the first conductive ink layer 12 and the second conductive ink layer 13.

[0104] S83: See Fig.12 , curing the third conductive ink layer 53 to form the third upper pattern 511 , curing the fourth conductive ink layer 54 to form the third lower pattern 512 , and curing part of the conductive ink filled in the second opening 41 to form the outer conductive body 52 .

[0105] S9: Please see Figures 13 to 15, a second metal layer 60 is formed by electroplating the third conductive pattern 51. The second metal layer 60 is connected to the inner circuit layer 33 through the third conductive pattern 51 and the outer conductive body 52. ​​Specifically, if the inner circuit layer 33 is grounded, the third conductive pattern 51 and the second metal layer 60 can be used as an electromagnetic shield.

[0106] In this embodiment, see Fig.13 , before step S9, it also includes: filling the window 510 and the third opening 44 corresponding to the window 510 with a dry film 55, wherein the dry film 55 can shield the electroplating deposition, so that the electroplating process does not deposit metal on the inner circuit layer 33. Fig.15 After step S9, the method further includes: removing the dry film 55.

[0107] In this embodiment, see Fig.14 The second metal layer 60 includes a second upper metal layer 61 and a second lower metal layer 62. The second upper metal layer 61 is formed on the third upper pattern 511 by electroplating, and the second lower metal layer 62 is formed on the third lower pattern 512 by electroplating.

[0108] S10: See Fig.15 , remove the edge portion of the second upper metal layer 61, and remove the edge portion of the second lower metal layer 62, so that the edge portion of the second metal layer 60 is more regular, and obtain the circuit board structure 100. Specifically, the edge of the second upper metal layer 61 and the edge of the second lower metal layer 62 are removed by machine tool punching.

[0109] Compared with the prior art, the manufacturing method of the circuit board structure 100 provided in the present application has the following advantages:

[0110] (i) By providing a first conductive pattern 20 on the first insulating layer 10, and then electroplating to form a first metal layer 30 on the first conductive pattern 20, the first metal layer 30 and the first conductive pattern 20 form the inner circuit layer 33, so that a circuit layer can be formed on the first insulating layer 10. Compared with the subtractive method or the semi-additive method, the process is simple and easy to control, which is conducive to improving the production efficiency and reducing the production cost. At the same time, it also avoids liquid etching, which is conducive to reducing liquid and has environmental advantages.

[0111] (ii) By printing conductive ink (first conductive ink layer 12, third conductive ink layer 53) on the insulating layer (first insulating layer 10, second insulating layer 40), it is advantageous to control the thickness of the conductive pattern (first conductive pattern 20, third conductive pattern 51), and part of the conductive ink can be filled into the openings (opening 201, second opening 41) of the insulating layer to form interlayer conductors (inner conductor 301, outer conductor 52), thereby saving the additional process of making interlayer conductors and further improving the production efficiency of the circuit board structure 100.

[0112] The above description is only an optimized specific implementation of the present application, but it cannot be limited to this implementation in the actual application process. For ordinary technicians in this field, other variations and changes made according to the technical concept of the present application should all fall within the protection scope of the present application.

Claims

1. A method for manufacturing a circuit board structure, characterized in that: Includes steps: providing a first insulating layer; A first conductive pattern is provided on the first insulating layer, wherein a plurality of openings are provided through the first conductive pattern, and a portion of the first insulating layer is exposed at the bottom of the openings; Disposing a second conductive pattern in each of the openings, wherein the second conductive pattern is electrically connected to the first conductive pattern; Disposing a first metal layer on the first conductive pattern and the second conductive pattern; as well as The second conductive pattern and a portion of the first metal layer corresponding to the second conductive pattern are removed, so that the first conductive pattern and a remaining portion of the first metal layer form an inner circuit layer.

2. The manufacturing method according to claim 1, characterized in that The first insulating layer is provided with a plurality of first openings, the first conductive pattern includes an upper conductive pattern and a lower conductive pattern, part of the upper conductive pattern and part of the lower conductive pattern are filled into the first openings to form a hollow conductive body, and the manufacturing method further comprises the steps of: A first conductive ink layer is disposed on one side of the first insulating layer, and a portion of the first conductive ink layer is filled into one end of the first opening to form a first semi-hollow column; A second conductive ink layer is disposed on the other side of the first insulating layer, a portion of the second conductive ink layer is filled into the other end of the first opening to form a second semi-hollow column, and the second semi-hollow column is connected to the second semi-hollow column to form a hollow hole; The first conductive ink layer is cured to form the upper conductive pattern, the second conductive ink layer is cured to form the lower conductive pattern, and the hollow hole is cured to form the inner hollow conductor.

3. The manufacturing method according to claim 2, characterized in that: The first conductive ink layer is disposed on one side of the first insulating layer by printing, the second conductive ink layer is disposed on the other side of the first insulating layer by printing, and the second conductive pattern is formed on a portion of the first insulating layer exposed in the opening by sputtering.

4. The manufacturing method according to claim 2, characterized in that: The first metal layer is formed on the first conductive pattern and the second conductive pattern by electroplating, and the step of "arranging the first metal layer on the first conductive pattern and the second conductive pattern" also includes: electroplating in the inner hollow conductor to form an inner conductor, and the inner conductor is electrically connected to the inner circuit layer.

5. The manufacturing method according to claim 1, characterized in that: Also includes the steps: A second insulating layer is provided on the inner circuit layer, Disposing a third conductive pattern on the second insulating layer, and A second metal layer is disposed on the third conductive pattern.

6. The manufacturing method according to claim 5, characterized in that: The second insulating layer is provided with a second opening, part of the inner circuit layer is exposed at the bottom of the second opening, part of the third conductive pattern is filled into the second opening to form an outer conductive body, and the step of "providing the third conductive pattern in the second insulating layer" includes: Disposing a third conductive ink layer on the second insulating layer, and partially filling the second opening with the third conductive ink; and The third conductive ink layer is cured to form the third conductive pattern, and a portion of the third conductive ink filled in the second opening is cured to form the outer conductive body, wherein the outer conductive body electrically connects the inner circuit layer and the second metal layer.

7. The manufacturing method according to claim 5, characterized in that: The second insulating layer is penetrated by a third opening, and part of the inner circuit layer is exposed at the bottom of the third opening. Before the step of "arranging a second metal layer on the third conductive pattern", the step further includes: arranging a dry film on the third opening; After the step of "arranging a second metal layer on the third conductive pattern", the step also includes: removing the dry film.

8. The manufacturing method according to claim 5, characterized in that: The method further comprises the step of removing an edge portion of the second metal layer.

9. The manufacturing method according to claim 5, characterized in that: The second metal layer is formed on the third conductive pattern by electroplating.

10. The manufacturing method according to claim 5, characterized in that: The second insulating layer and the first insulating layer are both made of polyimide or liquid crystal copolymer.

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